[deliverable/linux.git] / arch / powerpc / include / asm / opal.h

/*
 * PowerNV OPAL definitions.
 *
 * Copyright 2011 IBM Corp.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_POWERPC_OPAL_H
#define _ASM_POWERPC_OPAL_H

#include <asm/opal-api.h>

#ifndef __ASSEMBLY__

#include <linux/notifier.h>

/* We calculate number of sg entries based on PAGE_SIZE */
#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))

/* /sys/firmware/opal */
extern struct kobject *opal_kobj;

/* /ibm,opal */
extern struct device_node *opal_node;

/* API functions */
int64_t opal_invalid_call(void);
int64_t opal_console_write(int64_t term_number, __be64 *length,
			   const uint8_t *buffer);
int64_t opal_console_read(int64_t term_number, __be64 *length,
			  uint8_t *buffer);
int64_t opal_console_write_buffer_space(int64_t term_number,
					__be64 *length);
int64_t opal_console_flush(int64_t term_number);
int64_t opal_rtc_read(__be32 *year_month_day,
		      __be64 *hour_minute_second_millisecond);
int64_t opal_rtc_write(uint32_t year_month_day,
		       uint64_t hour_minute_second_millisecond);
int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
		       uint32_t hour_min);
int64_t opal_cec_power_down(uint64_t request);
int64_t opal_cec_reboot(void);
int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag);
int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
int64_t opal_poll_events(__be64 *outstanding_event_mask);
int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
				    uint64_t tce_mem_size);
int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
				    uint64_t tce_mem_size);
int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
				  uint64_t offset, uint8_t *data);
int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
				       uint64_t offset, __be16 *data);
int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
				  uint64_t offset, __be32 *data);
int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
				   uint64_t offset, uint8_t data);
int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
					uint64_t offset, uint16_t data);
int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
				   uint64_t offset, uint32_t data);
int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
int64_t opal_register_exception_handler(uint64_t opal_exception,
					uint64_t handler_address,
					uint64_t glue_cache_line);
int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
				   uint8_t *freeze_state,
				   __be16 *pci_error_type,
				   __be64 *phb_status);
int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
				  uint64_t eeh_action_token);
int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
				uint64_t eeh_action_token);
int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
			    uint32_t func, uint64_t addr, uint64_t mask);
int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);


int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
				 uint16_t window_num, uint16_t enable);
int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
				    uint16_t window_num,
				    uint64_t starting_real_address,
				    uint64_t starting_pci_address,
				    uint64_t size);
int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
				    uint16_t window_type, uint16_t window_num,
				    uint16_t segment_num);
int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
				      uint64_t ivt_addr, uint64_t ivt_len,
				      uint64_t reject_array_addr,
				      uint64_t peltv_addr);
int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
			uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
			uint8_t pe_action);
int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
			   uint8_t state);
int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
				uint32_t state);
int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
				  uint8_t *p_bit, uint8_t *q_bit);
int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
				  uint8_t p_bit, uint8_t q_bit);
int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
			     uint32_t xive_num);
int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
			     __be32 *interrupt_source_number);
int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
			uint8_t msi_range, __be32 *msi_address,
			__be32 *message_data);
int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
			uint32_t xive_num, uint8_t msi_range,
			__be64 *msi_address, __be32 *message_data);
int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
				   uint16_t tce_levels, uint64_t tce_table_addr,
				   uint64_t tce_table_size, uint64_t tce_page_size);
int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
					uint16_t dma_window_number, uint64_t pci_start_addr,
					uint64_t pci_mem_size);
int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state);

int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
				   uint64_t diag_buffer_len);
int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
				   uint64_t diag_buffer_len);
int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
				    uint64_t diag_buffer_len);
int64_t opal_pci_fence_phb(uint64_t phb_id);
int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes);
int64_t opal_get_dpo_status(__be64 *dpo_timeout);
int64_t opal_set_system_attention_led(uint8_t led_action);
int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
			    __be16 *pci_error_type, __be16 *severity);
int64_t opal_pci_poll(uint64_t phb_id);
int64_t opal_return_cpu(void);
int64_t opal_check_token(uint64_t token);
int64_t opal_reinit_cpus(uint64_t flags);

int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);

int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
		       uint32_t addr, uint32_t data, uint32_t sz);
int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
		      uint32_t addr, __be32 *data, uint32_t sz);

int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
int64_t opal_send_ack_elog(uint64_t log_id);
void opal_resend_pending_logs(void);

int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
int64_t opal_manage_flash(uint8_t op);
int64_t opal_update_flash(uint64_t blk_list);
int64_t opal_dump_init(uint8_t dump_type);
int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
int64_t opal_dump_ack(uint32_t dump_id);
int64_t opal_dump_resend_notification(void);

int64_t opal_get_msg(uint64_t buffer, uint64_t size);
int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
int64_t opal_sync_host_reboot(void);
int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
		uint64_t length);
int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
		uint64_t length);
int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
int64_t opal_handle_hmi(void);
int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
int64_t opal_unregister_dump_region(uint32_t id);
int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
		uint64_t msg_len);
int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
		uint64_t *msg_len);
int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
			 struct opal_i2c_request *oreq);
int64_t opal_prd_msg(struct opal_prd_msg *msg);
int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask,
			  __be64 *led_value, __be64 *max_led_type);
int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
			  const u64 led_value, __be64 *max_led_type);

int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
		uint64_t size, uint64_t token);
int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
		uint64_t size, uint64_t token);
int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
		uint64_t token);

/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
				   int depth, void *data);
extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
				 const char *uname, int depth, void *data);

extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);

extern void hvc_opal_init_early(void);

extern int opal_notifier_register(struct notifier_block *nb);
extern int opal_notifier_unregister(struct notifier_block *nb);

extern int opal_message_notifier_register(enum opal_msg_type msg_type,
						struct notifier_block *nb);
extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
					    struct notifier_block *nb);
extern void opal_notifier_enable(void);
extern void opal_notifier_disable(void);
extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);

extern int __opal_async_get_token(void);
extern int opal_async_get_token_interruptible(void);
extern int __opal_async_release_token(int token);
extern int opal_async_release_token(int token);
extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);

struct rtc_time;
extern unsigned long opal_get_boot_time(void);
extern void opal_nvram_init(void);
extern void opal_flash_update_init(void);
extern void opal_flash_term_callback(void);
extern int opal_elog_init(void);
extern void opal_platform_dump_init(void);
extern void opal_sys_param_init(void);
extern void opal_msglog_init(void);
extern void opal_msglog_sysfs_init(void);
extern int opal_async_comp_init(void);
extern int opal_sensor_init(void);
extern int opal_hmi_handler_init(void);
extern int opal_event_init(void);

extern int opal_machine_check(struct pt_regs *regs);
extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
extern int opal_hmi_exception_early(struct pt_regs *regs);
extern int opal_handle_hmi_exception(struct pt_regs *regs);

extern void opal_shutdown(void);
extern int opal_resync_timebase(void);

extern void opal_lpc_init(void);

extern void opal_kmsg_init(void);

extern int opal_event_request(unsigned int opal_event_nr);

struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
					     unsigned long vmalloc_size);
void opal_free_sg_list(struct opal_sg_list *sg);

extern int opal_error_code(int rc);

ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);

#endif /* __ASSEMBLY__ */

#endif /* _ASM_POWERPC_OPAL_H */
Commit	Line	Data
27f44888 BH	1	/*
	2	* PowerNV OPAL definitions.
	3	*
	4	* Copyright 2011 IBM Corp.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
d800ba12 ME	12	#ifndef _ASM_POWERPC_OPAL_H
d800ba12 ME	13	#define _ASM_POWERPC_OPAL_H
27f44888	14
d800ba12	15	#include <asm/opal-api.h>
8eb8ac89	16
14a43e69 BH	17	#ifndef __ASSEMBLY__
14a43e69 BH	18
bfd25d72 MN	19	#include <linux/notifier.h>
bfd25d72 MN	20
d800ba12 ME	21	/* We calculate number of sg entries based on PAGE_SIZE */
d800ba12 ME	22	#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
47083450	23
6f68b5e2 VH	24	/* /sys/firmware/opal */
	25	extern struct kobject *opal_kobj;
	26
bfc36894 JS	27	/* /ibm,opal */
	28	extern struct device_node *opal_node;
	29
14a43e69	30	/* API functions */
e28b05e7	31	int64_t opal_invalid_call(void);
4f89363b	32	int64_t opal_console_write(int64_t term_number, __be64 *length,
14a43e69	33	const uint8_t *buffer);
4f89363b	34	int64_t opal_console_read(int64_t term_number, __be64 *length,
14a43e69 BH	35	uint8_t *buffer);
14a43e69 BH	36	int64_t opal_console_write_buffer_space(int64_t term_number,
4f89363b	37	__be64 *length);
c88c5d43	38	int64_t opal_console_flush(int64_t term_number);
6feff6d4 AB	39	int64_t opal_rtc_read(__be32 *year_month_day,
6feff6d4 AB	40	__be64 *hour_minute_second_millisecond);
14a43e69 BH	41	int64_t opal_rtc_write(uint32_t year_month_day,
14a43e69 BH	42	uint64_t hour_minute_second_millisecond);
16b1d26e NG	43	int64_t opal_tpo_read(uint64_t token, __be32 year_mon_day, __be32 hour_min);
	44	int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
	45	uint32_t hour_min);
14a43e69 BH	46	int64_t opal_cec_power_down(uint64_t request);
14a43e69 BH	47	int64_t opal_cec_reboot(void);
e784b649	48	int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag);
14a43e69 BH	49	int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
14a43e69 BH	50	int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
5e4da530	51	int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
4f89363b	52	int64_t opal_poll_events(__be64 *outstanding_event_mask);
14a43e69 BH	53	int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
	54	uint64_t tce_mem_size);
	55	int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
	56	uint64_t tce_mem_size);
	57	int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
	58	uint64_t offset, uint8_t *data);
	59	int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
5e4da530	60	uint64_t offset, __be16 *data);
14a43e69	61	int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
5e4da530	62	uint64_t offset, __be32 *data);
14a43e69 BH	63	int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
	64	uint64_t offset, uint8_t data);
	65	int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
	66	uint64_t offset, uint16_t data);
	67	int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
	68	uint64_t offset, uint32_t data);
	69	int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
5e4da530	70	int64_t opal_get_xive(uint32_t isn, __be16 server, uint8_t priority);
14a43e69 BH	71	int64_t opal_register_exception_handler(uint64_t opal_exception,
	72	uint64_t handler_address,
	73	uint64_t glue_cache_line);
	74	int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
	75	uint8_t *freeze_state,
5e4da530 AB	76	__be16 *pci_error_type,
5e4da530 AB	77	__be64 *phb_status);
14a43e69 BH	78	int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
14a43e69 BH	79	uint64_t eeh_action_token);
5ca27efb GS	80	int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
5ca27efb GS	81	uint64_t eeh_action_token);
5b642340 GS	82	int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
5b642340 GS	83	uint32_t func, uint64_t addr, uint64_t mask);
14a43e69 BH	84	int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
	85
	86
	87
	88	int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
	89	uint16_t window_num, uint16_t enable);
	90	int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
	91	uint16_t window_num,
	92	uint64_t starting_real_address,
	93	uint64_t starting_pci_address,
262af557	94	uint64_t size);
14a43e69 BH	95	int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
	96	uint16_t window_type, uint16_t window_num,
	97	uint16_t segment_num);
	98	int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
	99	uint64_t ivt_addr, uint64_t ivt_len,
	100	uint64_t reject_array_addr,
	101	uint64_t peltv_addr);
	102	int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
	103	uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
	104	uint8_t pe_action);
	105	int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
	106	uint8_t state);
	107	int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
	108	int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
	109	uint32_t state);
	110	int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
	111	uint8_t p_bit, uint8_t q_bit);
	112	int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
	113	uint8_t p_bit, uint8_t q_bit);
137436c9	114	int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
14a43e69 BH	115	int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
	116	uint32_t xive_num);
	117	int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
5e4da530	118	__be32 *interrupt_source_number);
14a43e69	119	int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
5e4da530 AB	120	uint8_t msi_range, __be32 *msi_address,
5e4da530 AB	121	__be32 *message_data);
14a43e69 BH	122	int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
14a43e69 BH	123	uint32_t xive_num, uint8_t msi_range,
5e4da530	124	__be64 msi_address, __be32 message_data);
14a43e69 BH	125	int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
	126	int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
	127	int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
	128	int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
	129	uint16_t tce_levels, uint64_t tce_table_addr,
	130	uint64_t tce_table_size, uint64_t tce_page_size);
	131	int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
	132	uint16_t dma_window_number, uint64_t pci_start_addr,
	133	uint64_t pci_mem_size);
	134	int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state);
	135
23773230 GS	136	int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
	137	uint64_t diag_buffer_len);
	138	int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
	139	uint64_t diag_buffer_len);
	140	int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
	141	uint64_t diag_buffer_len);
f11fe552	142	int64_t opal_pci_fence_phb(uint64_t phb_id);
9be3becc	143	int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
f11fe552 BH	144	int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
f11fe552 BH	145	int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
3b476aad VP	146	int64_t opal_get_epow_status(__be16 epow_status, __be16 num_epow_classes);
3b476aad VP	147	int64_t opal_get_dpo_status(__be64 *dpo_timeout);
f11fe552	148	int64_t opal_set_system_attention_led(uint8_t led_action);
ddf0322a GC	149	int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
ddf0322a GC	150	__be16 pci_error_type, __be16 severity);
23773230	151	int64_t opal_pci_poll(uint64_t phb_id);
13906db6	152	int64_t opal_return_cpu(void);
bffe6bda	153	int64_t opal_check_token(uint64_t token);
4926616c	154	int64_t opal_reinit_cpus(uint64_t flags);
f11fe552	155
2f3f38e4 BH	156	int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
2f3f38e4 BH	157	int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
cc0efb57 BH	158
	159	int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
	160	uint32_t addr, uint32_t data, uint32_t sz);
	161	int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
803c2d2f	162	uint32_t addr, __be32 *data, uint32_t sz);
774fea1a	163
2bad7423	164	int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
14ad0c58	165	int64_t opal_get_elog_size(__be64 log_id, __be64 size, __be64 *elog_type);
774fea1a SS	166	int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
	167	int64_t opal_send_ack_elog(uint64_t log_id);
	168	void opal_resend_pending_logs(void);
	169
50bd6153 VH	170	int64_t opal_validate_flash(uint64_t buffer, uint32_t size, uint32_t result);
	171	int64_t opal_manage_flash(uint8_t op);
	172	int64_t opal_update_flash(uint64_t blk_list);
c7e64b9c	173	int64_t opal_dump_init(uint8_t dump_type);
2d6b63bb AB	174	int64_t opal_dump_info(__be32 dump_id, __be32 dump_size);
2d6b63bb AB	175	int64_t opal_dump_info2(__be32 dump_id, __be32 dump_size, __be32 *dump_type);
c7e64b9c SS	176	int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
	177	int64_t opal_dump_ack(uint32_t dump_id);
	178	int64_t opal_dump_resend_notification(void);
cc0efb57	179
2bad7423 AB	180	int64_t opal_get_msg(uint64_t buffer, uint64_t size);
2bad7423 AB	181	int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
f7d98d18	182	int64_t opal_sync_host_reboot(void);
4029cd66	183	int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
2bad7423	184	uint64_t length);
4029cd66	185	int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
2bad7423	186	uint64_t length);
9000c17d	187	int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
0ef95b41	188	int64_t opal_handle_hmi(void);
b09c2ec4 VH	189	int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
b09c2ec4 VH	190	int64_t opal_unregister_dump_region(uint32_t id);
77b54e9f	191	int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
5703d2f4	192	int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
09521736	193	int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
608b286d JK	194	int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
	195	uint64_t msg_len);
	196	int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
	197	uint64_t *msg_len);
47083450 NG	198	int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
47083450 NG	199	struct opal_i2c_request *oreq);
0d7cd855	200	int64_t opal_prd_msg(struct opal_prd_msg *msg);
8a8d9181 AK	201	int64_t opal_leds_get_ind(char loc_code, __be64 led_mask,
	202	__be64 led_value, __be64 max_led_type);
	203	int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
	204	const u64 led_value, __be64 *max_led_type);
24366360	205
ed59190e CB	206	int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
	207	uint64_t size, uint64_t token);
	208	int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
	209	uint64_t size, uint64_t token);
	210	int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
	211	uint64_t token);
	212
14a43e69	213	/* Internal functions */
e2c8b93e AB	214	extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
e2c8b93e AB	215	int depth, void *data);
55672ecf MS	216	extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
55672ecf MS	217	const char uname, int depth, void data);
14a43e69 BH	218
	219	extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
	220	extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
	221
	222	extern void hvc_opal_init_early(void);
	223
1bc98de2	224	extern int opal_notifier_register(struct notifier_block *nb);
798af00c BH	225	extern int opal_notifier_unregister(struct notifier_block *nb);
798af00c BH	226
d7cf83fc	227	extern int opal_message_notifier_register(enum opal_msg_type msg_type,
24366360	228	struct notifier_block *nb);
df60f576	229	extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
b921e902	230	struct notifier_block *nb);
1bc98de2 GS	231	extern void opal_notifier_enable(void);
	232	extern void opal_notifier_disable(void);
	233	extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
	234
8d724823 NG	235	extern int __opal_async_get_token(void);
	236	extern int opal_async_get_token_interruptible(void);
	237	extern int __opal_async_release_token(int token);
	238	extern int opal_async_release_token(int token);
	239	extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
7224adbb	240	extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
8d724823	241
628daa8d	242	struct rtc_time;
628daa8d BH	243	extern unsigned long opal_get_boot_time(void);
628daa8d BH	244	extern void opal_nvram_init(void);
ed59190e	245	extern void opal_flash_update_init(void);
2196c6f1	246	extern void opal_flash_term_callback(void);
774fea1a	247	extern int opal_elog_init(void);
c7e64b9c	248	extern void opal_platform_dump_init(void);
4029cd66	249	extern void opal_sys_param_init(void);
bfc36894	250	extern void opal_msglog_init(void);
9b4fffa1	251	extern void opal_msglog_sysfs_init(void);
96e023e7 AP	252	extern int opal_async_comp_init(void);
	253	extern int opal_sensor_init(void);
	254	extern int opal_hmi_handler_init(void);
9f0fd049	255	extern int opal_event_init(void);
628daa8d	256
ed79ba9e	257	extern int opal_machine_check(struct pt_regs *regs);
55672ecf	258	extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
0869b6fd MS	259	extern int opal_hmi_exception_early(struct pt_regs *regs);
0869b6fd MS	260	extern int opal_handle_hmi_exception(struct pt_regs *regs);
ed79ba9e	261
73ed148a	262	extern void opal_shutdown(void);
97eb001f	263	extern int opal_resync_timebase(void);
73ed148a	264
3fafe9c2 BH	265	extern void opal_lpc_init(void);
3fafe9c2 BH	266
affddff6 RC	267	extern void opal_kmsg_init(void);
affddff6 RC	268
9f0fd049 AP	269	extern int opal_event_request(unsigned int opal_event_nr);
9f0fd049 AP	270
3441f04b AB	271	struct opal_sg_list opal_vmalloc_to_sg_list(void vmalloc_addr,
	272	unsigned long vmalloc_size);
	273	void opal_free_sg_list(struct opal_sg_list *sg);
	274
e3c5c2e0 CLG	275	extern int opal_error_code(int rc);
e3c5c2e0 CLG	276
9b4fffa1 AD	277	ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
9b4fffa1 AD	278
14a43e69	279	#endif /* __ASSEMBLY__ */
27f44888	280
d800ba12	281	#endif /* _ASM_POWERPC_OPAL_H */