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1da177e4 LT |
1 | /* |
2 | * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM | |
3 | * | |
4 | * Based on alpha version. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
654810ec SR |
12 | #ifndef _ASM_POWERPC_OPROFILE_IMPL_H |
13 | #define _ASM_POWERPC_OPROFILE_IMPL_H | |
88ced031 | 14 | #ifdef __KERNEL__ |
1da177e4 LT |
15 | |
16 | #define OP_MAX_COUNTER 8 | |
17 | ||
18 | /* Per-counter configuration as set via oprofilefs. */ | |
19 | struct op_counter_config { | |
1da177e4 LT |
20 | unsigned long enabled; |
21 | unsigned long event; | |
22 | unsigned long count; | |
555d97ac | 23 | /* Classic doesn't support per-counter user/kernel selection */ |
1da177e4 | 24 | unsigned long kernel; |
1da177e4 LT |
25 | unsigned long user; |
26 | unsigned long unit_mask; | |
27 | }; | |
28 | ||
29 | /* System-wide configuration as set via oprofilefs. */ | |
30 | struct op_system_config { | |
555d97ac | 31 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
32 | unsigned long mmcr0; |
33 | unsigned long mmcr1; | |
34 | unsigned long mmcra; | |
88382329 CL |
35 | #ifdef CONFIG_OPROFILE_CELL |
36 | /* Register for oprofile user tool to check cell kernel profiling | |
37 | * suport. | |
38 | */ | |
39 | unsigned long cell_support; | |
40 | #endif | |
654810ec | 41 | #endif |
1da177e4 LT |
42 | unsigned long enable_kernel; |
43 | unsigned long enable_user; | |
1da177e4 LT |
44 | }; |
45 | ||
46 | /* Per-arch configuration */ | |
a3e48c10 | 47 | struct op_powerpc_model { |
1474855d | 48 | int (*reg_setup) (struct op_counter_config *, |
1da177e4 LT |
49 | struct op_system_config *, |
50 | int num_counters); | |
1474855d BN |
51 | int (*cpu_setup) (struct op_counter_config *); |
52 | int (*start) (struct op_counter_config *); | |
53 | int (*global_start) (struct op_counter_config *); | |
1da177e4 | 54 | void (*stop) (void); |
18f2190d | 55 | void (*global_stop) (void); |
1474855d BN |
56 | int (*sync_start)(void); |
57 | int (*sync_stop)(void); | |
1da177e4 LT |
58 | void (*handle_interrupt) (struct pt_regs *, |
59 | struct op_counter_config *); | |
60 | int num_counters; | |
61 | }; | |
62 | ||
39aef685 | 63 | extern struct op_powerpc_model op_model_fsl_emb; |
a3e48c10 SR |
64 | extern struct op_powerpc_model op_model_rs64; |
65 | extern struct op_powerpc_model op_model_power4; | |
555d97ac | 66 | extern struct op_powerpc_model op_model_7450; |
18f2190d | 67 | extern struct op_powerpc_model op_model_cell; |
25fc530e OJ |
68 | extern struct op_powerpc_model op_model_pa6t; |
69 | ||
72533db0 | 70 | |
555d97ac | 71 | /* All the classic PPC parts use these */ |
c69b767a | 72 | static inline unsigned int classic_ctr_read(unsigned int i) |
1da177e4 LT |
73 | { |
74 | switch(i) { | |
75 | case 0: | |
76 | return mfspr(SPRN_PMC1); | |
77 | case 1: | |
78 | return mfspr(SPRN_PMC2); | |
79 | case 2: | |
80 | return mfspr(SPRN_PMC3); | |
81 | case 3: | |
82 | return mfspr(SPRN_PMC4); | |
83 | case 4: | |
84 | return mfspr(SPRN_PMC5); | |
85 | case 5: | |
86 | return mfspr(SPRN_PMC6); | |
555d97ac AF |
87 | |
88 | /* No PPC32 chip has more than 6 so far */ | |
89 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
90 | case 6: |
91 | return mfspr(SPRN_PMC7); | |
92 | case 7: | |
93 | return mfspr(SPRN_PMC8); | |
555d97ac | 94 | #endif |
1da177e4 LT |
95 | default: |
96 | return 0; | |
97 | } | |
98 | } | |
99 | ||
c69b767a | 100 | static inline void classic_ctr_write(unsigned int i, unsigned int val) |
1da177e4 LT |
101 | { |
102 | switch(i) { | |
103 | case 0: | |
104 | mtspr(SPRN_PMC1, val); | |
105 | break; | |
106 | case 1: | |
107 | mtspr(SPRN_PMC2, val); | |
108 | break; | |
109 | case 2: | |
110 | mtspr(SPRN_PMC3, val); | |
111 | break; | |
112 | case 3: | |
113 | mtspr(SPRN_PMC4, val); | |
114 | break; | |
115 | case 4: | |
116 | mtspr(SPRN_PMC5, val); | |
117 | break; | |
118 | case 5: | |
119 | mtspr(SPRN_PMC6, val); | |
120 | break; | |
555d97ac AF |
121 | |
122 | /* No PPC32 chip has more than 6, yet */ | |
123 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
124 | case 6: |
125 | mtspr(SPRN_PMC7, val); | |
126 | break; | |
127 | case 7: | |
128 | mtspr(SPRN_PMC8, val); | |
129 | break; | |
555d97ac | 130 | #endif |
1da177e4 LT |
131 | default: |
132 | break; | |
133 | } | |
134 | } | |
dd6c89f6 | 135 | |
1da177e4 | 136 | |
6c6bd754 BR |
137 | extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); |
138 | ||
88ced031 | 139 | #endif /* __KERNEL__ */ |
654810ec | 140 | #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */ |