Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * c 2001 PPC 64 Team, IBM Corp | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
d387899f SR |
9 | #ifndef _ASM_POWERPC_PPC_PCI_H |
10 | #define _ASM_POWERPC_PPC_PCI_H | |
88ced031 | 11 | #ifdef __KERNEL__ |
1da177e4 | 12 | |
bed59275 SR |
13 | #ifdef CONFIG_PCI |
14 | ||
1da177e4 LT |
15 | #include <linux/pci.h> |
16 | #include <asm/pci-bridge.h> | |
17 | ||
18 | extern unsigned long isa_io_base; | |
19 | ||
1da177e4 LT |
20 | extern void pci_setup_phb_io(struct pci_controller *hose, int primary); |
21 | extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); | |
22 | ||
23 | ||
24 | extern struct list_head hose_list; | |
1da177e4 | 25 | |
3d5134ee | 26 | extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ |
1da177e4 | 27 | |
ae65a391 | 28 | /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ |
dda804ad NA |
29 | #define BUID_HI(buid) upper_32_bits(buid) |
30 | #define BUID_LO(buid) lower_32_bits(buid) | |
ae65a391 | 31 | |
1da177e4 LT |
32 | /* PCI device_node operations */ |
33 | struct device_node; | |
e8e9b34c GS |
34 | struct pci_dn; |
35 | ||
1da177e4 LT |
36 | typedef void *(*traverse_func)(struct device_node *me, void *data); |
37 | void *traverse_pci_devices(struct device_node *start, traverse_func pre, | |
38 | void *data); | |
e8e9b34c GS |
39 | void *traverse_pci_dn(struct pci_dn *root, |
40 | void *(*fn)(struct pci_dn *, void *), | |
41 | void *data); | |
1da177e4 | 42 | |
4c9d2800 BH |
43 | extern void pci_devs_phb_init(void); |
44 | extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); | |
1da177e4 | 45 | |
dad32bbf | 46 | /* From rtas_pci.h */ |
4c9d2800 BH |
47 | extern void init_pci_config_tokens (void); |
48 | extern unsigned long get_phb_buid (struct device_node *); | |
49 | extern int rtas_setup_phb(struct pci_controller *phb); | |
1da177e4 | 50 | |
6dee3fb9 | 51 | #ifdef CONFIG_EEH |
5d5a0936 | 52 | |
3ab96a02 GS |
53 | void eeh_addr_cache_insert_dev(struct pci_dev *dev); |
54 | void eeh_addr_cache_rmv_dev(struct pci_dev *dev); | |
55 | struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr); | |
ff477966 GS |
56 | void eeh_slot_error_detail(struct eeh_pe *pe, int severity); |
57 | int eeh_pci_enable(struct eeh_pe *pe, int function); | |
c270a24c | 58 | int eeh_reset_pe(struct eeh_pe *); |
d7bb8862 | 59 | void eeh_save_bars(struct eeh_dev *edev); |
8b553f32 | 60 | int rtas_write_config(struct pci_dn *, int where, int size, u32 val); |
7684b40c | 61 | int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); |
5b663529 GS |
62 | void eeh_pe_state_mark(struct eeh_pe *pe, int state); |
63 | void eeh_pe_state_clear(struct eeh_pe *pe, int state); | |
39bfd715 | 64 | void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state); |
d2b0f6f7 | 65 | void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode); |
9fb40eb8 | 66 | |
e1d04c97 LV |
67 | void eeh_sysfs_add_device(struct pci_dev *pdev); |
68 | void eeh_sysfs_remove_device(struct pci_dev *pdev); | |
69 | ||
8d3d50bf BL |
70 | static inline const char *eeh_pci_name(struct pci_dev *pdev) |
71 | { | |
72 | return pdev ? pci_name(pdev) : "<null>"; | |
73 | } | |
74 | ||
778a785f TLSC |
75 | static inline const char *eeh_driver_name(struct pci_dev *pdev) |
76 | { | |
77 | return (pdev && pdev->driver) ? pdev->driver->name : "<null>"; | |
78 | } | |
79 | ||
17213c3b | 80 | #endif /* CONFIG_EEH */ |
6dee3fb9 | 81 | |
bed59275 | 82 | #else /* CONFIG_PCI */ |
bed59275 SR |
83 | static inline void init_pci_config_tokens(void) { } |
84 | #endif /* !CONFIG_PCI */ | |
85 | ||
88ced031 | 86 | #endif /* __KERNEL__ */ |
d387899f | 87 | #endif /* _ASM_POWERPC_PPC_PCI_H */ |