[deliverable/linux.git] / arch / tile / kernel / traps.c

/*
 * Copyright 2010 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/kdebug.h>
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/uaccess.h>
#include <linux/ptrace.h>
#include <asm/stack.h>
#include <asm/traps.h>
#include <asm/setup.h>

#include <arch/interrupts.h>
#include <arch/spr_def.h>
#include <arch/opcode.h>

void __init trap_init(void)
{
	/* Nothing needed here since we link code at .intrpt1 */
}

int unaligned_fixup = 1;

static int __init setup_unaligned_fixup(char *str)
{
	/*
	 * Say "=-1" to completely disable it.  If you just do "=0", we
	 * will still parse the instruction, then fire a SIGBUS with
	 * the correct address from inside the single_step code.
	 */
	long val;
	if (strict_strtol(str, 0, &val) != 0)
		return 0;
	unaligned_fixup = val;
	pr_info("Fixups for unaligned data accesses are %s\n",
	       unaligned_fixup >= 0 ?
	       (unaligned_fixup ? "enabled" : "disabled") :
	       "completely disabled");
	return 1;
}
__setup("unaligned_fixup=", setup_unaligned_fixup);

#if CHIP_HAS_TILE_DMA()

static int dma_disabled;

static int __init nodma(char *str)
{
	pr_info("User-space DMA is disabled\n");
	dma_disabled = 1;
	return 1;
}
__setup("nodma", nodma);

/* How to decode SPR_GPV_REASON */
#define IRET_ERROR (1U << 31)
#define MT_ERROR   (1U << 30)
#define MF_ERROR   (1U << 29)
#define SPR_INDEX  ((1U << 15) - 1)
#define SPR_MPL_SHIFT  9  /* starting bit position for MPL encoded in SPR */

/*
 * See if this GPV is just to notify the kernel of SPR use and we can
 * retry the user instruction after adjusting some MPLs suitably.
 */
static int retry_gpv(unsigned int gpv_reason)
{
	int mpl;

	if (gpv_reason & IRET_ERROR)
		return 0;

	BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
		/* User is turning on DMA. Allow it and retry. */
		printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
		       current->pid, current->comm);
		BUG_ON(current->thread.tile_dma_state.enabled);
		current->thread.tile_dma_state.enabled = 1;
		grant_dma_mpls();
		return 1;
	}

	return 0;
}

#endif /* CHIP_HAS_TILE_DMA() */

#ifdef __tilegx__
#define bundle_bits tilegx_bundle_bits
#else
#define bundle_bits tile_bundle_bits
#endif

extern bundle_bits bpt_code;

asm(".pushsection .rodata.bpt_code,\"a\";"
    ".align 8;"
    "bpt_code: bpt;"
    ".size bpt_code,.-bpt_code;"
    ".popsection");

static int special_ill(bundle_bits bundle, int *sigp, int *codep)
{
	int sig, code, maxcode;

	if (bundle == bpt_code) {
		*sigp = SIGTRAP;
		*codep = TRAP_BRKPT;
		return 1;
	}

	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
#ifdef __tilegx__
	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
		return 0;
	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
		return 0;
	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
		return 0;
	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
		return 0;
#else
	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
		return 0;
	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
		return 0;
#endif

	/* Check that the magic distinguishers are set to mean "raise". */
	if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
		return 0;

	/* There must be an "addli zero, zero, VAL" in X0. */
	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
		return 0;
	if (get_Dest_X0(bundle) != TREG_ZERO)
		return 0;
	if (get_SrcA_X0(bundle) != TREG_ZERO)
		return 0;

	/*
	 * Validate the proposed signal number and si_code value.
	 * Note that we embed these in the static instruction itself
	 * so that we perturb the register state as little as possible
	 * at the time of the actual fault; it's unlikely you'd ever
	 * need to dynamically choose which kind of fault to raise
	 * from user space.
	 */
	sig = get_Imm16_X0(bundle) & 0x3f;
	switch (sig) {
	case SIGILL:
		maxcode = NSIGILL;
		break;
	case SIGFPE:
		maxcode = NSIGFPE;
		break;
	case SIGSEGV:
		maxcode = NSIGSEGV;
		break;
	case SIGBUS:
		maxcode = NSIGBUS;
		break;
	case SIGTRAP:
		maxcode = NSIGTRAP;
		break;
	default:
		return 0;
	}
	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	if (code <= 0 || code > maxcode)
		return 0;

	/* Make it the requested signal. */
	*sigp = sig;
	*codep = code | __SI_FAULT;
	return 1;
}

static const char *const int_name[] = {
	[INT_MEM_ERROR] = "Memory error",
	[INT_ILL] = "Illegal instruction",
	[INT_GPV] = "General protection violation",
	[INT_UDN_ACCESS] = "UDN access",
	[INT_IDN_ACCESS] = "IDN access",
#if CHIP_HAS_SN()
	[INT_SN_ACCESS] = "SN access",
#endif
	[INT_SWINT_3] = "Software interrupt 3",
	[INT_SWINT_2] = "Software interrupt 2",
	[INT_SWINT_0] = "Software interrupt 0",
	[INT_UNALIGN_DATA] = "Unaligned data",
	[INT_DOUBLE_FAULT] = "Double fault",
#ifdef __tilegx__
	[INT_ILL_TRANS] = "Illegal virtual address",
#endif
};

static int do_bpt(struct pt_regs *regs)
{
	unsigned long bundle, bcode, bpt;

	bundle = *(unsigned long *)instruction_pointer(regs);

	/*
	 * bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
	 * we encode the unused least significant bits for other purpose.
	 */
	bpt = bundle & ~((1ULL << 12) - 1);
	if (bpt != TILE_BPT_BUNDLE)
		return 0;

	bcode = bundle & ((1ULL << 12) - 1);
	/*
	 * notify the kprobe handlers, if instruction is likely to
	 * pertain to them.
	 */
	switch (bcode) {
	/* breakpoint_insn */
	case 0:
		notify_die(DIE_BREAK, "debug", regs, bundle,
			INT_ILL, SIGTRAP);
		break;
	/* breakpoint2_insn */
	case DIE_SSTEPBP:
		notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
			INT_ILL, SIGTRAP);
		break;
	default:
		return 0;
	}

	return 1;
}

void __kprobes do_trap(struct pt_regs *regs, int fault_num,
		       unsigned long reason)
{
	siginfo_t info = { 0 };
	int signo, code;
	unsigned long address = 0;
	bundle_bits instr;
	int is_kernel = !user_mode(regs);

	/* Handle breakpoints, etc. */
	if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
		return;

	/* Re-enable interrupts, if they were previously enabled. */
	if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
		local_irq_enable();

	/*
	 * If it hits in kernel mode and we can't fix it up, just exit the
	 * current process and hope for the best.
	 */
	if (is_kernel) {
		const char *name;
		char buf[100];
		if (fixup_exception(regs))  /* ILL_TRANS or UNALIGN_DATA */
			return;
		if (fault_num >= 0 &&
		    fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
		    int_name[fault_num] != NULL)
			name = int_name[fault_num];
		else
			name = "Unknown interrupt";
		if (fault_num == INT_GPV)
			snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
#ifdef __tilegx__
		else if (fault_num == INT_ILL_TRANS)
			snprintf(buf, sizeof(buf), "; address %#lx", reason);
#endif
		else
			buf[0] = '\0';
		pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
			 fault_num, name, regs->pc, buf);
		show_regs(regs);
		do_exit(SIGKILL);  /* FIXME: implement i386 die() */
		return;
	}

	switch (fault_num) {
	case INT_MEM_ERROR:
		signo = SIGBUS;
		code = BUS_OBJERR;
		break;
	case INT_ILL:
		if (copy_from_user(&instr, (void __user *)regs->pc,
				   sizeof(instr))) {
			pr_err("Unreadable instruction for INT_ILL:"
			       " %#lx\n", regs->pc);
			do_exit(SIGKILL);
			return;
		}
		if (!special_ill(instr, &signo, &code)) {
			signo = SIGILL;
			code = ILL_ILLOPC;
		}
		address = regs->pc;
		break;
	case INT_GPV:
#if CHIP_HAS_TILE_DMA()
		if (retry_gpv(reason))
			return;
#endif
		/*FALLTHROUGH*/
	case INT_UDN_ACCESS:
	case INT_IDN_ACCESS:
#if CHIP_HAS_SN()
	case INT_SN_ACCESS:
#endif
		signo = SIGILL;
		code = ILL_PRVREG;
		address = regs->pc;
		break;
	case INT_SWINT_3:
	case INT_SWINT_2:
	case INT_SWINT_0:
		signo = SIGILL;
		code = ILL_ILLTRP;
		address = regs->pc;
		break;
	case INT_UNALIGN_DATA:
#ifndef __tilegx__  /* Emulated support for single step debugging */
		if (unaligned_fixup >= 0) {
			struct single_step_state *state =
				current_thread_info()->step_state;
			if (!state ||
			    (void __user *)(regs->pc) != state->buffer) {
				single_step_once(regs);
				return;
			}
		}
#endif
		signo = SIGBUS;
		code = BUS_ADRALN;
		address = 0;
		break;
	case INT_DOUBLE_FAULT:
		/*
		 * For double fault, "reason" is actually passed as
		 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
		 * we can provide the original fault number rather than
		 * the uninteresting "INT_DOUBLE_FAULT" so the user can
		 * learn what actually struck while PL0 ICS was set.
		 */
		fault_num = reason;
		signo = SIGILL;
		code = ILL_DBLFLT;
		address = regs->pc;
		break;
#ifdef __tilegx__
	case INT_ILL_TRANS: {
		/* Avoid a hardware erratum with the return address stack. */
		fill_ra_stack();

		signo = SIGSEGV;
		address = reason;
		code = SEGV_MAPERR;
		break;
	}
#endif
	default:
		panic("Unexpected do_trap interrupt number %d", fault_num);
		return;
	}

	info.si_signo = signo;
	info.si_code = code;
	info.si_addr = (void __user *)address;
	if (signo == SIGILL)
		info.si_trapno = fault_num;
	if (signo != SIGTRAP)
		trace_unhandled_signal("trap", regs, address, signo);
	force_sig_info(signo, &info, current);
}

void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
{
	_dump_stack(dummy, pc, lr, sp, r52);
	pr_emerg("Double fault: exiting\n");
	machine_halt();
}
Commit	Line	Data
867e359b CM	1	/*
	2	* Copyright 2010 Tilera Corporation. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation, version 2.
	7	*
	8	* This program is distributed in the hope that it will be useful, but
	9	* WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	11	* NON INFRINGEMENT. See the GNU General Public License for
	12	* more details.
	13	*/
	14
	15	#include <linux/sched.h>
	16	#include <linux/kernel.h>
	17	#include <linux/kprobes.h>
3fa17c39	18	#include <linux/kdebug.h>
867e359b CM	19	#include <linux/module.h>
	20	#include <linux/reboot.h>
	21	#include <linux/uaccess.h>
	22	#include <linux/ptrace.h>
0707ad30 CM	23	#include <asm/stack.h>
0707ad30 CM	24	#include <asm/traps.h>
bd119c69	25	#include <asm/setup.h>
867e359b CM	26
	27	#include <arch/interrupts.h>
	28	#include <arch/spr_def.h>
eb7c792d	29	#include <arch/opcode.h>
867e359b CM	30
	31	void __init trap_init(void)
	32	{
	33	/* Nothing needed here since we link code at .intrpt1 */
	34	}
	35
	36	int unaligned_fixup = 1;
	37
	38	static int __init setup_unaligned_fixup(char *str)
	39	{
	40	/*
	41	* Say "=-1" to completely disable it. If you just do "=0", we
	42	* will still parse the instruction, then fire a SIGBUS with
	43	* the correct address from inside the single_step code.
	44	*/
	45	long val;
	46	if (strict_strtol(str, 0, &val) != 0)
	47	return 0;
	48	unaligned_fixup = val;
0707ad30	49	pr_info("Fixups for unaligned data accesses are %s\n",
867e359b CM	50	unaligned_fixup >= 0 ?
	51	(unaligned_fixup ? "enabled" : "disabled") :
	52	"completely disabled");
	53	return 1;
	54	}
	55	__setup("unaligned_fixup=", setup_unaligned_fixup);
	56
	57	#if CHIP_HAS_TILE_DMA()
	58
	59	static int dma_disabled;
	60
	61	static int __init nodma(char *str)
	62	{
0707ad30	63	pr_info("User-space DMA is disabled\n");
867e359b CM	64	dma_disabled = 1;
	65	return 1;
	66	}
	67	__setup("nodma", nodma);
	68
	69	/* How to decode SPR_GPV_REASON */
	70	#define IRET_ERROR (1U << 31)
	71	#define MT_ERROR (1U << 30)
	72	#define MF_ERROR (1U << 29)
	73	#define SPR_INDEX ((1U << 15) - 1)
	74	#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
	75
	76	/*
	77	* See if this GPV is just to notify the kernel of SPR use and we can
	78	* retry the user instruction after adjusting some MPLs suitably.
	79	*/
	80	static int retry_gpv(unsigned int gpv_reason)
	81	{
	82	int mpl;
	83
	84	if (gpv_reason & IRET_ERROR)
	85	return 0;
	86
	87	BUG_ON((gpv_reason & (MT_ERROR\|MF_ERROR)) == 0);
	88	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	89	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
	90	/* User is turning on DMA. Allow it and retry. */
	91	printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
	92	current->pid, current->comm);
	93	BUG_ON(current->thread.tile_dma_state.enabled);
	94	current->thread.tile_dma_state.enabled = 1;
	95	grant_dma_mpls();
	96	return 1;
	97	}
	98
	99	return 0;
	100	}
	101
	102	#endif /* CHIP_HAS_TILE_DMA() */
	103
867e359b	104	#ifdef __tilegx__
0707ad30	105	#define bundle_bits tilegx_bundle_bits
867e359b	106	#else
0707ad30	107	#define bundle_bits tile_bundle_bits
867e359b CM	108	#endif
867e359b CM	109
0707ad30 CM	110	extern bundle_bits bpt_code;
	111
	112	asm(".pushsection .rodata.bpt_code,\"a\";"
	113	".align 8;"
	114	"bpt_code: bpt;"
	115	".size bpt_code,.-bpt_code;"
	116	".popsection");
	117
	118	static int special_ill(bundle_bits bundle, int sigp, int codep)
	119	{
	120	int sig, code, maxcode;
	121
	122	if (bundle == bpt_code) {
	123	*sigp = SIGTRAP;
	124	*codep = TRAP_BRKPT;
	125	return 1;
	126	}
	127
	128	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
	129	#ifdef __tilegx__
	130	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
	131	return 0;
1fcbe027 CM	132	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
	133	return 0;
	134	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
0707ad30 CM	135	return 0;
	136	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
	137	return 0;
	138	#else
eb7c792d	139	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
0707ad30 CM	140	return 0;
	141	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
	142	return 0;
	143	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
	144	return 0;
	145	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
	146	return 0;
	147	#endif
	148
	149	/* Check that the magic distinguishers are set to mean "raise". */
	150	if (get_Dest_X1(bundle) != 29 \|\| get_SrcA_X1(bundle) != 37)
	151	return 0;
	152
	153	/* There must be an "addli zero, zero, VAL" in X0. */
	154	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
	155	return 0;
	156	if (get_Dest_X0(bundle) != TREG_ZERO)
	157	return 0;
	158	if (get_SrcA_X0(bundle) != TREG_ZERO)
	159	return 0;
	160
	161	/*
	162	* Validate the proposed signal number and si_code value.
	163	* Note that we embed these in the static instruction itself
	164	* so that we perturb the register state as little as possible
	165	* at the time of the actual fault; it's unlikely you'd ever
	166	* need to dynamically choose which kind of fault to raise
	167	* from user space.
	168	*/
	169	sig = get_Imm16_X0(bundle) & 0x3f;
	170	switch (sig) {
	171	case SIGILL:
	172	maxcode = NSIGILL;
	173	break;
	174	case SIGFPE:
	175	maxcode = NSIGFPE;
	176	break;
	177	case SIGSEGV:
	178	maxcode = NSIGSEGV;
	179	break;
	180	case SIGBUS:
	181	maxcode = NSIGBUS;
	182	break;
	183	case SIGTRAP:
	184	maxcode = NSIGTRAP;
	185	break;
	186	default:
	187	return 0;
	188	}
	189	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	190	if (code <= 0 \|\| code > maxcode)
	191	return 0;
	192
	193	/* Make it the requested signal. */
	194	*sigp = sig;
	195	*codep = code \| __SI_FAULT;
	196	return 1;
	197	}
	198
c6f696f6 CM	199	static const char *const int_name[] = {
	200	[INT_MEM_ERROR] = "Memory error",
	201	[INT_ILL] = "Illegal instruction",
	202	[INT_GPV] = "General protection violation",
	203	[INT_UDN_ACCESS] = "UDN access",
	204	[INT_IDN_ACCESS] = "IDN access",
	205	#if CHIP_HAS_SN()
	206	[INT_SN_ACCESS] = "SN access",
	207	#endif
	208	[INT_SWINT_3] = "Software interrupt 3",
	209	[INT_SWINT_2] = "Software interrupt 2",
	210	[INT_SWINT_0] = "Software interrupt 0",
	211	[INT_UNALIGN_DATA] = "Unaligned data",
	212	[INT_DOUBLE_FAULT] = "Double fault",
	213	#ifdef __tilegx__
	214	[INT_ILL_TRANS] = "Illegal virtual address",
	215	#endif
	216	};
	217
3fa17c39 TL	218	static int do_bpt(struct pt_regs *regs)
	219	{
	220	unsigned long bundle, bcode, bpt;
	221
	222	bundle = (unsigned long )instruction_pointer(regs);
	223
	224	/*
	225	* bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
	226	* we encode the unused least significant bits for other purpose.
	227	*/
	228	bpt = bundle & ~((1ULL << 12) - 1);
	229	if (bpt != TILE_BPT_BUNDLE)
	230	return 0;
	231
	232	bcode = bundle & ((1ULL << 12) - 1);
	233	/*
	234	* notify the kprobe handlers, if instruction is likely to
	235	* pertain to them.
	236	*/
	237	switch (bcode) {
	238	/* breakpoint_insn */
	239	case 0:
	240	notify_die(DIE_BREAK, "debug", regs, bundle,
	241	INT_ILL, SIGTRAP);
	242	break;
	243	/* breakpoint2_insn */
	244	case DIE_SSTEPBP:
	245	notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
	246	INT_ILL, SIGTRAP);
	247	break;
	248	default:
	249	return 0;
	250	}
	251
	252	return 1;
	253	}
	254
867e359b CM	255	void __kprobes do_trap(struct pt_regs *regs, int fault_num,
	256	unsigned long reason)
	257	{
	258	siginfo_t info = { 0 };
	259	int signo, code;
a714ffff	260	unsigned long address = 0;
0707ad30	261	bundle_bits instr;
3fa17c39 TL	262	int is_kernel = !user_mode(regs);
	263
	264	/* Handle breakpoints, etc. */
	265	if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
	266	return;
867e359b	267
70d2b595 CM	268	/* Re-enable interrupts, if they were previously enabled. */
	269	if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
	270	local_irq_enable();
867e359b CM	271
	272	/*
	273	* If it hits in kernel mode and we can't fix it up, just exit the
	274	* current process and hope for the best.
	275	*/
3fa17c39	276	if (is_kernel) {
c6f696f6	277	const char *name;
70d2b595 CM	278	char buf[100];
70d2b595 CM	279	if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
867e359b	280	return;
c6f696f6 CM	281	if (fault_num >= 0 &&
	282	fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
	283	int_name[fault_num] != NULL)
	284	name = int_name[fault_num];
	285	else
	286	name = "Unknown interrupt";
867e359b	287	if (fault_num == INT_GPV)
70d2b595 CM	288	snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
	289	#ifdef __tilegx__
	290	else if (fault_num == INT_ILL_TRANS)
	291	snprintf(buf, sizeof(buf), "; address %#lx", reason);
	292	#endif
	293	else
	294	buf[0] = '\0';
	295	pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
	296	fault_num, name, regs->pc, buf);
867e359b CM	297	show_regs(regs);
	298	do_exit(SIGKILL); /* FIXME: implement i386 die() */
	299	return;
	300	}
	301
	302	switch (fault_num) {
a714ffff CM	303	case INT_MEM_ERROR:
	304	signo = SIGBUS;
	305	code = BUS_OBJERR;
	306	break;
867e359b	307	case INT_ILL:
0707ad30 CM	308	if (copy_from_user(&instr, (void __user *)regs->pc,
	309	sizeof(instr))) {
	310	pr_err("Unreadable instruction for INT_ILL:"
867e359b CM	311	" %#lx\n", regs->pc);
	312	do_exit(SIGKILL);
	313	return;
	314	}
0707ad30	315	if (!special_ill(instr, &signo, &code)) {
867e359b CM	316	signo = SIGILL;
	317	code = ILL_ILLOPC;
	318	}
	319	address = regs->pc;
	320	break;
	321	case INT_GPV:
	322	#if CHIP_HAS_TILE_DMA()
	323	if (retry_gpv(reason))
	324	return;
	325	#endif
	326	/FALLTHROUGH/
	327	case INT_UDN_ACCESS:
	328	case INT_IDN_ACCESS:
	329	#if CHIP_HAS_SN()
	330	case INT_SN_ACCESS:
	331	#endif
	332	signo = SIGILL;
	333	code = ILL_PRVREG;
	334	address = regs->pc;
	335	break;
	336	case INT_SWINT_3:
	337	case INT_SWINT_2:
	338	case INT_SWINT_0:
	339	signo = SIGILL;
	340	code = ILL_ILLTRP;
	341	address = regs->pc;
	342	break;
	343	case INT_UNALIGN_DATA:
233325b9	344	#ifndef __tilegx__ /* Emulated support for single step debugging */
867e359b CM	345	if (unaligned_fixup >= 0) {
	346	struct single_step_state *state =
	347	current_thread_info()->step_state;
0707ad30 CM	348	if (!state \|\|
0707ad30 CM	349	(void __user *)(regs->pc) != state->buffer) {
867e359b CM	350	single_step_once(regs);
	351	return;
	352	}
	353	}
	354	#endif
	355	signo = SIGBUS;
	356	code = BUS_ADRALN;
	357	address = 0;
	358	break;
	359	case INT_DOUBLE_FAULT:
	360	/*
	361	* For double fault, "reason" is actually passed as
a78c942d	362	* SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
867e359b CM	363	* we can provide the original fault number rather than
	364	* the uninteresting "INT_DOUBLE_FAULT" so the user can
	365	* learn what actually struck while PL0 ICS was set.
	366	*/
	367	fault_num = reason;
	368	signo = SIGILL;
	369	code = ILL_DBLFLT;
	370	address = regs->pc;
	371	break;
	372	#ifdef __tilegx__
e1723538 CM	373	case INT_ILL_TRANS: {
	374	/* Avoid a hardware erratum with the return address stack. */
	375	fill_ra_stack();
	376
867e359b	377	signo = SIGSEGV;
70d2b595	378	address = reason;
867e359b	379	code = SEGV_MAPERR;
867e359b	380	break;
e1723538	381	}
867e359b CM	382	#endif
	383	default:
	384	panic("Unexpected do_trap interrupt number %d", fault_num);
	385	return;
	386	}
	387
	388	info.si_signo = signo;
	389	info.si_code = code;
0707ad30	390	info.si_addr = (void __user *)address;
867e359b CM	391	if (signo == SIGILL)
867e359b CM	392	info.si_trapno = fault_num;
a714ffff CM	393	if (signo != SIGTRAP)
a714ffff CM	394	trace_unhandled_signal("trap", regs, address, signo);
867e359b CM	395	force_sig_info(signo, &info, current);
	396	}
	397
867e359b CM	398	void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
	399	{
	400	_dump_stack(dummy, pc, lr, sp, r52);
0707ad30	401	pr_emerg("Double fault: exiting\n");
867e359b CM	402	machine_halt();
867e359b CM	403	}