[deliverable/linux.git] / arch / tile / kernel / traps.c

/*
 * Copyright 2010 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/uaccess.h>
#include <linux/ptrace.h>
#include <asm/stack.h>
#include <asm/traps.h>
#include <asm/setup.h>

#include <arch/interrupts.h>
#include <arch/spr_def.h>
#include <arch/opcode.h>

void __init trap_init(void)
{
	/* Nothing needed here since we link code at .intrpt1 */
}

int unaligned_fixup = 1;

static int __init setup_unaligned_fixup(char *str)
{
	/*
	 * Say "=-1" to completely disable it.  If you just do "=0", we
	 * will still parse the instruction, then fire a SIGBUS with
	 * the correct address from inside the single_step code.
	 */
	long val;
	if (strict_strtol(str, 0, &val) != 0)
		return 0;
	unaligned_fixup = val;
	pr_info("Fixups for unaligned data accesses are %s\n",
	       unaligned_fixup >= 0 ?
	       (unaligned_fixup ? "enabled" : "disabled") :
	       "completely disabled");
	return 1;
}
__setup("unaligned_fixup=", setup_unaligned_fixup);

#if CHIP_HAS_TILE_DMA()

static int dma_disabled;

static int __init nodma(char *str)
{
	pr_info("User-space DMA is disabled\n");
	dma_disabled = 1;
	return 1;
}
__setup("nodma", nodma);

/* How to decode SPR_GPV_REASON */
#define IRET_ERROR (1U << 31)
#define MT_ERROR   (1U << 30)
#define MF_ERROR   (1U << 29)
#define SPR_INDEX  ((1U << 15) - 1)
#define SPR_MPL_SHIFT  9  /* starting bit position for MPL encoded in SPR */

/*
 * See if this GPV is just to notify the kernel of SPR use and we can
 * retry the user instruction after adjusting some MPLs suitably.
 */
static int retry_gpv(unsigned int gpv_reason)
{
	int mpl;

	if (gpv_reason & IRET_ERROR)
		return 0;

	BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
		/* User is turning on DMA. Allow it and retry. */
		printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
		       current->pid, current->comm);
		BUG_ON(current->thread.tile_dma_state.enabled);
		current->thread.tile_dma_state.enabled = 1;
		grant_dma_mpls();
		return 1;
	}

	return 0;
}

#endif /* CHIP_HAS_TILE_DMA() */

#ifdef __tilegx__
#define bundle_bits tilegx_bundle_bits
#else
#define bundle_bits tile_bundle_bits
#endif

extern bundle_bits bpt_code;

asm(".pushsection .rodata.bpt_code,\"a\";"
    ".align 8;"
    "bpt_code: bpt;"
    ".size bpt_code,.-bpt_code;"
    ".popsection");

static int special_ill(bundle_bits bundle, int *sigp, int *codep)
{
	int sig, code, maxcode;

	if (bundle == bpt_code) {
		*sigp = SIGTRAP;
		*codep = TRAP_BRKPT;
		return 1;
	}

	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
#ifdef __tilegx__
	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
		return 0;
	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
		return 0;
	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
		return 0;
	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
		return 0;
#else
	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
		return 0;
	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
		return 0;
#endif

	/* Check that the magic distinguishers are set to mean "raise". */
	if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
		return 0;

	/* There must be an "addli zero, zero, VAL" in X0. */
	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
		return 0;
	if (get_Dest_X0(bundle) != TREG_ZERO)
		return 0;
	if (get_SrcA_X0(bundle) != TREG_ZERO)
		return 0;

	/*
	 * Validate the proposed signal number and si_code value.
	 * Note that we embed these in the static instruction itself
	 * so that we perturb the register state as little as possible
	 * at the time of the actual fault; it's unlikely you'd ever
	 * need to dynamically choose which kind of fault to raise
	 * from user space.
	 */
	sig = get_Imm16_X0(bundle) & 0x3f;
	switch (sig) {
	case SIGILL:
		maxcode = NSIGILL;
		break;
	case SIGFPE:
		maxcode = NSIGFPE;
		break;
	case SIGSEGV:
		maxcode = NSIGSEGV;
		break;
	case SIGBUS:
		maxcode = NSIGBUS;
		break;
	case SIGTRAP:
		maxcode = NSIGTRAP;
		break;
	default:
		return 0;
	}
	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	if (code <= 0 || code > maxcode)
		return 0;

	/* Make it the requested signal. */
	*sigp = sig;
	*codep = code | __SI_FAULT;
	return 1;
}

void __kprobes do_trap(struct pt_regs *regs, int fault_num,
		       unsigned long reason)
{
	siginfo_t info = { 0 };
	int signo, code;
	unsigned long address;
	bundle_bits instr;

	/* Re-enable interrupts. */
	local_irq_enable();

	/*
	 * If it hits in kernel mode and we can't fix it up, just exit the
	 * current process and hope for the best.
	 */
	if (!user_mode(regs)) {
		if (fixup_exception(regs))  /* only UNALIGN_DATA in practice */
			return;
		pr_alert("Kernel took bad trap %d at PC %#lx\n",
		       fault_num, regs->pc);
		if (fault_num == INT_GPV)
			pr_alert("GPV_REASON is %#lx\n", reason);
		show_regs(regs);
		do_exit(SIGKILL);  /* FIXME: implement i386 die() */
		return;
	}

	switch (fault_num) {
	case INT_ILL:
		if (copy_from_user(&instr, (void __user *)regs->pc,
				   sizeof(instr))) {
			pr_err("Unreadable instruction for INT_ILL:"
			       " %#lx\n", regs->pc);
			do_exit(SIGKILL);
			return;
		}
		if (!special_ill(instr, &signo, &code)) {
			signo = SIGILL;
			code = ILL_ILLOPC;
		}
		address = regs->pc;
		break;
	case INT_GPV:
#if CHIP_HAS_TILE_DMA()
		if (retry_gpv(reason))
			return;
#endif
		/*FALLTHROUGH*/
	case INT_UDN_ACCESS:
	case INT_IDN_ACCESS:
#if CHIP_HAS_SN()
	case INT_SN_ACCESS:
#endif
		signo = SIGILL;
		code = ILL_PRVREG;
		address = regs->pc;
		break;
	case INT_SWINT_3:
	case INT_SWINT_2:
	case INT_SWINT_0:
		signo = SIGILL;
		code = ILL_ILLTRP;
		address = regs->pc;
		break;
	case INT_UNALIGN_DATA:
#ifndef __tilegx__  /* Emulated support for single step debugging */
		if (unaligned_fixup >= 0) {
			struct single_step_state *state =
				current_thread_info()->step_state;
			if (!state ||
			    (void __user *)(regs->pc) != state->buffer) {
				single_step_once(regs);
				return;
			}
		}
#endif
		signo = SIGBUS;
		code = BUS_ADRALN;
		address = 0;
		break;
	case INT_DOUBLE_FAULT:
		/*
		 * For double fault, "reason" is actually passed as
		 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
		 * we can provide the original fault number rather than
		 * the uninteresting "INT_DOUBLE_FAULT" so the user can
		 * learn what actually struck while PL0 ICS was set.
		 */
		fault_num = reason;
		signo = SIGILL;
		code = ILL_DBLFLT;
		address = regs->pc;
		break;
#ifdef __tilegx__
	case INT_ILL_TRANS: {
		/* Avoid a hardware erratum with the return address stack. */
		fill_ra_stack();

		signo = SIGSEGV;
		code = SEGV_MAPERR;
		if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK)
			address = regs->pc;
		else
			address = 0;  /* FIXME: GX: single-step for address */
		break;
	}
#endif
	default:
		panic("Unexpected do_trap interrupt number %d", fault_num);
		return;
	}

	info.si_signo = signo;
	info.si_code = code;
	info.si_addr = (void __user *)address;
	if (signo == SIGILL)
		info.si_trapno = fault_num;
	trace_unhandled_signal("trap", regs, address, signo);
	force_sig_info(signo, &info, current);
}

void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
{
	_dump_stack(dummy, pc, lr, sp, r52);
	pr_emerg("Double fault: exiting\n");
	machine_halt();
}
Commit	Line	Data
867e359b CM	1	/*
	2	* Copyright 2010 Tilera Corporation. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation, version 2.
	7	*
	8	* This program is distributed in the hope that it will be useful, but
	9	* WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	11	* NON INFRINGEMENT. See the GNU General Public License for
	12	* more details.
	13	*/
	14
	15	#include <linux/sched.h>
	16	#include <linux/kernel.h>
	17	#include <linux/kprobes.h>
	18	#include <linux/module.h>
	19	#include <linux/reboot.h>
	20	#include <linux/uaccess.h>
	21	#include <linux/ptrace.h>
0707ad30 CM	22	#include <asm/stack.h>
0707ad30 CM	23	#include <asm/traps.h>
bd119c69	24	#include <asm/setup.h>
867e359b CM	25
	26	#include <arch/interrupts.h>
	27	#include <arch/spr_def.h>
eb7c792d	28	#include <arch/opcode.h>
867e359b CM	29
	30	void __init trap_init(void)
	31	{
	32	/* Nothing needed here since we link code at .intrpt1 */
	33	}
	34
	35	int unaligned_fixup = 1;
	36
	37	static int __init setup_unaligned_fixup(char *str)
	38	{
	39	/*
	40	* Say "=-1" to completely disable it. If you just do "=0", we
	41	* will still parse the instruction, then fire a SIGBUS with
	42	* the correct address from inside the single_step code.
	43	*/
	44	long val;
	45	if (strict_strtol(str, 0, &val) != 0)
	46	return 0;
	47	unaligned_fixup = val;
0707ad30	48	pr_info("Fixups for unaligned data accesses are %s\n",
867e359b CM	49	unaligned_fixup >= 0 ?
	50	(unaligned_fixup ? "enabled" : "disabled") :
	51	"completely disabled");
	52	return 1;
	53	}
	54	__setup("unaligned_fixup=", setup_unaligned_fixup);
	55
	56	#if CHIP_HAS_TILE_DMA()
	57
	58	static int dma_disabled;
	59
	60	static int __init nodma(char *str)
	61	{
0707ad30	62	pr_info("User-space DMA is disabled\n");
867e359b CM	63	dma_disabled = 1;
	64	return 1;
	65	}
	66	__setup("nodma", nodma);
	67
	68	/* How to decode SPR_GPV_REASON */
	69	#define IRET_ERROR (1U << 31)
	70	#define MT_ERROR (1U << 30)
	71	#define MF_ERROR (1U << 29)
	72	#define SPR_INDEX ((1U << 15) - 1)
	73	#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
	74
	75	/*
	76	* See if this GPV is just to notify the kernel of SPR use and we can
	77	* retry the user instruction after adjusting some MPLs suitably.
	78	*/
	79	static int retry_gpv(unsigned int gpv_reason)
	80	{
	81	int mpl;
	82
	83	if (gpv_reason & IRET_ERROR)
	84	return 0;
	85
	86	BUG_ON((gpv_reason & (MT_ERROR\|MF_ERROR)) == 0);
	87	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	88	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
	89	/* User is turning on DMA. Allow it and retry. */
	90	printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
	91	current->pid, current->comm);
	92	BUG_ON(current->thread.tile_dma_state.enabled);
	93	current->thread.tile_dma_state.enabled = 1;
	94	grant_dma_mpls();
	95	return 1;
	96	}
	97
	98	return 0;
	99	}
	100
	101	#endif /* CHIP_HAS_TILE_DMA() */
	102
867e359b	103	#ifdef __tilegx__
0707ad30	104	#define bundle_bits tilegx_bundle_bits
867e359b	105	#else
0707ad30	106	#define bundle_bits tile_bundle_bits
867e359b CM	107	#endif
867e359b CM	108
0707ad30 CM	109	extern bundle_bits bpt_code;
	110
	111	asm(".pushsection .rodata.bpt_code,\"a\";"
	112	".align 8;"
	113	"bpt_code: bpt;"
	114	".size bpt_code,.-bpt_code;"
	115	".popsection");
	116
	117	static int special_ill(bundle_bits bundle, int sigp, int codep)
	118	{
	119	int sig, code, maxcode;
	120
	121	if (bundle == bpt_code) {
	122	*sigp = SIGTRAP;
	123	*codep = TRAP_BRKPT;
	124	return 1;
	125	}
	126
	127	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
	128	#ifdef __tilegx__
	129	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
	130	return 0;
1fcbe027 CM	131	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
	132	return 0;
	133	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
0707ad30 CM	134	return 0;
	135	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
	136	return 0;
	137	#else
eb7c792d	138	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
0707ad30 CM	139	return 0;
	140	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
	141	return 0;
	142	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
	143	return 0;
	144	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
	145	return 0;
	146	#endif
	147
	148	/* Check that the magic distinguishers are set to mean "raise". */
	149	if (get_Dest_X1(bundle) != 29 \|\| get_SrcA_X1(bundle) != 37)
	150	return 0;
	151
	152	/* There must be an "addli zero, zero, VAL" in X0. */
	153	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
	154	return 0;
	155	if (get_Dest_X0(bundle) != TREG_ZERO)
	156	return 0;
	157	if (get_SrcA_X0(bundle) != TREG_ZERO)
	158	return 0;
	159
	160	/*
	161	* Validate the proposed signal number and si_code value.
	162	* Note that we embed these in the static instruction itself
	163	* so that we perturb the register state as little as possible
	164	* at the time of the actual fault; it's unlikely you'd ever
	165	* need to dynamically choose which kind of fault to raise
	166	* from user space.
	167	*/
	168	sig = get_Imm16_X0(bundle) & 0x3f;
	169	switch (sig) {
	170	case SIGILL:
	171	maxcode = NSIGILL;
	172	break;
	173	case SIGFPE:
	174	maxcode = NSIGFPE;
	175	break;
	176	case SIGSEGV:
	177	maxcode = NSIGSEGV;
	178	break;
	179	case SIGBUS:
	180	maxcode = NSIGBUS;
	181	break;
	182	case SIGTRAP:
	183	maxcode = NSIGTRAP;
	184	break;
	185	default:
	186	return 0;
	187	}
	188	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	189	if (code <= 0 \|\| code > maxcode)
	190	return 0;
	191
	192	/* Make it the requested signal. */
	193	*sigp = sig;
	194	*codep = code \| __SI_FAULT;
	195	return 1;
	196	}
	197
867e359b CM	198	void __kprobes do_trap(struct pt_regs *regs, int fault_num,
	199	unsigned long reason)
	200	{
	201	siginfo_t info = { 0 };
	202	int signo, code;
	203	unsigned long address;
0707ad30	204	bundle_bits instr;
867e359b CM	205
	206	/* Re-enable interrupts. */
	207	local_irq_enable();
	208
	209	/*
	210	* If it hits in kernel mode and we can't fix it up, just exit the
	211	* current process and hope for the best.
	212	*/
	213	if (!user_mode(regs)) {
	214	if (fixup_exception(regs)) /* only UNALIGN_DATA in practice */
	215	return;
0707ad30	216	pr_alert("Kernel took bad trap %d at PC %#lx\n",
867e359b CM	217	fault_num, regs->pc);
867e359b CM	218	if (fault_num == INT_GPV)
0707ad30	219	pr_alert("GPV_REASON is %#lx\n", reason);
867e359b CM	220	show_regs(regs);
	221	do_exit(SIGKILL); /* FIXME: implement i386 die() */
	222	return;
	223	}
	224
	225	switch (fault_num) {
	226	case INT_ILL:
0707ad30 CM	227	if (copy_from_user(&instr, (void __user *)regs->pc,
	228	sizeof(instr))) {
	229	pr_err("Unreadable instruction for INT_ILL:"
867e359b CM	230	" %#lx\n", regs->pc);
	231	do_exit(SIGKILL);
	232	return;
	233	}
0707ad30	234	if (!special_ill(instr, &signo, &code)) {
867e359b CM	235	signo = SIGILL;
	236	code = ILL_ILLOPC;
	237	}
	238	address = regs->pc;
	239	break;
	240	case INT_GPV:
	241	#if CHIP_HAS_TILE_DMA()
	242	if (retry_gpv(reason))
	243	return;
	244	#endif
	245	/FALLTHROUGH/
	246	case INT_UDN_ACCESS:
	247	case INT_IDN_ACCESS:
	248	#if CHIP_HAS_SN()
	249	case INT_SN_ACCESS:
	250	#endif
	251	signo = SIGILL;
	252	code = ILL_PRVREG;
	253	address = regs->pc;
	254	break;
	255	case INT_SWINT_3:
	256	case INT_SWINT_2:
	257	case INT_SWINT_0:
	258	signo = SIGILL;
	259	code = ILL_ILLTRP;
	260	address = regs->pc;
	261	break;
	262	case INT_UNALIGN_DATA:
233325b9	263	#ifndef __tilegx__ /* Emulated support for single step debugging */
867e359b CM	264	if (unaligned_fixup >= 0) {
	265	struct single_step_state *state =
	266	current_thread_info()->step_state;
0707ad30 CM	267	if (!state \|\|
0707ad30 CM	268	(void __user *)(regs->pc) != state->buffer) {
867e359b CM	269	single_step_once(regs);
	270	return;
	271	}
	272	}
	273	#endif
	274	signo = SIGBUS;
	275	code = BUS_ADRALN;
	276	address = 0;
	277	break;
	278	case INT_DOUBLE_FAULT:
	279	/*
	280	* For double fault, "reason" is actually passed as
a78c942d	281	* SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
867e359b CM	282	* we can provide the original fault number rather than
	283	* the uninteresting "INT_DOUBLE_FAULT" so the user can
	284	* learn what actually struck while PL0 ICS was set.
	285	*/
	286	fault_num = reason;
	287	signo = SIGILL;
	288	code = ILL_DBLFLT;
	289	address = regs->pc;
	290	break;
	291	#ifdef __tilegx__
e1723538 CM	292	case INT_ILL_TRANS: {
	293	/* Avoid a hardware erratum with the return address stack. */
	294	fill_ra_stack();
	295
867e359b CM	296	signo = SIGSEGV;
	297	code = SEGV_MAPERR;
	298	if (reason & SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK)
	299	address = regs->pc;
	300	else
	301	address = 0; /* FIXME: GX: single-step for address */
	302	break;
e1723538	303	}
867e359b CM	304	#endif
	305	default:
	306	panic("Unexpected do_trap interrupt number %d", fault_num);
	307	return;
	308	}
	309
	310	info.si_signo = signo;
	311	info.si_code = code;
0707ad30	312	info.si_addr = (void __user *)address;
867e359b CM	313	if (signo == SIGILL)
867e359b CM	314	info.si_trapno = fault_num;
571d76ac	315	trace_unhandled_signal("trap", regs, address, signo);
867e359b CM	316	force_sig_info(signo, &info, current);
	317	}
	318
867e359b CM	319	void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
	320	{
	321	_dump_stack(dummy, pc, lr, sp, r52);
0707ad30	322	pr_emerg("Double fault: exiting\n");
867e359b CM	323	machine_halt();
867e359b CM	324	}