Commit | Line | Data |
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3ef0e1f8 AS |
1 | /* OLPC machine specific definitions */ |
2 | ||
1965aae3 PA |
3 | #ifndef _ASM_X86_OLPC_H |
4 | #define _ASM_X86_OLPC_H | |
3ef0e1f8 AS |
5 | |
6 | #include <asm/geode.h> | |
7 | ||
8 | struct olpc_platform_t { | |
9 | int flags; | |
10 | uint32_t boardrev; | |
11 | int ecver; | |
12 | }; | |
13 | ||
14 | #define OLPC_F_PRESENT 0x01 | |
15 | #define OLPC_F_DCON 0x02 | |
3ef0e1f8 AS |
16 | |
17 | #ifdef CONFIG_OLPC | |
18 | ||
19 | extern struct olpc_platform_t olpc_platform_info; | |
20 | ||
21 | /* | |
22 | * OLPC board IDs contain the major build number within the mask 0x0ff0, | |
0d2eb44f | 23 | * and the minor build number within 0x000f. Pre-builds have a minor |
3ef0e1f8 AS |
24 | * number less than 8, and normal builds start at 8. For example, 0x0B10 |
25 | * is a PreB1, and 0x0C18 is a C1. | |
26 | */ | |
27 | ||
28 | static inline uint32_t olpc_board(uint8_t id) | |
29 | { | |
30 | return (id << 4) | 0x8; | |
31 | } | |
32 | ||
33 | static inline uint32_t olpc_board_pre(uint8_t id) | |
34 | { | |
35 | return id << 4; | |
36 | } | |
37 | ||
38 | static inline int machine_is_olpc(void) | |
39 | { | |
40 | return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0; | |
41 | } | |
42 | ||
43 | /* | |
44 | * The DCON is OLPC's Display Controller. It has a number of unique | |
45 | * features that we might want to take advantage of.. | |
46 | */ | |
47 | static inline int olpc_has_dcon(void) | |
48 | { | |
49 | return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0; | |
50 | } | |
51 | ||
3ef0e1f8 AS |
52 | /* |
53 | * The "Mass Production" version of OLPC's XO is identified as being model | |
54 | * C2. During the prototype phase, the following models (in chronological | |
55 | * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models | |
56 | * were based on Geode GX CPUs, and models after that were based upon | |
57 | * Geode LX CPUs. There were also some hand-assembled models floating | |
58 | * around, referred to as PreB1, PreB2, etc. | |
59 | */ | |
60 | static inline int olpc_board_at_least(uint32_t rev) | |
61 | { | |
62 | return olpc_platform_info.boardrev >= rev; | |
63 | } | |
64 | ||
65 | #else | |
66 | ||
67 | static inline int machine_is_olpc(void) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | ||
72 | static inline int olpc_has_dcon(void) | |
73 | { | |
74 | return 0; | |
75 | } | |
76 | ||
3ef0e1f8 AS |
77 | #endif |
78 | ||
d5d0e88c TG |
79 | extern int pci_olpc_init(void); |
80 | ||
3ef0e1f8 AS |
81 | /* EC related functions */ |
82 | ||
83 | extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen, | |
84 | unsigned char *outbuf, size_t outlen); | |
85 | ||
86 | extern int olpc_ec_mask_set(uint8_t bits); | |
87 | extern int olpc_ec_mask_unset(uint8_t bits); | |
88 | ||
89 | /* EC commands */ | |
90 | ||
91 | #define EC_FIRMWARE_REV 0x08 | |
260586d2 DD |
92 | #define EC_WLAN_ENTER_RESET 0x35 |
93 | #define EC_WLAN_LEAVE_RESET 0x25 | |
3ef0e1f8 AS |
94 | |
95 | /* SCI source values */ | |
96 | ||
97 | #define EC_SCI_SRC_EMPTY 0x00 | |
98 | #define EC_SCI_SRC_GAME 0x01 | |
99 | #define EC_SCI_SRC_BATTERY 0x02 | |
100 | #define EC_SCI_SRC_BATSOC 0x04 | |
101 | #define EC_SCI_SRC_BATERR 0x08 | |
102 | #define EC_SCI_SRC_EBOOK 0x10 | |
103 | #define EC_SCI_SRC_WLAN 0x20 | |
104 | #define EC_SCI_SRC_ACPWR 0x40 | |
105 | #define EC_SCI_SRC_ALL 0x7F | |
106 | ||
107 | /* GPIO assignments */ | |
108 | ||
3c554946 | 109 | #define OLPC_GPIO_MIC_AC 1 |
7637c925 AS |
110 | #define OLPC_GPIO_DCON_STAT0 5 |
111 | #define OLPC_GPIO_DCON_STAT1 6 | |
112 | #define OLPC_GPIO_DCON_IRQ 7 | |
3ef0e1f8 | 113 | #define OLPC_GPIO_THRM_ALRM geode_gpio(10) |
7637c925 AS |
114 | #define OLPC_GPIO_DCON_LOAD 11 |
115 | #define OLPC_GPIO_DCON_BLANK 12 | |
116 | #define OLPC_GPIO_SMB_CLK 14 | |
117 | #define OLPC_GPIO_SMB_DATA 15 | |
3ef0e1f8 AS |
118 | #define OLPC_GPIO_WORKAUX geode_gpio(24) |
119 | #define OLPC_GPIO_LID geode_gpio(26) | |
120 | #define OLPC_GPIO_ECSCI geode_gpio(27) | |
121 | ||
1965aae3 | 122 | #endif /* _ASM_X86_OLPC_H */ |