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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | |
5 | * | |
6 | * This file contains the lowest level x86_64-specific interrupt | |
7 | * entry and irq statistics code. All the remaining irq logic is | |
8 | * done by the generic kernel/irq/ code and in the | |
9 | * x86_64-specific irq controller code. (e.g. i8259.c and | |
10 | * io_apic.c.) | |
11 | */ | |
12 | ||
13 | #include <linux/kernel_stat.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/seq_file.h> | |
16 | #include <linux/module.h> | |
76e4f660 | 17 | #include <linux/delay.h> |
1da177e4 LT |
18 | #include <asm/uaccess.h> |
19 | #include <asm/io_apic.h> | |
95833c83 | 20 | #include <asm/idle.h> |
1da177e4 LT |
21 | |
22 | atomic_t irq_err_count; | |
1da177e4 | 23 | |
4961f10e ES |
24 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
25 | /* | |
26 | * Probabilistic stack overflow check: | |
27 | * | |
28 | * Only check the stack in process context, because everything else | |
29 | * runs on the big interrupt stacks. Checking reliably is too expensive, | |
30 | * so we just check from interrupts. | |
31 | */ | |
32 | static inline void stack_overflow_check(struct pt_regs *regs) | |
33 | { | |
34 | u64 curbase = (u64) current->thread_info; | |
35 | static unsigned long warned = -60*HZ; | |
36 | ||
37 | if (regs->rsp >= curbase && regs->rsp <= curbase + THREAD_SIZE && | |
38 | regs->rsp < curbase + sizeof(struct thread_info) + 128 && | |
39 | time_after(jiffies, warned + 60*HZ)) { | |
40 | printk("do_IRQ: %s near stack overflow (cur:%Lx,rsp:%lx)\n", | |
41 | current->comm, curbase, regs->rsp); | |
42 | show_stack(NULL,NULL); | |
43 | warned = jiffies; | |
44 | } | |
45 | } | |
46 | #endif | |
47 | ||
1da177e4 LT |
48 | /* |
49 | * Generic, controller-independent functions: | |
50 | */ | |
51 | ||
52 | int show_interrupts(struct seq_file *p, void *v) | |
53 | { | |
54 | int i = *(loff_t *) v, j; | |
55 | struct irqaction * action; | |
56 | unsigned long flags; | |
57 | ||
58 | if (i == 0) { | |
59 | seq_printf(p, " "); | |
394e3902 | 60 | for_each_online_cpu(j) |
bdbdaa79 | 61 | seq_printf(p, "CPU%-8d",j); |
1da177e4 LT |
62 | seq_putc(p, '\n'); |
63 | } | |
64 | ||
65 | if (i < NR_IRQS) { | |
66 | spin_lock_irqsave(&irq_desc[i].lock, flags); | |
67 | action = irq_desc[i].action; | |
68 | if (!action) | |
69 | goto skip; | |
70 | seq_printf(p, "%3d: ",i); | |
71 | #ifndef CONFIG_SMP | |
72 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
73 | #else | |
394e3902 AM |
74 | for_each_online_cpu(j) |
75 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 | 76 | #endif |
f29bd1ba IM |
77 | seq_printf(p, " %8s", irq_desc[i].chip->name); |
78 | seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq)); | |
1da177e4 LT |
79 | |
80 | seq_printf(p, " %s", action->name); | |
81 | for (action=action->next; action; action = action->next) | |
82 | seq_printf(p, ", %s", action->name); | |
83 | seq_putc(p, '\n'); | |
84 | skip: | |
85 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | |
86 | } else if (i == NR_IRQS) { | |
87 | seq_printf(p, "NMI: "); | |
394e3902 AM |
88 | for_each_online_cpu(j) |
89 | seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count); | |
1da177e4 | 90 | seq_putc(p, '\n'); |
1da177e4 | 91 | seq_printf(p, "LOC: "); |
394e3902 AM |
92 | for_each_online_cpu(j) |
93 | seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs); | |
1da177e4 | 94 | seq_putc(p, '\n'); |
1da177e4 | 95 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); |
1da177e4 LT |
96 | } |
97 | return 0; | |
98 | } | |
99 | ||
100 | /* | |
101 | * do_IRQ handles all normal device IRQ's (the special | |
102 | * SMP cross-CPU interrupts have their own specific | |
103 | * handlers). | |
104 | */ | |
105 | asmlinkage unsigned int do_IRQ(struct pt_regs *regs) | |
106 | { | |
19eadf98 RR |
107 | /* high bit used in ret_from_ code */ |
108 | unsigned irq = ~regs->orig_rax; | |
1da177e4 | 109 | |
a052b68b AM |
110 | if (unlikely(irq >= NR_IRQS)) { |
111 | printk(KERN_EMERG "%s: cannot handle IRQ %d\n", | |
112 | __FUNCTION__, irq); | |
113 | BUG(); | |
114 | } | |
115 | ||
95833c83 | 116 | exit_idle(); |
1da177e4 | 117 | irq_enter(); |
4961f10e ES |
118 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
119 | stack_overflow_check(regs); | |
120 | #endif | |
f29bd1ba | 121 | generic_handle_irq(irq, regs); |
1da177e4 LT |
122 | irq_exit(); |
123 | ||
124 | return 1; | |
125 | } | |
126 | ||
76e4f660 AR |
127 | #ifdef CONFIG_HOTPLUG_CPU |
128 | void fixup_irqs(cpumask_t map) | |
129 | { | |
130 | unsigned int irq; | |
131 | static int warned; | |
132 | ||
133 | for (irq = 0; irq < NR_IRQS; irq++) { | |
134 | cpumask_t mask; | |
135 | if (irq == 2) | |
136 | continue; | |
137 | ||
a53da52f | 138 | cpus_and(mask, irq_desc[irq].affinity, map); |
76e4f660 AR |
139 | if (any_online_cpu(mask) == NR_CPUS) { |
140 | printk("Breaking affinity for irq %i\n", irq); | |
141 | mask = map; | |
142 | } | |
d1bef4ed IM |
143 | if (irq_desc[irq].chip->set_affinity) |
144 | irq_desc[irq].chip->set_affinity(irq, mask); | |
76e4f660 AR |
145 | else if (irq_desc[irq].action && !(warned++)) |
146 | printk("Cannot set affinity for irq %i\n", irq); | |
147 | } | |
148 | ||
149 | /* That doesn't seem sufficient. Give it 1ms. */ | |
150 | local_irq_enable(); | |
151 | mdelay(1); | |
152 | local_irq_disable(); | |
153 | } | |
154 | #endif | |
ed6b676c AK |
155 | |
156 | extern void call_softirq(void); | |
157 | ||
158 | asmlinkage void do_softirq(void) | |
159 | { | |
160 | __u32 pending; | |
161 | unsigned long flags; | |
162 | ||
163 | if (in_interrupt()) | |
164 | return; | |
165 | ||
166 | local_irq_save(flags); | |
167 | pending = local_softirq_pending(); | |
168 | /* Switch to interrupt stack */ | |
2601e64d | 169 | if (pending) { |
ed6b676c | 170 | call_softirq(); |
2601e64d IM |
171 | WARN_ON_ONCE(softirq_count()); |
172 | } | |
ed6b676c AK |
173 | local_irq_restore(flags); |
174 | } | |
175 | EXPORT_SYMBOL(do_softirq); |