Commit | Line | Data |
---|---|---|
7c9281d7 DT |
1 | /* |
2 | * edac_mc kernel module | |
42a8e397 DT |
3 | * (C) 2005-2007 Linux Networx (http://lnxi.com) |
4 | * | |
7c9281d7 DT |
5 | * This file may be distributed under the terms of the |
6 | * GNU General Public License. | |
7 | * | |
42a8e397 | 8 | * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com |
7c9281d7 | 9 | * |
7a623c03 MCC |
10 | * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com> |
11 | * The entire API were re-written, and ported to use struct device | |
12 | * | |
7c9281d7 DT |
13 | */ |
14 | ||
7c9281d7 | 15 | #include <linux/ctype.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
30e1f7a8 | 17 | #include <linux/edac.h> |
8096cfaf | 18 | #include <linux/bug.h> |
7a623c03 | 19 | #include <linux/pm_runtime.h> |
452a6bf9 | 20 | #include <linux/uaccess.h> |
7c9281d7 | 21 | |
20bcb7a8 | 22 | #include "edac_core.h" |
7c9281d7 DT |
23 | #include "edac_module.h" |
24 | ||
25 | /* MC EDAC Controls, setable by module parameter, and sysfs */ | |
4de78c68 DJ |
26 | static int edac_mc_log_ue = 1; |
27 | static int edac_mc_log_ce = 1; | |
f044091c | 28 | static int edac_mc_panic_on_ue; |
4de78c68 | 29 | static int edac_mc_poll_msec = 1000; |
7c9281d7 DT |
30 | |
31 | /* Getter functions for above */ | |
4de78c68 | 32 | int edac_mc_get_log_ue(void) |
7c9281d7 | 33 | { |
4de78c68 | 34 | return edac_mc_log_ue; |
7c9281d7 DT |
35 | } |
36 | ||
4de78c68 | 37 | int edac_mc_get_log_ce(void) |
7c9281d7 | 38 | { |
4de78c68 | 39 | return edac_mc_log_ce; |
7c9281d7 DT |
40 | } |
41 | ||
4de78c68 | 42 | int edac_mc_get_panic_on_ue(void) |
7c9281d7 | 43 | { |
4de78c68 | 44 | return edac_mc_panic_on_ue; |
7c9281d7 DT |
45 | } |
46 | ||
81d87cb1 DJ |
47 | /* this is temporary */ |
48 | int edac_mc_get_poll_msec(void) | |
49 | { | |
4de78c68 | 50 | return edac_mc_poll_msec; |
7c9281d7 DT |
51 | } |
52 | ||
096846e2 AJ |
53 | static int edac_set_poll_msec(const char *val, struct kernel_param *kp) |
54 | { | |
55 | long l; | |
56 | int ret; | |
57 | ||
58 | if (!val) | |
59 | return -EINVAL; | |
60 | ||
61 | ret = strict_strtol(val, 0, &l); | |
62 | if (ret == -EINVAL || ((int)l != l)) | |
63 | return -EINVAL; | |
64 | *((int *)kp->arg) = l; | |
65 | ||
66 | /* notify edac_mc engine to reset the poll period */ | |
67 | edac_mc_reset_delay_period(l); | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
7c9281d7 | 72 | /* Parameter declarations for above */ |
4de78c68 DJ |
73 | module_param(edac_mc_panic_on_ue, int, 0644); |
74 | MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); | |
75 | module_param(edac_mc_log_ue, int, 0644); | |
76 | MODULE_PARM_DESC(edac_mc_log_ue, | |
079708b9 | 77 | "Log uncorrectable error to console: 0=off 1=on"); |
4de78c68 DJ |
78 | module_param(edac_mc_log_ce, int, 0644); |
79 | MODULE_PARM_DESC(edac_mc_log_ce, | |
079708b9 | 80 | "Log correctable error to console: 0=off 1=on"); |
096846e2 AJ |
81 | module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int, |
82 | &edac_mc_poll_msec, 0644); | |
4de78c68 | 83 | MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds"); |
7c9281d7 | 84 | |
7a623c03 MCC |
85 | static struct device mci_pdev; |
86 | ||
7c9281d7 DT |
87 | /* |
88 | * various constants for Memory Controllers | |
89 | */ | |
90 | static const char *mem_types[] = { | |
91 | [MEM_EMPTY] = "Empty", | |
92 | [MEM_RESERVED] = "Reserved", | |
93 | [MEM_UNKNOWN] = "Unknown", | |
94 | [MEM_FPM] = "FPM", | |
95 | [MEM_EDO] = "EDO", | |
96 | [MEM_BEDO] = "BEDO", | |
97 | [MEM_SDR] = "Unbuffered-SDR", | |
98 | [MEM_RDR] = "Registered-SDR", | |
99 | [MEM_DDR] = "Unbuffered-DDR", | |
100 | [MEM_RDDR] = "Registered-DDR", | |
1a9b85e6 DJ |
101 | [MEM_RMBS] = "RMBS", |
102 | [MEM_DDR2] = "Unbuffered-DDR2", | |
103 | [MEM_FB_DDR2] = "FullyBuffered-DDR2", | |
1d5f726c | 104 | [MEM_RDDR2] = "Registered-DDR2", |
b1cfebc9 YS |
105 | [MEM_XDR] = "XDR", |
106 | [MEM_DDR3] = "Unbuffered-DDR3", | |
107 | [MEM_RDDR3] = "Registered-DDR3" | |
7c9281d7 DT |
108 | }; |
109 | ||
110 | static const char *dev_types[] = { | |
111 | [DEV_UNKNOWN] = "Unknown", | |
112 | [DEV_X1] = "x1", | |
113 | [DEV_X2] = "x2", | |
114 | [DEV_X4] = "x4", | |
115 | [DEV_X8] = "x8", | |
116 | [DEV_X16] = "x16", | |
117 | [DEV_X32] = "x32", | |
118 | [DEV_X64] = "x64" | |
119 | }; | |
120 | ||
121 | static const char *edac_caps[] = { | |
122 | [EDAC_UNKNOWN] = "Unknown", | |
123 | [EDAC_NONE] = "None", | |
124 | [EDAC_RESERVED] = "Reserved", | |
125 | [EDAC_PARITY] = "PARITY", | |
126 | [EDAC_EC] = "EC", | |
127 | [EDAC_SECDED] = "SECDED", | |
128 | [EDAC_S2ECD2ED] = "S2ECD2ED", | |
129 | [EDAC_S4ECD4ED] = "S4ECD4ED", | |
130 | [EDAC_S8ECD8ED] = "S8ECD8ED", | |
131 | [EDAC_S16ECD16ED] = "S16ECD16ED" | |
132 | }; | |
133 | ||
19974710 | 134 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 MCC |
135 | /* |
136 | * EDAC sysfs CSROW data structures and methods | |
137 | */ | |
138 | ||
139 | #define to_csrow(k) container_of(k, struct csrow_info, dev) | |
140 | ||
141 | /* | |
142 | * We need it to avoid namespace conflicts between the legacy API | |
143 | * and the per-dimm/per-rank one | |
7c9281d7 | 144 | */ |
7a623c03 MCC |
145 | #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ |
146 | struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) | |
147 | ||
148 | struct dev_ch_attribute { | |
149 | struct device_attribute attr; | |
150 | int channel; | |
151 | }; | |
152 | ||
153 | #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ | |
154 | struct dev_ch_attribute dev_attr_legacy_##_name = \ | |
155 | { __ATTR(_name, _mode, _show, _store), (_var) } | |
156 | ||
157 | #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) | |
7c9281d7 DT |
158 | |
159 | /* Set of more default csrow<id> attribute show/store functions */ | |
7a623c03 MCC |
160 | static ssize_t csrow_ue_count_show(struct device *dev, |
161 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 162 | { |
7a623c03 MCC |
163 | struct csrow_info *csrow = to_csrow(dev); |
164 | ||
079708b9 | 165 | return sprintf(data, "%u\n", csrow->ue_count); |
7c9281d7 DT |
166 | } |
167 | ||
7a623c03 MCC |
168 | static ssize_t csrow_ce_count_show(struct device *dev, |
169 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 170 | { |
7a623c03 MCC |
171 | struct csrow_info *csrow = to_csrow(dev); |
172 | ||
079708b9 | 173 | return sprintf(data, "%u\n", csrow->ce_count); |
7c9281d7 DT |
174 | } |
175 | ||
7a623c03 MCC |
176 | static ssize_t csrow_size_show(struct device *dev, |
177 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 178 | { |
7a623c03 | 179 | struct csrow_info *csrow = to_csrow(dev); |
a895bf8b MCC |
180 | int i; |
181 | u32 nr_pages = 0; | |
182 | ||
183 | for (i = 0; i < csrow->nr_channels; i++) | |
184 | nr_pages += csrow->channels[i].dimm->nr_pages; | |
a895bf8b | 185 | return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); |
7c9281d7 DT |
186 | } |
187 | ||
7a623c03 MCC |
188 | static ssize_t csrow_mem_type_show(struct device *dev, |
189 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 190 | { |
7a623c03 MCC |
191 | struct csrow_info *csrow = to_csrow(dev); |
192 | ||
084a4fcc | 193 | return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]); |
7c9281d7 DT |
194 | } |
195 | ||
7a623c03 MCC |
196 | static ssize_t csrow_dev_type_show(struct device *dev, |
197 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 198 | { |
7a623c03 MCC |
199 | struct csrow_info *csrow = to_csrow(dev); |
200 | ||
084a4fcc | 201 | return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]); |
7c9281d7 DT |
202 | } |
203 | ||
7a623c03 MCC |
204 | static ssize_t csrow_edac_mode_show(struct device *dev, |
205 | struct device_attribute *mattr, | |
206 | char *data) | |
7c9281d7 | 207 | { |
7a623c03 MCC |
208 | struct csrow_info *csrow = to_csrow(dev); |
209 | ||
084a4fcc | 210 | return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]); |
7c9281d7 DT |
211 | } |
212 | ||
213 | /* show/store functions for DIMM Label attributes */ | |
7a623c03 MCC |
214 | static ssize_t channel_dimm_label_show(struct device *dev, |
215 | struct device_attribute *mattr, | |
216 | char *data) | |
7c9281d7 | 217 | { |
7a623c03 MCC |
218 | struct csrow_info *csrow = to_csrow(dev); |
219 | unsigned chan = to_channel(mattr); | |
220 | struct rank_info *rank = &csrow->channels[chan]; | |
221 | ||
124682c7 | 222 | /* if field has not been initialized, there is nothing to send */ |
7a623c03 | 223 | if (!rank->dimm->label[0]) |
124682c7 AJ |
224 | return 0; |
225 | ||
226 | return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", | |
7a623c03 | 227 | rank->dimm->label); |
7c9281d7 DT |
228 | } |
229 | ||
7a623c03 MCC |
230 | static ssize_t channel_dimm_label_store(struct device *dev, |
231 | struct device_attribute *mattr, | |
232 | const char *data, size_t count) | |
7c9281d7 | 233 | { |
7a623c03 MCC |
234 | struct csrow_info *csrow = to_csrow(dev); |
235 | unsigned chan = to_channel(mattr); | |
236 | struct rank_info *rank = &csrow->channels[chan]; | |
237 | ||
7c9281d7 DT |
238 | ssize_t max_size = 0; |
239 | ||
079708b9 | 240 | max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); |
7a623c03 MCC |
241 | strncpy(rank->dimm->label, data, max_size); |
242 | rank->dimm->label[max_size] = '\0'; | |
7c9281d7 DT |
243 | |
244 | return max_size; | |
245 | } | |
246 | ||
247 | /* show function for dynamic chX_ce_count attribute */ | |
7a623c03 MCC |
248 | static ssize_t channel_ce_count_show(struct device *dev, |
249 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 250 | { |
7a623c03 MCC |
251 | struct csrow_info *csrow = to_csrow(dev); |
252 | unsigned chan = to_channel(mattr); | |
253 | struct rank_info *rank = &csrow->channels[chan]; | |
254 | ||
255 | return sprintf(data, "%u\n", rank->ce_count); | |
7c9281d7 DT |
256 | } |
257 | ||
7a623c03 MCC |
258 | /* cwrow<id>/attribute files */ |
259 | DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL); | |
260 | DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL); | |
261 | DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL); | |
262 | DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL); | |
263 | DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL); | |
264 | DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL); | |
7c9281d7 | 265 | |
7a623c03 MCC |
266 | /* default attributes of the CSROW<id> object */ |
267 | static struct attribute *csrow_attrs[] = { | |
268 | &dev_attr_legacy_dev_type.attr, | |
269 | &dev_attr_legacy_mem_type.attr, | |
270 | &dev_attr_legacy_edac_mode.attr, | |
271 | &dev_attr_legacy_size_mb.attr, | |
272 | &dev_attr_legacy_ue_count.attr, | |
273 | &dev_attr_legacy_ce_count.attr, | |
274 | NULL, | |
275 | }; | |
7c9281d7 | 276 | |
7a623c03 MCC |
277 | static struct attribute_group csrow_attr_grp = { |
278 | .attrs = csrow_attrs, | |
279 | }; | |
7c9281d7 | 280 | |
7a623c03 MCC |
281 | static const struct attribute_group *csrow_attr_groups[] = { |
282 | &csrow_attr_grp, | |
283 | NULL | |
284 | }; | |
7c9281d7 | 285 | |
7a623c03 | 286 | static void csrow_attr_release(struct device *device) |
7c9281d7 | 287 | { |
7a623c03 | 288 | debugf1("Releasing csrow device %s\n", dev_name(device)); |
7c9281d7 DT |
289 | } |
290 | ||
7a623c03 MCC |
291 | static struct device_type csrow_attr_type = { |
292 | .groups = csrow_attr_groups, | |
293 | .release = csrow_attr_release, | |
7c9281d7 DT |
294 | }; |
295 | ||
7a623c03 MCC |
296 | /* |
297 | * possible dynamic channel DIMM Label attribute files | |
298 | * | |
299 | */ | |
7c9281d7 | 300 | |
7a623c03 | 301 | #define EDAC_NR_CHANNELS 6 |
7c9281d7 | 302 | |
7a623c03 | 303 | DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 304 | channel_dimm_label_show, channel_dimm_label_store, 0); |
7a623c03 | 305 | DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 306 | channel_dimm_label_show, channel_dimm_label_store, 1); |
7a623c03 | 307 | DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 308 | channel_dimm_label_show, channel_dimm_label_store, 2); |
7a623c03 | 309 | DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 310 | channel_dimm_label_show, channel_dimm_label_store, 3); |
7a623c03 | 311 | DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 312 | channel_dimm_label_show, channel_dimm_label_store, 4); |
7a623c03 | 313 | DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 314 | channel_dimm_label_show, channel_dimm_label_store, 5); |
7c9281d7 DT |
315 | |
316 | /* Total possible dynamic DIMM Label attribute file table */ | |
7a623c03 MCC |
317 | static struct device_attribute *dynamic_csrow_dimm_attr[] = { |
318 | &dev_attr_legacy_ch0_dimm_label.attr, | |
319 | &dev_attr_legacy_ch1_dimm_label.attr, | |
320 | &dev_attr_legacy_ch2_dimm_label.attr, | |
321 | &dev_attr_legacy_ch3_dimm_label.attr, | |
322 | &dev_attr_legacy_ch4_dimm_label.attr, | |
323 | &dev_attr_legacy_ch5_dimm_label.attr | |
7c9281d7 DT |
324 | }; |
325 | ||
326 | /* possible dynamic channel ce_count attribute files */ | |
7a623c03 MCC |
327 | DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR, |
328 | channel_ce_count_show, NULL, 0); | |
329 | DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR, | |
330 | channel_ce_count_show, NULL, 1); | |
331 | DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR, | |
332 | channel_ce_count_show, NULL, 2); | |
333 | DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR, | |
334 | channel_ce_count_show, NULL, 3); | |
335 | DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR, | |
336 | channel_ce_count_show, NULL, 4); | |
337 | DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR, | |
338 | channel_ce_count_show, NULL, 5); | |
7c9281d7 DT |
339 | |
340 | /* Total possible dynamic ce_count attribute file table */ | |
7a623c03 MCC |
341 | static struct device_attribute *dynamic_csrow_ce_count_attr[] = { |
342 | &dev_attr_legacy_ch0_ce_count.attr, | |
343 | &dev_attr_legacy_ch1_ce_count.attr, | |
344 | &dev_attr_legacy_ch2_ce_count.attr, | |
345 | &dev_attr_legacy_ch3_ce_count.attr, | |
346 | &dev_attr_legacy_ch4_ce_count.attr, | |
347 | &dev_attr_legacy_ch5_ce_count.attr | |
7c9281d7 DT |
348 | }; |
349 | ||
7a623c03 MCC |
350 | /* Create a CSROW object under specifed edac_mc_device */ |
351 | static int edac_create_csrow_object(struct mem_ctl_info *mci, | |
352 | struct csrow_info *csrow, int index) | |
7c9281d7 | 353 | { |
7a623c03 | 354 | int err, chan; |
7c9281d7 | 355 | |
7a623c03 MCC |
356 | if (csrow->nr_channels >= EDAC_NR_CHANNELS) |
357 | return -ENODEV; | |
7c9281d7 | 358 | |
7a623c03 MCC |
359 | csrow->dev.type = &csrow_attr_type; |
360 | csrow->dev.bus = &mci->bus; | |
361 | device_initialize(&csrow->dev); | |
362 | csrow->dev.parent = &mci->dev; | |
363 | dev_set_name(&csrow->dev, "csrow%d", index); | |
364 | dev_set_drvdata(&csrow->dev, csrow); | |
7c9281d7 | 365 | |
7a623c03 MCC |
366 | debugf0("%s(): creating (virtual) csrow node %s\n", __func__, |
367 | dev_name(&csrow->dev)); | |
7c9281d7 | 368 | |
7a623c03 MCC |
369 | err = device_add(&csrow->dev); |
370 | if (err < 0) | |
371 | return err; | |
7c9281d7 | 372 | |
7a623c03 MCC |
373 | for (chan = 0; chan < csrow->nr_channels; chan++) { |
374 | err = device_create_file(&csrow->dev, | |
375 | dynamic_csrow_dimm_attr[chan]); | |
376 | if (err < 0) | |
377 | goto error; | |
378 | err = device_create_file(&csrow->dev, | |
379 | dynamic_csrow_ce_count_attr[chan]); | |
380 | if (err < 0) { | |
381 | device_remove_file(&csrow->dev, | |
382 | dynamic_csrow_dimm_attr[chan]); | |
383 | goto error; | |
384 | } | |
385 | } | |
8096cfaf | 386 | |
7a623c03 | 387 | return 0; |
8096cfaf | 388 | |
7a623c03 MCC |
389 | error: |
390 | for (--chan; chan >= 0; chan--) { | |
391 | device_remove_file(&csrow->dev, | |
392 | dynamic_csrow_dimm_attr[chan]); | |
393 | device_remove_file(&csrow->dev, | |
394 | dynamic_csrow_ce_count_attr[chan]); | |
395 | } | |
396 | put_device(&csrow->dev); | |
7c9281d7 | 397 | |
7a623c03 MCC |
398 | return err; |
399 | } | |
7c9281d7 DT |
400 | |
401 | /* Create a CSROW object under specifed edac_mc_device */ | |
7a623c03 | 402 | static int edac_create_csrow_objects(struct mem_ctl_info *mci) |
7c9281d7 | 403 | { |
7a623c03 MCC |
404 | int err, i, chan; |
405 | struct csrow_info *csrow; | |
7c9281d7 | 406 | |
7a623c03 MCC |
407 | for (i = 0; i < mci->nr_csrows; i++) { |
408 | err = edac_create_csrow_object(mci, &mci->csrows[i], i); | |
409 | if (err < 0) | |
410 | goto error; | |
411 | } | |
412 | return 0; | |
8096cfaf | 413 | |
7a623c03 MCC |
414 | error: |
415 | for (--i; i >= 0; i--) { | |
416 | csrow = &mci->csrows[i]; | |
417 | for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { | |
418 | device_remove_file(&csrow->dev, | |
419 | dynamic_csrow_dimm_attr[chan]); | |
420 | device_remove_file(&csrow->dev, | |
421 | dynamic_csrow_ce_count_attr[chan]); | |
422 | } | |
423 | put_device(&mci->csrows[i].dev); | |
8096cfaf | 424 | } |
7c9281d7 | 425 | |
7a623c03 MCC |
426 | return err; |
427 | } | |
8096cfaf | 428 | |
7a623c03 MCC |
429 | static void edac_delete_csrow_objects(struct mem_ctl_info *mci) |
430 | { | |
431 | int i, chan; | |
432 | struct csrow_info *csrow; | |
8096cfaf | 433 | |
7a623c03 MCC |
434 | for (i = mci->nr_csrows - 1; i >= 0; i--) { |
435 | csrow = &mci->csrows[i]; | |
436 | for (chan = csrow->nr_channels - 1; chan >= 0; chan--) { | |
437 | debugf1("Removing csrow %d channel %d sysfs nodes\n", | |
438 | i, chan); | |
439 | device_remove_file(&csrow->dev, | |
440 | dynamic_csrow_dimm_attr[chan]); | |
441 | device_remove_file(&csrow->dev, | |
442 | dynamic_csrow_ce_count_attr[chan]); | |
7c9281d7 | 443 | } |
7a623c03 MCC |
444 | put_device(&mci->csrows[i].dev); |
445 | device_del(&mci->csrows[i].dev); | |
7c9281d7 | 446 | } |
7c9281d7 | 447 | } |
19974710 MCC |
448 | #endif |
449 | ||
450 | /* | |
451 | * Per-dimm (or per-rank) devices | |
452 | */ | |
453 | ||
454 | #define to_dimm(k) container_of(k, struct dimm_info, dev) | |
455 | ||
456 | /* show/store functions for DIMM Label attributes */ | |
457 | static ssize_t dimmdev_location_show(struct device *dev, | |
458 | struct device_attribute *mattr, char *data) | |
459 | { | |
460 | struct dimm_info *dimm = to_dimm(dev); | |
461 | struct mem_ctl_info *mci = dimm->mci; | |
462 | int i; | |
463 | char *p = data; | |
464 | ||
465 | for (i = 0; i < mci->n_layers; i++) { | |
466 | p += sprintf(p, "%s %d ", | |
467 | edac_layer_name[mci->layers[i].type], | |
468 | dimm->location[i]); | |
469 | } | |
470 | ||
471 | return p - data; | |
472 | } | |
473 | ||
474 | static ssize_t dimmdev_label_show(struct device *dev, | |
475 | struct device_attribute *mattr, char *data) | |
476 | { | |
477 | struct dimm_info *dimm = to_dimm(dev); | |
478 | ||
479 | /* if field has not been initialized, there is nothing to send */ | |
480 | if (!dimm->label[0]) | |
481 | return 0; | |
482 | ||
483 | return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label); | |
484 | } | |
485 | ||
486 | static ssize_t dimmdev_label_store(struct device *dev, | |
487 | struct device_attribute *mattr, | |
488 | const char *data, | |
489 | size_t count) | |
490 | { | |
491 | struct dimm_info *dimm = to_dimm(dev); | |
492 | ||
493 | ssize_t max_size = 0; | |
494 | ||
495 | max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); | |
496 | strncpy(dimm->label, data, max_size); | |
497 | dimm->label[max_size] = '\0'; | |
498 | ||
499 | return max_size; | |
500 | } | |
501 | ||
502 | static ssize_t dimmdev_size_show(struct device *dev, | |
503 | struct device_attribute *mattr, char *data) | |
504 | { | |
505 | struct dimm_info *dimm = to_dimm(dev); | |
506 | ||
507 | return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages)); | |
508 | } | |
509 | ||
510 | static ssize_t dimmdev_mem_type_show(struct device *dev, | |
511 | struct device_attribute *mattr, char *data) | |
512 | { | |
513 | struct dimm_info *dimm = to_dimm(dev); | |
514 | ||
515 | return sprintf(data, "%s\n", mem_types[dimm->mtype]); | |
516 | } | |
517 | ||
518 | static ssize_t dimmdev_dev_type_show(struct device *dev, | |
519 | struct device_attribute *mattr, char *data) | |
520 | { | |
521 | struct dimm_info *dimm = to_dimm(dev); | |
522 | ||
523 | return sprintf(data, "%s\n", dev_types[dimm->dtype]); | |
524 | } | |
525 | ||
526 | static ssize_t dimmdev_edac_mode_show(struct device *dev, | |
527 | struct device_attribute *mattr, | |
528 | char *data) | |
529 | { | |
530 | struct dimm_info *dimm = to_dimm(dev); | |
531 | ||
532 | return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]); | |
533 | } | |
534 | ||
535 | /* dimm/rank attribute files */ | |
536 | static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR, | |
537 | dimmdev_label_show, dimmdev_label_store); | |
538 | static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL); | |
539 | static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL); | |
540 | static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL); | |
541 | static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL); | |
542 | static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL); | |
543 | ||
544 | /* attributes of the dimm<id>/rank<id> object */ | |
545 | static struct attribute *dimm_attrs[] = { | |
546 | &dev_attr_dimm_label.attr, | |
547 | &dev_attr_dimm_location.attr, | |
548 | &dev_attr_size.attr, | |
549 | &dev_attr_dimm_mem_type.attr, | |
550 | &dev_attr_dimm_dev_type.attr, | |
551 | &dev_attr_dimm_edac_mode.attr, | |
552 | NULL, | |
553 | }; | |
554 | ||
555 | static struct attribute_group dimm_attr_grp = { | |
556 | .attrs = dimm_attrs, | |
557 | }; | |
558 | ||
559 | static const struct attribute_group *dimm_attr_groups[] = { | |
560 | &dimm_attr_grp, | |
561 | NULL | |
562 | }; | |
563 | ||
564 | static void dimm_attr_release(struct device *device) | |
565 | { | |
566 | debugf1("Releasing dimm device %s\n", dev_name(device)); | |
567 | } | |
568 | ||
569 | static struct device_type dimm_attr_type = { | |
570 | .groups = dimm_attr_groups, | |
571 | .release = dimm_attr_release, | |
572 | }; | |
573 | ||
574 | /* Create a DIMM object under specifed memory controller device */ | |
575 | static int edac_create_dimm_object(struct mem_ctl_info *mci, | |
576 | struct dimm_info *dimm, | |
577 | int index) | |
578 | { | |
579 | int err; | |
580 | dimm->mci = mci; | |
581 | ||
582 | dimm->dev.type = &dimm_attr_type; | |
583 | dimm->dev.bus = &mci->bus; | |
584 | device_initialize(&dimm->dev); | |
585 | ||
586 | dimm->dev.parent = &mci->dev; | |
587 | if (mci->mem_is_per_rank) | |
588 | dev_set_name(&dimm->dev, "rank%d", index); | |
589 | else | |
590 | dev_set_name(&dimm->dev, "dimm%d", index); | |
591 | dev_set_drvdata(&dimm->dev, dimm); | |
592 | pm_runtime_forbid(&mci->dev); | |
593 | ||
594 | err = device_add(&dimm->dev); | |
595 | ||
596 | debugf0("%s(): creating rank/dimm device %s\n", __func__, | |
597 | dev_name(&dimm->dev)); | |
598 | ||
599 | return err; | |
600 | } | |
7c9281d7 | 601 | |
7a623c03 MCC |
602 | /* |
603 | * Memory controller device | |
604 | */ | |
605 | ||
606 | #define to_mci(k) container_of(k, struct mem_ctl_info, dev) | |
7c9281d7 | 607 | |
7a623c03 MCC |
608 | static ssize_t mci_reset_counters_store(struct device *dev, |
609 | struct device_attribute *mattr, | |
079708b9 | 610 | const char *data, size_t count) |
7c9281d7 | 611 | { |
7a623c03 MCC |
612 | struct mem_ctl_info *mci = to_mci(dev); |
613 | int cnt, row, chan, i; | |
5926ff50 MCC |
614 | mci->ue_mc = 0; |
615 | mci->ce_mc = 0; | |
7a623c03 MCC |
616 | mci->ue_noinfo_count = 0; |
617 | mci->ce_noinfo_count = 0; | |
7c9281d7 DT |
618 | |
619 | for (row = 0; row < mci->nr_csrows; row++) { | |
620 | struct csrow_info *ri = &mci->csrows[row]; | |
621 | ||
622 | ri->ue_count = 0; | |
623 | ri->ce_count = 0; | |
624 | ||
625 | for (chan = 0; chan < ri->nr_channels; chan++) | |
626 | ri->channels[chan].ce_count = 0; | |
627 | } | |
628 | ||
7a623c03 MCC |
629 | cnt = 1; |
630 | for (i = 0; i < mci->n_layers; i++) { | |
631 | cnt *= mci->layers[i].size; | |
632 | memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32)); | |
633 | memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32)); | |
634 | } | |
635 | ||
7c9281d7 DT |
636 | mci->start_time = jiffies; |
637 | return count; | |
638 | } | |
639 | ||
39094443 BP |
640 | /* Memory scrubbing interface: |
641 | * | |
642 | * A MC driver can limit the scrubbing bandwidth based on the CPU type. | |
643 | * Therefore, ->set_sdram_scrub_rate should be made to return the actual | |
644 | * bandwidth that is accepted or 0 when scrubbing is to be disabled. | |
645 | * | |
646 | * Negative value still means that an error has occurred while setting | |
647 | * the scrub rate. | |
648 | */ | |
7a623c03 MCC |
649 | static ssize_t mci_sdram_scrub_rate_store(struct device *dev, |
650 | struct device_attribute *mattr, | |
eba042a8 | 651 | const char *data, size_t count) |
7c9281d7 | 652 | { |
7a623c03 | 653 | struct mem_ctl_info *mci = to_mci(dev); |
eba042a8 | 654 | unsigned long bandwidth = 0; |
39094443 | 655 | int new_bw = 0; |
7c9281d7 | 656 | |
39094443 | 657 | if (!mci->set_sdram_scrub_rate) |
5e8e19bf | 658 | return -ENODEV; |
7c9281d7 | 659 | |
eba042a8 BP |
660 | if (strict_strtoul(data, 10, &bandwidth) < 0) |
661 | return -EINVAL; | |
7c9281d7 | 662 | |
39094443 | 663 | new_bw = mci->set_sdram_scrub_rate(mci, bandwidth); |
4949603a MT |
664 | if (new_bw < 0) { |
665 | edac_printk(KERN_WARNING, EDAC_MC, | |
666 | "Error setting scrub rate to: %lu\n", bandwidth); | |
667 | return -EINVAL; | |
7c9281d7 | 668 | } |
39094443 | 669 | |
4949603a | 670 | return count; |
7c9281d7 DT |
671 | } |
672 | ||
39094443 BP |
673 | /* |
674 | * ->get_sdram_scrub_rate() return value semantics same as above. | |
675 | */ | |
7a623c03 MCC |
676 | static ssize_t mci_sdram_scrub_rate_show(struct device *dev, |
677 | struct device_attribute *mattr, | |
678 | char *data) | |
7c9281d7 | 679 | { |
7a623c03 | 680 | struct mem_ctl_info *mci = to_mci(dev); |
39094443 | 681 | int bandwidth = 0; |
eba042a8 | 682 | |
39094443 | 683 | if (!mci->get_sdram_scrub_rate) |
5e8e19bf | 684 | return -ENODEV; |
eba042a8 | 685 | |
39094443 BP |
686 | bandwidth = mci->get_sdram_scrub_rate(mci); |
687 | if (bandwidth < 0) { | |
eba042a8 | 688 | edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n"); |
39094443 | 689 | return bandwidth; |
7c9281d7 | 690 | } |
39094443 | 691 | |
39094443 | 692 | return sprintf(data, "%d\n", bandwidth); |
7c9281d7 DT |
693 | } |
694 | ||
695 | /* default attribute files for the MCI object */ | |
7a623c03 MCC |
696 | static ssize_t mci_ue_count_show(struct device *dev, |
697 | struct device_attribute *mattr, | |
698 | char *data) | |
7c9281d7 | 699 | { |
7a623c03 MCC |
700 | struct mem_ctl_info *mci = to_mci(dev); |
701 | ||
5926ff50 | 702 | return sprintf(data, "%d\n", mci->ue_mc); |
7c9281d7 DT |
703 | } |
704 | ||
7a623c03 MCC |
705 | static ssize_t mci_ce_count_show(struct device *dev, |
706 | struct device_attribute *mattr, | |
707 | char *data) | |
7c9281d7 | 708 | { |
7a623c03 MCC |
709 | struct mem_ctl_info *mci = to_mci(dev); |
710 | ||
5926ff50 | 711 | return sprintf(data, "%d\n", mci->ce_mc); |
7c9281d7 DT |
712 | } |
713 | ||
7a623c03 MCC |
714 | static ssize_t mci_ce_noinfo_show(struct device *dev, |
715 | struct device_attribute *mattr, | |
716 | char *data) | |
7c9281d7 | 717 | { |
7a623c03 MCC |
718 | struct mem_ctl_info *mci = to_mci(dev); |
719 | ||
079708b9 | 720 | return sprintf(data, "%d\n", mci->ce_noinfo_count); |
7c9281d7 DT |
721 | } |
722 | ||
7a623c03 MCC |
723 | static ssize_t mci_ue_noinfo_show(struct device *dev, |
724 | struct device_attribute *mattr, | |
725 | char *data) | |
7c9281d7 | 726 | { |
7a623c03 MCC |
727 | struct mem_ctl_info *mci = to_mci(dev); |
728 | ||
079708b9 | 729 | return sprintf(data, "%d\n", mci->ue_noinfo_count); |
7c9281d7 DT |
730 | } |
731 | ||
7a623c03 MCC |
732 | static ssize_t mci_seconds_show(struct device *dev, |
733 | struct device_attribute *mattr, | |
734 | char *data) | |
7c9281d7 | 735 | { |
7a623c03 MCC |
736 | struct mem_ctl_info *mci = to_mci(dev); |
737 | ||
079708b9 | 738 | return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ); |
7c9281d7 DT |
739 | } |
740 | ||
7a623c03 MCC |
741 | static ssize_t mci_ctl_name_show(struct device *dev, |
742 | struct device_attribute *mattr, | |
743 | char *data) | |
7c9281d7 | 744 | { |
7a623c03 MCC |
745 | struct mem_ctl_info *mci = to_mci(dev); |
746 | ||
079708b9 | 747 | return sprintf(data, "%s\n", mci->ctl_name); |
7c9281d7 DT |
748 | } |
749 | ||
7a623c03 MCC |
750 | static ssize_t mci_size_mb_show(struct device *dev, |
751 | struct device_attribute *mattr, | |
752 | char *data) | |
7c9281d7 | 753 | { |
7a623c03 | 754 | struct mem_ctl_info *mci = to_mci(dev); |
a895bf8b | 755 | int total_pages = 0, csrow_idx, j; |
7c9281d7 | 756 | |
a895bf8b | 757 | for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { |
7c9281d7 DT |
758 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; |
759 | ||
a895bf8b MCC |
760 | for (j = 0; j < csrow->nr_channels; j++) { |
761 | struct dimm_info *dimm = csrow->channels[j].dimm; | |
7c9281d7 | 762 | |
a895bf8b MCC |
763 | total_pages += dimm->nr_pages; |
764 | } | |
7c9281d7 DT |
765 | } |
766 | ||
079708b9 | 767 | return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); |
7c9281d7 DT |
768 | } |
769 | ||
8ad6c78a MCC |
770 | static ssize_t mci_max_location_show(struct device *dev, |
771 | struct device_attribute *mattr, | |
772 | char *data) | |
773 | { | |
774 | struct mem_ctl_info *mci = to_mci(dev); | |
775 | int i; | |
776 | char *p = data; | |
777 | ||
778 | for (i = 0; i < mci->n_layers; i++) { | |
779 | p += sprintf(p, "%s %d ", | |
780 | edac_layer_name[mci->layers[i].type], | |
781 | mci->layers[i].size - 1); | |
782 | } | |
783 | ||
784 | return p - data; | |
785 | } | |
786 | ||
452a6bf9 MCC |
787 | #ifdef CONFIG_EDAC_DEBUG |
788 | static ssize_t edac_fake_inject_write(struct file *file, | |
789 | const char __user *data, | |
790 | size_t count, loff_t *ppos) | |
791 | { | |
792 | struct device *dev = file->private_data; | |
793 | struct mem_ctl_info *mci = to_mci(dev); | |
794 | static enum hw_event_mc_err_type type; | |
795 | ||
796 | type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED | |
797 | : HW_EVENT_ERR_CORRECTED; | |
798 | ||
799 | printk(KERN_DEBUG | |
800 | "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n", | |
801 | (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE", | |
802 | mci->fake_inject_layer[0], | |
803 | mci->fake_inject_layer[1], | |
804 | mci->fake_inject_layer[2] | |
805 | ); | |
806 | edac_mc_handle_error(type, mci, 0, 0, 0, | |
807 | mci->fake_inject_layer[0], | |
808 | mci->fake_inject_layer[1], | |
809 | mci->fake_inject_layer[2], | |
810 | "FAKE ERROR", "for EDAC testing only", NULL); | |
811 | ||
812 | return count; | |
813 | } | |
814 | ||
815 | static int debugfs_open(struct inode *inode, struct file *file) | |
816 | { | |
817 | file->private_data = inode->i_private; | |
818 | return 0; | |
819 | } | |
820 | ||
821 | static const struct file_operations debug_fake_inject_fops = { | |
822 | .open = debugfs_open, | |
823 | .write = edac_fake_inject_write, | |
824 | .llseek = generic_file_llseek, | |
825 | }; | |
826 | #endif | |
827 | ||
7c9281d7 | 828 | /* default Control file */ |
7a623c03 | 829 | DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); |
7c9281d7 DT |
830 | |
831 | /* default Attribute files */ | |
7a623c03 MCC |
832 | DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); |
833 | DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); | |
834 | DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); | |
835 | DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); | |
836 | DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); | |
837 | DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); | |
838 | DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); | |
8ad6c78a | 839 | DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); |
7c9281d7 DT |
840 | |
841 | /* memory scrubber attribute file */ | |
7a623c03 | 842 | DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show, |
052dfb45 | 843 | mci_sdram_scrub_rate_store); |
7c9281d7 | 844 | |
7a623c03 MCC |
845 | static struct attribute *mci_attrs[] = { |
846 | &dev_attr_reset_counters.attr, | |
847 | &dev_attr_mc_name.attr, | |
848 | &dev_attr_size_mb.attr, | |
849 | &dev_attr_seconds_since_reset.attr, | |
850 | &dev_attr_ue_noinfo_count.attr, | |
851 | &dev_attr_ce_noinfo_count.attr, | |
852 | &dev_attr_ue_count.attr, | |
853 | &dev_attr_ce_count.attr, | |
854 | &dev_attr_sdram_scrub_rate.attr, | |
8ad6c78a | 855 | &dev_attr_max_location.attr, |
7c9281d7 DT |
856 | NULL |
857 | }; | |
858 | ||
7a623c03 MCC |
859 | static struct attribute_group mci_attr_grp = { |
860 | .attrs = mci_attrs, | |
cc301b3a MCC |
861 | }; |
862 | ||
7a623c03 MCC |
863 | static const struct attribute_group *mci_attr_groups[] = { |
864 | &mci_attr_grp, | |
865 | NULL | |
cc301b3a MCC |
866 | }; |
867 | ||
7a623c03 | 868 | static void mci_attr_release(struct device *device) |
42a8e397 | 869 | { |
7a623c03 | 870 | debugf1("Releasing mci device %s\n", dev_name(device)); |
42a8e397 DT |
871 | } |
872 | ||
7a623c03 MCC |
873 | static struct device_type mci_attr_type = { |
874 | .groups = mci_attr_groups, | |
875 | .release = mci_attr_release, | |
876 | }; | |
8096cfaf | 877 | |
452a6bf9 MCC |
878 | #ifdef CONFIG_EDAC_DEBUG |
879 | int edac_create_debug_nodes(struct mem_ctl_info *mci) | |
880 | { | |
881 | struct dentry *d, *parent; | |
882 | char name[80]; | |
883 | int i; | |
884 | ||
885 | d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs); | |
886 | if (!d) | |
887 | return -ENOMEM; | |
888 | parent = d; | |
889 | ||
890 | for (i = 0; i < mci->n_layers; i++) { | |
891 | sprintf(name, "fake_inject_%s", | |
892 | edac_layer_name[mci->layers[i].type]); | |
893 | d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent, | |
894 | &mci->fake_inject_layer[i]); | |
895 | if (!d) | |
896 | goto nomem; | |
897 | } | |
898 | ||
899 | d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent, | |
900 | &mci->fake_inject_ue); | |
901 | if (!d) | |
902 | goto nomem; | |
903 | ||
904 | d = debugfs_create_file("fake_inject", S_IWUSR, parent, | |
905 | &mci->dev, | |
906 | &debug_fake_inject_fops); | |
907 | if (!d) | |
908 | goto nomem; | |
909 | ||
910 | return 0; | |
911 | nomem: | |
912 | debugfs_remove(mci->debugfs); | |
913 | return -ENOMEM; | |
914 | } | |
915 | #endif | |
916 | ||
7c9281d7 DT |
917 | /* |
918 | * Create a new Memory Controller kobject instance, | |
919 | * mc<id> under the 'mc' directory | |
920 | * | |
921 | * Return: | |
922 | * 0 Success | |
923 | * !0 Failure | |
924 | */ | |
925 | int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |
926 | { | |
7a623c03 | 927 | int i, err; |
7c9281d7 DT |
928 | |
929 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); | |
7c9281d7 | 930 | |
7a623c03 | 931 | /* get the /sys/devices/system/edac subsys reference */ |
b968759e | 932 | |
7a623c03 MCC |
933 | mci->dev.type = &mci_attr_type; |
934 | device_initialize(&mci->dev); | |
7c9281d7 | 935 | |
7a623c03 MCC |
936 | mci->dev.parent = &mci_pdev; |
937 | mci->dev.bus = &mci->bus; | |
938 | dev_set_name(&mci->dev, "mc%d", mci->mc_idx); | |
939 | dev_set_drvdata(&mci->dev, mci); | |
940 | pm_runtime_forbid(&mci->dev); | |
941 | ||
942 | /* | |
943 | * The memory controller needs its own bus, in order to avoid | |
944 | * namespace conflicts at /sys/bus/edac. | |
42a8e397 | 945 | */ |
7a623c03 MCC |
946 | debugf0("creating bus %s\n",mci->bus.name); |
947 | mci->bus.name = kstrdup(dev_name(&mci->dev), GFP_KERNEL); | |
948 | err = bus_register(&mci->bus); | |
949 | if (err < 0) | |
950 | return err; | |
951 | ||
952 | debugf0("%s(): creating device %s\n", __func__, | |
953 | dev_name(&mci->dev)); | |
954 | err = device_add(&mci->dev); | |
955 | if (err < 0) { | |
956 | bus_unregister(&mci->bus); | |
957 | kfree(mci->bus.name); | |
958 | return err; | |
42a8e397 DT |
959 | } |
960 | ||
7a623c03 MCC |
961 | /* |
962 | * Create the dimm/rank devices | |
7c9281d7 | 963 | */ |
7a623c03 MCC |
964 | for (i = 0; i < mci->tot_dimms; i++) { |
965 | struct dimm_info *dimm = &mci->dimms[i]; | |
966 | /* Only expose populated DIMMs */ | |
967 | if (dimm->nr_pages == 0) | |
968 | continue; | |
969 | #ifdef CONFIG_EDAC_DEBUG | |
970 | debugf1("%s creating dimm%d, located at ", | |
971 | __func__, i); | |
972 | if (edac_debug_level >= 1) { | |
973 | int lay; | |
974 | for (lay = 0; lay < mci->n_layers; lay++) | |
975 | printk(KERN_CONT "%s %d ", | |
976 | edac_layer_name[mci->layers[lay].type], | |
977 | dimm->location[lay]); | |
978 | printk(KERN_CONT "\n"); | |
7c9281d7 | 979 | } |
7a623c03 | 980 | #endif |
19974710 MCC |
981 | err = edac_create_dimm_object(mci, dimm, i); |
982 | if (err) { | |
983 | debugf1("%s() failure: create dimm %d obj\n", | |
984 | __func__, i); | |
985 | goto fail; | |
986 | } | |
7c9281d7 DT |
987 | } |
988 | ||
19974710 | 989 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 MCC |
990 | err = edac_create_csrow_objects(mci); |
991 | if (err < 0) | |
992 | goto fail; | |
19974710 | 993 | #endif |
7a623c03 | 994 | |
452a6bf9 MCC |
995 | #ifdef CONFIG_EDAC_DEBUG |
996 | edac_create_debug_nodes(mci); | |
997 | #endif | |
7c9281d7 DT |
998 | return 0; |
999 | ||
7a623c03 | 1000 | fail: |
079708b9 | 1001 | for (i--; i >= 0; i--) { |
7a623c03 MCC |
1002 | struct dimm_info *dimm = &mci->dimms[i]; |
1003 | if (dimm->nr_pages == 0) | |
1004 | continue; | |
1005 | put_device(&dimm->dev); | |
1006 | device_del(&dimm->dev); | |
7c9281d7 | 1007 | } |
7a623c03 MCC |
1008 | put_device(&mci->dev); |
1009 | device_del(&mci->dev); | |
1010 | bus_unregister(&mci->bus); | |
1011 | kfree(mci->bus.name); | |
7c9281d7 DT |
1012 | return err; |
1013 | } | |
1014 | ||
1015 | /* | |
1016 | * remove a Memory Controller instance | |
1017 | */ | |
1018 | void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | |
1019 | { | |
7a623c03 | 1020 | int i; |
7c9281d7 DT |
1021 | |
1022 | debugf0("%s()\n", __func__); | |
1023 | ||
452a6bf9 MCC |
1024 | #ifdef CONFIG_EDAC_DEBUG |
1025 | debugfs_remove(mci->debugfs); | |
1026 | #endif | |
19974710 | 1027 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 | 1028 | edac_delete_csrow_objects(mci); |
19974710 | 1029 | #endif |
7c9281d7 | 1030 | |
7a623c03 MCC |
1031 | for (i = 0; i < mci->tot_dimms; i++) { |
1032 | struct dimm_info *dimm = &mci->dimms[i]; | |
1033 | if (dimm->nr_pages == 0) | |
1034 | continue; | |
1035 | debugf0("%s(): removing device %s\n", __func__, | |
1036 | dev_name(&dimm->dev)); | |
1037 | put_device(&dimm->dev); | |
1038 | device_del(&dimm->dev); | |
6fe1108f | 1039 | } |
7c9281d7 | 1040 | } |
8096cfaf | 1041 | |
7a623c03 MCC |
1042 | void edac_unregister_sysfs(struct mem_ctl_info *mci) |
1043 | { | |
1044 | debugf1("Unregistering device %s\n", dev_name(&mci->dev)); | |
1045 | put_device(&mci->dev); | |
1046 | device_del(&mci->dev); | |
1047 | bus_unregister(&mci->bus); | |
1048 | kfree(mci->bus.name); | |
1049 | } | |
8096cfaf | 1050 | |
7a623c03 MCC |
1051 | static void mc_attr_release(struct device *device) |
1052 | { | |
1053 | debugf1("Releasing device %s\n", dev_name(device)); | |
1054 | } | |
8096cfaf | 1055 | |
7a623c03 MCC |
1056 | static struct device_type mc_attr_type = { |
1057 | .release = mc_attr_release, | |
1058 | }; | |
8096cfaf | 1059 | /* |
7a623c03 | 1060 | * Init/exit code for the module. Basically, creates/removes /sys/class/rc |
8096cfaf | 1061 | */ |
7a623c03 | 1062 | int __init edac_mc_sysfs_init(void) |
8096cfaf | 1063 | { |
fe5ff8b8 | 1064 | struct bus_type *edac_subsys; |
7a623c03 | 1065 | int err; |
8096cfaf | 1066 | |
fe5ff8b8 KS |
1067 | /* get the /sys/devices/system/edac subsys reference */ |
1068 | edac_subsys = edac_get_sysfs_subsys(); | |
1069 | if (edac_subsys == NULL) { | |
7a623c03 MCC |
1070 | debugf1("%s() no edac_subsys\n", __func__); |
1071 | return -EINVAL; | |
8096cfaf DT |
1072 | } |
1073 | ||
7a623c03 MCC |
1074 | mci_pdev.bus = edac_subsys; |
1075 | mci_pdev.type = &mc_attr_type; | |
1076 | device_initialize(&mci_pdev); | |
1077 | dev_set_name(&mci_pdev, "mc"); | |
8096cfaf | 1078 | |
7a623c03 MCC |
1079 | err = device_add(&mci_pdev); |
1080 | if (err < 0) | |
1081 | return err; | |
8096cfaf DT |
1082 | |
1083 | return 0; | |
8096cfaf DT |
1084 | } |
1085 | ||
7a623c03 | 1086 | void __exit edac_mc_sysfs_exit(void) |
8096cfaf | 1087 | { |
7a623c03 MCC |
1088 | put_device(&mci_pdev); |
1089 | device_del(&mci_pdev); | |
fe5ff8b8 | 1090 | edac_put_sysfs_subsys(); |
8096cfaf | 1091 | } |