[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / dmaobj / base.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include <core/object.h>
#include <core/client.h>
#include <core/device.h>
#include <nvif/unpack.h>
#include <nvif/class.h>

#include <subdev/fb.h>
#include <subdev/instmem.h>

#include "priv.h"

static int
nvkm_dmaobj_bind(struct nouveau_dmaobj *dmaobj, struct nouveau_object *parent,
		 struct nouveau_gpuobj **pgpuobj)
{
	const struct nvkm_dmaeng_impl *impl = (void *)
		nv_oclass(nv_object(dmaobj)->engine);
	int ret = 0;

	if (nv_object(dmaobj) == parent) { /* ctor bind */
		if (nv_mclass(parent->parent) == NV_DEVICE) {
			/* delayed, or no, binding */
			return 0;
		}
		ret = impl->bind(dmaobj, parent, pgpuobj);
		if (ret == 0)
			nouveau_object_ref(NULL, &parent);
		return ret;
	}

	return impl->bind(dmaobj, parent, pgpuobj);
}

int
nvkm_dmaobj_create_(struct nouveau_object *parent,
		    struct nouveau_object *engine,
		    struct nouveau_oclass *oclass, void **pdata, u32 *psize,
		    int length, void **pobject)
{
	union {
		struct nv_dma_v0 v0;
	} *args = *pdata;
	struct nouveau_instmem *instmem = nouveau_instmem(parent);
	struct nouveau_client *client = nouveau_client(parent);
	struct nouveau_device *device = nv_device(parent);
	struct nouveau_fb *pfb = nouveau_fb(parent);
	struct nouveau_dmaobj *dmaobj;
	void *data = *pdata;
	u32 size = *psize;
	int ret;

	ret = nouveau_object_create_(parent, engine, oclass, 0, length, pobject);
	dmaobj = *pobject;
	if (ret)
		return ret;

	nv_ioctl(parent, "create dma size %d\n", *psize);
	if (nvif_unpack(args->v0, 0, 0, true)) {
		nv_ioctl(parent, "create dma vers %d target %d access %d "
				 "start %016llx limit %016llx\n",
			 args->v0.version, args->v0.target, args->v0.access,
			 args->v0.start, args->v0.limit);
		dmaobj->target = args->v0.target;
		dmaobj->access = args->v0.access;
		dmaobj->start  = args->v0.start;
		dmaobj->limit  = args->v0.limit;
	} else
		return ret;

	*pdata = data;
	*psize = size;

	if (dmaobj->start > dmaobj->limit)
		return -EINVAL;

	switch (dmaobj->target) {
	case NV_DMA_V0_TARGET_VM:
		dmaobj->target = NV_MEM_TARGET_VM;
		break;
	case NV_DMA_V0_TARGET_VRAM:
		if (!client->super) {
			if (dmaobj->limit >= pfb->ram->size - instmem->reserved)
				return -EACCES;
			if (device->card_type >= NV_50)
				return -EACCES;
		}
		dmaobj->target = NV_MEM_TARGET_VRAM;
		break;
	case NV_DMA_V0_TARGET_PCI:
		if (!client->super)
			return -EACCES;
		dmaobj->target = NV_MEM_TARGET_PCI;
		break;
	case NV_DMA_V0_TARGET_PCI_US:
	case NV_DMA_V0_TARGET_AGP:
		if (!client->super)
			return -EACCES;
		dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
		break;
	default:
		return -EINVAL;
	}

	switch (dmaobj->access) {
	case NV_DMA_V0_ACCESS_VM:
		dmaobj->access = NV_MEM_ACCESS_VM;
		break;
	case NV_DMA_V0_ACCESS_RD:
		dmaobj->access = NV_MEM_ACCESS_RO;
		break;
	case NV_DMA_V0_ACCESS_WR:
		dmaobj->access = NV_MEM_ACCESS_WO;
		break;
	case NV_DMA_V0_ACCESS_RDWR:
		dmaobj->access = NV_MEM_ACCESS_RW;
		break;
	default:
		return -EINVAL;
	}

	return ret;
}

int
_nvkm_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
		  struct nouveau_oclass *oclass, void *data, u32 size,
		  struct nouveau_object **pobject)
{
	const struct nvkm_dmaeng_impl *impl = (void *)oclass;
	struct nouveau_dmaeng *dmaeng;
	int ret;

	ret = nouveau_engine_create(parent, engine, oclass, true, "DMAOBJ",
				    "dmaobj", &dmaeng);
	*pobject = nv_object(dmaeng);
	if (ret)
		return ret;

	nv_engine(dmaeng)->sclass = impl->sclass;
	dmaeng->bind = nvkm_dmaobj_bind;
	return 0;
}
Commit	Line	Data
ebb945a9 BS	1	/*
	2	* Copyright 2012 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
	24
	25	#include <core/object.h>
4acfd707	26	#include <core/client.h>
42594600	27	#include <core/device.h>
4acfd707 BS	28	#include <nvif/unpack.h>
4acfd707 BS	29	#include <nvif/class.h>
ebb945a9 BS	30
ebb945a9 BS	31	#include <subdev/fb.h>
4acfd707	32	#include <subdev/instmem.h>
bc98540b BS	33
bc98540b BS	34	#include "priv.h"
ebb945a9	35
f86770aa	36	static int
b2c81703 BS	37	nvkm_dmaobj_bind(struct nouveau_dmaobj dmaobj, struct nouveau_object parent,
	38	struct nouveau_gpuobj **pgpuobj)
	39	{
	40	const struct nvkm_dmaeng_impl impl = (void )
	41	nv_oclass(nv_object(dmaobj)->engine);
	42	int ret = 0;
	43
	44	if (nv_object(dmaobj) == parent) { /* ctor bind */
	45	if (nv_mclass(parent->parent) == NV_DEVICE) {
	46	/* delayed, or no, binding */
	47	return 0;
	48	}
	49	ret = impl->bind(dmaobj, parent, pgpuobj);
	50	if (ret == 0)
	51	nouveau_object_ref(NULL, &parent);
	52	return ret;
	53	}
	54
	55	return impl->bind(dmaobj, parent, pgpuobj);
	56	}
	57
	58	int
	59	nvkm_dmaobj_create_(struct nouveau_object *parent,
f86770aa	60	struct nouveau_object *engine,
b2c81703 BS	61	struct nouveau_oclass oclass, void pdata, u32 psize,
b2c81703 BS	62	int length, void **pobject)
ebb945a9	63	{
4acfd707 BS	64	union {
	65	struct nv_dma_v0 v0;
	66	} args = pdata;
	67	struct nouveau_instmem *instmem = nouveau_instmem(parent);
	68	struct nouveau_client *client = nouveau_client(parent);
	69	struct nouveau_device *device = nv_device(parent);
	70	struct nouveau_fb *pfb = nouveau_fb(parent);
f86770aa	71	struct nouveau_dmaobj *dmaobj;
4acfd707 BS	72	void data = pdata;
4acfd707 BS	73	u32 size = *psize;
ebb945a9 BS	74	int ret;
ebb945a9 BS	75
b2c81703 BS	76	ret = nouveau_object_create_(parent, engine, oclass, 0, length, pobject);
b2c81703 BS	77	dmaobj = *pobject;
ebb945a9 BS	78	if (ret)
	79	return ret;
	80
4acfd707 BS	81	nv_ioctl(parent, "create dma size %d\n", *psize);
	82	if (nvif_unpack(args->v0, 0, 0, true)) {
	83	nv_ioctl(parent, "create dma vers %d target %d access %d "
	84	"start %016llx limit %016llx\n",
	85	args->v0.version, args->v0.target, args->v0.access,
	86	args->v0.start, args->v0.limit);
	87	dmaobj->target = args->v0.target;
	88	dmaobj->access = args->v0.access;
	89	dmaobj->start = args->v0.start;
	90	dmaobj->limit = args->v0.limit;
	91	} else
	92	return ret;
	93
	94	*pdata = data;
	95	*psize = size;
	96
	97	if (dmaobj->start > dmaobj->limit)
	98	return -EINVAL;
	99
	100	switch (dmaobj->target) {
	101	case NV_DMA_V0_TARGET_VM:
f86770aa	102	dmaobj->target = NV_MEM_TARGET_VM;
ebb945a9	103	break;
4acfd707 BS	104	case NV_DMA_V0_TARGET_VRAM:
	105	if (!client->super) {
	106	if (dmaobj->limit >= pfb->ram->size - instmem->reserved)
	107	return -EACCES;
	108	if (device->card_type >= NV_50)
	109	return -EACCES;
	110	}
f86770aa	111	dmaobj->target = NV_MEM_TARGET_VRAM;
ebb945a9	112	break;
4acfd707 BS	113	case NV_DMA_V0_TARGET_PCI:
	114	if (!client->super)
	115	return -EACCES;
f86770aa	116	dmaobj->target = NV_MEM_TARGET_PCI;
ebb945a9	117	break;
4acfd707 BS	118	case NV_DMA_V0_TARGET_PCI_US:
	119	case NV_DMA_V0_TARGET_AGP:
	120	if (!client->super)
	121	return -EACCES;
f86770aa	122	dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
ebb945a9 BS	123	break;
	124	default:
	125	return -EINVAL;
	126	}
	127
4acfd707 BS	128	switch (dmaobj->access) {
4acfd707 BS	129	case NV_DMA_V0_ACCESS_VM:
f86770aa	130	dmaobj->access = NV_MEM_ACCESS_VM;
ebb945a9	131	break;
4acfd707	132	case NV_DMA_V0_ACCESS_RD:
f86770aa	133	dmaobj->access = NV_MEM_ACCESS_RO;
ebb945a9	134	break;
4acfd707	135	case NV_DMA_V0_ACCESS_WR:
f86770aa	136	dmaobj->access = NV_MEM_ACCESS_WO;
ebb945a9	137	break;
4acfd707	138	case NV_DMA_V0_ACCESS_RDWR:
f86770aa	139	dmaobj->access = NV_MEM_ACCESS_RW;
ebb945a9 BS	140	break;
	141	default:
	142	return -EINVAL;
	143	}
	144
f86770aa	145	return ret;
ebb945a9	146	}
f86770aa	147
bc98540b BS	148	int
	149	_nvkm_dmaeng_ctor(struct nouveau_object parent, struct nouveau_object engine,
	150	struct nouveau_oclass oclass, void data, u32 size,
	151	struct nouveau_object **pobject)
	152	{
	153	const struct nvkm_dmaeng_impl impl = (void )oclass;
	154	struct nouveau_dmaeng *dmaeng;
	155	int ret;
	156
	157	ret = nouveau_engine_create(parent, engine, oclass, true, "DMAOBJ",
	158	"dmaobj", &dmaeng);
	159	*pobject = nv_object(dmaeng);
	160	if (ret)
	161	return ret;
	162
b2c81703 BS	163	nv_engine(dmaeng)->sclass = impl->sclass;
b2c81703 BS	164	dmaeng->bind = nvkm_dmaobj_bind;
bc98540b BS	165	return 0;
bc98540b BS	166	}