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drm: only take the crtc lock for ->cursor_set
[deliverable/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB		 1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB		 31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
6abff3c7
JB		 34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39/**
40 * Clip @num_rects number of @rects against @clip storing the
41 * results in @out_rects and the number of passed rects in @out_num.
42 */
43void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
fb1d9738
JB		 72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73{
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
78 drm_crtc_cleanup(&du->crtc);
79 drm_encoder_cleanup(&du->encoder);
80 drm_connector_cleanup(&du->connector);
81}
82
83/*
84 * Display Unit Cursor functions
85 */
86
87int vmw_cursor_update_image(struct vmw_private *dev_priv,
88 u32 *image, u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct {
92 u32 cmd;
93 SVGAFifoCmdDefineAlphaCursor cursor;
94 } *cmd;
95 u32 image_size = width * height * 4;
96 u32 cmd_size = sizeof(*cmd) + image_size;
97
98 if (!image)
99 return -EINVAL;
100
101 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
102 if (unlikely(cmd == NULL)) {
103 DRM_ERROR("Fifo reserve failed.\n");
104 return -ENOMEM;
105 }
106
107 memset(cmd, 0, sizeof(*cmd));
108
109 memcpy(&cmd[1], image, image_size);
110
111 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
112 cmd->cursor.id = cpu_to_le32(0);
113 cmd->cursor.width = cpu_to_le32(width);
114 cmd->cursor.height = cpu_to_le32(height);
115 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
116 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
117
118 vmw_fifo_commit(dev_priv, cmd_size);
119
120 return 0;
121}
122
6a91d97e
JB		 123int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
124 struct vmw_dma_buffer *dmabuf,
125 u32 width, u32 height,
126 u32 hotspotX, u32 hotspotY)
127{
128 struct ttm_bo_kmap_obj map;
129 unsigned long kmap_offset;
130 unsigned long kmap_num;
131 void *virtual;
132 bool dummy;
133 int ret;
134
135 kmap_offset = 0;
136 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
137
138 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
139 if (unlikely(ret != 0)) {
140 DRM_ERROR("reserve failed\n");
141 return -EINVAL;
142 }
143
144 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
145 if (unlikely(ret != 0))
146 goto err_unreserve;
147
148 virtual = ttm_kmap_obj_virtual(&map, &dummy);
149 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
150 hotspotX, hotspotY);
151
152 ttm_bo_kunmap(&map);
153err_unreserve:
154 ttm_bo_unreserve(&dmabuf->base);
155
156 return ret;
157}
158
159
fb1d9738
JB		 160void vmw_cursor_update_position(struct vmw_private *dev_priv,
161 bool show, int x, int y)
162{
163 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
164 uint32_t count;
165
166 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
167 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
168 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
169 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
170 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171}
172
173int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
174 uint32_t handle, uint32_t width, uint32_t height)
175{
176 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
177 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
bfb89928
DV		 183 /*
184 * FIXME: Unclear whether there's any global state touched by the
185 * cursor_set function, especially vmw_cursor_update_position looks
186 * suspicious. For now take the easy route and reacquire all locks. We
187 * can do this since the caller in the drm core doesn't check anything
188 * which is protected by any looks.
189 */
190 mutex_unlock(&crtc->mutex);
191 drm_modeset_lock_all(dev_priv->dev);
192
baa91d64 193 /* A lot of the code assumes this */
bfb89928
DV		 194 if (handle && (width != 64 || height != 64)) {
195 ret = -EINVAL;
196 goto out;
197 }
baa91d64 198
fb1d9738 199 if (handle) {
e7ac9211
JB		 200 ret = vmw_user_lookup_handle(dev_priv, tfile,
201 handle, &surface, &dmabuf);
202 if (ret) {
203 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV		 204 ret = -EINVAL;
205 goto out;
fb1d9738
JB		 206 }
207 }
208
e7ac9211
JB		 209 /* need to do this before taking down old image */
210 if (surface && !surface->snooper.image) {
211 DRM_ERROR("surface not suitable for cursor\n");
212 vmw_surface_unreference(&surface);
bfb89928
DV		 213 ret = -EINVAL;
214 goto out;
e7ac9211
JB		 215 }
216
fb1d9738
JB		 217 /* takedown old cursor */
218 if (du->cursor_surface) {
219 du->cursor_surface->snooper.crtc = NULL;
220 vmw_surface_unreference(&du->cursor_surface);
221 }
222 if (du->cursor_dmabuf)
223 vmw_dmabuf_unreference(&du->cursor_dmabuf);
224
225 /* setup new image */
226 if (surface) {
227 /* vmw_user_surface_lookup takes one reference */
228 du->cursor_surface = surface;
229
230 du->cursor_surface->snooper.crtc = crtc;
231 du->cursor_age = du->cursor_surface->snooper.age;
232 vmw_cursor_update_image(dev_priv, surface->snooper.image,
233 64, 64, du->hotspot_x, du->hotspot_y);
234 } else if (dmabuf) {
fb1d9738
JB		 235 /* vmw_user_surface_lookup takes one reference */
236 du->cursor_dmabuf = dmabuf;
237
6a91d97e
JB		 238 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
239 du->hotspot_x, du->hotspot_y);
fb1d9738
JB		 240 } else {
241 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV		 242 ret = 0;
243 goto out;
fb1d9738
JB		 244 }
245
da7653d6
TH		 246 vmw_cursor_update_position(dev_priv, true,
247 du->cursor_x + du->hotspot_x,
248 du->cursor_y + du->hotspot_y);
fb1d9738 249
bfb89928
DV		 250 ret = 0;
251out:
252 drm_modeset_unlock_all(dev_priv->dev);
253 mutex_lock(&crtc->mutex);
254
255 return ret;
fb1d9738
JB		 256}
257
258int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
259{
260 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
261 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
262 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
263
264 du->cursor_x = x + crtc->x;
265 du->cursor_y = y + crtc->y;
266
267 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH		 268 du->cursor_x + du->hotspot_x,
269 du->cursor_y + du->hotspot_y);
fb1d9738
JB		 270
271 return 0;
272}
273
274void vmw_kms_cursor_snoop(struct vmw_surface *srf,
275 struct ttm_object_file *tfile,
276 struct ttm_buffer_object *bo,
277 SVGA3dCmdHeader *header)
278{
279 struct ttm_bo_kmap_obj map;
280 unsigned long kmap_offset;
281 unsigned long kmap_num;
282 SVGA3dCopyBox *box;
283 unsigned box_count;
284 void *virtual;
285 bool dummy;
286 struct vmw_dma_cmd {
287 SVGA3dCmdHeader header;
288 SVGA3dCmdSurfaceDMA dma;
289 } *cmd;
2ac86371 290 int i, ret;
fb1d9738
JB		 291
292 cmd = container_of(header, struct vmw_dma_cmd, header);
293
294 /* No snooper installed */
295 if (!srf->snooper.image)
296 return;
297
298 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
299 DRM_ERROR("face and mipmap for cursors should never != 0\n");
300 return;
301 }
302
303 if (cmd->header.size < 64) {
304 DRM_ERROR("at least one full copy box must be given\n");
305 return;
306 }
307
308 box = (SVGA3dCopyBox *)&cmd[1];
309 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
310 sizeof(SVGA3dCopyBox);
311
2ac86371 312 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB		 313 box->x != 0 || box->y != 0 || box->z != 0 ||
314 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 315 box->d != 1 || box_count != 1) {
fb1d9738 316 /* TODO handle none page aligned offsets */
2ac86371
JB		 317 /* TODO handle more dst & src != 0 */
318 /* TODO handle more then one copy */
319 DRM_ERROR("Cant snoop dma request for cursor!\n");
320 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
321 box->srcx, box->srcy, box->srcz,
322 box->x, box->y, box->z,
323 box->w, box->h, box->d, box_count,
324 cmd->dma.guest.ptr.offset);
fb1d9738
JB		 325 return;
326 }
327
328 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
329 kmap_num = (64*64*4) >> PAGE_SHIFT;
330
331 ret = ttm_bo_reserve(bo, true, false, false, 0);
332 if (unlikely(ret != 0)) {
333 DRM_ERROR("reserve failed\n");
334 return;
335 }
336
337 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
338 if (unlikely(ret != 0))
339 goto err_unreserve;
340
341 virtual = ttm_kmap_obj_virtual(&map, &dummy);
342
2ac86371
JB		 343 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
344 memcpy(srf->snooper.image, virtual, 64*64*4);
345 } else {
346 /* Image is unsigned pointer. */
347 for (i = 0; i < box->h; i++)
348 memcpy(srf->snooper.image + i * 64,
349 virtual + i * cmd->dma.guest.pitch,
350 box->w * 4);
351 }
352
fb1d9738
JB		 353 srf->snooper.age++;
354
355 /* we can't call this function from this function since execbuf has
356 * reserved fifo space.
357 *
358 * if (srf->snooper.crtc)
359 * vmw_ldu_crtc_cursor_update_image(dev_priv,
360 * srf->snooper.image, 64, 64,
361 * du->hotspot_x, du->hotspot_y);
362 */
363
364 ttm_bo_kunmap(&map);
365err_unreserve:
366 ttm_bo_unreserve(bo);
367}
368
369void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
370{
371 struct drm_device *dev = dev_priv->dev;
372 struct vmw_display_unit *du;
373 struct drm_crtc *crtc;
374
375 mutex_lock(&dev->mode_config.mutex);
376
377 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
378 du = vmw_crtc_to_du(crtc);
379 if (!du->cursor_surface ||
380 du->cursor_age == du->cursor_surface->snooper.age)
381 continue;
382
383 du->cursor_age = du->cursor_surface->snooper.age;
384 vmw_cursor_update_image(dev_priv,
385 du->cursor_surface->snooper.image,
386 64, 64, du->hotspot_x, du->hotspot_y);
387 }
388
389 mutex_unlock(&dev->mode_config.mutex);
390}
391
392/*
393 * Generic framebuffer code
394 */
395
fb1d9738
JB		 396/*
397 * Surface framebuffer code
398 */
399
400#define vmw_framebuffer_to_vfbs(x) \
401 container_of(x, struct vmw_framebuffer_surface, base.base)
402
403struct vmw_framebuffer_surface {
404 struct vmw_framebuffer base;
405 struct vmw_surface *surface;
22ee861c 406 struct vmw_dma_buffer *buffer;
3a939a5e
TH		 407 struct list_head head;
408 struct drm_master *master;
fb1d9738
JB		 409};
410
411void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
412{
3a939a5e 413 struct vmw_framebuffer_surface *vfbs =
fb1d9738 414 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e
TH		 415 struct vmw_master *vmaster = vmw_master(vfbs->master);
416
417
418 mutex_lock(&vmaster->fb_surf_mutex);
419 list_del(&vfbs->head);
420 mutex_unlock(&vmaster->fb_surf_mutex);
fb1d9738 421
3a939a5e 422 drm_master_put(&vfbs->master);
fb1d9738 423 drm_framebuffer_cleanup(framebuffer);
3a939a5e 424 vmw_surface_unreference(&vfbs->surface);
90ff18bc 425 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 426
3a939a5e 427 kfree(vfbs);
fb1d9738
JB		 428}
429
56d1c78d 430static int do_surface_dirty_sou(struct vmw_private *dev_priv,
90ff18bc 431 struct drm_file *file_priv,
56d1c78d 432 struct vmw_framebuffer *framebuffer,
56d1c78d
JB		 433 unsigned flags, unsigned color,
434 struct drm_clip_rect *clips,
bd49ae46
JB		 435 unsigned num_clips, int inc,
436 struct vmw_fence_obj **out_fence)
56d1c78d 437{
c6ca8391 438 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7
JB		 439 struct drm_clip_rect *clips_ptr;
440 struct drm_clip_rect *tmp;
c6ca8391 441 struct drm_crtc *crtc;
56d1c78d 442 size_t fifo_size;
c6ca8391
JB		 443 int i, num_units;
444 int ret = 0; /* silence warning */
445 int left, right, top, bottom;
56d1c78d
JB		 446
447 struct {
448 SVGA3dCmdHeader header;
449 SVGA3dCmdBlitSurfaceToScreen body;
450 } *cmd;
c6ca8391 451 SVGASignedRect *blits;
56d1c78d 452
c6ca8391
JB		 453 num_units = 0;
454 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
455 head) {
456 if (crtc->fb != &framebuffer->base)
457 continue;
458 units[num_units++] = vmw_crtc_to_du(crtc);
459 }
460
c6ca8391
JB		 461 BUG_ON(!clips || !num_clips);
462
6abff3c7
JB		 463 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
464 if (unlikely(tmp == NULL)) {
465 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
466 return -ENOMEM;
467 }
468
c6ca8391 469 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
90ff18bc 470 cmd = kzalloc(fifo_size, GFP_KERNEL);
56d1c78d 471 if (unlikely(cmd == NULL)) {
90ff18bc 472 DRM_ERROR("Temporary fifo memory alloc failed.\n");
6abff3c7
JB		 473 ret = -ENOMEM;
474 goto out_free_tmp;
56d1c78d
JB		 475 }
476
6abff3c7
JB		 477 /* setup blits pointer */
478 blits = (SVGASignedRect *)&cmd[1];
479
480 /* initial clip region */
c6ca8391
JB		 481 left = clips->x1;
482 right = clips->x2;
483 top = clips->y1;
484 bottom = clips->y2;
485
f0c8a652
JB		 486 /* skip the first clip rect */
487 for (i = 1, clips_ptr = clips + inc;
488 i < num_clips; i++, clips_ptr += inc) {
c6ca8391
JB		 489 left = min_t(int, left, (int)clips_ptr->x1);
490 right = max_t(int, right, (int)clips_ptr->x2);
491 top = min_t(int, top, (int)clips_ptr->y1);
492 bottom = max_t(int, bottom, (int)clips_ptr->y2);
56d1c78d
JB		 493 }
494
c6ca8391 495 /* only need to do this once */
c6ca8391
JB		 496 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
497 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
498
56d1c78d
JB		 499 cmd->body.srcRect.left = left;
500 cmd->body.srcRect.right = right;
501 cmd->body.srcRect.top = top;
502 cmd->body.srcRect.bottom = bottom;
503
c6ca8391 504 clips_ptr = clips;
c6ca8391 505 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
6abff3c7
JB		 506 tmp[i].x1 = clips_ptr->x1 - left;
507 tmp[i].x2 = clips_ptr->x2 - left;
508 tmp[i].y1 = clips_ptr->y1 - top;
509 tmp[i].y2 = clips_ptr->y2 - top;
c6ca8391
JB		 510 }
511
512 /* do per unit writing, reuse fifo for each */
513 for (i = 0; i < num_units; i++) {
514 struct vmw_display_unit *unit = units[i];
6abff3c7
JB		 515 struct vmw_clip_rect clip;
516 int num;
517
518 clip.x1 = left - unit->crtc.x;
519 clip.y1 = top - unit->crtc.y;
520 clip.x2 = right - unit->crtc.x;
521 clip.y2 = bottom - unit->crtc.y;
c6ca8391
JB		 522
523 /* skip any crtcs that misses the clip region */
6abff3c7
JB		 524 if (clip.x1 >= unit->crtc.mode.hdisplay ||
525 clip.y1 >= unit->crtc.mode.vdisplay ||
526 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB		 527 continue;
528
6abff3c7
JB		 529 /*
530 * In order for the clip rects to be correctly scaled
531 * the src and dest rects needs to be the same size.
532 */
533 cmd->body.destRect.left = clip.x1;
534 cmd->body.destRect.right = clip.x2;
535 cmd->body.destRect.top = clip.y1;
536 cmd->body.destRect.bottom = clip.y2;
537
538 /* create a clip rect of the crtc in dest coords */
539 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
540 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
541 clip.x1 = 0 - clip.x1;
542 clip.y1 = 0 - clip.y1;
543
c6ca8391
JB		 544 /* need to reset sid as it is changed by execbuf */
545 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
c6ca8391
JB		 546 cmd->body.destScreenId = unit->unit;
547
6abff3c7
JB		 548 /* clip and write blits to cmd stream */
549 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 550
6abff3c7
JB		 551 /* if no cliprects hit skip this */
552 if (num == 0)
553 continue;
c6ca8391 554
bd49ae46
JB		 555 /* only return the last fence */
556 if (out_fence && *out_fence)
557 vmw_fence_obj_unreference(out_fence);
c6ca8391 558
6abff3c7
JB		 559 /* recalculate package length */
560 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
561 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 562 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bd49ae46 563 fifo_size, 0, NULL, out_fence);
c6ca8391
JB		 564
565 if (unlikely(ret != 0))
566 break;
567 }
56d1c78d 568
6abff3c7 569
90ff18bc 570 kfree(cmd);
6abff3c7
JB		 571out_free_tmp:
572 kfree(tmp);
56d1c78d 573
90ff18bc 574 return ret;
5deb65cf 575}
fb1d9738
JB		 576
577int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 578 struct drm_file *file_priv,
fb1d9738
JB		 579 unsigned flags, unsigned color,
580 struct drm_clip_rect *clips,
581 unsigned num_clips)
582{
583 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 584 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB		 585 struct vmw_framebuffer_surface *vfbs =
586 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 587 struct drm_clip_rect norect;
5deb65cf 588 int ret, inc = 1;
fb1d9738 589
3a939a5e
TH		 590 if (unlikely(vfbs->master != file_priv->master))
591 return -EINVAL;
592
01e81419
JB		 593 /* Require ScreenObject support for 3D */
594 if (!dev_priv->sou_priv)
595 return -EINVAL;
596
3a939a5e
TH		 597 ret = ttm_read_lock(&vmaster->lock, true);
598 if (unlikely(ret != 0))
599 return ret;
600
fb1d9738
JB		 601 if (!num_clips) {
602 num_clips = 1;
603 clips = &norect;
604 norect.x1 = norect.y1 = 0;
605 norect.x2 = framebuffer->width;
606 norect.y2 = framebuffer->height;
607 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
608 num_clips /= 2;
609 inc = 2; /* skip source rects */
610 }
611
c5c42360 612 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
01e81419 613 flags, color,
bd49ae46 614 clips, num_clips, inc, NULL);
fb1d9738 615
3a939a5e 616 ttm_read_unlock(&vmaster->lock);
fb1d9738
JB		 617 return 0;
618}
619
620static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
621 .destroy = vmw_framebuffer_surface_destroy,
622 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB		 623};
624
d3216a0c 625static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
3a939a5e 626 struct drm_file *file_priv,
d3216a0c
TH		 627 struct vmw_surface *surface,
628 struct vmw_framebuffer **out,
629 const struct drm_mode_fb_cmd
630 *mode_cmd)
fb1d9738
JB		 631
632{
633 struct drm_device *dev = dev_priv->dev;
634 struct vmw_framebuffer_surface *vfbs;
d3216a0c 635 enum SVGA3dSurfaceFormat format;
3a939a5e 636 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB		 637 int ret;
638
01e81419
JB		 639 /* 3D is only supported on HWv8 hosts which supports screen objects */
640 if (!dev_priv->sou_priv)
641 return -ENOSYS;
642
d3216a0c
TH		 643 /*
644 * Sanity checks.
645 */
646
e7ac9211
JB		 647 /* Surface must be marked as a scanout. */
648 if (unlikely(!surface->scanout))
649 return -EINVAL;
650
d3216a0c
TH		 651 if (unlikely(surface->mip_levels[0] != 1 ||
652 surface->num_sizes != 1 ||
653 surface->sizes[0].width < mode_cmd->width ||
654 surface->sizes[0].height < mode_cmd->height ||
655 surface->sizes[0].depth != 1)) {
656 DRM_ERROR("Incompatible surface dimensions "
657 "for requested mode.\n");
658 return -EINVAL;
659 }
660
661 switch (mode_cmd->depth) {
662 case 32:
663 format = SVGA3D_A8R8G8B8;
664 break;
665 case 24:
666 format = SVGA3D_X8R8G8B8;
667 break;
668 case 16:
669 format = SVGA3D_R5G6B5;
670 break;
671 case 15:
672 format = SVGA3D_A1R5G5B5;
673 break;
f01b7ba0
MD		 674 case 8:
675 format = SVGA3D_LUMINANCE8;
676 break;
d3216a0c
TH		 677 default:
678 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
679 return -EINVAL;
680 }
681
682 if (unlikely(format != surface->format)) {
683 DRM_ERROR("Invalid surface format for requested mode.\n");
684 return -EINVAL;
685 }
686
fb1d9738
JB		 687 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
688 if (!vfbs) {
689 ret = -ENOMEM;
690 goto out_err1;
691 }
692
fb1d9738
JB		 693 if (!vmw_surface_reference(surface)) {
694 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV		 695 ret = -EINVAL;
696 goto out_err2;
fb1d9738
JB		 697 }
698
699 /* XXX get the first 3 from the surface info */
d3216a0c 700 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 701 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 702 vfbs->base.base.depth = mode_cmd->depth;
703 vfbs->base.base.width = mode_cmd->width;
704 vfbs->base.base.height = mode_cmd->height;
fb1d9738 705 vfbs->surface = surface;
90ff18bc 706 vfbs->base.user_handle = mode_cmd->handle;
3a939a5e 707 vfbs->master = drm_master_get(file_priv->master);
3a939a5e
TH		 708
709 mutex_lock(&vmaster->fb_surf_mutex);
3a939a5e
TH		 710 list_add_tail(&vfbs->head, &vmaster->fb_surf);
711 mutex_unlock(&vmaster->fb_surf_mutex);
712
fb1d9738
JB		 713 *out = &vfbs->base;
714
80f0b5af
DV		 715 ret = drm_framebuffer_init(dev, &vfbs->base.base,
716 &vmw_framebuffer_surface_funcs);
717 if (ret)
718 goto out_err3;
719
fb1d9738
JB		 720 return 0;
721
722out_err3:
80f0b5af 723 vmw_surface_unreference(&surface);
fb1d9738
JB		 724out_err2:
725 kfree(vfbs);
726out_err1:
727 return ret;
728}
729
730/*
731 * Dmabuf framebuffer code
732 */
733
734#define vmw_framebuffer_to_vfbd(x) \
735 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
736
737struct vmw_framebuffer_dmabuf {
738 struct vmw_framebuffer base;
739 struct vmw_dma_buffer *buffer;
740};
741
742void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
743{
744 struct vmw_framebuffer_dmabuf *vfbd =
745 vmw_framebuffer_to_vfbd(framebuffer);
746
747 drm_framebuffer_cleanup(framebuffer);
748 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 749 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB		 750
751 kfree(vfbd);
752}
753
5deb65cf
JB		 754static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
755 struct vmw_framebuffer *framebuffer,
5deb65cf
JB		 756 unsigned flags, unsigned color,
757 struct drm_clip_rect *clips,
758 unsigned num_clips, int increment)
759{
760 size_t fifo_size;
761 int i;
762
763 struct {
764 uint32_t header;
765 SVGAFifoCmdUpdate body;
766 } *cmd;
767
768 fifo_size = sizeof(*cmd) * num_clips;
769 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
770 if (unlikely(cmd == NULL)) {
771 DRM_ERROR("Fifo reserve failed.\n");
772 return -ENOMEM;
773 }
774
775 memset(cmd, 0, fifo_size);
776 for (i = 0; i < num_clips; i++, clips += increment) {
777 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
778 cmd[i].body.x = cpu_to_le32(clips->x1);
779 cmd[i].body.y = cpu_to_le32(clips->y1);
780 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
781 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
782 }
783
784 vmw_fifo_commit(dev_priv, fifo_size);
785 return 0;
786}
787
c6ca8391
JB		 788static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
789 struct vmw_private *dev_priv,
790 struct vmw_framebuffer *framebuffer)
56d1c78d 791{
64fc9944 792 int depth = framebuffer->base.depth;
56d1c78d 793 size_t fifo_size;
c6ca8391 794 int ret;
56d1c78d
JB		 795
796 struct {
797 uint32_t header;
798 SVGAFifoCmdDefineGMRFB body;
799 } *cmd;
56d1c78d 800
64fc9944
JB		 801 /* Emulate RGBA support, contrary to svga_reg.h this is not
802 * supported by hosts. This is only a problem if we are reading
803 * this value later and expecting what we uploaded back.
804 */
805 if (depth == 32)
806 depth = 24;
807
c6ca8391 808 fifo_size = sizeof(*cmd);
56d1c78d
JB		 809 cmd = kmalloc(fifo_size, GFP_KERNEL);
810 if (unlikely(cmd == NULL)) {
811 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
812 return -ENOMEM;
813 }
814
815 memset(cmd, 0, fifo_size);
816 cmd->header = SVGA_CMD_DEFINE_GMRFB;
817 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
64fc9944 818 cmd->body.format.colorDepth = depth;
56d1c78d 819 cmd->body.format.reserved = 0;
01f2c773 820 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
90ff18bc 821 cmd->body.ptr.gmrId = framebuffer->user_handle;
56d1c78d
JB		 822 cmd->body.ptr.offset = 0;
823
56d1c78d 824 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 825 fifo_size, 0, NULL, NULL);
56d1c78d
JB		 826
827 kfree(cmd);
828
829 return ret;
830}
831
c6ca8391
JB		 832static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
833 struct vmw_private *dev_priv,
834 struct vmw_framebuffer *framebuffer,
c6ca8391
JB		 835 unsigned flags, unsigned color,
836 struct drm_clip_rect *clips,
bd49ae46
JB		 837 unsigned num_clips, int increment,
838 struct vmw_fence_obj **out_fence)
c6ca8391
JB		 839{
840 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
841 struct drm_clip_rect *clips_ptr;
842 int i, k, num_units, ret;
843 struct drm_crtc *crtc;
844 size_t fifo_size;
845
846 struct {
847 uint32_t header;
848 SVGAFifoCmdBlitGMRFBToScreen body;
849 } *blits;
850
851 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
852 if (unlikely(ret != 0))
853 return ret; /* define_gmrfb prints warnings */
854
855 fifo_size = sizeof(*blits) * num_clips;
856 blits = kmalloc(fifo_size, GFP_KERNEL);
857 if (unlikely(blits == NULL)) {
858 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
859 return -ENOMEM;
860 }
861
862 num_units = 0;
863 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
864 if (crtc->fb != &framebuffer->base)
865 continue;
866 units[num_units++] = vmw_crtc_to_du(crtc);
867 }
868
869 for (k = 0; k < num_units; k++) {
870 struct vmw_display_unit *unit = units[k];
871 int hit_num = 0;
872
873 clips_ptr = clips;
874 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
875 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
876 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
877 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
878 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
6abff3c7 879 int move_x, move_y;
c6ca8391
JB		 880
881 /* skip any crtcs that misses the clip region */
882 if (clip_x1 >= unit->crtc.mode.hdisplay ||
883 clip_y1 >= unit->crtc.mode.vdisplay ||
884 clip_x2 <= 0 || clip_y2 <= 0)
885 continue;
886
6abff3c7
JB		 887 /* clip size to crtc size */
888 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
889 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
890
891 /* translate both src and dest to bring clip into screen */
892 move_x = min_t(int, clip_x1, 0);
893 move_y = min_t(int, clip_y1, 0);
894
895 /* actual translate done here */
c6ca8391
JB		 896 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
897 blits[hit_num].body.destScreenId = unit->unit;
6abff3c7
JB		 898 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
899 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
900 blits[hit_num].body.destRect.left = clip_x1 - move_x;
901 blits[hit_num].body.destRect.top = clip_y1 - move_y;
c6ca8391
JB		 902 blits[hit_num].body.destRect.right = clip_x2;
903 blits[hit_num].body.destRect.bottom = clip_y2;
904 hit_num++;
905 }
906
907 /* no clips hit the crtc */
908 if (hit_num == 0)
909 continue;
910
bd49ae46
JB		 911 /* only return the last fence */
912 if (out_fence && *out_fence)
913 vmw_fence_obj_unreference(out_fence);
914
c6ca8391
JB		 915 fifo_size = sizeof(*blits) * hit_num;
916 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
bd49ae46 917 fifo_size, 0, NULL, out_fence);
c6ca8391
JB		 918
919 if (unlikely(ret != 0))
920 break;
921 }
922
923 kfree(blits);
924
925 return ret;
926}
927
fb1d9738 928int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 929 struct drm_file *file_priv,
fb1d9738
JB		 930 unsigned flags, unsigned color,
931 struct drm_clip_rect *clips,
932 unsigned num_clips)
933{
934 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
3a939a5e 935 struct vmw_master *vmaster = vmw_master(file_priv->master);
5deb65cf
JB		 936 struct vmw_framebuffer_dmabuf *vfbd =
937 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 938 struct drm_clip_rect norect;
5deb65cf 939 int ret, increment = 1;
fb1d9738 940
3a939a5e
TH		 941 ret = ttm_read_lock(&vmaster->lock, true);
942 if (unlikely(ret != 0))
943 return ret;
944
df1c93ba 945 if (!num_clips) {
fb1d9738
JB		 946 num_clips = 1;
947 clips = &norect;
948 norect.x1 = norect.y1 = 0;
949 norect.x2 = framebuffer->width;
950 norect.y2 = framebuffer->height;
951 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
952 num_clips /= 2;
953 increment = 2;
954 }
955
56d1c78d 956 if (dev_priv->ldu_priv) {
c5c42360 957 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
56d1c78d
JB		 958 flags, color,
959 clips, num_clips, increment);
960 } else {
961 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
c5c42360 962 flags, color,
bd49ae46 963 clips, num_clips, increment, NULL);
56d1c78d 964 }
fb1d9738 965
3a939a5e 966 ttm_read_unlock(&vmaster->lock);
5deb65cf 967 return ret;
fb1d9738
JB		 968}
969
970static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
971 .destroy = vmw_framebuffer_dmabuf_destroy,
972 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB		 973};
974
497a3ff9
JB		 975/**
976 * Pin the dmabuffer to the start of vram.
977 */
fb1d9738
JB		 978static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
979{
980 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
981 struct vmw_framebuffer_dmabuf *vfbd =
982 vmw_framebuffer_to_vfbd(&vfb->base);
983 int ret;
984
56d1c78d
JB		 985 /* This code should not be used with screen objects */
986 BUG_ON(dev_priv->sou_priv);
d7e1958d 987
fb1d9738
JB		 988 vmw_overlay_pause_all(dev_priv);
989
d991ef03 990 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
fb1d9738 991
fb1d9738
JB		 992 vmw_overlay_resume_all(dev_priv);
993
316ab13a
JB		 994 WARN_ON(ret != 0);
995
fb1d9738
JB		 996 return 0;
997}
998
999static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
1000{
1001 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1002 struct vmw_framebuffer_dmabuf *vfbd =
1003 vmw_framebuffer_to_vfbd(&vfb->base);
1004
1005 if (!vfbd->buffer) {
1006 WARN_ON(!vfbd->buffer);
1007 return 0;
1008 }
1009
d991ef03 1010 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
fb1d9738
JB		 1011}
1012
d3216a0c
TH		 1013static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
1014 struct vmw_dma_buffer *dmabuf,
1015 struct vmw_framebuffer **out,
1016 const struct drm_mode_fb_cmd
1017 *mode_cmd)
fb1d9738
JB		 1018
1019{
1020 struct drm_device *dev = dev_priv->dev;
1021 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 1022 unsigned int requested_size;
fb1d9738
JB		 1023 int ret;
1024
d3216a0c
TH		 1025 requested_size = mode_cmd->height * mode_cmd->pitch;
1026 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1027 DRM_ERROR("Screen buffer object size is too small "
1028 "for requested mode.\n");
1029 return -EINVAL;
1030 }
1031
c337ada7
JB		 1032 /* Limited framebuffer color depth support for screen objects */
1033 if (dev_priv->sou_priv) {
1034 switch (mode_cmd->depth) {
1035 case 32:
1036 case 24:
1037 /* Only support 32 bpp for 32 and 24 depth fbs */
1038 if (mode_cmd->bpp == 32)
1039 break;
1040
1041 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1042 mode_cmd->depth, mode_cmd->bpp);
1043 return -EINVAL;
1044 case 16:
1045 case 15:
1046 /* Only support 16 bpp for 16 and 15 depth fbs */
1047 if (mode_cmd->bpp == 16)
1048 break;
1049
1050 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1051 mode_cmd->depth, mode_cmd->bpp);
1052 return -EINVAL;
1053 default:
1054 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1055 return -EINVAL;
1056 }
1057 }
1058
fb1d9738
JB		 1059 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1060 if (!vfbd) {
1061 ret = -ENOMEM;
1062 goto out_err1;
1063 }
1064
fb1d9738
JB		 1065 if (!vmw_dmabuf_reference(dmabuf)) {
1066 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV		 1067 ret = -EINVAL;
1068 goto out_err2;
fb1d9738
JB		 1069 }
1070
d3216a0c 1071 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 1072 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH		 1073 vfbd->base.base.depth = mode_cmd->depth;
1074 vfbd->base.base.width = mode_cmd->width;
1075 vfbd->base.base.height = mode_cmd->height;
56d1c78d
JB		 1076 if (!dev_priv->sou_priv) {
1077 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1078 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1079 }
2fcd5a73 1080 vfbd->base.dmabuf = true;
fb1d9738 1081 vfbd->buffer = dmabuf;
90ff18bc 1082 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB		 1083 *out = &vfbd->base;
1084
80f0b5af
DV		 1085 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1086 &vmw_framebuffer_dmabuf_funcs);
1087 if (ret)
1088 goto out_err3;
1089
fb1d9738
JB		 1090 return 0;
1091
1092out_err3:
80f0b5af 1093 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB		 1094out_err2:
1095 kfree(vfbd);
1096out_err1:
1097 return ret;
1098}
1099
1100/*
1101 * Generic Kernel modesetting functions
1102 */
1103
1104static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1105 struct drm_file *file_priv,
308e5bcb 1106 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB		 1107{
1108 struct vmw_private *dev_priv = vmw_priv(dev);
1109 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1110 struct vmw_framebuffer *vfb = NULL;
1111 struct vmw_surface *surface = NULL;
1112 struct vmw_dma_buffer *bo = NULL;
90ff18bc 1113 struct ttm_base_object *user_obj;
308e5bcb 1114 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB		 1115 int ret;
1116
308e5bcb
JB		 1117 mode_cmd.width = mode_cmd2->width;
1118 mode_cmd.height = mode_cmd2->height;
1119 mode_cmd.pitch = mode_cmd2->pitches[0];
1120 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 1121 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB		 1122 &mode_cmd.bpp);
1123
d3216a0c
TH		 1124 /**
1125 * This code should be conditioned on Screen Objects not being used.
1126 * If screen objects are used, we can allocate a GMR to hold the
1127 * requested framebuffer.
1128 */
1129
8a783896 1130 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT		 1131 mode_cmd.pitch,
1132 mode_cmd.height)) {
d3216a0c 1133 DRM_ERROR("VRAM size is too small for requested mode.\n");
d9826409 1134 return ERR_PTR(-ENOMEM);
d3216a0c
TH		 1135 }
1136
90ff18bc
TH		 1137 /*
1138 * Take a reference on the user object of the resource
1139 * backing the kms fb. This ensures that user-space handle
1140 * lookups on that resource will always work as long as
1141 * it's registered with a kms framebuffer. This is important,
1142 * since vmw_execbuf_process identifies resources in the
1143 * command stream using user-space handles.
1144 */
1145
308e5bcb 1146 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH		 1147 if (unlikely(user_obj == NULL)) {
1148 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1149 return ERR_PTR(-ENOENT);
1150 }
1151
d3216a0c
TH		 1152 /**
1153 * End conditioned code.
1154 */
1155
e7ac9211
JB		 1156 /* returns either a dmabuf or surface */
1157 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 1158 mode_cmd.handle,
e7ac9211 1159 &surface, &bo);
fb1d9738 1160 if (ret)
e7ac9211
JB		 1161 goto err_out;
1162
1163 /* Create the new framebuffer depending one what we got back */
1164 if (bo)
1165 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
4cf73129 1166 &mode_cmd);
e7ac9211
JB		 1167 else if (surface)
1168 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
4cf73129 1169 surface, &vfb, &mode_cmd);
e7ac9211
JB		 1170 else
1171 BUG();
1172
1173err_out:
1174 /* vmw_user_lookup_handle takes one ref so does new_fb */
1175 if (bo)
1176 vmw_dmabuf_unreference(&bo);
1177 if (surface)
1178 vmw_surface_unreference(&surface);
fb1d9738
JB		 1179
1180 if (ret) {
1181 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1182 ttm_base_object_unref(&user_obj);
cce13ff7 1183 return ERR_PTR(ret);
90ff18bc
TH		 1184 } else
1185 vfb->user_obj = user_obj;
fb1d9738
JB		 1186
1187 return &vfb->base;
1188}
1189
e6ecefaa 1190static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1191 .fb_create = vmw_kms_fb_create,
fb1d9738
JB		 1192};
1193
2fcd5a73
JB		 1194int vmw_kms_present(struct vmw_private *dev_priv,
1195 struct drm_file *file_priv,
1196 struct vmw_framebuffer *vfb,
1197 struct vmw_surface *surface,
1198 uint32_t sid,
1199 int32_t destX, int32_t destY,
1200 struct drm_vmw_rect *clips,
1201 uint32_t num_clips)
1202{
c6ca8391 1203 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7 1204 struct drm_clip_rect *tmp;
c6ca8391 1205 struct drm_crtc *crtc;
2fcd5a73 1206 size_t fifo_size;
c6ca8391
JB		 1207 int i, k, num_units;
1208 int ret = 0; /* silence warning */
203dc220 1209 int left, right, top, bottom;
2fcd5a73
JB		 1210
1211 struct {
1212 SVGA3dCmdHeader header;
1213 SVGA3dCmdBlitSurfaceToScreen body;
1214 } *cmd;
1215 SVGASignedRect *blits;
1216
c6ca8391
JB		 1217 num_units = 0;
1218 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1219 if (crtc->fb != &vfb->base)
1220 continue;
1221 units[num_units++] = vmw_crtc_to_du(crtc);
1222 }
1223
2fcd5a73
JB		 1224 BUG_ON(surface == NULL);
1225 BUG_ON(!clips || !num_clips);
1226
6abff3c7
JB		 1227 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1228 if (unlikely(tmp == NULL)) {
1229 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1230 return -ENOMEM;
1231 }
1232
2fcd5a73
JB		 1233 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1234 cmd = kmalloc(fifo_size, GFP_KERNEL);
1235 if (unlikely(cmd == NULL)) {
1236 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
6abff3c7
JB		 1237 ret = -ENOMEM;
1238 goto out_free_tmp;
2fcd5a73
JB		 1239 }
1240
203dc220
JB		 1241 left = clips->x;
1242 right = clips->x + clips->w;
1243 top = clips->y;
1244 bottom = clips->y + clips->h;
1245
1246 for (i = 1; i < num_clips; i++) {
1247 left = min_t(int, left, (int)clips[i].x);
1248 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1249 top = min_t(int, top, (int)clips[i].y);
1250 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1251 }
1252
c6ca8391 1253 /* only need to do this once */
2fcd5a73 1254 memset(cmd, 0, fifo_size);
2fcd5a73 1255 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
6abff3c7
JB		 1256
1257 blits = (SVGASignedRect *)&cmd[1];
2fcd5a73 1258
203dc220
JB		 1259 cmd->body.srcRect.left = left;
1260 cmd->body.srcRect.right = right;
1261 cmd->body.srcRect.top = top;
1262 cmd->body.srcRect.bottom = bottom;
2fcd5a73 1263
2fcd5a73 1264 for (i = 0; i < num_clips; i++) {
6abff3c7
JB		 1265 tmp[i].x1 = clips[i].x - left;
1266 tmp[i].x2 = clips[i].x + clips[i].w - left;
1267 tmp[i].y1 = clips[i].y - top;
1268 tmp[i].y2 = clips[i].y + clips[i].h - top;
2fcd5a73
JB		 1269 }
1270
c6ca8391
JB		 1271 for (k = 0; k < num_units; k++) {
1272 struct vmw_display_unit *unit = units[k];
6abff3c7
JB		 1273 struct vmw_clip_rect clip;
1274 int num;
1275
1276 clip.x1 = left + destX - unit->crtc.x;
1277 clip.y1 = top + destY - unit->crtc.y;
1278 clip.x2 = right + destX - unit->crtc.x;
1279 clip.y2 = bottom + destY - unit->crtc.y;
c6ca8391
JB		 1280
1281 /* skip any crtcs that misses the clip region */
6abff3c7
JB		 1282 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1283 clip.y1 >= unit->crtc.mode.vdisplay ||
1284 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB		 1285 continue;
1286
6abff3c7
JB		 1287 /*
1288 * In order for the clip rects to be correctly scaled
1289 * the src and dest rects needs to be the same size.
1290 */
1291 cmd->body.destRect.left = clip.x1;
1292 cmd->body.destRect.right = clip.x2;
1293 cmd->body.destRect.top = clip.y1;
1294 cmd->body.destRect.bottom = clip.y2;
1295
1296 /* create a clip rect of the crtc in dest coords */
1297 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1298 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1299 clip.x1 = 0 - clip.x1;
1300 clip.y1 = 0 - clip.y1;
1301
c6ca8391
JB		 1302 /* need to reset sid as it is changed by execbuf */
1303 cmd->body.srcImage.sid = sid;
c6ca8391
JB		 1304 cmd->body.destScreenId = unit->unit;
1305
6abff3c7
JB		 1306 /* clip and write blits to cmd stream */
1307 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 1308
6abff3c7
JB		 1309 /* if no cliprects hit skip this */
1310 if (num == 0)
1311 continue;
c6ca8391 1312
6abff3c7
JB		 1313 /* recalculate package length */
1314 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1315 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 1316 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
bb1bd2f4 1317 fifo_size, 0, NULL, NULL);
c6ca8391
JB		 1318
1319 if (unlikely(ret != 0))
1320 break;
1321 }
2fcd5a73
JB		 1322
1323 kfree(cmd);
6abff3c7
JB		 1324out_free_tmp:
1325 kfree(tmp);
2fcd5a73
JB		 1326
1327 return ret;
1328}
1329
1330int vmw_kms_readback(struct vmw_private *dev_priv,
1331 struct drm_file *file_priv,
1332 struct vmw_framebuffer *vfb,
1333 struct drm_vmw_fence_rep __user *user_fence_rep,
1334 struct drm_vmw_rect *clips,
1335 uint32_t num_clips)
1336{
1337 struct vmw_framebuffer_dmabuf *vfbd =
1338 vmw_framebuffer_to_vfbd(&vfb->base);
1339 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1340 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1341 struct drm_crtc *crtc;
1342 size_t fifo_size;
1343 int i, k, ret, num_units, blits_pos;
1344
1345 struct {
1346 uint32_t header;
1347 SVGAFifoCmdDefineGMRFB body;
1348 } *cmd;
1349 struct {
1350 uint32_t header;
1351 SVGAFifoCmdBlitScreenToGMRFB body;
1352 } *blits;
1353
1354 num_units = 0;
1355 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1356 if (crtc->fb != &vfb->base)
1357 continue;
1358 units[num_units++] = vmw_crtc_to_du(crtc);
1359 }
1360
1361 BUG_ON(dmabuf == NULL);
1362 BUG_ON(!clips || !num_clips);
1363
1364 /* take a safe guess at fifo size */
1365 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1366 cmd = kmalloc(fifo_size, GFP_KERNEL);
1367 if (unlikely(cmd == NULL)) {
1368 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1369 return -ENOMEM;
1370 }
1371
1372 memset(cmd, 0, fifo_size);
1373 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1374 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1375 cmd->body.format.colorDepth = vfb->base.depth;
1376 cmd->body.format.reserved = 0;
01f2c773 1377 cmd->body.bytesPerLine = vfb->base.pitches[0];
90ff18bc 1378 cmd->body.ptr.gmrId = vfb->user_handle;
2fcd5a73
JB		 1379 cmd->body.ptr.offset = 0;
1380
1381 blits = (void *)&cmd[1];
1382 blits_pos = 0;
1383 for (i = 0; i < num_units; i++) {
1384 struct drm_vmw_rect *c = clips;
1385 for (k = 0; k < num_clips; k++, c++) {
1386 /* transform clip coords to crtc origin based coords */
1387 int clip_x1 = c->x - units[i]->crtc.x;
1388 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1389 int clip_y1 = c->y - units[i]->crtc.y;
1390 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1391 int dest_x = c->x;
1392 int dest_y = c->y;
1393
1394 /* compensate for clipping, we negate
1395 * a negative number and add that.
1396 */
1397 if (clip_x1 < 0)
1398 dest_x += -clip_x1;
1399 if (clip_y1 < 0)
1400 dest_y += -clip_y1;
1401
1402 /* clip */
1403 clip_x1 = max(clip_x1, 0);
1404 clip_y1 = max(clip_y1, 0);
1405 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1406 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1407
1408 /* and cull any rects that misses the crtc */
1409 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1410 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1411 clip_x2 <= 0 || clip_y2 <= 0)
1412 continue;
1413
1414 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1415 blits[blits_pos].body.srcScreenId = units[i]->unit;
1416 blits[blits_pos].body.destOrigin.x = dest_x;
1417 blits[blits_pos].body.destOrigin.y = dest_y;
1418
1419 blits[blits_pos].body.srcRect.left = clip_x1;
1420 blits[blits_pos].body.srcRect.top = clip_y1;
1421 blits[blits_pos].body.srcRect.right = clip_x2;
1422 blits[blits_pos].body.srcRect.bottom = clip_y2;
1423 blits_pos++;
1424 }
1425 }
1426 /* reset size here and use calculated exact size from loops */
1427 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1428
1429 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
bb1bd2f4 1430 0, user_fence_rep, NULL);
2fcd5a73
JB		 1431
1432 kfree(cmd);
1433
1434 return ret;
1435}
1436
fb1d9738
JB		 1437int vmw_kms_init(struct vmw_private *dev_priv)
1438{
1439 struct drm_device *dev = dev_priv->dev;
1440 int ret;
1441
1442 drm_mode_config_init(dev);
1443 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB		 1444 dev->mode_config.min_width = 1;
1445 dev->mode_config.min_height = 1;
7e71f8a5
JB		 1446 /* assumed largest fb size */
1447 dev->mode_config.max_width = 8192;
1448 dev->mode_config.max_height = 8192;
fb1d9738 1449
56d1c78d
JB		 1450 ret = vmw_kms_init_screen_object_display(dev_priv);
1451 if (ret) /* Fallback */
1452 (void)vmw_kms_init_legacy_display_system(dev_priv);
fb1d9738
JB		 1453
1454 return 0;
1455}
1456
1457int vmw_kms_close(struct vmw_private *dev_priv)
1458{
1459 /*
1460 * Docs says we should take the lock before calling this function
1461 * but since it destroys encoders and our destructor calls
1462 * drm_encoder_cleanup which takes the lock we deadlock.
1463 */
1464 drm_mode_config_cleanup(dev_priv->dev);
c0d18316
JB		 1465 if (dev_priv->sou_priv)
1466 vmw_kms_close_screen_object_display(dev_priv);
1467 else
1468 vmw_kms_close_legacy_display_system(dev_priv);
fb1d9738
JB		 1469 return 0;
1470}
1471
1472int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1473 struct drm_file *file_priv)
1474{
1475 struct drm_vmw_cursor_bypass_arg *arg = data;
1476 struct vmw_display_unit *du;
1477 struct drm_mode_object *obj;
1478 struct drm_crtc *crtc;
1479 int ret = 0;
1480
1481
1482 mutex_lock(&dev->mode_config.mutex);
1483 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1484
1485 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1486 du = vmw_crtc_to_du(crtc);
1487 du->hotspot_x = arg->xhot;
1488 du->hotspot_y = arg->yhot;
1489 }
1490
1491 mutex_unlock(&dev->mode_config.mutex);
1492 return 0;
1493 }
1494
1495 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1496 if (!obj) {
1497 ret = -EINVAL;
1498 goto out;
1499 }
1500
1501 crtc = obj_to_crtc(obj);
1502 du = vmw_crtc_to_du(crtc);
1503
1504 du->hotspot_x = arg->xhot;
1505 du->hotspot_y = arg->yhot;
1506
1507out:
1508 mutex_unlock(&dev->mode_config.mutex);
1509
1510 return ret;
1511}
1512
0bef23f9 1513int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1514 unsigned width, unsigned height, unsigned pitch,
6558429b 1515 unsigned bpp, unsigned depth)
fb1d9738 1516{
d7e1958d
JB		 1517 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1518 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1519 else if (vmw_fifo_have_pitchlock(vmw_priv))
1520 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1521 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1522 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1523 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD		 1524
1525 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1526 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1527 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1528 return -EINVAL;
1529 }
1530
1531 return 0;
d7e1958d 1532}
fb1d9738 1533
d7e1958d
JB		 1534int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1535{
7c4f7780
TH		 1536 struct vmw_vga_topology_state *save;
1537 uint32_t i;
1538
fb1d9738
JB		 1539 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1540 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1541 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB		 1542 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1543 vmw_priv->vga_pitchlock =
7c4f7780 1544 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1545 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780
TH		 1546 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1547 SVGA_FIFO_PITCHLOCK);
1548
1549 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1550 return 0;
fb1d9738 1551
7c4f7780
TH		 1552 vmw_priv->num_displays = vmw_read(vmw_priv,
1553 SVGA_REG_NUM_GUEST_DISPLAYS);
1554
029e50bf
TH		 1555 if (vmw_priv->num_displays == 0)
1556 vmw_priv->num_displays = 1;
1557
7c4f7780
TH		 1558 for (i = 0; i < vmw_priv->num_displays; ++i) {
1559 save = &vmw_priv->vga_save[i];
1560 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1561 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1562 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1563 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1564 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1565 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1566 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH		 1567 if (i == 0 && vmw_priv->num_displays == 1 &&
1568 save->width == 0 && save->height == 0) {
1569
1570 /*
1571 * It should be fairly safe to assume that these
1572 * values are uninitialized.
1573 */
1574
1575 save->width = vmw_priv->vga_width - save->pos_x;
1576 save->height = vmw_priv->vga_height - save->pos_y;
1577 }
7c4f7780 1578 }
30c78bb8 1579
fb1d9738
JB		 1580 return 0;
1581}
1582
1583int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1584{
7c4f7780
TH		 1585 struct vmw_vga_topology_state *save;
1586 uint32_t i;
1587
fb1d9738
JB		 1588 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1589 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1590 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB		 1591 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1592 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1593 vmw_priv->vga_pitchlock);
1594 else if (vmw_fifo_have_pitchlock(vmw_priv))
1595 iowrite32(vmw_priv->vga_pitchlock,
1596 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1597
7c4f7780
TH		 1598 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1599 return 0;
1600
1601 for (i = 0; i < vmw_priv->num_displays; ++i) {
1602 save = &vmw_priv->vga_save[i];
1603 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1604 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1605 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1606 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1607 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1608 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1609 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1610 }
1611
fb1d9738
JB		 1612 return 0;
1613}
d8bd19d2 1614
e133e737
TH		 1615bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1616 uint32_t pitch,
1617 uint32_t height)
1618{
1619 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1620}
1621
1c482ab3
JB		 1622
1623/**
1624 * Function called by DRM code called with vbl_lock held.
1625 */
7a1c2f6c
TH		 1626u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1627{
1628 return 0;
1629}
626ab771 1630
1c482ab3
JB		 1631/**
1632 * Function called by DRM code called with vbl_lock held.
1633 */
1634int vmw_enable_vblank(struct drm_device *dev, int crtc)
1635{
1636 return -ENOSYS;
1637}
1638
1639/**
1640 * Function called by DRM code called with vbl_lock held.
1641 */
1642void vmw_disable_vblank(struct drm_device *dev, int crtc)
1643{
1644}
1645
626ab771
JB		 1646
1647/*
1648 * Small shared kms functions.
1649 */
1650
1651int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1652 struct drm_vmw_rect *rects)
1653{
1654 struct drm_device *dev = dev_priv->dev;
1655 struct vmw_display_unit *du;
1656 struct drm_connector *con;
626ab771
JB		 1657
1658 mutex_lock(&dev->mode_config.mutex);
1659
1660#if 0
6ea77d13
TH		 1661 {
1662 unsigned int i;
1663
1664 DRM_INFO("%s: new layout ", __func__);
1665 for (i = 0; i < num; i++)
1666 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1667 rects[i].w, rects[i].h);
1668 DRM_INFO("\n");
1669 }
626ab771
JB		 1670#endif
1671
1672 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1673 du = vmw_connector_to_du(con);
1674 if (num > du->unit) {
1675 du->pref_width = rects[du->unit].w;
1676 du->pref_height = rects[du->unit].h;
1677 du->pref_active = true;
cd2b89e7
TH		 1678 du->gui_x = rects[du->unit].x;
1679 du->gui_y = rects[du->unit].y;
626ab771
JB		 1680 } else {
1681 du->pref_width = 800;
1682 du->pref_height = 600;
1683 du->pref_active = false;
1684 }
1685 con->status = vmw_du_connector_detect(con, true);
1686 }
1687
1688 mutex_unlock(&dev->mode_config.mutex);
1689
1690 return 0;
1691}
1692
b5ec427e
JB		 1693int vmw_du_page_flip(struct drm_crtc *crtc,
1694 struct drm_framebuffer *fb,
1695 struct drm_pending_vblank_event *event)
1696{
1697 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1698 struct drm_framebuffer *old_fb = crtc->fb;
1699 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
f5869a83 1700 struct drm_file *file_priv ;
b5ec427e
JB		 1701 struct vmw_fence_obj *fence = NULL;
1702 struct drm_clip_rect clips;
1703 int ret;
1704
f5869a83
AC		 1705 if (event == NULL)
1706 return -EINVAL;
1707
b5ec427e
JB		 1708 /* require ScreenObject support for page flipping */
1709 if (!dev_priv->sou_priv)
1710 return -ENOSYS;
1711
f5869a83 1712 file_priv = event->base.file_priv;
b5ec427e
JB		 1713 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1714 return -EINVAL;
1715
1716 crtc->fb = fb;
1717
1718 /* do a full screen dirty update */
1719 clips.x1 = clips.y1 = 0;
1720 clips.x2 = fb->width;
1721 clips.y2 = fb->height;
1722
1723 if (vfb->dmabuf)
1724 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
1725 0, 0, &clips, 1, 1, &fence);
1726 else
1727 ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
1728 0, 0, &clips, 1, 1, &fence);
1729
1730
1731 if (ret != 0)
1732 goto out_no_fence;
1733 if (!fence) {
1734 ret = -EINVAL;
1735 goto out_no_fence;
1736 }
1737
1738 ret = vmw_event_fence_action_queue(file_priv, fence,
1739 &event->base,
1740 &event->event.tv_sec,
1741 &event->event.tv_usec,
1742 true);
1743
1744 /*
1745 * No need to hold on to this now. The only cleanup
1746 * we need to do if we fail is unref the fence.
1747 */
1748 vmw_fence_obj_unreference(&fence);
1749
1750 if (vmw_crtc_to_du(crtc)->is_implicit)
1751 vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
1752
1753 return ret;
1754
1755out_no_fence:
1756 crtc->fb = old_fb;
1757 return ret;
1758}
1759
1760
626ab771
JB		 1761void vmw_du_crtc_save(struct drm_crtc *crtc)
1762{
1763}
1764
1765void vmw_du_crtc_restore(struct drm_crtc *crtc)
1766{
1767}
1768
1769void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1770 u16 *r, u16 *g, u16 *b,
1771 uint32_t start, uint32_t size)
1772{
1773 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1774 int i;
1775
1776 for (i = 0; i < size; i++) {
1777 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1778 r[i], g[i], b[i]);
1779 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1780 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1781 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1782 }
1783}
1784
1785void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1786{
1787}
1788
1789void vmw_du_connector_save(struct drm_connector *connector)
1790{
1791}
1792
1793void vmw_du_connector_restore(struct drm_connector *connector)
1794{
1795}
1796
1797enum drm_connector_status
1798vmw_du_connector_detect(struct drm_connector *connector, bool force)
1799{
1800 uint32_t num_displays;
1801 struct drm_device *dev = connector->dev;
1802 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1803 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771
JB		 1804
1805 mutex_lock(&dev_priv->hw_mutex);
1806 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1807 mutex_unlock(&dev_priv->hw_mutex);
1808
cd2b89e7
TH		 1809 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1810 du->pref_active) ?
626ab771
JB		 1811 connector_status_connected : connector_status_disconnected);
1812}
1813
1814static struct drm_display_mode vmw_kms_connector_builtin[] = {
1815 /* 640x480@60Hz */
1816 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1817 752, 800, 0, 480, 489, 492, 525, 0,
1818 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1819 /* 800x600@60Hz */
1820 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1821 968, 1056, 0, 600, 601, 605, 628, 0,
1822 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1823 /* 1024x768@60Hz */
1824 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1825 1184, 1344, 0, 768, 771, 777, 806, 0,
1826 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1827 /* 1152x864@75Hz */
1828 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1829 1344, 1600, 0, 864, 865, 868, 900, 0,
1830 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1831 /* 1280x768@60Hz */
1832 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1833 1472, 1664, 0, 768, 771, 778, 798, 0,
1834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1835 /* 1280x800@60Hz */
1836 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1837 1480, 1680, 0, 800, 803, 809, 831, 0,
1838 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1839 /* 1280x960@60Hz */
1840 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1841 1488, 1800, 0, 960, 961, 964, 1000, 0,
1842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1843 /* 1280x1024@60Hz */
1844 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1845 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1846 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1847 /* 1360x768@60Hz */
1848 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1849 1536, 1792, 0, 768, 771, 777, 795, 0,
1850 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851 /* 1440x1050@60Hz */
1852 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1853 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1854 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1855 /* 1440x900@60Hz */
1856 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1857 1672, 1904, 0, 900, 903, 909, 934, 0,
1858 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1859 /* 1600x1200@60Hz */
1860 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1861 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863 /* 1680x1050@60Hz */
1864 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1865 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1866 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1867 /* 1792x1344@60Hz */
1868 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1869 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1870 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1871 /* 1853x1392@60Hz */
1872 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1873 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1875 /* 1920x1200@60Hz */
1876 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1877 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1878 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1879 /* 1920x1440@60Hz */
1880 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1881 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1882 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1883 /* 2560x1600@60Hz */
1884 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1885 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1886 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1887 /* Terminate */
1888 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1889};
1890
1543b4dd
TH		 1891/**
1892 * vmw_guess_mode_timing - Provide fake timings for a
1893 * 60Hz vrefresh mode.
1894 *
1895 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1896 * members filled in.
1897 */
1898static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1899{
1900 mode->hsync_start = mode->hdisplay + 50;
1901 mode->hsync_end = mode->hsync_start + 50;
1902 mode->htotal = mode->hsync_end + 50;
1903
1904 mode->vsync_start = mode->vdisplay + 50;
1905 mode->vsync_end = mode->vsync_start + 50;
1906 mode->vtotal = mode->vsync_end + 50;
1907
1908 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1909 mode->vrefresh = drm_mode_vrefresh(mode);
1910}
1911
1912
626ab771
JB		 1913int vmw_du_connector_fill_modes(struct drm_connector *connector,
1914 uint32_t max_width, uint32_t max_height)
1915{
1916 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1917 struct drm_device *dev = connector->dev;
1918 struct vmw_private *dev_priv = vmw_priv(dev);
1919 struct drm_display_mode *mode = NULL;
1920 struct drm_display_mode *bmode;
1921 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1922 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1923 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1924 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1925 };
1926 int i;
1927
1928 /* Add preferred mode */
1929 {
1930 mode = drm_mode_duplicate(dev, &prefmode);
1931 if (!mode)
1932 return 0;
1933 mode->hdisplay = du->pref_width;
1934 mode->vdisplay = du->pref_height;
1543b4dd 1935 vmw_guess_mode_timing(mode);
55bde5b2 1936
626ab771
JB		 1937 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1938 mode->vdisplay)) {
1939 drm_mode_probed_add(connector, mode);
55bde5b2
JB		 1940 } else {
1941 drm_mode_destroy(dev, mode);
1942 mode = NULL;
1943 }
626ab771 1944
55bde5b2
JB		 1945 if (du->pref_mode) {
1946 list_del_init(&du->pref_mode->head);
1947 drm_mode_destroy(dev, du->pref_mode);
626ab771 1948 }
55bde5b2
JB		 1949
1950 /* mode might be null here, this is intended */
1951 du->pref_mode = mode;
626ab771
JB		 1952 }
1953
1954 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1955 bmode = &vmw_kms_connector_builtin[i];
1956 if (bmode->hdisplay > max_width ||
1957 bmode->vdisplay > max_height)
1958 continue;
1959
1960 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1961 bmode->vdisplay))
1962 continue;
1963
1964 mode = drm_mode_duplicate(dev, bmode);
1965 if (!mode)
1966 return 0;
1967 mode->vrefresh = drm_mode_vrefresh(mode);
1968
1969 drm_mode_probed_add(connector, mode);
1970 }
1971
d41025c0
JB		 1972 /* Move the prefered mode first, help apps pick the right mode. */
1973 if (du->pref_mode)
1974 list_move(&du->pref_mode->head, &connector->probed_modes);
1975
626ab771
JB		 1976 drm_mode_connector_list_update(connector);
1977
1978 return 1;
1979}
1980
1981int vmw_du_connector_set_property(struct drm_connector *connector,
1982 struct drm_property *property,
1983 uint64_t val)
1984{
1985 return 0;
1986}
cd2b89e7
TH		 1987
1988
1989int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1990 struct drm_file *file_priv)
1991{
1992 struct vmw_private *dev_priv = vmw_priv(dev);
1993 struct drm_vmw_update_layout_arg *arg =
1994 (struct drm_vmw_update_layout_arg *)data;
1995 struct vmw_master *vmaster = vmw_master(file_priv->master);
1996 void __user *user_rects;
1997 struct drm_vmw_rect *rects;
1998 unsigned rects_size;
1999 int ret;
2000 int i;
2001 struct drm_mode_config *mode_config = &dev->mode_config;
2002
2003 ret = ttm_read_lock(&vmaster->lock, true);
2004 if (unlikely(ret != 0))
2005 return ret;
2006
2007 if (!arg->num_outputs) {
2008 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2009 vmw_du_update_layout(dev_priv, 1, &def_rect);
2010 goto out_unlock;
2011 }
2012
2013 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW		 2014 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2015 GFP_KERNEL);
cd2b89e7
TH		 2016 if (unlikely(!rects)) {
2017 ret = -ENOMEM;
2018 goto out_unlock;
2019 }
2020
2021 user_rects = (void __user *)(unsigned long)arg->rects;
2022 ret = copy_from_user(rects, user_rects, rects_size);
2023 if (unlikely(ret != 0)) {
2024 DRM_ERROR("Failed to get rects.\n");
2025 ret = -EFAULT;
2026 goto out_free;
2027 }
2028
2029 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW		 2030 if (rects[i].x < 0 ||
2031 rects[i].y < 0 ||
2032 rects[i].x + rects[i].w > mode_config->max_width ||
2033 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH		 2034 DRM_ERROR("Invalid GUI layout.\n");
2035 ret = -EINVAL;
2036 goto out_free;
2037 }
2038 }
2039
2040 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
2041
2042out_free:
2043 kfree(rects);
2044out_unlock:
2045 ttm_read_unlock(&vmaster->lock);
2046 return ret;
2047}
Linux kernel - Deliverables
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