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fb1d9738 JB |
1 | /************************************************************************** |
2 | * | |
54fbde8a | 3 | * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA |
fb1d9738 JB |
4 | * All Rights Reserved. |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #include "vmwgfx_kms.h" | |
29 | ||
56d1c78d | 30 | |
fb1d9738 JB |
31 | /* Might need a hrtimer here? */ |
32 | #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) | |
33 | ||
c8261a96 | 34 | void vmw_du_cleanup(struct vmw_display_unit *du) |
fb1d9738 JB |
35 | { |
36 | if (du->cursor_surface) | |
37 | vmw_surface_unreference(&du->cursor_surface); | |
38 | if (du->cursor_dmabuf) | |
39 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
34ea3d38 | 40 | drm_connector_unregister(&du->connector); |
fb1d9738 JB |
41 | drm_crtc_cleanup(&du->crtc); |
42 | drm_encoder_cleanup(&du->encoder); | |
43 | drm_connector_cleanup(&du->connector); | |
44 | } | |
45 | ||
46 | /* | |
47 | * Display Unit Cursor functions | |
48 | */ | |
49 | ||
50 | int vmw_cursor_update_image(struct vmw_private *dev_priv, | |
51 | u32 *image, u32 width, u32 height, | |
52 | u32 hotspotX, u32 hotspotY) | |
53 | { | |
54 | struct { | |
55 | u32 cmd; | |
56 | SVGAFifoCmdDefineAlphaCursor cursor; | |
57 | } *cmd; | |
58 | u32 image_size = width * height * 4; | |
59 | u32 cmd_size = sizeof(*cmd) + image_size; | |
60 | ||
61 | if (!image) | |
62 | return -EINVAL; | |
63 | ||
64 | cmd = vmw_fifo_reserve(dev_priv, cmd_size); | |
65 | if (unlikely(cmd == NULL)) { | |
66 | DRM_ERROR("Fifo reserve failed.\n"); | |
67 | return -ENOMEM; | |
68 | } | |
69 | ||
70 | memset(cmd, 0, sizeof(*cmd)); | |
71 | ||
72 | memcpy(&cmd[1], image, image_size); | |
73 | ||
b9eb1a61 TH |
74 | cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR; |
75 | cmd->cursor.id = 0; | |
76 | cmd->cursor.width = width; | |
77 | cmd->cursor.height = height; | |
78 | cmd->cursor.hotspotX = hotspotX; | |
79 | cmd->cursor.hotspotY = hotspotY; | |
fb1d9738 | 80 | |
4e0858a6 | 81 | vmw_fifo_commit_flush(dev_priv, cmd_size); |
fb1d9738 JB |
82 | |
83 | return 0; | |
84 | } | |
85 | ||
6a91d97e JB |
86 | int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, |
87 | struct vmw_dma_buffer *dmabuf, | |
88 | u32 width, u32 height, | |
89 | u32 hotspotX, u32 hotspotY) | |
90 | { | |
91 | struct ttm_bo_kmap_obj map; | |
92 | unsigned long kmap_offset; | |
93 | unsigned long kmap_num; | |
94 | void *virtual; | |
95 | bool dummy; | |
96 | int ret; | |
97 | ||
98 | kmap_offset = 0; | |
99 | kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT; | |
100 | ||
ee3939e0 | 101 | ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL); |
6a91d97e JB |
102 | if (unlikely(ret != 0)) { |
103 | DRM_ERROR("reserve failed\n"); | |
104 | return -EINVAL; | |
105 | } | |
106 | ||
107 | ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); | |
108 | if (unlikely(ret != 0)) | |
109 | goto err_unreserve; | |
110 | ||
111 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
112 | ret = vmw_cursor_update_image(dev_priv, virtual, width, height, | |
113 | hotspotX, hotspotY); | |
114 | ||
115 | ttm_bo_kunmap(&map); | |
116 | err_unreserve: | |
117 | ttm_bo_unreserve(&dmabuf->base); | |
118 | ||
119 | return ret; | |
120 | } | |
121 | ||
122 | ||
fb1d9738 JB |
123 | void vmw_cursor_update_position(struct vmw_private *dev_priv, |
124 | bool show, int x, int y) | |
125 | { | |
b76ff5ea | 126 | u32 *fifo_mem = dev_priv->mmio_virt; |
fb1d9738 JB |
127 | uint32_t count; |
128 | ||
b76ff5ea TH |
129 | vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON); |
130 | vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X); | |
131 | vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y); | |
132 | count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
133 | vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT); | |
fb1d9738 JB |
134 | } |
135 | ||
136 | int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |
137 | uint32_t handle, uint32_t width, uint32_t height) | |
138 | { | |
139 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
fb1d9738 JB |
140 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); |
141 | struct vmw_surface *surface = NULL; | |
142 | struct vmw_dma_buffer *dmabuf = NULL; | |
143 | int ret; | |
144 | ||
bfb89928 DV |
145 | /* |
146 | * FIXME: Unclear whether there's any global state touched by the | |
147 | * cursor_set function, especially vmw_cursor_update_position looks | |
148 | * suspicious. For now take the easy route and reacquire all locks. We | |
149 | * can do this since the caller in the drm core doesn't check anything | |
150 | * which is protected by any looks. | |
151 | */ | |
21e88620 | 152 | drm_modeset_unlock_crtc(crtc); |
bfb89928 DV |
153 | drm_modeset_lock_all(dev_priv->dev); |
154 | ||
baa91d64 | 155 | /* A lot of the code assumes this */ |
bfb89928 DV |
156 | if (handle && (width != 64 || height != 64)) { |
157 | ret = -EINVAL; | |
158 | goto out; | |
159 | } | |
baa91d64 | 160 | |
fb1d9738 | 161 | if (handle) { |
a5d0f576 VS |
162 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
163 | ||
e7ac9211 JB |
164 | ret = vmw_user_lookup_handle(dev_priv, tfile, |
165 | handle, &surface, &dmabuf); | |
166 | if (ret) { | |
167 | DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); | |
bfb89928 DV |
168 | ret = -EINVAL; |
169 | goto out; | |
fb1d9738 JB |
170 | } |
171 | } | |
172 | ||
e7ac9211 JB |
173 | /* need to do this before taking down old image */ |
174 | if (surface && !surface->snooper.image) { | |
175 | DRM_ERROR("surface not suitable for cursor\n"); | |
176 | vmw_surface_unreference(&surface); | |
bfb89928 DV |
177 | ret = -EINVAL; |
178 | goto out; | |
e7ac9211 JB |
179 | } |
180 | ||
fb1d9738 JB |
181 | /* takedown old cursor */ |
182 | if (du->cursor_surface) { | |
183 | du->cursor_surface->snooper.crtc = NULL; | |
184 | vmw_surface_unreference(&du->cursor_surface); | |
185 | } | |
186 | if (du->cursor_dmabuf) | |
187 | vmw_dmabuf_unreference(&du->cursor_dmabuf); | |
188 | ||
189 | /* setup new image */ | |
190 | if (surface) { | |
191 | /* vmw_user_surface_lookup takes one reference */ | |
192 | du->cursor_surface = surface; | |
193 | ||
194 | du->cursor_surface->snooper.crtc = crtc; | |
195 | du->cursor_age = du->cursor_surface->snooper.age; | |
196 | vmw_cursor_update_image(dev_priv, surface->snooper.image, | |
197 | 64, 64, du->hotspot_x, du->hotspot_y); | |
198 | } else if (dmabuf) { | |
fb1d9738 JB |
199 | /* vmw_user_surface_lookup takes one reference */ |
200 | du->cursor_dmabuf = dmabuf; | |
201 | ||
6a91d97e JB |
202 | ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height, |
203 | du->hotspot_x, du->hotspot_y); | |
fb1d9738 JB |
204 | } else { |
205 | vmw_cursor_update_position(dev_priv, false, 0, 0); | |
bfb89928 DV |
206 | ret = 0; |
207 | goto out; | |
fb1d9738 JB |
208 | } |
209 | ||
da7653d6 TH |
210 | vmw_cursor_update_position(dev_priv, true, |
211 | du->cursor_x + du->hotspot_x, | |
212 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 213 | |
bfb89928 DV |
214 | ret = 0; |
215 | out: | |
216 | drm_modeset_unlock_all(dev_priv->dev); | |
4d02e2de | 217 | drm_modeset_lock_crtc(crtc, crtc->cursor); |
bfb89928 DV |
218 | |
219 | return ret; | |
fb1d9738 JB |
220 | } |
221 | ||
222 | int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) | |
223 | { | |
224 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
225 | struct vmw_display_unit *du = vmw_crtc_to_du(crtc); | |
226 | bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false; | |
227 | ||
228 | du->cursor_x = x + crtc->x; | |
229 | du->cursor_y = y + crtc->y; | |
230 | ||
dac35663 DV |
231 | /* |
232 | * FIXME: Unclear whether there's any global state touched by the | |
233 | * cursor_set function, especially vmw_cursor_update_position looks | |
234 | * suspicious. For now take the easy route and reacquire all locks. We | |
235 | * can do this since the caller in the drm core doesn't check anything | |
236 | * which is protected by any looks. | |
237 | */ | |
21e88620 | 238 | drm_modeset_unlock_crtc(crtc); |
dac35663 DV |
239 | drm_modeset_lock_all(dev_priv->dev); |
240 | ||
fb1d9738 | 241 | vmw_cursor_update_position(dev_priv, shown, |
da7653d6 TH |
242 | du->cursor_x + du->hotspot_x, |
243 | du->cursor_y + du->hotspot_y); | |
fb1d9738 | 244 | |
dac35663 | 245 | drm_modeset_unlock_all(dev_priv->dev); |
4d02e2de | 246 | drm_modeset_lock_crtc(crtc, crtc->cursor); |
dac35663 | 247 | |
fb1d9738 JB |
248 | return 0; |
249 | } | |
250 | ||
251 | void vmw_kms_cursor_snoop(struct vmw_surface *srf, | |
252 | struct ttm_object_file *tfile, | |
253 | struct ttm_buffer_object *bo, | |
254 | SVGA3dCmdHeader *header) | |
255 | { | |
256 | struct ttm_bo_kmap_obj map; | |
257 | unsigned long kmap_offset; | |
258 | unsigned long kmap_num; | |
259 | SVGA3dCopyBox *box; | |
260 | unsigned box_count; | |
261 | void *virtual; | |
262 | bool dummy; | |
263 | struct vmw_dma_cmd { | |
264 | SVGA3dCmdHeader header; | |
265 | SVGA3dCmdSurfaceDMA dma; | |
266 | } *cmd; | |
2ac86371 | 267 | int i, ret; |
fb1d9738 JB |
268 | |
269 | cmd = container_of(header, struct vmw_dma_cmd, header); | |
270 | ||
271 | /* No snooper installed */ | |
272 | if (!srf->snooper.image) | |
273 | return; | |
274 | ||
275 | if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) { | |
276 | DRM_ERROR("face and mipmap for cursors should never != 0\n"); | |
277 | return; | |
278 | } | |
279 | ||
280 | if (cmd->header.size < 64) { | |
281 | DRM_ERROR("at least one full copy box must be given\n"); | |
282 | return; | |
283 | } | |
284 | ||
285 | box = (SVGA3dCopyBox *)&cmd[1]; | |
286 | box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) / | |
287 | sizeof(SVGA3dCopyBox); | |
288 | ||
2ac86371 | 289 | if (cmd->dma.guest.ptr.offset % PAGE_SIZE || |
fb1d9738 JB |
290 | box->x != 0 || box->y != 0 || box->z != 0 || |
291 | box->srcx != 0 || box->srcy != 0 || box->srcz != 0 || | |
2ac86371 | 292 | box->d != 1 || box_count != 1) { |
fb1d9738 | 293 | /* TODO handle none page aligned offsets */ |
2ac86371 JB |
294 | /* TODO handle more dst & src != 0 */ |
295 | /* TODO handle more then one copy */ | |
296 | DRM_ERROR("Cant snoop dma request for cursor!\n"); | |
297 | DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n", | |
298 | box->srcx, box->srcy, box->srcz, | |
299 | box->x, box->y, box->z, | |
300 | box->w, box->h, box->d, box_count, | |
301 | cmd->dma.guest.ptr.offset); | |
fb1d9738 JB |
302 | return; |
303 | } | |
304 | ||
305 | kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT; | |
306 | kmap_num = (64*64*4) >> PAGE_SHIFT; | |
307 | ||
ee3939e0 | 308 | ret = ttm_bo_reserve(bo, true, false, false, NULL); |
fb1d9738 JB |
309 | if (unlikely(ret != 0)) { |
310 | DRM_ERROR("reserve failed\n"); | |
311 | return; | |
312 | } | |
313 | ||
314 | ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map); | |
315 | if (unlikely(ret != 0)) | |
316 | goto err_unreserve; | |
317 | ||
318 | virtual = ttm_kmap_obj_virtual(&map, &dummy); | |
319 | ||
2ac86371 JB |
320 | if (box->w == 64 && cmd->dma.guest.pitch == 64*4) { |
321 | memcpy(srf->snooper.image, virtual, 64*64*4); | |
322 | } else { | |
323 | /* Image is unsigned pointer. */ | |
324 | for (i = 0; i < box->h; i++) | |
325 | memcpy(srf->snooper.image + i * 64, | |
326 | virtual + i * cmd->dma.guest.pitch, | |
327 | box->w * 4); | |
328 | } | |
329 | ||
fb1d9738 JB |
330 | srf->snooper.age++; |
331 | ||
fb1d9738 JB |
332 | ttm_bo_kunmap(&map); |
333 | err_unreserve: | |
334 | ttm_bo_unreserve(bo); | |
335 | } | |
336 | ||
337 | void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv) | |
338 | { | |
339 | struct drm_device *dev = dev_priv->dev; | |
340 | struct vmw_display_unit *du; | |
341 | struct drm_crtc *crtc; | |
342 | ||
343 | mutex_lock(&dev->mode_config.mutex); | |
344 | ||
345 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
346 | du = vmw_crtc_to_du(crtc); | |
347 | if (!du->cursor_surface || | |
348 | du->cursor_age == du->cursor_surface->snooper.age) | |
349 | continue; | |
350 | ||
351 | du->cursor_age = du->cursor_surface->snooper.age; | |
352 | vmw_cursor_update_image(dev_priv, | |
353 | du->cursor_surface->snooper.image, | |
354 | 64, 64, du->hotspot_x, du->hotspot_y); | |
355 | } | |
356 | ||
357 | mutex_unlock(&dev->mode_config.mutex); | |
358 | } | |
359 | ||
360 | /* | |
361 | * Generic framebuffer code | |
362 | */ | |
363 | ||
fb1d9738 JB |
364 | /* |
365 | * Surface framebuffer code | |
366 | */ | |
367 | ||
847c5964 | 368 | static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer) |
fb1d9738 | 369 | { |
3a939a5e | 370 | struct vmw_framebuffer_surface *vfbs = |
fb1d9738 | 371 | vmw_framebuffer_to_vfbs(framebuffer); |
3a939a5e | 372 | |
fb1d9738 | 373 | drm_framebuffer_cleanup(framebuffer); |
3a939a5e | 374 | vmw_surface_unreference(&vfbs->surface); |
a278724a TH |
375 | if (vfbs->base.user_obj) |
376 | ttm_base_object_unref(&vfbs->base.user_obj); | |
fb1d9738 | 377 | |
3a939a5e | 378 | kfree(vfbs); |
fb1d9738 JB |
379 | } |
380 | ||
847c5964 | 381 | static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer, |
02b00162 | 382 | struct drm_file *file_priv, |
fb1d9738 JB |
383 | unsigned flags, unsigned color, |
384 | struct drm_clip_rect *clips, | |
385 | unsigned num_clips) | |
386 | { | |
387 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
388 | struct vmw_framebuffer_surface *vfbs = | |
389 | vmw_framebuffer_to_vfbs(framebuffer); | |
fb1d9738 | 390 | struct drm_clip_rect norect; |
5deb65cf | 391 | int ret, inc = 1; |
fb1d9738 | 392 | |
c8261a96 SY |
393 | /* Legacy Display Unit does not support 3D */ |
394 | if (dev_priv->active_display_unit == vmw_du_legacy) | |
01e81419 JB |
395 | return -EINVAL; |
396 | ||
73e9efd4 VS |
397 | drm_modeset_lock_all(dev_priv->dev); |
398 | ||
294adf7d | 399 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
73e9efd4 VS |
400 | if (unlikely(ret != 0)) { |
401 | drm_modeset_unlock_all(dev_priv->dev); | |
3a939a5e | 402 | return ret; |
73e9efd4 | 403 | } |
3a939a5e | 404 | |
fb1d9738 JB |
405 | if (!num_clips) { |
406 | num_clips = 1; | |
407 | clips = &norect; | |
408 | norect.x1 = norect.y1 = 0; | |
409 | norect.x2 = framebuffer->width; | |
410 | norect.y2 = framebuffer->height; | |
411 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
412 | num_clips /= 2; | |
413 | inc = 2; /* skip source rects */ | |
414 | } | |
415 | ||
c8261a96 | 416 | if (dev_priv->active_display_unit == vmw_du_screen_object) |
10b1e0ca TH |
417 | ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base, |
418 | clips, NULL, NULL, 0, 0, | |
419 | num_clips, inc, NULL); | |
35c05125 | 420 | else |
6bf6bf03 TH |
421 | ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base, |
422 | clips, NULL, NULL, 0, 0, | |
423 | num_clips, inc, NULL); | |
fb1d9738 | 424 | |
3eab3d9e | 425 | vmw_fifo_flush(dev_priv, false); |
294adf7d | 426 | ttm_read_unlock(&dev_priv->reservation_sem); |
73e9efd4 VS |
427 | |
428 | drm_modeset_unlock_all(dev_priv->dev); | |
429 | ||
fb1d9738 JB |
430 | return 0; |
431 | } | |
432 | ||
10b1e0ca TH |
433 | /** |
434 | * vmw_kms_readback - Perform a readback from the screen system to | |
435 | * a dma-buffer backed framebuffer. | |
436 | * | |
437 | * @dev_priv: Pointer to the device private structure. | |
438 | * @file_priv: Pointer to a struct drm_file identifying the caller. | |
439 | * Must be set to NULL if @user_fence_rep is NULL. | |
440 | * @vfb: Pointer to the dma-buffer backed framebuffer. | |
441 | * @user_fence_rep: User-space provided structure for fence information. | |
442 | * Must be set to non-NULL if @file_priv is non-NULL. | |
443 | * @vclips: Array of clip rects. | |
444 | * @num_clips: Number of clip rects in @vclips. | |
445 | * | |
446 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
447 | * interrupted. | |
448 | */ | |
449 | int vmw_kms_readback(struct vmw_private *dev_priv, | |
450 | struct drm_file *file_priv, | |
451 | struct vmw_framebuffer *vfb, | |
452 | struct drm_vmw_fence_rep __user *user_fence_rep, | |
453 | struct drm_vmw_rect *vclips, | |
454 | uint32_t num_clips) | |
455 | { | |
456 | switch (dev_priv->active_display_unit) { | |
457 | case vmw_du_screen_object: | |
458 | return vmw_kms_sou_readback(dev_priv, file_priv, vfb, | |
459 | user_fence_rep, vclips, num_clips); | |
6bf6bf03 TH |
460 | case vmw_du_screen_target: |
461 | return vmw_kms_stdu_dma(dev_priv, file_priv, vfb, | |
462 | user_fence_rep, NULL, vclips, num_clips, | |
463 | 1, false, true); | |
10b1e0ca TH |
464 | default: |
465 | WARN_ONCE(true, | |
466 | "Readback called with invalid display system.\n"); | |
6bf6bf03 | 467 | } |
10b1e0ca TH |
468 | |
469 | return -ENOSYS; | |
470 | } | |
471 | ||
472 | ||
fb1d9738 JB |
473 | static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = { |
474 | .destroy = vmw_framebuffer_surface_destroy, | |
475 | .dirty = vmw_framebuffer_surface_dirty, | |
fb1d9738 JB |
476 | }; |
477 | ||
d3216a0c TH |
478 | static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, |
479 | struct vmw_surface *surface, | |
480 | struct vmw_framebuffer **out, | |
481 | const struct drm_mode_fb_cmd | |
f89c6c32 SY |
482 | *mode_cmd, |
483 | bool is_dmabuf_proxy) | |
fb1d9738 JB |
484 | |
485 | { | |
486 | struct drm_device *dev = dev_priv->dev; | |
487 | struct vmw_framebuffer_surface *vfbs; | |
d3216a0c | 488 | enum SVGA3dSurfaceFormat format; |
fb1d9738 JB |
489 | int ret; |
490 | ||
c8261a96 SY |
491 | /* 3D is only supported on HWv8 and newer hosts */ |
492 | if (dev_priv->active_display_unit == vmw_du_legacy) | |
01e81419 JB |
493 | return -ENOSYS; |
494 | ||
d3216a0c TH |
495 | /* |
496 | * Sanity checks. | |
497 | */ | |
498 | ||
e7ac9211 JB |
499 | /* Surface must be marked as a scanout. */ |
500 | if (unlikely(!surface->scanout)) | |
501 | return -EINVAL; | |
502 | ||
d3216a0c TH |
503 | if (unlikely(surface->mip_levels[0] != 1 || |
504 | surface->num_sizes != 1 || | |
b360a3ce TH |
505 | surface->base_size.width < mode_cmd->width || |
506 | surface->base_size.height < mode_cmd->height || | |
507 | surface->base_size.depth != 1)) { | |
d3216a0c TH |
508 | DRM_ERROR("Incompatible surface dimensions " |
509 | "for requested mode.\n"); | |
510 | return -EINVAL; | |
511 | } | |
512 | ||
513 | switch (mode_cmd->depth) { | |
514 | case 32: | |
515 | format = SVGA3D_A8R8G8B8; | |
516 | break; | |
517 | case 24: | |
518 | format = SVGA3D_X8R8G8B8; | |
519 | break; | |
520 | case 16: | |
521 | format = SVGA3D_R5G6B5; | |
522 | break; | |
523 | case 15: | |
524 | format = SVGA3D_A1R5G5B5; | |
525 | break; | |
526 | default: | |
527 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
528 | return -EINVAL; | |
529 | } | |
530 | ||
d80efd5c TH |
531 | /* |
532 | * For DX, surface format validation is done when surface->scanout | |
533 | * is set. | |
534 | */ | |
535 | if (!dev_priv->has_dx && format != surface->format) { | |
d3216a0c TH |
536 | DRM_ERROR("Invalid surface format for requested mode.\n"); |
537 | return -EINVAL; | |
538 | } | |
539 | ||
fb1d9738 JB |
540 | vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL); |
541 | if (!vfbs) { | |
542 | ret = -ENOMEM; | |
543 | goto out_err1; | |
544 | } | |
545 | ||
fb1d9738 | 546 | /* XXX get the first 3 from the surface info */ |
d3216a0c | 547 | vfbs->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 548 | vfbs->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
549 | vfbs->base.base.depth = mode_cmd->depth; |
550 | vfbs->base.base.width = mode_cmd->width; | |
551 | vfbs->base.base.height = mode_cmd->height; | |
05c95018 | 552 | vfbs->surface = vmw_surface_reference(surface); |
90ff18bc | 553 | vfbs->base.user_handle = mode_cmd->handle; |
f89c6c32 | 554 | vfbs->is_dmabuf_proxy = is_dmabuf_proxy; |
3a939a5e | 555 | |
fb1d9738 JB |
556 | *out = &vfbs->base; |
557 | ||
80f0b5af DV |
558 | ret = drm_framebuffer_init(dev, &vfbs->base.base, |
559 | &vmw_framebuffer_surface_funcs); | |
560 | if (ret) | |
05c95018 | 561 | goto out_err2; |
80f0b5af | 562 | |
fb1d9738 JB |
563 | return 0; |
564 | ||
fb1d9738 | 565 | out_err2: |
05c95018 | 566 | vmw_surface_unreference(&surface); |
fb1d9738 JB |
567 | kfree(vfbs); |
568 | out_err1: | |
569 | return ret; | |
570 | } | |
571 | ||
572 | /* | |
573 | * Dmabuf framebuffer code | |
574 | */ | |
575 | ||
847c5964 | 576 | static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer) |
fb1d9738 JB |
577 | { |
578 | struct vmw_framebuffer_dmabuf *vfbd = | |
579 | vmw_framebuffer_to_vfbd(framebuffer); | |
580 | ||
581 | drm_framebuffer_cleanup(framebuffer); | |
582 | vmw_dmabuf_unreference(&vfbd->buffer); | |
a278724a TH |
583 | if (vfbd->base.user_obj) |
584 | ttm_base_object_unref(&vfbd->base.user_obj); | |
fb1d9738 JB |
585 | |
586 | kfree(vfbd); | |
587 | } | |
588 | ||
847c5964 | 589 | static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer, |
02b00162 | 590 | struct drm_file *file_priv, |
fb1d9738 JB |
591 | unsigned flags, unsigned color, |
592 | struct drm_clip_rect *clips, | |
593 | unsigned num_clips) | |
594 | { | |
595 | struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); | |
5deb65cf JB |
596 | struct vmw_framebuffer_dmabuf *vfbd = |
597 | vmw_framebuffer_to_vfbd(framebuffer); | |
fb1d9738 | 598 | struct drm_clip_rect norect; |
5deb65cf | 599 | int ret, increment = 1; |
fb1d9738 | 600 | |
73e9efd4 VS |
601 | drm_modeset_lock_all(dev_priv->dev); |
602 | ||
294adf7d | 603 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
73e9efd4 VS |
604 | if (unlikely(ret != 0)) { |
605 | drm_modeset_unlock_all(dev_priv->dev); | |
3a939a5e | 606 | return ret; |
73e9efd4 | 607 | } |
3a939a5e | 608 | |
df1c93ba | 609 | if (!num_clips) { |
fb1d9738 JB |
610 | num_clips = 1; |
611 | clips = &norect; | |
612 | norect.x1 = norect.y1 = 0; | |
613 | norect.x2 = framebuffer->width; | |
614 | norect.y2 = framebuffer->height; | |
615 | } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) { | |
616 | num_clips /= 2; | |
617 | increment = 2; | |
618 | } | |
619 | ||
6bf6bf03 TH |
620 | switch (dev_priv->active_display_unit) { |
621 | case vmw_du_screen_target: | |
622 | ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL, | |
623 | clips, NULL, num_clips, increment, | |
624 | true, true); | |
625 | break; | |
626 | case vmw_du_screen_object: | |
10b1e0ca | 627 | ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base, |
c8261a96 | 628 | clips, num_clips, increment, |
10b1e0ca | 629 | true, |
c8261a96 | 630 | NULL); |
6bf6bf03 | 631 | break; |
352b20dc TH |
632 | case vmw_du_legacy: |
633 | ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0, | |
634 | clips, num_clips, increment); | |
635 | break; | |
6bf6bf03 | 636 | default: |
352b20dc TH |
637 | ret = -EINVAL; |
638 | WARN_ONCE(true, "Dirty called with invalid display system.\n"); | |
6bf6bf03 | 639 | break; |
56d1c78d | 640 | } |
fb1d9738 | 641 | |
3eab3d9e | 642 | vmw_fifo_flush(dev_priv, false); |
294adf7d | 643 | ttm_read_unlock(&dev_priv->reservation_sem); |
73e9efd4 VS |
644 | |
645 | drm_modeset_unlock_all(dev_priv->dev); | |
646 | ||
5deb65cf | 647 | return ret; |
fb1d9738 JB |
648 | } |
649 | ||
650 | static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = { | |
651 | .destroy = vmw_framebuffer_dmabuf_destroy, | |
652 | .dirty = vmw_framebuffer_dmabuf_dirty, | |
fb1d9738 JB |
653 | }; |
654 | ||
497a3ff9 JB |
655 | /** |
656 | * Pin the dmabuffer to the start of vram. | |
657 | */ | |
fd006a43 | 658 | static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb) |
fb1d9738 JB |
659 | { |
660 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
fd006a43 | 661 | struct vmw_dma_buffer *buf; |
fb1d9738 JB |
662 | int ret; |
663 | ||
fd006a43 TH |
664 | buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer : |
665 | vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup; | |
fb1d9738 | 666 | |
fd006a43 TH |
667 | if (!buf) |
668 | return 0; | |
fb1d9738 | 669 | |
fd006a43 TH |
670 | switch (dev_priv->active_display_unit) { |
671 | case vmw_du_legacy: | |
672 | vmw_overlay_pause_all(dev_priv); | |
673 | ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false); | |
674 | vmw_overlay_resume_all(dev_priv); | |
675 | break; | |
676 | case vmw_du_screen_object: | |
677 | case vmw_du_screen_target: | |
678 | if (vfb->dmabuf) | |
679 | return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf, | |
680 | false); | |
fb1d9738 | 681 | |
fd006a43 TH |
682 | return vmw_dmabuf_pin_in_placement(dev_priv, buf, |
683 | &vmw_mob_placement, false); | |
684 | default: | |
685 | return -EINVAL; | |
686 | } | |
316ab13a | 687 | |
fd006a43 | 688 | return ret; |
fb1d9738 JB |
689 | } |
690 | ||
fd006a43 | 691 | static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb) |
fb1d9738 JB |
692 | { |
693 | struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); | |
fd006a43 | 694 | struct vmw_dma_buffer *buf; |
fb1d9738 | 695 | |
fd006a43 TH |
696 | buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer : |
697 | vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup; | |
fb1d9738 | 698 | |
fd006a43 | 699 | if (WARN_ON(!buf)) |
fb1d9738 | 700 | return 0; |
fb1d9738 | 701 | |
fd006a43 | 702 | return vmw_dmabuf_unpin(dev_priv, buf, false); |
fb1d9738 JB |
703 | } |
704 | ||
f89c6c32 SY |
705 | /** |
706 | * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf | |
707 | * | |
708 | * @dev: DRM device | |
709 | * @mode_cmd: parameters for the new surface | |
710 | * @dmabuf_mob: MOB backing the DMA buf | |
711 | * @srf_out: newly created surface | |
712 | * | |
713 | * When the content FB is a DMA buf, we create a surface as a proxy to the | |
714 | * same buffer. This way we can do a surface copy rather than a surface DMA. | |
715 | * This is a more efficient approach | |
716 | * | |
717 | * RETURNS: | |
718 | * 0 on success, error code otherwise | |
719 | */ | |
720 | static int vmw_create_dmabuf_proxy(struct drm_device *dev, | |
fd006a43 | 721 | const struct drm_mode_fb_cmd *mode_cmd, |
f89c6c32 SY |
722 | struct vmw_dma_buffer *dmabuf_mob, |
723 | struct vmw_surface **srf_out) | |
724 | { | |
725 | uint32_t format; | |
726 | struct drm_vmw_size content_base_size; | |
6bf6bf03 | 727 | struct vmw_resource *res; |
f89c6c32 SY |
728 | int ret; |
729 | ||
f89c6c32 SY |
730 | switch (mode_cmd->depth) { |
731 | case 32: | |
732 | case 24: | |
733 | format = SVGA3D_X8R8G8B8; | |
734 | break; | |
735 | ||
736 | case 16: | |
737 | case 15: | |
738 | format = SVGA3D_R5G6B5; | |
739 | break; | |
740 | ||
741 | case 8: | |
742 | format = SVGA3D_P8; | |
743 | break; | |
744 | ||
745 | default: | |
746 | DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth); | |
747 | return -EINVAL; | |
748 | } | |
749 | ||
750 | content_base_size.width = mode_cmd->width; | |
751 | content_base_size.height = mode_cmd->height; | |
752 | content_base_size.depth = 1; | |
753 | ||
754 | ret = vmw_surface_gb_priv_define(dev, | |
755 | 0, /* kernel visible only */ | |
756 | 0, /* flags */ | |
757 | format, | |
758 | true, /* can be a scanout buffer */ | |
759 | 1, /* num of mip levels */ | |
760 | 0, | |
d80efd5c | 761 | 0, |
f89c6c32 SY |
762 | content_base_size, |
763 | srf_out); | |
764 | if (ret) { | |
765 | DRM_ERROR("Failed to allocate proxy content buffer\n"); | |
766 | return ret; | |
fb1d9738 JB |
767 | } |
768 | ||
6bf6bf03 | 769 | res = &(*srf_out)->res; |
f89c6c32 | 770 | |
6bf6bf03 TH |
771 | /* Reserve and switch the backing mob. */ |
772 | mutex_lock(&res->dev_priv->cmdbuf_mutex); | |
773 | (void) vmw_resource_reserve(res, false, true); | |
774 | vmw_dmabuf_unreference(&res->backup); | |
775 | res->backup = vmw_dmabuf_reference(dmabuf_mob); | |
776 | res->backup_offset = 0; | |
d80efd5c | 777 | vmw_resource_unreserve(res, false, NULL, 0); |
6bf6bf03 | 778 | mutex_unlock(&res->dev_priv->cmdbuf_mutex); |
f89c6c32 | 779 | |
6bf6bf03 | 780 | return 0; |
fb1d9738 JB |
781 | } |
782 | ||
f89c6c32 SY |
783 | |
784 | ||
d3216a0c TH |
785 | static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv, |
786 | struct vmw_dma_buffer *dmabuf, | |
787 | struct vmw_framebuffer **out, | |
788 | const struct drm_mode_fb_cmd | |
789 | *mode_cmd) | |
fb1d9738 JB |
790 | |
791 | { | |
792 | struct drm_device *dev = dev_priv->dev; | |
793 | struct vmw_framebuffer_dmabuf *vfbd; | |
d3216a0c | 794 | unsigned int requested_size; |
fb1d9738 JB |
795 | int ret; |
796 | ||
d3216a0c TH |
797 | requested_size = mode_cmd->height * mode_cmd->pitch; |
798 | if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) { | |
799 | DRM_ERROR("Screen buffer object size is too small " | |
800 | "for requested mode.\n"); | |
801 | return -EINVAL; | |
802 | } | |
803 | ||
c337ada7 | 804 | /* Limited framebuffer color depth support for screen objects */ |
c8261a96 | 805 | if (dev_priv->active_display_unit == vmw_du_screen_object) { |
c337ada7 JB |
806 | switch (mode_cmd->depth) { |
807 | case 32: | |
808 | case 24: | |
809 | /* Only support 32 bpp for 32 and 24 depth fbs */ | |
810 | if (mode_cmd->bpp == 32) | |
811 | break; | |
812 | ||
813 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
814 | mode_cmd->depth, mode_cmd->bpp); | |
815 | return -EINVAL; | |
816 | case 16: | |
817 | case 15: | |
818 | /* Only support 16 bpp for 16 and 15 depth fbs */ | |
819 | if (mode_cmd->bpp == 16) | |
820 | break; | |
821 | ||
822 | DRM_ERROR("Invalid color depth/bbp: %d %d\n", | |
823 | mode_cmd->depth, mode_cmd->bpp); | |
824 | return -EINVAL; | |
825 | default: | |
826 | DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth); | |
827 | return -EINVAL; | |
828 | } | |
829 | } | |
830 | ||
fb1d9738 JB |
831 | vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL); |
832 | if (!vfbd) { | |
833 | ret = -ENOMEM; | |
834 | goto out_err1; | |
835 | } | |
836 | ||
d3216a0c | 837 | vfbd->base.base.bits_per_pixel = mode_cmd->bpp; |
01f2c773 | 838 | vfbd->base.base.pitches[0] = mode_cmd->pitch; |
d3216a0c TH |
839 | vfbd->base.base.depth = mode_cmd->depth; |
840 | vfbd->base.base.width = mode_cmd->width; | |
841 | vfbd->base.base.height = mode_cmd->height; | |
2fcd5a73 | 842 | vfbd->base.dmabuf = true; |
05c95018 | 843 | vfbd->buffer = vmw_dmabuf_reference(dmabuf); |
90ff18bc | 844 | vfbd->base.user_handle = mode_cmd->handle; |
fb1d9738 JB |
845 | *out = &vfbd->base; |
846 | ||
80f0b5af DV |
847 | ret = drm_framebuffer_init(dev, &vfbd->base.base, |
848 | &vmw_framebuffer_dmabuf_funcs); | |
849 | if (ret) | |
05c95018 | 850 | goto out_err2; |
80f0b5af | 851 | |
fb1d9738 JB |
852 | return 0; |
853 | ||
fb1d9738 | 854 | out_err2: |
05c95018 | 855 | vmw_dmabuf_unreference(&dmabuf); |
fb1d9738 JB |
856 | kfree(vfbd); |
857 | out_err1: | |
858 | return ret; | |
859 | } | |
860 | ||
fd006a43 TH |
861 | /** |
862 | * vmw_kms_new_framebuffer - Create a new framebuffer. | |
863 | * | |
864 | * @dev_priv: Pointer to device private struct. | |
865 | * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around. | |
866 | * Either @dmabuf or @surface must be NULL. | |
867 | * @surface: Pointer to a surface to wrap the kms framebuffer around. | |
868 | * Either @dmabuf or @surface must be NULL. | |
869 | * @only_2d: No presents will occur to this dma buffer based framebuffer. This | |
870 | * Helps the code to do some important optimizations. | |
871 | * @mode_cmd: Frame-buffer metadata. | |
fb1d9738 | 872 | */ |
fd006a43 TH |
873 | struct vmw_framebuffer * |
874 | vmw_kms_new_framebuffer(struct vmw_private *dev_priv, | |
875 | struct vmw_dma_buffer *dmabuf, | |
876 | struct vmw_surface *surface, | |
877 | bool only_2d, | |
878 | const struct drm_mode_fb_cmd *mode_cmd) | |
fb1d9738 | 879 | { |
fb1d9738 | 880 | struct vmw_framebuffer *vfb = NULL; |
fd006a43 | 881 | bool is_dmabuf_proxy = false; |
fb1d9738 JB |
882 | int ret; |
883 | ||
fd006a43 TH |
884 | /* |
885 | * We cannot use the SurfaceDMA command in an non-accelerated VM, | |
886 | * therefore, wrap the DMA buf in a surface so we can use the | |
887 | * SurfaceCopy command. | |
888 | */ | |
889 | if (dmabuf && only_2d && | |
890 | dev_priv->active_display_unit == vmw_du_screen_target) { | |
891 | ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd, | |
892 | dmabuf, &surface); | |
893 | if (ret) | |
894 | return ERR_PTR(ret); | |
895 | ||
896 | is_dmabuf_proxy = true; | |
897 | } | |
898 | ||
899 | /* Create the new framebuffer depending one what we have */ | |
05c95018 | 900 | if (surface) { |
fd006a43 TH |
901 | ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb, |
902 | mode_cmd, | |
903 | is_dmabuf_proxy); | |
05c95018 SY |
904 | |
905 | /* | |
906 | * vmw_create_dmabuf_proxy() adds a reference that is no longer | |
907 | * needed | |
908 | */ | |
909 | if (is_dmabuf_proxy) | |
910 | vmw_surface_unreference(&surface); | |
911 | } else if (dmabuf) { | |
fd006a43 TH |
912 | ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb, |
913 | mode_cmd); | |
05c95018 | 914 | } else { |
fd006a43 | 915 | BUG(); |
05c95018 | 916 | } |
fd006a43 TH |
917 | |
918 | if (ret) | |
919 | return ERR_PTR(ret); | |
920 | ||
921 | vfb->pin = vmw_framebuffer_pin; | |
922 | vfb->unpin = vmw_framebuffer_unpin; | |
923 | ||
924 | return vfb; | |
925 | } | |
926 | ||
fb1d9738 JB |
927 | /* |
928 | * Generic Kernel modesetting functions | |
929 | */ | |
930 | ||
931 | static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, | |
932 | struct drm_file *file_priv, | |
308e5bcb | 933 | struct drm_mode_fb_cmd2 *mode_cmd2) |
fb1d9738 JB |
934 | { |
935 | struct vmw_private *dev_priv = vmw_priv(dev); | |
936 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; | |
937 | struct vmw_framebuffer *vfb = NULL; | |
938 | struct vmw_surface *surface = NULL; | |
939 | struct vmw_dma_buffer *bo = NULL; | |
90ff18bc | 940 | struct ttm_base_object *user_obj; |
308e5bcb | 941 | struct drm_mode_fb_cmd mode_cmd; |
fb1d9738 JB |
942 | int ret; |
943 | ||
308e5bcb JB |
944 | mode_cmd.width = mode_cmd2->width; |
945 | mode_cmd.height = mode_cmd2->height; | |
946 | mode_cmd.pitch = mode_cmd2->pitches[0]; | |
947 | mode_cmd.handle = mode_cmd2->handles[0]; | |
248dbc23 | 948 | drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth, |
308e5bcb JB |
949 | &mode_cmd.bpp); |
950 | ||
d3216a0c TH |
951 | /** |
952 | * This code should be conditioned on Screen Objects not being used. | |
953 | * If screen objects are used, we can allocate a GMR to hold the | |
954 | * requested framebuffer. | |
955 | */ | |
956 | ||
8a783896 | 957 | if (!vmw_kms_validate_mode_vram(dev_priv, |
1a464cbb LT |
958 | mode_cmd.pitch, |
959 | mode_cmd.height)) { | |
c8261a96 | 960 | DRM_ERROR("Requested mode exceed bounding box limit.\n"); |
d9826409 | 961 | return ERR_PTR(-ENOMEM); |
d3216a0c TH |
962 | } |
963 | ||
90ff18bc TH |
964 | /* |
965 | * Take a reference on the user object of the resource | |
966 | * backing the kms fb. This ensures that user-space handle | |
967 | * lookups on that resource will always work as long as | |
968 | * it's registered with a kms framebuffer. This is important, | |
969 | * since vmw_execbuf_process identifies resources in the | |
970 | * command stream using user-space handles. | |
971 | */ | |
972 | ||
308e5bcb | 973 | user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle); |
90ff18bc TH |
974 | if (unlikely(user_obj == NULL)) { |
975 | DRM_ERROR("Could not locate requested kms frame buffer.\n"); | |
976 | return ERR_PTR(-ENOENT); | |
977 | } | |
978 | ||
d3216a0c TH |
979 | /** |
980 | * End conditioned code. | |
981 | */ | |
982 | ||
e7ac9211 JB |
983 | /* returns either a dmabuf or surface */ |
984 | ret = vmw_user_lookup_handle(dev_priv, tfile, | |
4cf73129 | 985 | mode_cmd.handle, |
e7ac9211 | 986 | &surface, &bo); |
fb1d9738 | 987 | if (ret) |
e7ac9211 JB |
988 | goto err_out; |
989 | ||
fd006a43 TH |
990 | vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface, |
991 | !(dev_priv->capabilities & SVGA_CAP_3D), | |
992 | &mode_cmd); | |
993 | if (IS_ERR(vfb)) { | |
994 | ret = PTR_ERR(vfb); | |
995 | goto err_out; | |
996 | } | |
e7ac9211 JB |
997 | |
998 | err_out: | |
999 | /* vmw_user_lookup_handle takes one ref so does new_fb */ | |
1000 | if (bo) | |
1001 | vmw_dmabuf_unreference(&bo); | |
1002 | if (surface) | |
1003 | vmw_surface_unreference(&surface); | |
fb1d9738 JB |
1004 | |
1005 | if (ret) { | |
1006 | DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); | |
90ff18bc | 1007 | ttm_base_object_unref(&user_obj); |
cce13ff7 | 1008 | return ERR_PTR(ret); |
90ff18bc TH |
1009 | } else |
1010 | vfb->user_obj = user_obj; | |
fb1d9738 JB |
1011 | |
1012 | return &vfb->base; | |
1013 | } | |
1014 | ||
e6ecefaa | 1015 | static const struct drm_mode_config_funcs vmw_kms_funcs = { |
fb1d9738 | 1016 | .fb_create = vmw_kms_fb_create, |
fb1d9738 JB |
1017 | }; |
1018 | ||
b9eb1a61 TH |
1019 | static int vmw_kms_generic_present(struct vmw_private *dev_priv, |
1020 | struct drm_file *file_priv, | |
1021 | struct vmw_framebuffer *vfb, | |
1022 | struct vmw_surface *surface, | |
1023 | uint32_t sid, | |
1024 | int32_t destX, int32_t destY, | |
1025 | struct drm_vmw_rect *clips, | |
1026 | uint32_t num_clips) | |
2fcd5a73 | 1027 | { |
10b1e0ca TH |
1028 | return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips, |
1029 | &surface->res, destX, destY, | |
1030 | num_clips, 1, NULL); | |
2fcd5a73 JB |
1031 | } |
1032 | ||
6bf6bf03 | 1033 | |
2fcd5a73 JB |
1034 | int vmw_kms_present(struct vmw_private *dev_priv, |
1035 | struct drm_file *file_priv, | |
1036 | struct vmw_framebuffer *vfb, | |
1037 | struct vmw_surface *surface, | |
1038 | uint32_t sid, | |
1039 | int32_t destX, int32_t destY, | |
1040 | struct drm_vmw_rect *clips, | |
1041 | uint32_t num_clips) | |
1042 | { | |
35c05125 | 1043 | int ret; |
2fcd5a73 | 1044 | |
6bf6bf03 TH |
1045 | switch (dev_priv->active_display_unit) { |
1046 | case vmw_du_screen_target: | |
1047 | ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips, | |
1048 | &surface->res, destX, destY, | |
1049 | num_clips, 1, NULL); | |
1050 | break; | |
1051 | case vmw_du_screen_object: | |
1052 | ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface, | |
1053 | sid, destX, destY, clips, | |
1054 | num_clips); | |
1055 | break; | |
1056 | default: | |
1057 | WARN_ONCE(true, | |
1058 | "Present called with invalid display system.\n"); | |
1059 | ret = -ENOSYS; | |
1060 | break; | |
2fcd5a73 | 1061 | } |
35c05125 SY |
1062 | if (ret) |
1063 | return ret; | |
2fcd5a73 | 1064 | |
35c05125 | 1065 | vmw_fifo_flush(dev_priv, false); |
2fcd5a73 | 1066 | |
35c05125 | 1067 | return 0; |
2fcd5a73 JB |
1068 | } |
1069 | ||
fb1d9738 JB |
1070 | int vmw_kms_init(struct vmw_private *dev_priv) |
1071 | { | |
1072 | struct drm_device *dev = dev_priv->dev; | |
1073 | int ret; | |
1074 | ||
1075 | drm_mode_config_init(dev); | |
1076 | dev->mode_config.funcs = &vmw_kms_funcs; | |
3bef3572 JB |
1077 | dev->mode_config.min_width = 1; |
1078 | dev->mode_config.min_height = 1; | |
65ade7d3 SY |
1079 | dev->mode_config.max_width = dev_priv->texture_max_width; |
1080 | dev->mode_config.max_height = dev_priv->texture_max_height; | |
fb1d9738 | 1081 | |
35c05125 SY |
1082 | ret = vmw_kms_stdu_init_display(dev_priv); |
1083 | if (ret) { | |
1084 | ret = vmw_kms_sou_init_display(dev_priv); | |
1085 | if (ret) /* Fallback */ | |
1086 | ret = vmw_kms_ldu_init_display(dev_priv); | |
1087 | } | |
fb1d9738 | 1088 | |
c8261a96 | 1089 | return ret; |
fb1d9738 JB |
1090 | } |
1091 | ||
1092 | int vmw_kms_close(struct vmw_private *dev_priv) | |
1093 | { | |
c8261a96 SY |
1094 | int ret; |
1095 | ||
fb1d9738 JB |
1096 | /* |
1097 | * Docs says we should take the lock before calling this function | |
1098 | * but since it destroys encoders and our destructor calls | |
1099 | * drm_encoder_cleanup which takes the lock we deadlock. | |
1100 | */ | |
1101 | drm_mode_config_cleanup(dev_priv->dev); | |
c8261a96 SY |
1102 | if (dev_priv->active_display_unit == vmw_du_screen_object) |
1103 | ret = vmw_kms_sou_close_display(dev_priv); | |
35c05125 SY |
1104 | else if (dev_priv->active_display_unit == vmw_du_screen_target) |
1105 | ret = vmw_kms_stdu_close_display(dev_priv); | |
c0d18316 | 1106 | else |
c8261a96 SY |
1107 | ret = vmw_kms_ldu_close_display(dev_priv); |
1108 | ||
1109 | return ret; | |
fb1d9738 JB |
1110 | } |
1111 | ||
1112 | int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data, | |
1113 | struct drm_file *file_priv) | |
1114 | { | |
1115 | struct drm_vmw_cursor_bypass_arg *arg = data; | |
1116 | struct vmw_display_unit *du; | |
fb1d9738 JB |
1117 | struct drm_crtc *crtc; |
1118 | int ret = 0; | |
1119 | ||
1120 | ||
1121 | mutex_lock(&dev->mode_config.mutex); | |
1122 | if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) { | |
1123 | ||
1124 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
1125 | du = vmw_crtc_to_du(crtc); | |
1126 | du->hotspot_x = arg->xhot; | |
1127 | du->hotspot_y = arg->yhot; | |
1128 | } | |
1129 | ||
1130 | mutex_unlock(&dev->mode_config.mutex); | |
1131 | return 0; | |
1132 | } | |
1133 | ||
a4cd5d68 RC |
1134 | crtc = drm_crtc_find(dev, arg->crtc_id); |
1135 | if (!crtc) { | |
4ae87ff0 | 1136 | ret = -ENOENT; |
fb1d9738 JB |
1137 | goto out; |
1138 | } | |
1139 | ||
fb1d9738 JB |
1140 | du = vmw_crtc_to_du(crtc); |
1141 | ||
1142 | du->hotspot_x = arg->xhot; | |
1143 | du->hotspot_y = arg->yhot; | |
1144 | ||
1145 | out: | |
1146 | mutex_unlock(&dev->mode_config.mutex); | |
1147 | ||
1148 | return ret; | |
1149 | } | |
1150 | ||
0bef23f9 | 1151 | int vmw_kms_write_svga(struct vmw_private *vmw_priv, |
d7e1958d | 1152 | unsigned width, unsigned height, unsigned pitch, |
6558429b | 1153 | unsigned bpp, unsigned depth) |
fb1d9738 | 1154 | { |
d7e1958d JB |
1155 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1156 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch); | |
1157 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
b76ff5ea TH |
1158 | vmw_mmio_write(pitch, vmw_priv->mmio_virt + |
1159 | SVGA_FIFO_PITCHLOCK); | |
d7e1958d JB |
1160 | vmw_write(vmw_priv, SVGA_REG_WIDTH, width); |
1161 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, height); | |
6558429b | 1162 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp); |
0bef23f9 MD |
1163 | |
1164 | if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) { | |
1165 | DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n", | |
1166 | depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH)); | |
1167 | return -EINVAL; | |
1168 | } | |
1169 | ||
1170 | return 0; | |
d7e1958d | 1171 | } |
fb1d9738 | 1172 | |
d7e1958d JB |
1173 | int vmw_kms_save_vga(struct vmw_private *vmw_priv) |
1174 | { | |
7c4f7780 TH |
1175 | struct vmw_vga_topology_state *save; |
1176 | uint32_t i; | |
1177 | ||
fb1d9738 JB |
1178 | vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH); |
1179 | vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT); | |
7c4f7780 | 1180 | vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL); |
d7e1958d JB |
1181 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1182 | vmw_priv->vga_pitchlock = | |
7c4f7780 | 1183 | vmw_read(vmw_priv, SVGA_REG_PITCHLOCK); |
d7e1958d | 1184 | else if (vmw_fifo_have_pitchlock(vmw_priv)) |
b76ff5ea TH |
1185 | vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt + |
1186 | SVGA_FIFO_PITCHLOCK); | |
7c4f7780 TH |
1187 | |
1188 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) | |
1189 | return 0; | |
fb1d9738 | 1190 | |
7c4f7780 TH |
1191 | vmw_priv->num_displays = vmw_read(vmw_priv, |
1192 | SVGA_REG_NUM_GUEST_DISPLAYS); | |
1193 | ||
029e50bf TH |
1194 | if (vmw_priv->num_displays == 0) |
1195 | vmw_priv->num_displays = 1; | |
1196 | ||
7c4f7780 TH |
1197 | for (i = 0; i < vmw_priv->num_displays; ++i) { |
1198 | save = &vmw_priv->vga_save[i]; | |
1199 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1200 | save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY); | |
1201 | save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X); | |
1202 | save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y); | |
1203 | save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH); | |
1204 | save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT); | |
1205 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
30c78bb8 TH |
1206 | if (i == 0 && vmw_priv->num_displays == 1 && |
1207 | save->width == 0 && save->height == 0) { | |
1208 | ||
1209 | /* | |
1210 | * It should be fairly safe to assume that these | |
1211 | * values are uninitialized. | |
1212 | */ | |
1213 | ||
1214 | save->width = vmw_priv->vga_width - save->pos_x; | |
1215 | save->height = vmw_priv->vga_height - save->pos_y; | |
1216 | } | |
7c4f7780 | 1217 | } |
30c78bb8 | 1218 | |
fb1d9738 JB |
1219 | return 0; |
1220 | } | |
1221 | ||
1222 | int vmw_kms_restore_vga(struct vmw_private *vmw_priv) | |
1223 | { | |
7c4f7780 TH |
1224 | struct vmw_vga_topology_state *save; |
1225 | uint32_t i; | |
1226 | ||
fb1d9738 JB |
1227 | vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width); |
1228 | vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height); | |
7c4f7780 | 1229 | vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp); |
d7e1958d JB |
1230 | if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK) |
1231 | vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, | |
1232 | vmw_priv->vga_pitchlock); | |
1233 | else if (vmw_fifo_have_pitchlock(vmw_priv)) | |
b76ff5ea TH |
1234 | vmw_mmio_write(vmw_priv->vga_pitchlock, |
1235 | vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK); | |
fb1d9738 | 1236 | |
7c4f7780 TH |
1237 | if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) |
1238 | return 0; | |
1239 | ||
1240 | for (i = 0; i < vmw_priv->num_displays; ++i) { | |
1241 | save = &vmw_priv->vga_save[i]; | |
1242 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i); | |
1243 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary); | |
1244 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x); | |
1245 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y); | |
1246 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width); | |
1247 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height); | |
1248 | vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID); | |
1249 | } | |
1250 | ||
fb1d9738 JB |
1251 | return 0; |
1252 | } | |
d8bd19d2 | 1253 | |
e133e737 TH |
1254 | bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv, |
1255 | uint32_t pitch, | |
1256 | uint32_t height) | |
1257 | { | |
35c05125 SY |
1258 | return ((u64) pitch * (u64) height) < (u64) |
1259 | ((dev_priv->active_display_unit == vmw_du_screen_target) ? | |
1260 | dev_priv->prim_bb_mem : dev_priv->vram_size); | |
e133e737 TH |
1261 | } |
1262 | ||
1c482ab3 JB |
1263 | |
1264 | /** | |
1265 | * Function called by DRM code called with vbl_lock held. | |
1266 | */ | |
88e72717 | 1267 | u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe) |
7a1c2f6c TH |
1268 | { |
1269 | return 0; | |
1270 | } | |
626ab771 | 1271 | |
1c482ab3 JB |
1272 | /** |
1273 | * Function called by DRM code called with vbl_lock held. | |
1274 | */ | |
88e72717 | 1275 | int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe) |
1c482ab3 JB |
1276 | { |
1277 | return -ENOSYS; | |
1278 | } | |
1279 | ||
1280 | /** | |
1281 | * Function called by DRM code called with vbl_lock held. | |
1282 | */ | |
88e72717 | 1283 | void vmw_disable_vblank(struct drm_device *dev, unsigned int pipe) |
1c482ab3 JB |
1284 | { |
1285 | } | |
1286 | ||
626ab771 JB |
1287 | |
1288 | /* | |
1289 | * Small shared kms functions. | |
1290 | */ | |
1291 | ||
847c5964 | 1292 | static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num, |
626ab771 JB |
1293 | struct drm_vmw_rect *rects) |
1294 | { | |
1295 | struct drm_device *dev = dev_priv->dev; | |
1296 | struct vmw_display_unit *du; | |
1297 | struct drm_connector *con; | |
626ab771 JB |
1298 | |
1299 | mutex_lock(&dev->mode_config.mutex); | |
1300 | ||
1301 | #if 0 | |
6ea77d13 TH |
1302 | { |
1303 | unsigned int i; | |
1304 | ||
1305 | DRM_INFO("%s: new layout ", __func__); | |
1306 | for (i = 0; i < num; i++) | |
1307 | DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y, | |
1308 | rects[i].w, rects[i].h); | |
1309 | DRM_INFO("\n"); | |
1310 | } | |
626ab771 JB |
1311 | #endif |
1312 | ||
1313 | list_for_each_entry(con, &dev->mode_config.connector_list, head) { | |
1314 | du = vmw_connector_to_du(con); | |
1315 | if (num > du->unit) { | |
1316 | du->pref_width = rects[du->unit].w; | |
1317 | du->pref_height = rects[du->unit].h; | |
1318 | du->pref_active = true; | |
cd2b89e7 TH |
1319 | du->gui_x = rects[du->unit].x; |
1320 | du->gui_y = rects[du->unit].y; | |
626ab771 JB |
1321 | } else { |
1322 | du->pref_width = 800; | |
1323 | du->pref_height = 600; | |
1324 | du->pref_active = false; | |
1325 | } | |
1326 | con->status = vmw_du_connector_detect(con, true); | |
1327 | } | |
1328 | ||
1329 | mutex_unlock(&dev->mode_config.mutex); | |
1330 | ||
1331 | return 0; | |
1332 | } | |
1333 | ||
1334 | void vmw_du_crtc_save(struct drm_crtc *crtc) | |
1335 | { | |
1336 | } | |
1337 | ||
1338 | void vmw_du_crtc_restore(struct drm_crtc *crtc) | |
1339 | { | |
1340 | } | |
1341 | ||
1342 | void vmw_du_crtc_gamma_set(struct drm_crtc *crtc, | |
1343 | u16 *r, u16 *g, u16 *b, | |
1344 | uint32_t start, uint32_t size) | |
1345 | { | |
1346 | struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
1347 | int i; | |
1348 | ||
1349 | for (i = 0; i < size; i++) { | |
1350 | DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i, | |
1351 | r[i], g[i], b[i]); | |
1352 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8); | |
1353 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8); | |
1354 | vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8); | |
1355 | } | |
1356 | } | |
1357 | ||
9a69a9ac | 1358 | int vmw_du_connector_dpms(struct drm_connector *connector, int mode) |
626ab771 | 1359 | { |
9a69a9ac | 1360 | return 0; |
626ab771 JB |
1361 | } |
1362 | ||
1363 | void vmw_du_connector_save(struct drm_connector *connector) | |
1364 | { | |
1365 | } | |
1366 | ||
1367 | void vmw_du_connector_restore(struct drm_connector *connector) | |
1368 | { | |
1369 | } | |
1370 | ||
1371 | enum drm_connector_status | |
1372 | vmw_du_connector_detect(struct drm_connector *connector, bool force) | |
1373 | { | |
1374 | uint32_t num_displays; | |
1375 | struct drm_device *dev = connector->dev; | |
1376 | struct vmw_private *dev_priv = vmw_priv(dev); | |
cd2b89e7 | 1377 | struct vmw_display_unit *du = vmw_connector_to_du(connector); |
626ab771 | 1378 | |
626ab771 | 1379 | num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS); |
626ab771 | 1380 | |
cd2b89e7 TH |
1381 | return ((vmw_connector_to_du(connector)->unit < num_displays && |
1382 | du->pref_active) ? | |
626ab771 JB |
1383 | connector_status_connected : connector_status_disconnected); |
1384 | } | |
1385 | ||
1386 | static struct drm_display_mode vmw_kms_connector_builtin[] = { | |
1387 | /* 640x480@60Hz */ | |
1388 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, | |
1389 | 752, 800, 0, 480, 489, 492, 525, 0, | |
1390 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1391 | /* 800x600@60Hz */ | |
1392 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, | |
1393 | 968, 1056, 0, 600, 601, 605, 628, 0, | |
1394 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1395 | /* 1024x768@60Hz */ | |
1396 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, | |
1397 | 1184, 1344, 0, 768, 771, 777, 806, 0, | |
1398 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1399 | /* 1152x864@75Hz */ | |
1400 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, | |
1401 | 1344, 1600, 0, 864, 865, 868, 900, 0, | |
1402 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1403 | /* 1280x768@60Hz */ | |
1404 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, | |
1405 | 1472, 1664, 0, 768, 771, 778, 798, 0, | |
1406 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1407 | /* 1280x800@60Hz */ | |
1408 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, | |
1409 | 1480, 1680, 0, 800, 803, 809, 831, 0, | |
1410 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, | |
1411 | /* 1280x960@60Hz */ | |
1412 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, | |
1413 | 1488, 1800, 0, 960, 961, 964, 1000, 0, | |
1414 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1415 | /* 1280x1024@60Hz */ | |
1416 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, | |
1417 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, | |
1418 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1419 | /* 1360x768@60Hz */ | |
1420 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, | |
1421 | 1536, 1792, 0, 768, 771, 777, 795, 0, | |
1422 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1423 | /* 1440x1050@60Hz */ | |
1424 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, | |
1425 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, | |
1426 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1427 | /* 1440x900@60Hz */ | |
1428 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, | |
1429 | 1672, 1904, 0, 900, 903, 909, 934, 0, | |
1430 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1431 | /* 1600x1200@60Hz */ | |
1432 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, | |
1433 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, | |
1434 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1435 | /* 1680x1050@60Hz */ | |
1436 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, | |
1437 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, | |
1438 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1439 | /* 1792x1344@60Hz */ | |
1440 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, | |
1441 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, | |
1442 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1443 | /* 1853x1392@60Hz */ | |
1444 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, | |
1445 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, | |
1446 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1447 | /* 1920x1200@60Hz */ | |
1448 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, | |
1449 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, | |
1450 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1451 | /* 1920x1440@60Hz */ | |
1452 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, | |
1453 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, | |
1454 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1455 | /* 2560x1600@60Hz */ | |
1456 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, | |
1457 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, | |
1458 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, | |
1459 | /* Terminate */ | |
1460 | { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) }, | |
1461 | }; | |
1462 | ||
1543b4dd TH |
1463 | /** |
1464 | * vmw_guess_mode_timing - Provide fake timings for a | |
1465 | * 60Hz vrefresh mode. | |
1466 | * | |
1467 | * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay | |
1468 | * members filled in. | |
1469 | */ | |
a278724a | 1470 | void vmw_guess_mode_timing(struct drm_display_mode *mode) |
1543b4dd TH |
1471 | { |
1472 | mode->hsync_start = mode->hdisplay + 50; | |
1473 | mode->hsync_end = mode->hsync_start + 50; | |
1474 | mode->htotal = mode->hsync_end + 50; | |
1475 | ||
1476 | mode->vsync_start = mode->vdisplay + 50; | |
1477 | mode->vsync_end = mode->vsync_start + 50; | |
1478 | mode->vtotal = mode->vsync_end + 50; | |
1479 | ||
1480 | mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; | |
1481 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1482 | } | |
1483 | ||
1484 | ||
626ab771 JB |
1485 | int vmw_du_connector_fill_modes(struct drm_connector *connector, |
1486 | uint32_t max_width, uint32_t max_height) | |
1487 | { | |
1488 | struct vmw_display_unit *du = vmw_connector_to_du(connector); | |
1489 | struct drm_device *dev = connector->dev; | |
1490 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1491 | struct drm_display_mode *mode = NULL; | |
1492 | struct drm_display_mode *bmode; | |
1493 | struct drm_display_mode prefmode = { DRM_MODE("preferred", | |
1494 | DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, | |
1495 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | |
1496 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) | |
1497 | }; | |
1498 | int i; | |
9a72384d SY |
1499 | u32 assumed_bpp = 2; |
1500 | ||
1501 | /* | |
1502 | * If using screen objects, then assume 32-bpp because that's what the | |
1503 | * SVGA device is assuming | |
1504 | */ | |
c8261a96 | 1505 | if (dev_priv->active_display_unit == vmw_du_screen_object) |
9a72384d | 1506 | assumed_bpp = 4; |
626ab771 | 1507 | |
35c05125 SY |
1508 | if (dev_priv->active_display_unit == vmw_du_screen_target) { |
1509 | max_width = min(max_width, dev_priv->stdu_max_width); | |
1510 | max_height = min(max_height, dev_priv->stdu_max_height); | |
1511 | } | |
1512 | ||
626ab771 | 1513 | /* Add preferred mode */ |
c8261a96 SY |
1514 | mode = drm_mode_duplicate(dev, &prefmode); |
1515 | if (!mode) | |
1516 | return 0; | |
1517 | mode->hdisplay = du->pref_width; | |
1518 | mode->vdisplay = du->pref_height; | |
1519 | vmw_guess_mode_timing(mode); | |
626ab771 | 1520 | |
c8261a96 SY |
1521 | if (vmw_kms_validate_mode_vram(dev_priv, |
1522 | mode->hdisplay * assumed_bpp, | |
1523 | mode->vdisplay)) { | |
1524 | drm_mode_probed_add(connector, mode); | |
1525 | } else { | |
1526 | drm_mode_destroy(dev, mode); | |
1527 | mode = NULL; | |
1528 | } | |
55bde5b2 | 1529 | |
c8261a96 SY |
1530 | if (du->pref_mode) { |
1531 | list_del_init(&du->pref_mode->head); | |
1532 | drm_mode_destroy(dev, du->pref_mode); | |
626ab771 JB |
1533 | } |
1534 | ||
c8261a96 SY |
1535 | /* mode might be null here, this is intended */ |
1536 | du->pref_mode = mode; | |
1537 | ||
626ab771 JB |
1538 | for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) { |
1539 | bmode = &vmw_kms_connector_builtin[i]; | |
1540 | if (bmode->hdisplay > max_width || | |
1541 | bmode->vdisplay > max_height) | |
1542 | continue; | |
1543 | ||
9a72384d SY |
1544 | if (!vmw_kms_validate_mode_vram(dev_priv, |
1545 | bmode->hdisplay * assumed_bpp, | |
626ab771 JB |
1546 | bmode->vdisplay)) |
1547 | continue; | |
1548 | ||
1549 | mode = drm_mode_duplicate(dev, bmode); | |
1550 | if (!mode) | |
1551 | return 0; | |
1552 | mode->vrefresh = drm_mode_vrefresh(mode); | |
1553 | ||
1554 | drm_mode_probed_add(connector, mode); | |
1555 | } | |
1556 | ||
b87577b7 | 1557 | drm_mode_connector_list_update(connector, true); |
f6b05004 TH |
1558 | /* Move the prefered mode first, help apps pick the right mode. */ |
1559 | drm_mode_sort(&connector->modes); | |
626ab771 JB |
1560 | |
1561 | return 1; | |
1562 | } | |
1563 | ||
1564 | int vmw_du_connector_set_property(struct drm_connector *connector, | |
1565 | struct drm_property *property, | |
1566 | uint64_t val) | |
1567 | { | |
1568 | return 0; | |
1569 | } | |
cd2b89e7 TH |
1570 | |
1571 | ||
1572 | int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data, | |
1573 | struct drm_file *file_priv) | |
1574 | { | |
1575 | struct vmw_private *dev_priv = vmw_priv(dev); | |
1576 | struct drm_vmw_update_layout_arg *arg = | |
1577 | (struct drm_vmw_update_layout_arg *)data; | |
cd2b89e7 TH |
1578 | void __user *user_rects; |
1579 | struct drm_vmw_rect *rects; | |
1580 | unsigned rects_size; | |
1581 | int ret; | |
1582 | int i; | |
65ade7d3 | 1583 | u64 total_pixels = 0; |
cd2b89e7 | 1584 | struct drm_mode_config *mode_config = &dev->mode_config; |
c8261a96 | 1585 | struct drm_vmw_rect bounding_box = {0}; |
cd2b89e7 | 1586 | |
cd2b89e7 TH |
1587 | if (!arg->num_outputs) { |
1588 | struct drm_vmw_rect def_rect = {0, 0, 800, 600}; | |
1589 | vmw_du_update_layout(dev_priv, 1, &def_rect); | |
5151adb3 | 1590 | return 0; |
cd2b89e7 TH |
1591 | } |
1592 | ||
1593 | rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); | |
bab9efc2 XW |
1594 | rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), |
1595 | GFP_KERNEL); | |
5151adb3 TH |
1596 | if (unlikely(!rects)) |
1597 | return -ENOMEM; | |
cd2b89e7 TH |
1598 | |
1599 | user_rects = (void __user *)(unsigned long)arg->rects; | |
1600 | ret = copy_from_user(rects, user_rects, rects_size); | |
1601 | if (unlikely(ret != 0)) { | |
1602 | DRM_ERROR("Failed to get rects.\n"); | |
1603 | ret = -EFAULT; | |
1604 | goto out_free; | |
1605 | } | |
1606 | ||
1607 | for (i = 0; i < arg->num_outputs; ++i) { | |
bab9efc2 XW |
1608 | if (rects[i].x < 0 || |
1609 | rects[i].y < 0 || | |
1610 | rects[i].x + rects[i].w > mode_config->max_width || | |
1611 | rects[i].y + rects[i].h > mode_config->max_height) { | |
cd2b89e7 TH |
1612 | DRM_ERROR("Invalid GUI layout.\n"); |
1613 | ret = -EINVAL; | |
1614 | goto out_free; | |
1615 | } | |
c8261a96 SY |
1616 | |
1617 | /* | |
1618 | * bounding_box.w and bunding_box.h are used as | |
1619 | * lower-right coordinates | |
1620 | */ | |
1621 | if (rects[i].x + rects[i].w > bounding_box.w) | |
1622 | bounding_box.w = rects[i].x + rects[i].w; | |
1623 | ||
1624 | if (rects[i].y + rects[i].h > bounding_box.h) | |
1625 | bounding_box.h = rects[i].y + rects[i].h; | |
65ade7d3 SY |
1626 | |
1627 | total_pixels += (u64) rects[i].w * (u64) rects[i].h; | |
cd2b89e7 TH |
1628 | } |
1629 | ||
65ade7d3 SY |
1630 | if (dev_priv->active_display_unit == vmw_du_screen_target) { |
1631 | /* | |
1632 | * For Screen Targets, the limits for a toplogy are: | |
1633 | * 1. Bounding box (assuming 32bpp) must be < prim_bb_mem | |
1634 | * 2. Total pixels (assuming 32bpp) must be < prim_bb_mem | |
1635 | */ | |
1636 | u64 bb_mem = bounding_box.w * bounding_box.h * 4; | |
1637 | u64 pixel_mem = total_pixels * 4; | |
1638 | ||
1639 | if (bb_mem > dev_priv->prim_bb_mem) { | |
1640 | DRM_ERROR("Topology is beyond supported limits.\n"); | |
35c05125 SY |
1641 | ret = -EINVAL; |
1642 | goto out_free; | |
1643 | } | |
1644 | ||
65ade7d3 SY |
1645 | if (pixel_mem > dev_priv->prim_bb_mem) { |
1646 | DRM_ERROR("Combined output size too large\n"); | |
1647 | ret = -EINVAL; | |
1648 | goto out_free; | |
1649 | } | |
cd2b89e7 TH |
1650 | } |
1651 | ||
1652 | vmw_du_update_layout(dev_priv, arg->num_outputs, rects); | |
1653 | ||
1654 | out_free: | |
1655 | kfree(rects); | |
cd2b89e7 TH |
1656 | return ret; |
1657 | } | |
1a4b172a TH |
1658 | |
1659 | /** | |
1660 | * vmw_kms_helper_dirty - Helper to build commands and perform actions based | |
1661 | * on a set of cliprects and a set of display units. | |
1662 | * | |
1663 | * @dev_priv: Pointer to a device private structure. | |
1664 | * @framebuffer: Pointer to the framebuffer on which to perform the actions. | |
1665 | * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL. | |
1666 | * Cliprects are given in framebuffer coordinates. | |
1667 | * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must | |
1668 | * be NULL. Cliprects are given in source coordinates. | |
1669 | * @dest_x: X coordinate offset for the crtc / destination clip rects. | |
1670 | * @dest_y: Y coordinate offset for the crtc / destination clip rects. | |
1671 | * @num_clips: Number of cliprects in the @clips or @vclips array. | |
1672 | * @increment: Integer with which to increment the clip counter when looping. | |
1673 | * Used to skip a predetermined number of clip rects. | |
1674 | * @dirty: Closure structure. See the description of struct vmw_kms_dirty. | |
1675 | */ | |
1676 | int vmw_kms_helper_dirty(struct vmw_private *dev_priv, | |
1677 | struct vmw_framebuffer *framebuffer, | |
1678 | const struct drm_clip_rect *clips, | |
1679 | const struct drm_vmw_rect *vclips, | |
1680 | s32 dest_x, s32 dest_y, | |
1681 | int num_clips, | |
1682 | int increment, | |
1683 | struct vmw_kms_dirty *dirty) | |
1684 | { | |
1685 | struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; | |
1686 | struct drm_crtc *crtc; | |
1687 | u32 num_units = 0; | |
1688 | u32 i, k; | |
1a4b172a TH |
1689 | |
1690 | dirty->dev_priv = dev_priv; | |
1691 | ||
1692 | list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { | |
1693 | if (crtc->primary->fb != &framebuffer->base) | |
1694 | continue; | |
1695 | units[num_units++] = vmw_crtc_to_du(crtc); | |
1696 | } | |
1697 | ||
1698 | for (k = 0; k < num_units; k++) { | |
1699 | struct vmw_display_unit *unit = units[k]; | |
1700 | s32 crtc_x = unit->crtc.x; | |
1701 | s32 crtc_y = unit->crtc.y; | |
1702 | s32 crtc_width = unit->crtc.mode.hdisplay; | |
1703 | s32 crtc_height = unit->crtc.mode.vdisplay; | |
1704 | const struct drm_clip_rect *clips_ptr = clips; | |
1705 | const struct drm_vmw_rect *vclips_ptr = vclips; | |
1706 | ||
1707 | dirty->unit = unit; | |
1708 | if (dirty->fifo_reserve_size > 0) { | |
1709 | dirty->cmd = vmw_fifo_reserve(dev_priv, | |
1710 | dirty->fifo_reserve_size); | |
1711 | if (!dirty->cmd) { | |
1712 | DRM_ERROR("Couldn't reserve fifo space " | |
1713 | "for dirty blits.\n"); | |
f3b8c0ca | 1714 | return -ENOMEM; |
1a4b172a TH |
1715 | } |
1716 | memset(dirty->cmd, 0, dirty->fifo_reserve_size); | |
1717 | } | |
1718 | dirty->num_hits = 0; | |
1719 | for (i = 0; i < num_clips; i++, clips_ptr += increment, | |
1720 | vclips_ptr += increment) { | |
1721 | s32 clip_left; | |
1722 | s32 clip_top; | |
1723 | ||
1724 | /* | |
1725 | * Select clip array type. Note that integer type | |
1726 | * in @clips is unsigned short, whereas in @vclips | |
1727 | * it's 32-bit. | |
1728 | */ | |
1729 | if (clips) { | |
1730 | dirty->fb_x = (s32) clips_ptr->x1; | |
1731 | dirty->fb_y = (s32) clips_ptr->y1; | |
1732 | dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x - | |
1733 | crtc_x; | |
1734 | dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y - | |
1735 | crtc_y; | |
1736 | } else { | |
1737 | dirty->fb_x = vclips_ptr->x; | |
1738 | dirty->fb_y = vclips_ptr->y; | |
1739 | dirty->unit_x2 = dirty->fb_x + vclips_ptr->w + | |
1740 | dest_x - crtc_x; | |
1741 | dirty->unit_y2 = dirty->fb_y + vclips_ptr->h + | |
1742 | dest_y - crtc_y; | |
1743 | } | |
1744 | ||
1745 | dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x; | |
1746 | dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y; | |
1747 | ||
1748 | /* Skip this clip if it's outside the crtc region */ | |
1749 | if (dirty->unit_x1 >= crtc_width || | |
1750 | dirty->unit_y1 >= crtc_height || | |
1751 | dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0) | |
1752 | continue; | |
1753 | ||
1754 | /* Clip right and bottom to crtc limits */ | |
1755 | dirty->unit_x2 = min_t(s32, dirty->unit_x2, | |
1756 | crtc_width); | |
1757 | dirty->unit_y2 = min_t(s32, dirty->unit_y2, | |
1758 | crtc_height); | |
1759 | ||
1760 | /* Clip left and top to crtc limits */ | |
1761 | clip_left = min_t(s32, dirty->unit_x1, 0); | |
1762 | clip_top = min_t(s32, dirty->unit_y1, 0); | |
1763 | dirty->unit_x1 -= clip_left; | |
1764 | dirty->unit_y1 -= clip_top; | |
1765 | dirty->fb_x -= clip_left; | |
1766 | dirty->fb_y -= clip_top; | |
1767 | ||
1768 | dirty->clip(dirty); | |
1769 | } | |
1770 | ||
1771 | dirty->fifo_commit(dirty); | |
1772 | } | |
1773 | ||
1774 | return 0; | |
1775 | } | |
1776 | ||
1777 | /** | |
1778 | * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before | |
1779 | * command submission. | |
1780 | * | |
1781 | * @dev_priv. Pointer to a device private structure. | |
1782 | * @buf: The buffer object | |
1783 | * @interruptible: Whether to perform waits as interruptible. | |
1784 | * @validate_as_mob: Whether the buffer should be validated as a MOB. If false, | |
1785 | * The buffer will be validated as a GMR. Already pinned buffers will not be | |
1786 | * validated. | |
1787 | * | |
1788 | * Returns 0 on success, negative error code on failure, -ERESTARTSYS if | |
1789 | * interrupted by a signal. | |
1790 | */ | |
1791 | int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv, | |
1792 | struct vmw_dma_buffer *buf, | |
1793 | bool interruptible, | |
1794 | bool validate_as_mob) | |
1795 | { | |
1796 | struct ttm_buffer_object *bo = &buf->base; | |
1797 | int ret; | |
1798 | ||
b9eb1a61 | 1799 | ttm_bo_reserve(bo, false, false, interruptible, NULL); |
1a4b172a TH |
1800 | ret = vmw_validate_single_buffer(dev_priv, bo, interruptible, |
1801 | validate_as_mob); | |
1802 | if (ret) | |
1803 | ttm_bo_unreserve(bo); | |
1804 | ||
1805 | return ret; | |
1806 | } | |
1807 | ||
1808 | /** | |
1809 | * vmw_kms_helper_buffer_revert - Undo the actions of | |
1810 | * vmw_kms_helper_buffer_prepare. | |
1811 | * | |
1812 | * @res: Pointer to the buffer object. | |
1813 | * | |
1814 | * Helper to be used if an error forces the caller to undo the actions of | |
1815 | * vmw_kms_helper_buffer_prepare. | |
1816 | */ | |
1817 | void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf) | |
1818 | { | |
1819 | if (buf) | |
1820 | ttm_bo_unreserve(&buf->base); | |
1821 | } | |
1822 | ||
1823 | /** | |
1824 | * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after | |
1825 | * kms command submission. | |
1826 | * | |
1827 | * @dev_priv: Pointer to a device private structure. | |
1828 | * @file_priv: Pointer to a struct drm_file representing the caller's | |
1829 | * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely | |
1830 | * if non-NULL, @user_fence_rep must be non-NULL. | |
1831 | * @buf: The buffer object. | |
1832 | * @out_fence: Optional pointer to a fence pointer. If non-NULL, a | |
1833 | * ref-counted fence pointer is returned here. | |
1834 | * @user_fence_rep: Optional pointer to a user-space provided struct | |
1835 | * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the | |
1836 | * function copies fence data to user-space in a fail-safe manner. | |
1837 | */ | |
1838 | void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv, | |
1839 | struct drm_file *file_priv, | |
1840 | struct vmw_dma_buffer *buf, | |
1841 | struct vmw_fence_obj **out_fence, | |
1842 | struct drm_vmw_fence_rep __user * | |
1843 | user_fence_rep) | |
1844 | { | |
1845 | struct vmw_fence_obj *fence; | |
1846 | uint32_t handle; | |
1847 | int ret; | |
1848 | ||
1849 | ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence, | |
1850 | file_priv ? &handle : NULL); | |
1851 | if (buf) | |
1852 | vmw_fence_single_bo(&buf->base, fence); | |
1853 | if (file_priv) | |
1854 | vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), | |
1855 | ret, user_fence_rep, fence, | |
1856 | handle); | |
1857 | if (out_fence) | |
1858 | *out_fence = fence; | |
1859 | else | |
1860 | vmw_fence_obj_unreference(&fence); | |
1861 | ||
1862 | vmw_kms_helper_buffer_revert(buf); | |
1863 | } | |
1864 | ||
1865 | ||
1866 | /** | |
1867 | * vmw_kms_helper_resource_revert - Undo the actions of | |
1868 | * vmw_kms_helper_resource_prepare. | |
1869 | * | |
1870 | * @res: Pointer to the resource. Typically a surface. | |
1871 | * | |
1872 | * Helper to be used if an error forces the caller to undo the actions of | |
1873 | * vmw_kms_helper_resource_prepare. | |
1874 | */ | |
1875 | void vmw_kms_helper_resource_revert(struct vmw_resource *res) | |
1876 | { | |
1877 | vmw_kms_helper_buffer_revert(res->backup); | |
d80efd5c | 1878 | vmw_resource_unreserve(res, false, NULL, 0); |
1a4b172a TH |
1879 | mutex_unlock(&res->dev_priv->cmdbuf_mutex); |
1880 | } | |
1881 | ||
1882 | /** | |
1883 | * vmw_kms_helper_resource_prepare - Reserve and validate a resource before | |
1884 | * command submission. | |
1885 | * | |
1886 | * @res: Pointer to the resource. Typically a surface. | |
1887 | * @interruptible: Whether to perform waits as interruptible. | |
1888 | * | |
1889 | * Reserves and validates also the backup buffer if a guest-backed resource. | |
1890 | * Returns 0 on success, negative error code on failure. -ERESTARTSYS if | |
1891 | * interrupted by a signal. | |
1892 | */ | |
1893 | int vmw_kms_helper_resource_prepare(struct vmw_resource *res, | |
1894 | bool interruptible) | |
1895 | { | |
1896 | int ret = 0; | |
1897 | ||
1898 | if (interruptible) | |
1899 | ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex); | |
1900 | else | |
1901 | mutex_lock(&res->dev_priv->cmdbuf_mutex); | |
1902 | ||
1903 | if (unlikely(ret != 0)) | |
1904 | return -ERESTARTSYS; | |
1905 | ||
1906 | ret = vmw_resource_reserve(res, interruptible, false); | |
1907 | if (ret) | |
1908 | goto out_unlock; | |
1909 | ||
1910 | if (res->backup) { | |
1911 | ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup, | |
1912 | interruptible, | |
1913 | res->dev_priv->has_mob); | |
1914 | if (ret) | |
1915 | goto out_unreserve; | |
1916 | } | |
1917 | ret = vmw_resource_validate(res); | |
1918 | if (ret) | |
1919 | goto out_revert; | |
1920 | return 0; | |
1921 | ||
1922 | out_revert: | |
1923 | vmw_kms_helper_buffer_revert(res->backup); | |
1924 | out_unreserve: | |
d80efd5c | 1925 | vmw_resource_unreserve(res, false, NULL, 0); |
1a4b172a TH |
1926 | out_unlock: |
1927 | mutex_unlock(&res->dev_priv->cmdbuf_mutex); | |
1928 | return ret; | |
1929 | } | |
1930 | ||
1931 | /** | |
1932 | * vmw_kms_helper_resource_finish - Unreserve and fence a resource after | |
1933 | * kms command submission. | |
1934 | * | |
1935 | * @res: Pointer to the resource. Typically a surface. | |
1936 | * @out_fence: Optional pointer to a fence pointer. If non-NULL, a | |
1937 | * ref-counted fence pointer is returned here. | |
1938 | */ | |
1939 | void vmw_kms_helper_resource_finish(struct vmw_resource *res, | |
1940 | struct vmw_fence_obj **out_fence) | |
1941 | { | |
1942 | if (res->backup || out_fence) | |
1943 | vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup, | |
1944 | out_fence, NULL); | |
1945 | ||
d80efd5c | 1946 | vmw_resource_unreserve(res, false, NULL, 0); |
1a4b172a TH |
1947 | mutex_unlock(&res->dev_priv->cmdbuf_mutex); |
1948 | } | |
6bf6bf03 TH |
1949 | |
1950 | /** | |
1951 | * vmw_kms_update_proxy - Helper function to update a proxy surface from | |
1952 | * its backing MOB. | |
1953 | * | |
1954 | * @res: Pointer to the surface resource | |
1955 | * @clips: Clip rects in framebuffer (surface) space. | |
1956 | * @num_clips: Number of clips in @clips. | |
1957 | * @increment: Integer with which to increment the clip counter when looping. | |
1958 | * Used to skip a predetermined number of clip rects. | |
1959 | * | |
1960 | * This function makes sure the proxy surface is updated from its backing MOB | |
1961 | * using the region given by @clips. The surface resource @res and its backing | |
1962 | * MOB needs to be reserved and validated on call. | |
1963 | */ | |
1964 | int vmw_kms_update_proxy(struct vmw_resource *res, | |
1965 | const struct drm_clip_rect *clips, | |
1966 | unsigned num_clips, | |
1967 | int increment) | |
1968 | { | |
1969 | struct vmw_private *dev_priv = res->dev_priv; | |
1970 | struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size; | |
1971 | struct { | |
1972 | SVGA3dCmdHeader header; | |
1973 | SVGA3dCmdUpdateGBImage body; | |
1974 | } *cmd; | |
1975 | SVGA3dBox *box; | |
1976 | size_t copy_size = 0; | |
1977 | int i; | |
1978 | ||
1979 | if (!clips) | |
1980 | return 0; | |
1981 | ||
1982 | cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips); | |
1983 | if (!cmd) { | |
1984 | DRM_ERROR("Couldn't reserve fifo space for proxy surface " | |
1985 | "update.\n"); | |
1986 | return -ENOMEM; | |
1987 | } | |
1988 | ||
1989 | for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) { | |
1990 | box = &cmd->body.box; | |
1991 | ||
1992 | cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE; | |
1993 | cmd->header.size = sizeof(cmd->body); | |
1994 | cmd->body.image.sid = res->id; | |
1995 | cmd->body.image.face = 0; | |
1996 | cmd->body.image.mipmap = 0; | |
1997 | ||
1998 | if (clips->x1 > size->width || clips->x2 > size->width || | |
1999 | clips->y1 > size->height || clips->y2 > size->height) { | |
2000 | DRM_ERROR("Invalid clips outsize of framebuffer.\n"); | |
2001 | return -EINVAL; | |
2002 | } | |
2003 | ||
2004 | box->x = clips->x1; | |
2005 | box->y = clips->y1; | |
2006 | box->z = 0; | |
2007 | box->w = clips->x2 - clips->x1; | |
2008 | box->h = clips->y2 - clips->y1; | |
2009 | box->d = 1; | |
2010 | ||
2011 | copy_size += sizeof(*cmd); | |
2012 | } | |
2013 | ||
2014 | vmw_fifo_commit(dev_priv, copy_size); | |
2015 | ||
2016 | return 0; | |
2017 | } | |
a278724a TH |
2018 | |
2019 | int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv, | |
2020 | unsigned unit, | |
2021 | u32 max_width, | |
2022 | u32 max_height, | |
2023 | struct drm_connector **p_con, | |
2024 | struct drm_crtc **p_crtc, | |
2025 | struct drm_display_mode **p_mode) | |
2026 | { | |
2027 | struct drm_connector *con; | |
2028 | struct vmw_display_unit *du; | |
2029 | struct drm_display_mode *mode; | |
2030 | int i = 0; | |
2031 | ||
2032 | list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list, | |
2033 | head) { | |
2034 | if (i == unit) | |
2035 | break; | |
2036 | ||
2037 | ++i; | |
2038 | } | |
2039 | ||
2040 | if (i != unit) { | |
2041 | DRM_ERROR("Could not find initial display unit.\n"); | |
2042 | return -EINVAL; | |
2043 | } | |
2044 | ||
2045 | if (list_empty(&con->modes)) | |
2046 | (void) vmw_du_connector_fill_modes(con, max_width, max_height); | |
2047 | ||
2048 | if (list_empty(&con->modes)) { | |
2049 | DRM_ERROR("Could not find initial display mode.\n"); | |
2050 | return -EINVAL; | |
2051 | } | |
2052 | ||
2053 | du = vmw_connector_to_du(con); | |
2054 | *p_con = con; | |
2055 | *p_crtc = &du->crtc; | |
2056 | ||
2057 | list_for_each_entry(mode, &con->modes, head) { | |
2058 | if (mode->type & DRM_MODE_TYPE_PREFERRED) | |
2059 | break; | |
2060 | } | |
2061 | ||
2062 | if (mode->type & DRM_MODE_TYPE_PREFERRED) | |
2063 | *p_mode = mode; | |
2064 | else { | |
2065 | WARN_ONCE(true, "Could not find initial preferred mode.\n"); | |
2066 | *p_mode = list_first_entry(&con->modes, | |
2067 | struct drm_display_mode, | |
2068 | head); | |
2069 | } | |
2070 | ||
2071 | return 0; | |
2072 | } |