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37bd4469 LL |
1 | /* |
2 | * TSC2005 touchscreen driver | |
3 | * | |
4 | * Copyright (C) 2006-2010 Nokia Corporation | |
5 | * | |
6 | * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> | |
7 | * based on TSC2301 driver by Klaus K. Pedersen <klaus.k.pedersen@nokia.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/module.h> | |
27 | #include <linux/input.h> | |
a38cfebb | 28 | #include <linux/input/touchscreen.h> |
37bd4469 LL |
29 | #include <linux/interrupt.h> |
30 | #include <linux/delay.h> | |
3ff8ff53 | 31 | #include <linux/pm.h> |
a38cfebb SR |
32 | #include <linux/of.h> |
33 | #include <linux/of_gpio.h> | |
37bd4469 LL |
34 | #include <linux/spi/spi.h> |
35 | #include <linux/spi/tsc2005.h> | |
a38cfebb | 36 | #include <linux/regulator/consumer.h> |
37bd4469 LL |
37 | |
38 | /* | |
39 | * The touchscreen interface operates as follows: | |
40 | * | |
41 | * 1) Pen is pressed against the touchscreen. | |
42 | * 2) TSC2005 performs AD conversion. | |
43 | * 3) After the conversion is done TSC2005 drives DAV line down. | |
44 | * 4) GPIO IRQ is received and tsc2005_irq_thread() is scheduled. | |
45 | * 5) tsc2005_irq_thread() queues up an spi transfer to fetch the x, y, z1, z2 | |
46 | * values. | |
47 | * 6) tsc2005_irq_thread() reports coordinates to input layer and sets up | |
48 | * tsc2005_penup_timer() to be called after TSC2005_PENUP_TIME_MS (40ms). | |
49 | * 7) When the penup timer expires, there have not been touch or DAV interrupts | |
50 | * during the last 40ms which means the pen has been lifted. | |
51 | * | |
52 | * ESD recovery via a hardware reset is done if the TSC2005 doesn't respond | |
53 | * after a configurable period (in ms) of activity. If esd_timeout is 0, the | |
54 | * watchdog is disabled. | |
55 | */ | |
56 | ||
57 | /* control byte 1 */ | |
58 | #define TSC2005_CMD 0x80 | |
59 | #define TSC2005_CMD_NORMAL 0x00 | |
60 | #define TSC2005_CMD_STOP 0x01 | |
61 | #define TSC2005_CMD_12BIT 0x04 | |
62 | ||
63 | /* control byte 0 */ | |
a636df96 SR |
64 | #define TSC2005_REG_READ 0x01 /* R/W access */ |
65 | #define TSC2005_REG_PND0 0x02 /* Power Not Down Control */ | |
66 | #define TSC2005_REG_X (0x0 << 3) | |
67 | #define TSC2005_REG_Y (0x1 << 3) | |
68 | #define TSC2005_REG_Z1 (0x2 << 3) | |
69 | #define TSC2005_REG_Z2 (0x3 << 3) | |
70 | #define TSC2005_REG_AUX (0x4 << 3) | |
71 | #define TSC2005_REG_TEMP1 (0x5 << 3) | |
72 | #define TSC2005_REG_TEMP2 (0x6 << 3) | |
73 | #define TSC2005_REG_STATUS (0x7 << 3) | |
74 | #define TSC2005_REG_AUX_HIGH (0x8 << 3) | |
75 | #define TSC2005_REG_AUX_LOW (0x9 << 3) | |
76 | #define TSC2005_REG_TEMP_HIGH (0xA << 3) | |
77 | #define TSC2005_REG_TEMP_LOW (0xB << 3) | |
78 | #define TSC2005_REG_CFR0 (0xC << 3) | |
79 | #define TSC2005_REG_CFR1 (0xD << 3) | |
80 | #define TSC2005_REG_CFR2 (0xE << 3) | |
81 | #define TSC2005_REG_CONV_FUNC (0xF << 3) | |
37bd4469 LL |
82 | |
83 | /* configuration register 0 */ | |
84 | #define TSC2005_CFR0_PRECHARGE_276US 0x0040 | |
85 | #define TSC2005_CFR0_STABTIME_1MS 0x0300 | |
86 | #define TSC2005_CFR0_CLOCK_1MHZ 0x1000 | |
87 | #define TSC2005_CFR0_RESOLUTION12 0x2000 | |
88 | #define TSC2005_CFR0_PENMODE 0x8000 | |
89 | #define TSC2005_CFR0_INITVALUE (TSC2005_CFR0_STABTIME_1MS | \ | |
90 | TSC2005_CFR0_CLOCK_1MHZ | \ | |
91 | TSC2005_CFR0_RESOLUTION12 | \ | |
92 | TSC2005_CFR0_PRECHARGE_276US | \ | |
93 | TSC2005_CFR0_PENMODE) | |
94 | ||
95 | /* bits common to both read and write of configuration register 0 */ | |
96 | #define TSC2005_CFR0_RW_MASK 0x3fff | |
97 | ||
98 | /* configuration register 1 */ | |
99 | #define TSC2005_CFR1_BATCHDELAY_4MS 0x0003 | |
100 | #define TSC2005_CFR1_INITVALUE TSC2005_CFR1_BATCHDELAY_4MS | |
101 | ||
102 | /* configuration register 2 */ | |
103 | #define TSC2005_CFR2_MAVE_Z 0x0004 | |
104 | #define TSC2005_CFR2_MAVE_Y 0x0008 | |
105 | #define TSC2005_CFR2_MAVE_X 0x0010 | |
106 | #define TSC2005_CFR2_AVG_7 0x0800 | |
107 | #define TSC2005_CFR2_MEDIUM_15 0x3000 | |
108 | #define TSC2005_CFR2_INITVALUE (TSC2005_CFR2_MAVE_X | \ | |
109 | TSC2005_CFR2_MAVE_Y | \ | |
110 | TSC2005_CFR2_MAVE_Z | \ | |
111 | TSC2005_CFR2_MEDIUM_15 | \ | |
112 | TSC2005_CFR2_AVG_7) | |
113 | ||
114 | #define MAX_12BIT 0xfff | |
a38cfebb SR |
115 | #define TSC2005_DEF_X_FUZZ 4 |
116 | #define TSC2005_DEF_Y_FUZZ 8 | |
117 | #define TSC2005_DEF_P_FUZZ 2 | |
118 | #define TSC2005_DEF_RESISTOR 280 | |
119 | ||
37bd4469 LL |
120 | #define TSC2005_SPI_MAX_SPEED_HZ 10000000 |
121 | #define TSC2005_PENUP_TIME_MS 40 | |
122 | ||
123 | struct tsc2005_spi_rd { | |
124 | struct spi_transfer spi_xfer; | |
125 | u32 spi_tx; | |
126 | u32 spi_rx; | |
127 | }; | |
128 | ||
129 | struct tsc2005 { | |
130 | struct spi_device *spi; | |
131 | ||
132 | struct spi_message spi_read_msg; | |
133 | struct tsc2005_spi_rd spi_x; | |
134 | struct tsc2005_spi_rd spi_y; | |
135 | struct tsc2005_spi_rd spi_z1; | |
136 | struct tsc2005_spi_rd spi_z2; | |
137 | ||
138 | struct input_dev *idev; | |
139 | char phys[32]; | |
140 | ||
141 | struct mutex mutex; | |
142 | ||
143 | /* raw copy of previous x,y,z */ | |
144 | int in_x; | |
145 | int in_y; | |
146 | int in_z1; | |
147 | int in_z2; | |
148 | ||
80cc2f0c | 149 | spinlock_t lock; |
37bd4469 | 150 | struct timer_list penup_timer; |
37bd4469 LL |
151 | |
152 | unsigned int esd_timeout; | |
0b950d3d DT |
153 | struct delayed_work esd_work; |
154 | unsigned long last_valid_interrupt; | |
37bd4469 LL |
155 | |
156 | unsigned int x_plate_ohm; | |
157 | ||
0b950d3d DT |
158 | bool opened; |
159 | bool suspended; | |
c8b6846a DT |
160 | |
161 | bool pen_down; | |
37bd4469 | 162 | |
a38cfebb SR |
163 | struct regulator *vio; |
164 | ||
165 | int reset_gpio; | |
37bd4469 LL |
166 | void (*set_reset)(bool enable); |
167 | }; | |
168 | ||
71f80045 | 169 | static int tsc2005_cmd(struct tsc2005 *ts, u8 cmd) |
37bd4469 | 170 | { |
9a6e180a DT |
171 | u8 tx = TSC2005_CMD | TSC2005_CMD_12BIT | cmd; |
172 | struct spi_transfer xfer = { | |
173 | .tx_buf = &tx, | |
174 | .len = 1, | |
175 | .bits_per_word = 8, | |
176 | }; | |
37bd4469 | 177 | struct spi_message msg; |
71f80045 | 178 | int error; |
37bd4469 LL |
179 | |
180 | spi_message_init(&msg); | |
181 | spi_message_add_tail(&xfer, &msg); | |
71f80045 DT |
182 | |
183 | error = spi_sync(ts->spi, &msg); | |
184 | if (error) { | |
185 | dev_err(&ts->spi->dev, "%s: failed, command: %x, error: %d\n", | |
186 | __func__, cmd, error); | |
187 | return error; | |
188 | } | |
189 | ||
190 | return 0; | |
37bd4469 LL |
191 | } |
192 | ||
71f80045 | 193 | static int tsc2005_write(struct tsc2005 *ts, u8 reg, u16 value) |
37bd4469 | 194 | { |
9a6e180a DT |
195 | u32 tx = ((reg | TSC2005_REG_PND0) << 16) | value; |
196 | struct spi_transfer xfer = { | |
197 | .tx_buf = &tx, | |
198 | .len = 4, | |
199 | .bits_per_word = 24, | |
200 | }; | |
37bd4469 | 201 | struct spi_message msg; |
71f80045 | 202 | int error; |
37bd4469 LL |
203 | |
204 | spi_message_init(&msg); | |
205 | spi_message_add_tail(&xfer, &msg); | |
71f80045 DT |
206 | |
207 | error = spi_sync(ts->spi, &msg); | |
208 | if (error) { | |
209 | dev_err(&ts->spi->dev, | |
210 | "%s: failed, register: %x, value: %x, error: %d\n", | |
211 | __func__, reg, value, error); | |
212 | return error; | |
213 | } | |
214 | ||
215 | return 0; | |
37bd4469 LL |
216 | } |
217 | ||
218 | static void tsc2005_setup_read(struct tsc2005_spi_rd *rd, u8 reg, bool last) | |
219 | { | |
9a6e180a DT |
220 | memset(rd, 0, sizeof(*rd)); |
221 | ||
37bd4469 LL |
222 | rd->spi_tx = (reg | TSC2005_REG_READ) << 16; |
223 | rd->spi_xfer.tx_buf = &rd->spi_tx; | |
224 | rd->spi_xfer.rx_buf = &rd->spi_rx; | |
225 | rd->spi_xfer.len = 4; | |
226 | rd->spi_xfer.bits_per_word = 24; | |
227 | rd->spi_xfer.cs_change = !last; | |
228 | } | |
229 | ||
71f80045 | 230 | static int tsc2005_read(struct tsc2005 *ts, u8 reg, u16 *value) |
37bd4469 | 231 | { |
9a6e180a | 232 | struct tsc2005_spi_rd spi_rd; |
37bd4469 | 233 | struct spi_message msg; |
71f80045 | 234 | int error; |
37bd4469 | 235 | |
c8b6846a | 236 | tsc2005_setup_read(&spi_rd, reg, true); |
37bd4469 LL |
237 | |
238 | spi_message_init(&msg); | |
239 | spi_message_add_tail(&spi_rd.spi_xfer, &msg); | |
71f80045 DT |
240 | |
241 | error = spi_sync(ts->spi, &msg); | |
242 | if (error) | |
243 | return error; | |
9a6e180a | 244 | |
37bd4469 | 245 | *value = spi_rd.spi_rx; |
71f80045 | 246 | return 0; |
37bd4469 LL |
247 | } |
248 | ||
249 | static void tsc2005_update_pen_state(struct tsc2005 *ts, | |
250 | int x, int y, int pressure) | |
251 | { | |
252 | if (pressure) { | |
253 | input_report_abs(ts->idev, ABS_X, x); | |
254 | input_report_abs(ts->idev, ABS_Y, y); | |
255 | input_report_abs(ts->idev, ABS_PRESSURE, pressure); | |
256 | if (!ts->pen_down) { | |
257 | input_report_key(ts->idev, BTN_TOUCH, !!pressure); | |
c8b6846a | 258 | ts->pen_down = true; |
37bd4469 LL |
259 | } |
260 | } else { | |
261 | input_report_abs(ts->idev, ABS_PRESSURE, 0); | |
262 | if (ts->pen_down) { | |
263 | input_report_key(ts->idev, BTN_TOUCH, 0); | |
c8b6846a | 264 | ts->pen_down = false; |
37bd4469 LL |
265 | } |
266 | } | |
267 | input_sync(ts->idev); | |
268 | dev_dbg(&ts->spi->dev, "point(%4d,%4d), pressure (%4d)\n", x, y, | |
269 | pressure); | |
270 | } | |
271 | ||
37bd4469 LL |
272 | static irqreturn_t tsc2005_irq_thread(int irq, void *_ts) |
273 | { | |
274 | struct tsc2005 *ts = _ts; | |
80cc2f0c | 275 | unsigned long flags; |
37bd4469 | 276 | unsigned int pressure; |
80cc2f0c DT |
277 | u32 x, y; |
278 | u32 z1, z2; | |
71f80045 | 279 | int error; |
37bd4469 | 280 | |
37bd4469 | 281 | /* read the coordinates */ |
71f80045 DT |
282 | error = spi_sync(ts->spi, &ts->spi_read_msg); |
283 | if (unlikely(error)) | |
284 | goto out; | |
285 | ||
37bd4469 LL |
286 | x = ts->spi_x.spi_rx; |
287 | y = ts->spi_y.spi_rx; | |
288 | z1 = ts->spi_z1.spi_rx; | |
289 | z2 = ts->spi_z2.spi_rx; | |
290 | ||
291 | /* validate position */ | |
292 | if (unlikely(x > MAX_12BIT || y > MAX_12BIT)) | |
293 | goto out; | |
294 | ||
80cc2f0c | 295 | /* Skip reading if the pressure components are out of range */ |
37bd4469 LL |
296 | if (unlikely(z1 == 0 || z2 > MAX_12BIT || z1 >= z2)) |
297 | goto out; | |
298 | ||
80cc2f0c DT |
299 | /* |
300 | * Skip point if this is a pen down with the exact same values as | |
37bd4469 LL |
301 | * the value before pen-up - that implies SPI fed us stale data |
302 | */ | |
303 | if (!ts->pen_down && | |
80cc2f0c DT |
304 | ts->in_x == x && ts->in_y == y && |
305 | ts->in_z1 == z1 && ts->in_z2 == z2) { | |
37bd4469 | 306 | goto out; |
80cc2f0c | 307 | } |
37bd4469 | 308 | |
80cc2f0c DT |
309 | /* |
310 | * At this point we are happy we have a valid and useful reading. | |
311 | * Remember it for later comparisons. We may now begin downsampling. | |
312 | */ | |
37bd4469 LL |
313 | ts->in_x = x; |
314 | ts->in_y = y; | |
315 | ts->in_z1 = z1; | |
316 | ts->in_z2 = z2; | |
317 | ||
80cc2f0c | 318 | /* Compute touch pressure resistance using equation #1 */ |
37bd4469 LL |
319 | pressure = x * (z2 - z1) / z1; |
320 | pressure = pressure * ts->x_plate_ohm / 4096; | |
321 | if (unlikely(pressure > MAX_12BIT)) | |
322 | goto out; | |
323 | ||
80cc2f0c DT |
324 | spin_lock_irqsave(&ts->lock, flags); |
325 | ||
37bd4469 | 326 | tsc2005_update_pen_state(ts, x, y, pressure); |
37bd4469 LL |
327 | mod_timer(&ts->penup_timer, |
328 | jiffies + msecs_to_jiffies(TSC2005_PENUP_TIME_MS)); | |
329 | ||
80cc2f0c | 330 | spin_unlock_irqrestore(&ts->lock, flags); |
37bd4469 | 331 | |
0b950d3d | 332 | ts->last_valid_interrupt = jiffies; |
37bd4469 | 333 | out: |
37bd4469 LL |
334 | return IRQ_HANDLED; |
335 | } | |
336 | ||
337 | static void tsc2005_penup_timer(unsigned long data) | |
338 | { | |
339 | struct tsc2005 *ts = (struct tsc2005 *)data; | |
80cc2f0c | 340 | unsigned long flags; |
37bd4469 | 341 | |
80cc2f0c | 342 | spin_lock_irqsave(&ts->lock, flags); |
37bd4469 | 343 | tsc2005_update_pen_state(ts, 0, 0, 0); |
80cc2f0c | 344 | spin_unlock_irqrestore(&ts->lock, flags); |
37bd4469 LL |
345 | } |
346 | ||
347 | static void tsc2005_start_scan(struct tsc2005 *ts) | |
348 | { | |
349 | tsc2005_write(ts, TSC2005_REG_CFR0, TSC2005_CFR0_INITVALUE); | |
350 | tsc2005_write(ts, TSC2005_REG_CFR1, TSC2005_CFR1_INITVALUE); | |
351 | tsc2005_write(ts, TSC2005_REG_CFR2, TSC2005_CFR2_INITVALUE); | |
352 | tsc2005_cmd(ts, TSC2005_CMD_NORMAL); | |
353 | } | |
354 | ||
355 | static void tsc2005_stop_scan(struct tsc2005 *ts) | |
356 | { | |
357 | tsc2005_cmd(ts, TSC2005_CMD_STOP); | |
358 | } | |
359 | ||
a38cfebb SR |
360 | static void tsc2005_set_reset(struct tsc2005 *ts, bool enable) |
361 | { | |
362 | if (ts->reset_gpio >= 0) | |
363 | gpio_set_value(ts->reset_gpio, enable); | |
364 | else if (ts->set_reset) | |
365 | ts->set_reset(enable); | |
366 | } | |
367 | ||
0b950d3d DT |
368 | /* must be called with ts->mutex held */ |
369 | static void __tsc2005_disable(struct tsc2005 *ts) | |
37bd4469 | 370 | { |
0b950d3d DT |
371 | tsc2005_stop_scan(ts); |
372 | ||
37bd4469 | 373 | disable_irq(ts->spi->irq); |
37bd4469 | 374 | del_timer_sync(&ts->penup_timer); |
0b950d3d DT |
375 | |
376 | cancel_delayed_work_sync(&ts->esd_work); | |
377 | ||
378 | enable_irq(ts->spi->irq); | |
37bd4469 LL |
379 | } |
380 | ||
0b950d3d DT |
381 | /* must be called with ts->mutex held */ |
382 | static void __tsc2005_enable(struct tsc2005 *ts) | |
37bd4469 | 383 | { |
37bd4469 | 384 | tsc2005_start_scan(ts); |
0b950d3d | 385 | |
a38cfebb | 386 | if (ts->esd_timeout && (ts->set_reset || ts->reset_gpio)) { |
0b950d3d DT |
387 | ts->last_valid_interrupt = jiffies; |
388 | schedule_delayed_work(&ts->esd_work, | |
90342795 | 389 | round_jiffies_relative( |
0b950d3d DT |
390 | msecs_to_jiffies(ts->esd_timeout))); |
391 | } | |
392 | ||
37bd4469 LL |
393 | } |
394 | ||
37bd4469 LL |
395 | static ssize_t tsc2005_selftest_show(struct device *dev, |
396 | struct device_attribute *attr, | |
397 | char *buf) | |
398 | { | |
6b007d62 DT |
399 | struct spi_device *spi = to_spi_device(dev); |
400 | struct tsc2005 *ts = spi_get_drvdata(spi); | |
37bd4469 LL |
401 | u16 temp_high; |
402 | u16 temp_high_orig; | |
403 | u16 temp_high_test; | |
71f80045 DT |
404 | bool success = true; |
405 | int error; | |
37bd4469 | 406 | |
37bd4469 LL |
407 | mutex_lock(&ts->mutex); |
408 | ||
409 | /* | |
410 | * Test TSC2005 communications via temp high register. | |
411 | */ | |
0b950d3d | 412 | __tsc2005_disable(ts); |
71f80045 DT |
413 | |
414 | error = tsc2005_read(ts, TSC2005_REG_TEMP_HIGH, &temp_high_orig); | |
415 | if (error) { | |
416 | dev_warn(dev, "selftest failed: read error %d\n", error); | |
417 | success = false; | |
418 | goto out; | |
419 | } | |
420 | ||
37bd4469 | 421 | temp_high_test = (temp_high_orig - 1) & MAX_12BIT; |
71f80045 DT |
422 | |
423 | error = tsc2005_write(ts, TSC2005_REG_TEMP_HIGH, temp_high_test); | |
424 | if (error) { | |
425 | dev_warn(dev, "selftest failed: write error %d\n", error); | |
426 | success = false; | |
427 | goto out; | |
428 | } | |
429 | ||
430 | error = tsc2005_read(ts, TSC2005_REG_TEMP_HIGH, &temp_high); | |
431 | if (error) { | |
432 | dev_warn(dev, "selftest failed: read error %d after write\n", | |
433 | error); | |
434 | success = false; | |
435 | goto out; | |
436 | } | |
437 | ||
37bd4469 LL |
438 | if (temp_high != temp_high_test) { |
439 | dev_warn(dev, "selftest failed: %d != %d\n", | |
440 | temp_high, temp_high_test); | |
71f80045 | 441 | success = false; |
37bd4469 LL |
442 | } |
443 | ||
444 | /* hardware reset */ | |
a38cfebb | 445 | tsc2005_set_reset(ts, false); |
37bd4469 | 446 | usleep_range(100, 500); /* only 10us required */ |
a38cfebb | 447 | tsc2005_set_reset(ts, true); |
71f80045 DT |
448 | |
449 | if (!success) | |
450 | goto out; | |
37bd4469 LL |
451 | |
452 | /* test that the reset really happened */ | |
71f80045 DT |
453 | error = tsc2005_read(ts, TSC2005_REG_TEMP_HIGH, &temp_high); |
454 | if (error) { | |
455 | dev_warn(dev, "selftest failed: read error %d after reset\n", | |
456 | error); | |
457 | success = false; | |
458 | goto out; | |
459 | } | |
460 | ||
37bd4469 LL |
461 | if (temp_high != temp_high_orig) { |
462 | dev_warn(dev, "selftest failed after reset: %d != %d\n", | |
463 | temp_high, temp_high_orig); | |
71f80045 | 464 | success = false; |
37bd4469 LL |
465 | } |
466 | ||
71f80045 | 467 | out: |
0b950d3d | 468 | __tsc2005_enable(ts); |
37bd4469 LL |
469 | mutex_unlock(&ts->mutex); |
470 | ||
71f80045 | 471 | return sprintf(buf, "%d\n", success); |
37bd4469 | 472 | } |
8dbcc432 | 473 | |
37bd4469 LL |
474 | static DEVICE_ATTR(selftest, S_IRUGO, tsc2005_selftest_show, NULL); |
475 | ||
8dbcc432 | 476 | static struct attribute *tsc2005_attrs[] = { |
8dbcc432 DT |
477 | &dev_attr_selftest.attr, |
478 | NULL | |
479 | }; | |
480 | ||
587a1f16 | 481 | static umode_t tsc2005_attr_is_visible(struct kobject *kobj, |
8dbcc432 DT |
482 | struct attribute *attr, int n) |
483 | { | |
484 | struct device *dev = container_of(kobj, struct device, kobj); | |
485 | struct spi_device *spi = to_spi_device(dev); | |
486 | struct tsc2005 *ts = spi_get_drvdata(spi); | |
587a1f16 | 487 | umode_t mode = attr->mode; |
8dbcc432 DT |
488 | |
489 | if (attr == &dev_attr_selftest.attr) { | |
a38cfebb | 490 | if (!ts->set_reset && !ts->reset_gpio) |
8dbcc432 DT |
491 | mode = 0; |
492 | } | |
493 | ||
494 | return mode; | |
495 | } | |
496 | ||
497 | static const struct attribute_group tsc2005_attr_group = { | |
498 | .is_visible = tsc2005_attr_is_visible, | |
499 | .attrs = tsc2005_attrs, | |
500 | }; | |
501 | ||
37bd4469 LL |
502 | static void tsc2005_esd_work(struct work_struct *work) |
503 | { | |
0b950d3d | 504 | struct tsc2005 *ts = container_of(work, struct tsc2005, esd_work.work); |
71f80045 | 505 | int error; |
37bd4469 LL |
506 | u16 r; |
507 | ||
a0fa2206 AK |
508 | if (!mutex_trylock(&ts->mutex)) { |
509 | /* | |
510 | * If the mutex is taken, it means that disable or enable is in | |
511 | * progress. In that case just reschedule the work. If the work | |
512 | * is not needed, it will be canceled by disable. | |
513 | */ | |
514 | goto reschedule; | |
515 | } | |
37bd4469 | 516 | |
0b950d3d DT |
517 | if (time_is_after_jiffies(ts->last_valid_interrupt + |
518 | msecs_to_jiffies(ts->esd_timeout))) | |
37bd4469 LL |
519 | goto out; |
520 | ||
0b950d3d | 521 | /* We should be able to read register without disabling interrupts. */ |
71f80045 | 522 | error = tsc2005_read(ts, TSC2005_REG_CFR0, &r); |
0b950d3d DT |
523 | if (!error && |
524 | !((r ^ TSC2005_CFR0_INITVALUE) & TSC2005_CFR0_RW_MASK)) { | |
525 | goto out; | |
37bd4469 LL |
526 | } |
527 | ||
0b950d3d DT |
528 | /* |
529 | * If we could not read our known value from configuration register 0 | |
530 | * then we should reset the controller as if from power-up and start | |
531 | * scanning again. | |
532 | */ | |
533 | dev_info(&ts->spi->dev, "TSC2005 not responding - resetting\n"); | |
534 | ||
535 | disable_irq(ts->spi->irq); | |
536 | del_timer_sync(&ts->penup_timer); | |
537 | ||
538 | tsc2005_update_pen_state(ts, 0, 0, 0); | |
539 | ||
a38cfebb | 540 | tsc2005_set_reset(ts, false); |
0b950d3d | 541 | usleep_range(100, 500); /* only 10us required */ |
a38cfebb | 542 | tsc2005_set_reset(ts, true); |
0b950d3d DT |
543 | |
544 | enable_irq(ts->spi->irq); | |
545 | tsc2005_start_scan(ts); | |
37bd4469 LL |
546 | |
547 | out: | |
a0fa2206 AK |
548 | mutex_unlock(&ts->mutex); |
549 | reschedule: | |
0b950d3d DT |
550 | /* re-arm the watchdog */ |
551 | schedule_delayed_work(&ts->esd_work, | |
90342795 | 552 | round_jiffies_relative( |
0b950d3d | 553 | msecs_to_jiffies(ts->esd_timeout))); |
0b950d3d DT |
554 | } |
555 | ||
556 | static int tsc2005_open(struct input_dev *input) | |
557 | { | |
558 | struct tsc2005 *ts = input_get_drvdata(input); | |
559 | ||
560 | mutex_lock(&ts->mutex); | |
561 | ||
5cb81d19 | 562 | if (!ts->suspended) |
0b950d3d DT |
563 | __tsc2005_enable(ts); |
564 | ||
565 | ts->opened = true; | |
566 | ||
567 | mutex_unlock(&ts->mutex); | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
572 | static void tsc2005_close(struct input_dev *input) | |
573 | { | |
574 | struct tsc2005 *ts = input_get_drvdata(input); | |
575 | ||
576 | mutex_lock(&ts->mutex); | |
577 | ||
5cb81d19 | 578 | if (!ts->suspended) |
0b950d3d DT |
579 | __tsc2005_disable(ts); |
580 | ||
581 | ts->opened = false; | |
582 | ||
37bd4469 LL |
583 | mutex_unlock(&ts->mutex); |
584 | } | |
585 | ||
5298cc4c | 586 | static void tsc2005_setup_spi_xfer(struct tsc2005 *ts) |
37bd4469 | 587 | { |
c8b6846a DT |
588 | tsc2005_setup_read(&ts->spi_x, TSC2005_REG_X, false); |
589 | tsc2005_setup_read(&ts->spi_y, TSC2005_REG_Y, false); | |
590 | tsc2005_setup_read(&ts->spi_z1, TSC2005_REG_Z1, false); | |
591 | tsc2005_setup_read(&ts->spi_z2, TSC2005_REG_Z2, true); | |
37bd4469 LL |
592 | |
593 | spi_message_init(&ts->spi_read_msg); | |
594 | spi_message_add_tail(&ts->spi_x.spi_xfer, &ts->spi_read_msg); | |
595 | spi_message_add_tail(&ts->spi_y.spi_xfer, &ts->spi_read_msg); | |
596 | spi_message_add_tail(&ts->spi_z1.spi_xfer, &ts->spi_read_msg); | |
597 | spi_message_add_tail(&ts->spi_z2.spi_xfer, &ts->spi_read_msg); | |
598 | } | |
599 | ||
5298cc4c | 600 | static int tsc2005_probe(struct spi_device *spi) |
37bd4469 | 601 | { |
c838cb3d | 602 | const struct tsc2005_platform_data *pdata = dev_get_platdata(&spi->dev); |
a38cfebb SR |
603 | struct device_node *np = spi->dev.of_node; |
604 | ||
99bb892d DT |
605 | struct tsc2005 *ts; |
606 | struct input_dev *input_dev; | |
a38cfebb SR |
607 | unsigned int max_x = MAX_12BIT; |
608 | unsigned int max_y = MAX_12BIT; | |
609 | unsigned int max_p = MAX_12BIT; | |
610 | unsigned int fudge_x = TSC2005_DEF_X_FUZZ; | |
611 | unsigned int fudge_y = TSC2005_DEF_Y_FUZZ; | |
612 | unsigned int fudge_p = TSC2005_DEF_P_FUZZ; | |
613 | unsigned int x_plate_ohm = TSC2005_DEF_RESISTOR; | |
614 | unsigned int esd_timeout; | |
99bb892d | 615 | int error; |
37bd4469 | 616 | |
a38cfebb | 617 | if (!np && !pdata) { |
6e51c857 | 618 | dev_err(&spi->dev, "no platform data\n"); |
99bb892d DT |
619 | return -ENODEV; |
620 | } | |
37bd4469 | 621 | |
99bb892d | 622 | if (spi->irq <= 0) { |
6e51c857 | 623 | dev_err(&spi->dev, "no irq\n"); |
99bb892d DT |
624 | return -ENODEV; |
625 | } | |
37bd4469 | 626 | |
a38cfebb SR |
627 | if (pdata) { |
628 | fudge_x = pdata->ts_x_fudge; | |
629 | fudge_y = pdata->ts_y_fudge; | |
630 | fudge_p = pdata->ts_pressure_fudge; | |
631 | max_x = pdata->ts_x_max; | |
632 | max_y = pdata->ts_y_max; | |
633 | max_p = pdata->ts_pressure_max; | |
634 | x_plate_ohm = pdata->ts_x_plate_ohm; | |
635 | esd_timeout = pdata->esd_timeout_ms; | |
636 | } else { | |
637 | x_plate_ohm = TSC2005_DEF_RESISTOR; | |
638 | of_property_read_u32(np, "ti,x-plate-ohms", &x_plate_ohm); | |
639 | esd_timeout = 0; | |
640 | of_property_read_u32(np, "ti,esd-recovery-timeout-ms", | |
641 | &esd_timeout); | |
642 | } | |
643 | ||
99bb892d DT |
644 | spi->mode = SPI_MODE_0; |
645 | spi->bits_per_word = 8; | |
646 | if (!spi->max_speed_hz) | |
647 | spi->max_speed_hz = TSC2005_SPI_MAX_SPEED_HZ; | |
37bd4469 | 648 | |
99bb892d DT |
649 | error = spi_setup(spi); |
650 | if (error) | |
651 | return error; | |
37bd4469 | 652 | |
99e8325f SR |
653 | ts = devm_kzalloc(&spi->dev, sizeof(*ts), GFP_KERNEL); |
654 | if (!ts) | |
655 | return -ENOMEM; | |
656 | ||
657 | input_dev = devm_input_allocate_device(&spi->dev); | |
658 | if (!input_dev) | |
659 | return -ENOMEM; | |
37bd4469 | 660 | |
99bb892d DT |
661 | ts->spi = spi; |
662 | ts->idev = input_dev; | |
663 | ||
a38cfebb SR |
664 | ts->x_plate_ohm = x_plate_ohm; |
665 | ts->esd_timeout = esd_timeout; | |
666 | ||
667 | if (np) { | |
668 | ts->reset_gpio = of_get_named_gpio(np, "reset-gpios", 0); | |
669 | if (ts->reset_gpio == -EPROBE_DEFER) | |
670 | return ts->reset_gpio; | |
671 | if (ts->reset_gpio < 0) { | |
672 | dev_err(&spi->dev, "error acquiring reset gpio: %d\n", | |
673 | ts->reset_gpio); | |
674 | return ts->reset_gpio; | |
675 | } | |
676 | ||
677 | error = devm_gpio_request_one(&spi->dev, ts->reset_gpio, 0, | |
678 | "reset-gpios"); | |
679 | if (error) { | |
680 | dev_err(&spi->dev, "error requesting reset gpio: %d\n", | |
681 | error); | |
682 | return error; | |
683 | } | |
684 | ||
685 | ts->vio = devm_regulator_get(&spi->dev, "vio"); | |
686 | if (IS_ERR(ts->vio)) { | |
687 | error = PTR_ERR(ts->vio); | |
688 | dev_err(&spi->dev, "vio regulator missing (%d)", error); | |
689 | return error; | |
690 | } | |
691 | } else { | |
692 | ts->reset_gpio = -1; | |
693 | ts->set_reset = pdata->set_reset; | |
694 | } | |
37bd4469 | 695 | |
99bb892d | 696 | mutex_init(&ts->mutex); |
37bd4469 | 697 | |
80cc2f0c | 698 | spin_lock_init(&ts->lock); |
99bb892d | 699 | setup_timer(&ts->penup_timer, tsc2005_penup_timer, (unsigned long)ts); |
37bd4469 | 700 | |
0b950d3d | 701 | INIT_DELAYED_WORK(&ts->esd_work, tsc2005_esd_work); |
37bd4469 | 702 | |
99bb892d | 703 | tsc2005_setup_spi_xfer(ts); |
37bd4469 | 704 | |
99bb892d DT |
705 | snprintf(ts->phys, sizeof(ts->phys), |
706 | "%s/input-ts", dev_name(&spi->dev)); | |
707 | ||
708 | input_dev->name = "TSC2005 touchscreen"; | |
709 | input_dev->phys = ts->phys; | |
710 | input_dev->id.bustype = BUS_SPI; | |
711 | input_dev->dev.parent = &spi->dev; | |
712 | input_dev->evbit[0] = BIT(EV_ABS) | BIT(EV_KEY); | |
713 | input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); | |
714 | ||
715 | input_set_abs_params(input_dev, ABS_X, 0, max_x, fudge_x, 0); | |
716 | input_set_abs_params(input_dev, ABS_Y, 0, max_y, fudge_y, 0); | |
717 | input_set_abs_params(input_dev, ABS_PRESSURE, 0, max_p, fudge_p, 0); | |
718 | ||
a38cfebb | 719 | if (np) |
4200e831 | 720 | touchscreen_parse_properties(input_dev, false); |
a38cfebb | 721 | |
0b950d3d DT |
722 | input_dev->open = tsc2005_open; |
723 | input_dev->close = tsc2005_close; | |
724 | ||
725 | input_set_drvdata(input_dev, ts); | |
726 | ||
727 | /* Ensure the touchscreen is off */ | |
728 | tsc2005_stop_scan(ts); | |
729 | ||
99e8325f SR |
730 | error = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, |
731 | tsc2005_irq_thread, | |
732 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | |
733 | "tsc2005", ts); | |
99bb892d DT |
734 | if (error) { |
735 | dev_err(&spi->dev, "Failed to request irq, err: %d\n", error); | |
99e8325f | 736 | return error; |
37bd4469 LL |
737 | } |
738 | ||
a38cfebb SR |
739 | /* enable regulator for DT */ |
740 | if (ts->vio) { | |
741 | error = regulator_enable(ts->vio); | |
742 | if (error) | |
743 | return error; | |
744 | } | |
745 | ||
99bb892d DT |
746 | spi_set_drvdata(spi, ts); |
747 | error = sysfs_create_group(&spi->dev.kobj, &tsc2005_attr_group); | |
748 | if (error) { | |
749 | dev_err(&spi->dev, | |
750 | "Failed to create sysfs attributes, err: %d\n", error); | |
a38cfebb | 751 | goto disable_regulator; |
37bd4469 LL |
752 | } |
753 | ||
99bb892d DT |
754 | error = input_register_device(ts->idev); |
755 | if (error) { | |
756 | dev_err(&spi->dev, | |
757 | "Failed to register input device, err: %d\n", error); | |
758 | goto err_remove_sysfs; | |
759 | } | |
37bd4469 | 760 | |
ddca6a31 | 761 | irq_set_irq_wake(spi->irq, 1); |
99bb892d DT |
762 | return 0; |
763 | ||
764 | err_remove_sysfs: | |
765 | sysfs_remove_group(&spi->dev.kobj, &tsc2005_attr_group); | |
a38cfebb SR |
766 | disable_regulator: |
767 | if (ts->vio) | |
768 | regulator_disable(ts->vio); | |
99bb892d | 769 | return error; |
37bd4469 LL |
770 | } |
771 | ||
e2619cf7 | 772 | static int tsc2005_remove(struct spi_device *spi) |
37bd4469 | 773 | { |
a38cfebb SR |
774 | struct tsc2005 *ts = spi_get_drvdata(spi); |
775 | ||
99e8325f | 776 | sysfs_remove_group(&spi->dev.kobj, &tsc2005_attr_group); |
37bd4469 | 777 | |
a38cfebb SR |
778 | if (ts->vio) |
779 | regulator_disable(ts->vio); | |
780 | ||
37bd4469 LL |
781 | return 0; |
782 | } | |
783 | ||
02b6a58b | 784 | static int __maybe_unused tsc2005_suspend(struct device *dev) |
37bd4469 | 785 | { |
6b007d62 DT |
786 | struct spi_device *spi = to_spi_device(dev); |
787 | struct tsc2005 *ts = spi_get_drvdata(spi); | |
37bd4469 LL |
788 | |
789 | mutex_lock(&ts->mutex); | |
0b950d3d | 790 | |
5cb81d19 | 791 | if (!ts->suspended && ts->opened) |
0b950d3d DT |
792 | __tsc2005_disable(ts); |
793 | ||
794 | ts->suspended = true; | |
795 | ||
37bd4469 LL |
796 | mutex_unlock(&ts->mutex); |
797 | ||
798 | return 0; | |
799 | } | |
800 | ||
02b6a58b | 801 | static int __maybe_unused tsc2005_resume(struct device *dev) |
37bd4469 | 802 | { |
6b007d62 DT |
803 | struct spi_device *spi = to_spi_device(dev); |
804 | struct tsc2005 *ts = spi_get_drvdata(spi); | |
37bd4469 LL |
805 | |
806 | mutex_lock(&ts->mutex); | |
0b950d3d | 807 | |
5cb81d19 | 808 | if (ts->suspended && ts->opened) |
0b950d3d DT |
809 | __tsc2005_enable(ts); |
810 | ||
811 | ts->suspended = false; | |
812 | ||
37bd4469 LL |
813 | mutex_unlock(&ts->mutex); |
814 | ||
815 | return 0; | |
816 | } | |
37bd4469 | 817 | |
3ff8ff53 DT |
818 | static SIMPLE_DEV_PM_OPS(tsc2005_pm_ops, tsc2005_suspend, tsc2005_resume); |
819 | ||
37bd4469 | 820 | static struct spi_driver tsc2005_driver = { |
3ff8ff53 DT |
821 | .driver = { |
822 | .name = "tsc2005", | |
823 | .owner = THIS_MODULE, | |
824 | .pm = &tsc2005_pm_ops, | |
37bd4469 | 825 | }, |
3ff8ff53 | 826 | .probe = tsc2005_probe, |
1cb0aa88 | 827 | .remove = tsc2005_remove, |
37bd4469 LL |
828 | }; |
829 | ||
ca83922e | 830 | module_spi_driver(tsc2005_driver); |
37bd4469 LL |
831 | |
832 | MODULE_AUTHOR("Lauri Leukkunen <lauri.leukkunen@nokia.com>"); | |
b88aa494 | 833 | MODULE_DESCRIPTION("TSC2005 Touchscreen Driver"); |
37bd4469 | 834 | MODULE_LICENSE("GPL"); |
938789fe | 835 | MODULE_ALIAS("spi:tsc2005"); |