Commit | Line | Data |
---|---|---|
f6e916b8 TP |
1 | config IRQCHIP |
2 | def_bool y | |
3 | depends on OF_IRQ | |
4 | ||
81243e44 RH |
5 | config ARM_GIC |
6 | bool | |
7 | select IRQ_DOMAIN | |
9a1091ef | 8 | select IRQ_DOMAIN_HIERARCHY |
81243e44 RH |
9 | select MULTI_IRQ_HANDLER |
10 | ||
9c8edddf JH |
11 | config ARM_GIC_PM |
12 | bool | |
13 | depends on PM | |
14 | select ARM_GIC | |
15 | select PM_CLK | |
16 | ||
a27d21e0 LW |
17 | config ARM_GIC_MAX_NR |
18 | int | |
19 | default 2 if ARCH_REALVIEW | |
20 | default 1 | |
21 | ||
853a33ce SS |
22 | config ARM_GIC_V2M |
23 | bool | |
24 | depends on ARM_GIC | |
25 | depends on PCI && PCI_MSI | |
26 | select PCI_MSI_IRQ_DOMAIN | |
27 | ||
81243e44 RH |
28 | config GIC_NON_BANKED |
29 | bool | |
30 | ||
021f6537 MZ |
31 | config ARM_GIC_V3 |
32 | bool | |
33 | select IRQ_DOMAIN | |
34 | select MULTI_IRQ_HANDLER | |
443acc4f | 35 | select IRQ_DOMAIN_HIERARCHY |
e3825ba1 | 36 | select PARTITION_PERCPU |
021f6537 | 37 | |
19812729 MZ |
38 | config ARM_GIC_V3_ITS |
39 | bool | |
40 | select PCI_MSI_IRQ_DOMAIN | |
021f6537 | 41 | |
292ec080 UKK |
42 | config ARM_NVIC |
43 | bool | |
44 | select IRQ_DOMAIN | |
2d9f59f7 | 45 | select IRQ_DOMAIN_HIERARCHY |
292ec080 UKK |
46 | select GENERIC_IRQ_CHIP |
47 | ||
44430ec0 RH |
48 | config ARM_VIC |
49 | bool | |
50 | select IRQ_DOMAIN | |
51 | select MULTI_IRQ_HANDLER | |
52 | ||
53 | config ARM_VIC_NR | |
54 | int | |
55 | default 4 if ARCH_S5PV210 | |
44430ec0 RH |
56 | default 2 |
57 | depends on ARM_VIC | |
58 | help | |
59 | The maximum number of VICs available in the system, for | |
60 | power management. | |
61 | ||
fed6d336 TP |
62 | config ARMADA_370_XP_IRQ |
63 | bool | |
fed6d336 | 64 | select GENERIC_IRQ_CHIP |
fcc392d5 | 65 | select PCI_MSI_IRQ_DOMAIN if PCI_MSI |
fed6d336 | 66 | |
e6b78f2c AT |
67 | config ALPINE_MSI |
68 | bool | |
69 | depends on PCI && PCI_MSI | |
70 | select GENERIC_IRQ_CHIP | |
71 | select PCI_MSI_IRQ_DOMAIN | |
72 | ||
b1479ebb BB |
73 | config ATMEL_AIC_IRQ |
74 | bool | |
75 | select GENERIC_IRQ_CHIP | |
76 | select IRQ_DOMAIN | |
77 | select MULTI_IRQ_HANDLER | |
78 | select SPARSE_IRQ | |
79 | ||
80 | config ATMEL_AIC5_IRQ | |
81 | bool | |
82 | select GENERIC_IRQ_CHIP | |
83 | select IRQ_DOMAIN | |
84 | select MULTI_IRQ_HANDLER | |
85 | select SPARSE_IRQ | |
86 | ||
0509cfde RB |
87 | config I8259 |
88 | bool | |
89 | select IRQ_DOMAIN | |
90 | ||
c7c42ec2 SA |
91 | config BCM6345_L1_IRQ |
92 | bool | |
93 | select GENERIC_IRQ_CHIP | |
94 | select IRQ_DOMAIN | |
95 | ||
5f7f0317 KC |
96 | config BCM7038_L1_IRQ |
97 | bool | |
98 | select GENERIC_IRQ_CHIP | |
99 | select IRQ_DOMAIN | |
100 | ||
a4fcbb86 KC |
101 | config BCM7120_L2_IRQ |
102 | bool | |
103 | select GENERIC_IRQ_CHIP | |
104 | select IRQ_DOMAIN | |
105 | ||
7f646e92 FF |
106 | config BRCMSTB_L2_IRQ |
107 | bool | |
7f646e92 FF |
108 | select GENERIC_IRQ_CHIP |
109 | select IRQ_DOMAIN | |
110 | ||
350d71b9 SH |
111 | config DW_APB_ICTL |
112 | bool | |
e1588490 | 113 | select GENERIC_IRQ_CHIP |
350d71b9 SH |
114 | select IRQ_DOMAIN |
115 | ||
9a7c4abd M |
116 | config HISILICON_IRQ_MBIGEN |
117 | bool | |
118 | select ARM_GIC_V3 | |
119 | select ARM_GIC_V3_ITS | |
120 | select GENERIC_MSI_IRQ_DOMAIN | |
121 | ||
b6ef9161 JH |
122 | config IMGPDC_IRQ |
123 | bool | |
124 | select GENERIC_IRQ_CHIP | |
125 | select IRQ_DOMAIN | |
126 | ||
67e38cf2 RB |
127 | config IRQ_MIPS_CPU |
128 | bool | |
129 | select GENERIC_IRQ_CHIP | |
130 | select IRQ_DOMAIN | |
131 | ||
afc98d90 AS |
132 | config CLPS711X_IRQCHIP |
133 | bool | |
134 | depends on ARCH_CLPS711X | |
135 | select IRQ_DOMAIN | |
136 | select MULTI_IRQ_HANDLER | |
137 | select SPARSE_IRQ | |
138 | default y | |
139 | ||
4db8e6d2 SK |
140 | config OR1K_PIC |
141 | bool | |
142 | select IRQ_DOMAIN | |
143 | ||
8598066c FB |
144 | config OMAP_IRQCHIP |
145 | bool | |
146 | select GENERIC_IRQ_CHIP | |
147 | select IRQ_DOMAIN | |
148 | ||
9dbd90f1 SH |
149 | config ORION_IRQCHIP |
150 | bool | |
151 | select IRQ_DOMAIN | |
152 | select MULTI_IRQ_HANDLER | |
153 | ||
aaa8666a CB |
154 | config PIC32_EVIC |
155 | bool | |
156 | select GENERIC_IRQ_CHIP | |
157 | select IRQ_DOMAIN | |
158 | ||
44358048 MD |
159 | config RENESAS_INTC_IRQPIN |
160 | bool | |
161 | select IRQ_DOMAIN | |
162 | ||
fbc83b7f MD |
163 | config RENESAS_IRQC |
164 | bool | |
99c221df | 165 | select GENERIC_IRQ_CHIP |
fbc83b7f MD |
166 | select IRQ_DOMAIN |
167 | ||
07088484 LJ |
168 | config ST_IRQCHIP |
169 | bool | |
170 | select REGMAP | |
171 | select MFD_SYSCON | |
172 | help | |
173 | Enables SysCfg Controlled IRQs on STi based platforms. | |
174 | ||
4bba6689 MR |
175 | config TANGO_IRQ |
176 | bool | |
177 | select IRQ_DOMAIN | |
178 | select GENERIC_IRQ_CHIP | |
179 | ||
b06eb017 CR |
180 | config TB10X_IRQC |
181 | bool | |
182 | select IRQ_DOMAIN | |
183 | select GENERIC_IRQ_CHIP | |
184 | ||
d01f8633 DR |
185 | config TS4800_IRQ |
186 | tristate "TS-4800 IRQ controller" | |
187 | select IRQ_DOMAIN | |
0df337cf | 188 | depends on HAS_IOMEM |
d2b383dc | 189 | depends on SOC_IMX51 || COMPILE_TEST |
d01f8633 DR |
190 | help |
191 | Support for the TS-4800 FPGA IRQ controller | |
192 | ||
2389d501 LW |
193 | config VERSATILE_FPGA_IRQ |
194 | bool | |
195 | select IRQ_DOMAIN | |
196 | ||
197 | config VERSATILE_FPGA_IRQ_NR | |
198 | int | |
199 | default 4 | |
200 | depends on VERSATILE_FPGA_IRQ | |
26a8e96a MF |
201 | |
202 | config XTENSA_MX | |
203 | bool | |
204 | select IRQ_DOMAIN | |
96ca848e S |
205 | |
206 | config IRQ_CROSSBAR | |
207 | bool | |
208 | help | |
f54619f2 | 209 | Support for a CROSSBAR ip that precedes the main interrupt controller. |
96ca848e S |
210 | The primary irqchip invokes the crossbar's callback which inturn allocates |
211 | a free irq and configures the IP. Thus the peripheral interrupts are | |
212 | routed to one of the free irqchip interrupt lines. | |
89323f8c GS |
213 | |
214 | config KEYSTONE_IRQ | |
215 | tristate "Keystone 2 IRQ controller IP" | |
216 | depends on ARCH_KEYSTONE | |
217 | help | |
218 | Support for Texas Instruments Keystone 2 IRQ controller IP which | |
219 | is part of the Keystone 2 IPC mechanism | |
8a19b8f1 AB |
220 | |
221 | config MIPS_GIC | |
222 | bool | |
bb11cff3 | 223 | select GENERIC_IRQ_IPI |
2af70a96 | 224 | select IRQ_DOMAIN_HIERARCHY |
8a19b8f1 | 225 | select MIPS_CM |
8a764482 | 226 | |
44e08e70 PB |
227 | config INGENIC_IRQ |
228 | bool | |
229 | depends on MACH_INGENIC | |
230 | default y | |
78c10e55 | 231 | |
8a764482 YS |
232 | config RENESAS_H8300H_INTC |
233 | bool | |
234 | select IRQ_DOMAIN | |
235 | ||
236 | config RENESAS_H8S_INTC | |
237 | bool | |
78c10e55 | 238 | select IRQ_DOMAIN |
e324c4dc SW |
239 | |
240 | config IMX_GPCV2 | |
241 | bool | |
242 | select IRQ_DOMAIN | |
243 | help | |
244 | Enables the wakeup IRQs for IMX platforms with GPCv2 block | |
7e4ac676 OR |
245 | |
246 | config IRQ_MXS | |
247 | def_bool y if MACH_ASM9260 || ARCH_MXS | |
248 | select IRQ_DOMAIN | |
249 | select STMP_DEVICE | |
c27f29bb TP |
250 | |
251 | config MVEBU_ODMI | |
252 | bool | |
253 | select GENERIC_MSI_IRQ_DOMAIN | |
9e2c986c | 254 | |
b8f3ebe6 ML |
255 | config LS_SCFG_MSI |
256 | def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE | |
257 | depends on PCI && PCI_MSI | |
258 | select PCI_MSI_IRQ_DOMAIN | |
259 | ||
9e2c986c MZ |
260 | config PARTITION_PERCPU |
261 | bool | |
0efacbba | 262 | |
44df427c NC |
263 | config EZNPS_GIC |
264 | bool "NPS400 Global Interrupt Manager (GIM)" | |
ffd565e3 | 265 | depends on ARC || (COMPILE_TEST && !64BIT) |
44df427c NC |
266 | select IRQ_DOMAIN |
267 | help | |
268 | Support the EZchip NPS400 global interrupt controller |