Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
c43875f6 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
b802fb99 | 8 | #include <dt-bindings/media/tvp5150.h> |
cd4665c5 | 9 | #include <linux/i2c.h> |
5a0e3ad6 | 10 | #include <linux/slab.h> |
33b687cf | 11 | #include <linux/videodev2.h> |
cd4665c5 | 12 | #include <linux/delay.h> |
09aa2609 | 13 | #include <linux/gpio/consumer.h> |
7a707b89 | 14 | #include <linux/module.h> |
c7d97499 | 15 | #include <media/v4l2-async.h> |
6b8fe025 | 16 | #include <media/v4l2-device.h> |
6c45ec71 | 17 | #include <media/v4l2-ctrls.h> |
a2e5f1b3 | 18 | #include <media/v4l2-of.h> |
55606310 | 19 | #include <media/v4l2-mc.h> |
cd4665c5 MCC |
20 | |
21 | #include "tvp5150_reg.h" | |
22 | ||
785a3de1 PZ |
23 | #define TVP5150_H_MAX 720U |
24 | #define TVP5150_V_MAX_525_60 480U | |
25 | #define TVP5150_V_MAX_OTHERS 576U | |
963ddc63 JM |
26 | #define TVP5150_MAX_CROP_LEFT 511 |
27 | #define TVP5150_MAX_CROP_TOP 127 | |
28 | #define TVP5150_CROP_SHIFT 2 | |
29 | ||
c43875f6 | 30 | MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver"); |
cd4665c5 MCC |
31 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
32 | MODULE_LICENSE("GPL"); | |
33 | ||
cd4665c5 | 34 | |
ff699e6b | 35 | static int debug; |
2a0489d3 | 36 | module_param(debug, int, 0644); |
6b8fe025 | 37 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 MCC |
38 | |
39 | struct tvp5150 { | |
6b8fe025 | 40 | struct v4l2_subdev sd; |
55606310 MCC |
41 | #ifdef CONFIG_MEDIA_CONTROLLER |
42 | struct media_pad pads[DEMOD_NUM_PADS]; | |
f7b4b54e JMC |
43 | struct media_entity input_ent[TVP5150_INPUT_NUM]; |
44 | struct media_pad input_pad[TVP5150_INPUT_NUM]; | |
55606310 | 45 | #endif |
6c45ec71 | 46 | struct v4l2_ctrl_handler hdl; |
963ddc63 | 47 | struct v4l2_rect rect; |
84486d53 | 48 | |
3ad96835 | 49 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
50 | u32 input; |
51 | u32 output; | |
84486d53 | 52 | int enable; |
a2e5f1b3 | 53 | |
82275133 JMC |
54 | u16 dev_id; |
55 | u16 rom_ver; | |
56 | ||
a2e5f1b3 | 57 | enum v4l2_mbus_type mbus_type; |
cd4665c5 MCC |
58 | }; |
59 | ||
6b8fe025 | 60 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 61 | { |
6b8fe025 HV |
62 | return container_of(sd, struct tvp5150, sd); |
63 | } | |
64 | ||
6c45ec71 HV |
65 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
66 | { | |
67 | return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; | |
68 | } | |
69 | ||
6b8fe025 HV |
70 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) |
71 | { | |
72 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 | 73 | int rc; |
e35ce2e4 LP |
74 | |
75 | rc = i2c_smbus_read_byte_data(c, addr); | |
76 | if (rc < 0) { | |
77 | v4l2_err(sd, "i2c i/o error: rc == %d\n", rc); | |
78 | return rc; | |
8cd0d4ca | 79 | } |
e1bc80ad | 80 | |
e35ce2e4 | 81 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, rc); |
cd4665c5 | 82 | |
e35ce2e4 | 83 | return rc; |
cd4665c5 MCC |
84 | } |
85 | ||
cacdd6a4 | 86 | static int tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 87 | unsigned char value) |
cd4665c5 | 88 | { |
6b8fe025 | 89 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 | 90 | int rc; |
cd4665c5 | 91 | |
e35ce2e4 LP |
92 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", addr, value); |
93 | rc = i2c_smbus_write_byte_data(c, addr, value); | |
94 | if (rc < 0) | |
cacdd6a4 JMC |
95 | v4l2_err(sd, "i2c i/o error: rc == %d\n", rc); |
96 | ||
97 | return rc; | |
cd4665c5 MCC |
98 | } |
99 | ||
6b8fe025 HV |
100 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
101 | const u8 end, int max_line) | |
3ad96835 | 102 | { |
6b8fe025 | 103 | int i = 0; |
3ad96835 | 104 | |
6b8fe025 HV |
105 | while (init != (u8)(end + 1)) { |
106 | if ((i % max_line) == 0) { | |
107 | if (i > 0) | |
3ad96835 | 108 | printk("\n"); |
6b8fe025 | 109 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 110 | } |
6b8fe025 | 111 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
112 | |
113 | init++; | |
114 | i++; | |
115 | } | |
116 | printk("\n"); | |
117 | } | |
118 | ||
6b8fe025 | 119 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 120 | { |
84486d53 | 121 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 122 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 123 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 124 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 125 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 126 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 127 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 128 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 129 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 130 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 131 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 132 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 133 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
134 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
135 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
136 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 137 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 138 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 139 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 140 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 141 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 142 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 143 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 144 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 145 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 146 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 147 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 148 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 149 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
150 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
151 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 152 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
153 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
154 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 155 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 156 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 157 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 158 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 159 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 160 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 161 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 162 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 163 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
164 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
165 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 166 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 167 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 168 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 169 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 170 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 171 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 172 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 173 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 174 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
175 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
176 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 177 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 178 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 179 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 180 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 181 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 182 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 183 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
184 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
185 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 186 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
187 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
188 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 189 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
190 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
191 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 192 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 193 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 194 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 195 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 196 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
197 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
198 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
199 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
200 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
201 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 202 | |
6b8fe025 HV |
203 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
204 | TVP5150_TELETEXT_FIL1_END, 8); | |
205 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
206 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 207 | |
84486d53 | 208 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 209 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 210 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 211 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 212 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 213 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 214 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 215 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 216 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 217 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 218 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 219 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 220 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 221 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 222 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 223 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 224 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 225 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 226 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
227 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
228 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 229 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 230 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 231 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 232 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 233 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 234 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 235 | |
6b8fe025 HV |
236 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
237 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 238 | |
6b8fe025 HV |
239 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
240 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 241 | |
6b8fe025 HV |
242 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
243 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 244 | |
6b8fe025 HV |
245 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
246 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 247 | |
6b8fe025 HV |
248 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
249 | TVP5150_LINE_MODE_END, 8); | |
250 | return 0; | |
cd4665c5 MCC |
251 | } |
252 | ||
253 | /**************************************************************************** | |
254 | Basic functions | |
255 | ****************************************************************************/ | |
cd4665c5 | 256 | |
6b8fe025 | 257 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 258 | { |
2962fc01 | 259 | int opmode = 0; |
6b8fe025 | 260 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 261 | int input = 0; |
afcc8e8c | 262 | int val; |
84486d53 | 263 | |
c43875f6 MCC |
264 | /* Only tvp5150am1 and tvp5151 have signal generator support */ |
265 | if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) || | |
266 | (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) { | |
267 | if (!decoder->enable) | |
268 | input = 8; | |
269 | } | |
4c86f973 | 270 | |
5325b427 | 271 | switch (decoder->input) { |
c7c0b34c HV |
272 | case TVP5150_COMPOSITE1: |
273 | input |= 2; | |
274 | /* fall through */ | |
275 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 276 | break; |
c7c0b34c | 277 | case TVP5150_SVIDEO: |
c0477ad9 | 278 | default: |
c7c0b34c | 279 | input |= 1; |
c0477ad9 MCC |
280 | break; |
281 | } | |
282 | ||
6b8fe025 | 283 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 284 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
285 | decoder->input, decoder->output, |
286 | input, opmode); | |
12500f07 | 287 | |
6b8fe025 HV |
288 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
289 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
290 | |
291 | /* Svideo should enable YCrCb output and disable GPCL output | |
292 | * For Composite and TV, it should be the reverse | |
293 | */ | |
6b8fe025 | 294 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
8cd0d4ca DL |
295 | if (val < 0) { |
296 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, val); | |
297 | return; | |
298 | } | |
299 | ||
5325b427 | 300 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
301 | val = (val & ~0x40) | 0x10; |
302 | else | |
303 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 304 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
305 | }; |
306 | ||
e1bc80ad MCC |
307 | struct i2c_reg_value { |
308 | unsigned char reg; | |
309 | unsigned char value; | |
310 | }; | |
311 | ||
312 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
313 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
314 | { /* 0x00 */ | |
315 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
316 | }, | |
317 | { /* 0x01 */ | |
318 | TVP5150_ANAL_CHL_CTL,0x15 | |
319 | }, | |
320 | { /* 0x02 */ | |
321 | TVP5150_OP_MODE_CTL,0x00 | |
322 | }, | |
323 | { /* 0x03 */ | |
324 | TVP5150_MISC_CTL,0x01 | |
325 | }, | |
326 | { /* 0x06 */ | |
327 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
328 | }, | |
329 | { /* 0x07 */ | |
330 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
331 | }, | |
332 | { /* 0x08 */ | |
333 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
334 | }, | |
335 | { /* 0x09 */ | |
336 | TVP5150_BRIGHT_CTL,0x80 | |
337 | }, | |
338 | { /* 0x0a */ | |
339 | TVP5150_SATURATION_CTL,0x80 | |
340 | }, | |
341 | { /* 0x0b */ | |
342 | TVP5150_HUE_CTL,0x00 | |
343 | }, | |
344 | { /* 0x0c */ | |
345 | TVP5150_CONTRAST_CTL,0x80 | |
346 | }, | |
347 | { /* 0x0d */ | |
348 | TVP5150_DATA_RATE_SEL,0x47 | |
349 | }, | |
350 | { /* 0x0e */ | |
351 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
352 | }, | |
353 | { /* 0x0f */ | |
354 | TVP5150_CONF_SHARED_PIN,0x08 | |
355 | }, | |
356 | { /* 0x11 */ | |
357 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
358 | }, | |
359 | { /* 0x12 */ | |
360 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
361 | }, | |
362 | { /* 0x13 */ | |
363 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
364 | }, | |
365 | { /* 0x14 */ | |
366 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
367 | }, | |
368 | { /* 0x15 */ | |
369 | TVP5150_GENLOCK,0x01 | |
370 | }, | |
371 | { /* 0x16 */ | |
372 | TVP5150_HORIZ_SYNC_START,0x80 | |
373 | }, | |
374 | { /* 0x18 */ | |
375 | TVP5150_VERT_BLANKING_START,0x00 | |
376 | }, | |
377 | { /* 0x19 */ | |
378 | TVP5150_VERT_BLANKING_STOP,0x00 | |
379 | }, | |
380 | { /* 0x1a */ | |
381 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
382 | }, | |
383 | { /* 0x1b */ | |
384 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
385 | }, | |
386 | { /* 0x1c */ | |
387 | TVP5150_INT_RESET_REG_B,0x00 | |
388 | }, | |
389 | { /* 0x1d */ | |
390 | TVP5150_INT_ENABLE_REG_B,0x00 | |
391 | }, | |
392 | { /* 0x1e */ | |
393 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
394 | }, | |
395 | { /* 0x28 */ | |
396 | TVP5150_VIDEO_STD,0x00 | |
397 | }, | |
398 | { /* 0x2e */ | |
399 | TVP5150_MACROVISION_ON_CTR,0x0f | |
400 | }, | |
401 | { /* 0x2f */ | |
402 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
403 | }, | |
404 | { /* 0xbb */ | |
405 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
406 | }, | |
407 | { /* 0xc0 */ | |
408 | TVP5150_INT_STATUS_REG_A,0x00 | |
409 | }, | |
410 | { /* 0xc1 */ | |
411 | TVP5150_INT_ENABLE_REG_A,0x00 | |
412 | }, | |
413 | { /* 0xc2 */ | |
414 | TVP5150_INT_CONF,0x04 | |
415 | }, | |
416 | { /* 0xc8 */ | |
417 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
418 | }, | |
419 | { /* 0xc9 */ | |
420 | TVP5150_FIFO_RESET,0x00 | |
421 | }, | |
422 | { /* 0xca */ | |
423 | TVP5150_LINE_NUMBER_INT,0x00 | |
424 | }, | |
425 | { /* 0xcb */ | |
426 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
427 | }, | |
428 | { /* 0xcc */ | |
429 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
430 | }, | |
431 | { /* 0xcd */ | |
432 | TVP5150_FIFO_OUT_CTRL,0x01 | |
433 | }, | |
434 | { /* 0xcf */ | |
3ad96835 | 435 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
436 | }, |
437 | { /* 0xd0 */ | |
3ad96835 | 438 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
439 | }, |
440 | { /* 0xfc */ | |
441 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
442 | }, | |
443 | { /* end of data */ | |
444 | 0xff,0xff | |
445 | } | |
446 | }; | |
447 | ||
448 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
449 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
450 | { | |
451 | TVP5150_CONF_SHARED_PIN, 2 | |
452 | },{ /* Automatic offset and AGC enabled */ | |
453 | TVP5150_ANAL_CHL_CTL, 0x15 | |
454 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
455 | TVP5150_MISC_CTL, 0x6f | |
456 | },{ /* Activates video std autodetection for all standards */ | |
457 | TVP5150_AUTOSW_MSK, 0x0 | |
458 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
459 | TVP5150_DATA_RATE_SEL, 0x47 | |
460 | },{ | |
461 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
462 | },{ | |
463 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
464 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
465 | 0x27, 0x20 | |
466 | },{ | |
467 | 0xff,0xff | |
468 | } | |
469 | }; | |
470 | ||
6ac48b45 MCC |
471 | struct tvp5150_vbi_type { |
472 | unsigned int vbi_type; | |
473 | unsigned int ini_line; | |
474 | unsigned int end_line; | |
475 | unsigned int by_field :1; | |
476 | }; | |
477 | ||
e1bc80ad MCC |
478 | struct i2c_vbi_ram_value { |
479 | u16 reg; | |
6ac48b45 MCC |
480 | struct tvp5150_vbi_type type; |
481 | unsigned char values[16]; | |
e1bc80ad MCC |
482 | }; |
483 | ||
6ac48b45 MCC |
484 | /* This struct have the values for each supported VBI Standard |
485 | * by | |
486 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
487 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
488 | * and so on. There are 16 possible locations from 0 to 15. | |
489 | */ | |
3ad96835 | 490 | |
a9cff90e | 491 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 492 | { |
9bc7400a HV |
493 | /* FIXME: Current api doesn't handle all VBI types, those not |
494 | yet supported are placed under #if 0 */ | |
495 | #if 0 | |
6ac48b45 MCC |
496 | {0x010, /* Teletext, SECAM, WST System A */ |
497 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
498 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
499 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 500 | }, |
9bc7400a | 501 | #endif |
6ac48b45 | 502 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 503 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
504 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
505 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 506 | }, |
9bc7400a | 507 | #if 0 |
6ac48b45 MCC |
508 | {0x050, /* Teletext, PAL, WST System C */ |
509 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
510 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
511 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 512 | }, |
6ac48b45 MCC |
513 | {0x070, /* Teletext, NTSC, WST System B */ |
514 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
515 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
516 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 517 | }, |
6ac48b45 MCC |
518 | {0x090, /* Tetetext, NTSC NABTS System C */ |
519 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
520 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
521 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 522 | }, |
6ac48b45 MCC |
523 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
524 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
525 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
526 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 527 | }, |
6ac48b45 MCC |
528 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
529 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
530 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
531 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 532 | }, |
9bc7400a | 533 | #endif |
6ac48b45 MCC |
534 | {0x0f0, /* Closed Caption, NTSC */ |
535 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
536 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
537 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 538 | }, |
6ac48b45 | 539 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 540 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
541 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
542 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 543 | }, |
9bc7400a | 544 | #if 0 |
6ac48b45 MCC |
545 | {0x130, /* Wide Screen Signal, NTSC C */ |
546 | {V4L2_SLICED_WSS_525,20,20,1}, | |
547 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
548 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 549 | }, |
6ac48b45 MCC |
550 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
551 | {V4l2_SLICED_VITC_625,6,22,0}, | |
552 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
553 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 554 | }, |
6ac48b45 MCC |
555 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
556 | {V4l2_SLICED_VITC_525,10,20,0}, | |
557 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
558 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 559 | }, |
9bc7400a | 560 | #endif |
6ac48b45 MCC |
561 | {0x190, /* Video Program System (VPS), PAL */ |
562 | {V4L2_SLICED_VPS,16,16,0}, | |
563 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
564 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 565 | }, |
6ac48b45 MCC |
566 | /* 0x1d0 User programmable */ |
567 | ||
568 | /* End of struct */ | |
569 | { (u16)-1 } | |
e1bc80ad | 570 | }; |
4c86f973 | 571 | |
6b8fe025 | 572 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 573 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
574 | { |
575 | while (regs->reg != 0xff) { | |
6b8fe025 | 576 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
577 | regs++; |
578 | } | |
579 | return 0; | |
580 | } | |
84486d53 | 581 | |
6b8fe025 | 582 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 583 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
584 | { |
585 | unsigned int i; | |
cd4665c5 | 586 | |
e1bc80ad | 587 | /* Disable Full Field */ |
6b8fe025 | 588 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 589 | |
e1bc80ad | 590 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
591 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
592 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 593 | |
e1bc80ad | 594 | /* Load Ram Table */ |
6b8fe025 HV |
595 | while (regs->reg != (u16)-1) { |
596 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
597 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 598 | |
6b8fe025 HV |
599 | for (i = 0; i < 16; i++) |
600 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 601 | |
e1bc80ad MCC |
602 | regs++; |
603 | } | |
604 | return 0; | |
605 | } | |
cd4665c5 | 606 | |
6ac48b45 | 607 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 608 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
609 | struct v4l2_sliced_vbi_cap *cap) |
610 | { | |
6b8fe025 | 611 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
612 | int line; |
613 | ||
bccfa449 | 614 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
615 | memset(cap, 0, sizeof *cap); |
616 | ||
617 | while (regs->reg != (u16)-1 ) { | |
618 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
619 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
620 | } | |
621 | cap->service_set |= regs->type.vbi_type; | |
622 | ||
623 | regs++; | |
624 | } | |
6b8fe025 | 625 | return 0; |
6ac48b45 MCC |
626 | } |
627 | ||
3ad96835 MCC |
628 | /* Set vbi processing |
629 | * type - one of tvp5150_vbi_types | |
630 | * line - line to gather data | |
631 | * fields: bit 0 field1, bit 1, field2 | |
632 | * flags (default=0xf0) is a bitmask, were set means: | |
633 | * bit 7: enable filtering null bytes on CC | |
634 | * bit 6: send data also to FIFO | |
635 | * bit 5: don't allow data with errors on FIFO | |
636 | * bit 4: enable ECC when possible | |
637 | * pix_align = pix alignment: | |
638 | * LSB = field1 | |
639 | * MSB = field2 | |
640 | */ | |
6b8fe025 | 641 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
642 | const struct i2c_vbi_ram_value *regs, |
643 | unsigned int type,u8 flags, int line, | |
644 | const int fields) | |
3ad96835 | 645 | { |
6b8fe025 HV |
646 | struct tvp5150 *decoder = to_tvp5150(sd); |
647 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 648 | u8 reg; |
2701dacb | 649 | int pos=0; |
3ad96835 MCC |
650 | |
651 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 652 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 653 | return 0; |
7d5b7b98 | 654 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
655 | /* Don't follow NTSC Line number convension */ |
656 | line += 3; | |
657 | } | |
658 | ||
659 | if (line<6||line>27) | |
2701dacb MCC |
660 | return 0; |
661 | ||
662 | while (regs->reg != (u16)-1 ) { | |
663 | if ((type & regs->type.vbi_type) && | |
664 | (line>=regs->type.ini_line) && | |
665 | (line<=regs->type.end_line)) { | |
666 | type=regs->type.vbi_type; | |
667 | break; | |
668 | } | |
669 | ||
670 | regs++; | |
671 | pos++; | |
672 | } | |
673 | if (regs->reg == (u16)-1) | |
674 | return 0; | |
3ad96835 | 675 | |
2701dacb | 676 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
677 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
678 | ||
679 | if (fields&1) { | |
6b8fe025 | 680 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
681 | } |
682 | ||
683 | if (fields&2) { | |
6b8fe025 | 684 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
685 | } |
686 | ||
2701dacb | 687 | return type; |
3ad96835 MCC |
688 | } |
689 | ||
6b8fe025 | 690 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
691 | const struct i2c_vbi_ram_value *regs, int line) |
692 | { | |
6b8fe025 HV |
693 | struct tvp5150 *decoder = to_tvp5150(sd); |
694 | v4l2_std_id std = decoder->norm; | |
12db5607 | 695 | u8 reg; |
6b8fe025 | 696 | int pos, type = 0; |
8cd0d4ca | 697 | int i, ret = 0; |
12db5607 MCC |
698 | |
699 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 700 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 701 | return 0; |
7d5b7b98 | 702 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
703 | /* Don't follow NTSC Line number convension */ |
704 | line += 3; | |
705 | } | |
706 | ||
6b8fe025 | 707 | if (line < 6 || line > 27) |
12db5607 MCC |
708 | return 0; |
709 | ||
6b8fe025 | 710 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 711 | |
8cd0d4ca DL |
712 | for (i = 0; i <= 1; i++) { |
713 | ret = tvp5150_read(sd, reg + i); | |
714 | if (ret < 0) { | |
715 | v4l2_err(sd, "%s: failed with error = %d\n", | |
716 | __func__, ret); | |
717 | return 0; | |
718 | } | |
719 | pos = ret & 0x0f; | |
720 | if (pos < 0x0f) | |
721 | type |= regs[pos].type.vbi_type; | |
722 | } | |
12db5607 MCC |
723 | |
724 | return type; | |
725 | } | |
6b8fe025 HV |
726 | |
727 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 728 | { |
6b8fe025 HV |
729 | struct tvp5150 *decoder = to_tvp5150(sd); |
730 | int fmt = 0; | |
e1bc80ad | 731 | |
6b8fe025 | 732 | decoder->norm = std; |
e1bc80ad MCC |
733 | |
734 | /* First tests should be against specific std */ | |
735 | ||
26811ae0 | 736 | if (std == V4L2_STD_NTSC_443) { |
2da12fcb | 737 | fmt = VIDEO_STD_NTSC_4_43_BIT; |
26811ae0 | 738 | } else if (std == V4L2_STD_PAL_M) { |
2da12fcb | 739 | fmt = VIDEO_STD_PAL_M_BIT; |
26811ae0 | 740 | } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) { |
2da12fcb | 741 | fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; |
e1bc80ad MCC |
742 | } else { |
743 | /* Then, test against generic ones */ | |
6b8fe025 | 744 | if (std & V4L2_STD_NTSC) |
2da12fcb | 745 | fmt = VIDEO_STD_NTSC_MJ_BIT; |
6b8fe025 | 746 | else if (std & V4L2_STD_PAL) |
2da12fcb | 747 | fmt = VIDEO_STD_PAL_BDGHIN_BIT; |
6b8fe025 | 748 | else if (std & V4L2_STD_SECAM) |
2da12fcb | 749 | fmt = VIDEO_STD_SECAM_BIT; |
e1bc80ad | 750 | } |
84486d53 | 751 | |
6b8fe025 HV |
752 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
753 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
754 | return 0; |
755 | } | |
756 | ||
6b8fe025 HV |
757 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
758 | { | |
759 | struct tvp5150 *decoder = to_tvp5150(sd); | |
760 | ||
761 | if (decoder->norm == std) | |
762 | return 0; | |
763 | ||
963ddc63 JM |
764 | /* Change cropping height limits */ |
765 | if (std & V4L2_STD_525_60) | |
766 | decoder->rect.height = TVP5150_V_MAX_525_60; | |
767 | else | |
768 | decoder->rect.height = TVP5150_V_MAX_OTHERS; | |
769 | ||
770 | ||
6b8fe025 HV |
771 | return tvp5150_set_std(sd, std); |
772 | } | |
773 | ||
774 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 775 | { |
6b8fe025 | 776 | struct tvp5150 *decoder = to_tvp5150(sd); |
84486d53 | 777 | |
e1bc80ad | 778 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 779 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
780 | |
781 | /* Initializes VDP registers */ | |
6b8fe025 | 782 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
783 | |
784 | /* Selects decoder input */ | |
6b8fe025 | 785 | tvp5150_selmux(sd); |
e1bc80ad MCC |
786 | |
787 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 788 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
789 | |
790 | /* Initialize image preferences */ | |
6c45ec71 | 791 | v4l2_ctrl_handler_setup(&decoder->hdl); |
e1bc80ad | 792 | |
6b8fe025 | 793 | tvp5150_set_std(sd, decoder->norm); |
a2e5f1b3 JMC |
794 | |
795 | if (decoder->mbus_type == V4L2_MBUS_PARALLEL) | |
796 | tvp5150_write(sd, TVP5150_DATA_RATE_SEL, 0x40); | |
797 | ||
6b8fe025 | 798 | return 0; |
cd4665c5 MCC |
799 | }; |
800 | ||
6c45ec71 | 801 | static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) |
a6c2ba28 | 802 | { |
6c45ec71 | 803 | struct v4l2_subdev *sd = to_sd(ctrl); |
c43875f6 | 804 | struct tvp5150 *decoder = to_tvp5150(sd); |
a6c2ba28 | 805 | |
806 | switch (ctrl->id) { | |
807 | case V4L2_CID_BRIGHTNESS: | |
6c45ec71 | 808 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val); |
a6c2ba28 | 809 | return 0; |
810 | case V4L2_CID_CONTRAST: | |
6c45ec71 | 811 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val); |
a6c2ba28 | 812 | return 0; |
813 | case V4L2_CID_SATURATION: | |
6c45ec71 | 814 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val); |
a6c2ba28 | 815 | return 0; |
816 | case V4L2_CID_HUE: | |
6c45ec71 | 817 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val); |
c43875f6 MCC |
818 | case V4L2_CID_TEST_PATTERN: |
819 | decoder->enable = ctrl->val ? false : true; | |
820 | tvp5150_selmux(sd); | |
a6c2ba28 | 821 | return 0; |
a6c2ba28 | 822 | } |
c0477ad9 | 823 | return -EINVAL; |
a6c2ba28 | 824 | } |
825 | ||
ec2c4f3f JM |
826 | static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) |
827 | { | |
828 | int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); | |
829 | ||
830 | switch (val & 0x0F) { | |
831 | case 0x01: | |
832 | return V4L2_STD_NTSC; | |
833 | case 0x03: | |
834 | return V4L2_STD_PAL; | |
835 | case 0x05: | |
836 | return V4L2_STD_PAL_M; | |
837 | case 0x07: | |
838 | return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; | |
839 | case 0x09: | |
840 | return V4L2_STD_NTSC_443; | |
841 | case 0xb: | |
842 | return V4L2_STD_SECAM; | |
843 | default: | |
844 | return V4L2_STD_UNKNOWN; | |
845 | } | |
846 | } | |
847 | ||
da298c6d HV |
848 | static int tvp5150_fill_fmt(struct v4l2_subdev *sd, |
849 | struct v4l2_subdev_pad_config *cfg, | |
850 | struct v4l2_subdev_format *format) | |
ec2c4f3f | 851 | { |
da298c6d | 852 | struct v4l2_mbus_framefmt *f; |
ec2c4f3f | 853 | struct tvp5150 *decoder = to_tvp5150(sd); |
ec2c4f3f | 854 | |
da298c6d | 855 | if (!format || format->pad) |
ec2c4f3f JM |
856 | return -EINVAL; |
857 | ||
da298c6d HV |
858 | f = &format->format; |
859 | ||
ec2c4f3f JM |
860 | tvp5150_reset(sd, 0); |
861 | ||
963ddc63 | 862 | f->width = decoder->rect.width; |
4f57d27b | 863 | f->height = decoder->rect.height / 2; |
ec2c4f3f | 864 | |
f5fe58fd | 865 | f->code = MEDIA_BUS_FMT_UYVY8_2X8; |
4f57d27b | 866 | f->field = V4L2_FIELD_ALTERNATE; |
ec2c4f3f JM |
867 | f->colorspace = V4L2_COLORSPACE_SMPTE170M; |
868 | ||
869 | v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width, | |
870 | f->height); | |
871 | return 0; | |
872 | } | |
873 | ||
4f996594 | 874 | static int tvp5150_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a) |
963ddc63 JM |
875 | { |
876 | struct v4l2_rect rect = a->c; | |
877 | struct tvp5150 *decoder = to_tvp5150(sd); | |
878 | v4l2_std_id std; | |
f90580ca | 879 | unsigned int hmax; |
963ddc63 JM |
880 | |
881 | v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n", | |
882 | __func__, rect.left, rect.top, rect.width, rect.height); | |
883 | ||
884 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
885 | return -EINVAL; | |
886 | ||
887 | /* tvp5150 has some special limits */ | |
888 | rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); | |
f90580ca RR |
889 | rect.width = clamp_t(unsigned int, rect.width, |
890 | TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, | |
891 | TVP5150_H_MAX - rect.left); | |
963ddc63 JM |
892 | rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); |
893 | ||
894 | /* Calculate height based on current standard */ | |
895 | if (decoder->norm == V4L2_STD_ALL) | |
896 | std = tvp5150_read_std(sd); | |
897 | else | |
898 | std = decoder->norm; | |
899 | ||
900 | if (std & V4L2_STD_525_60) | |
901 | hmax = TVP5150_V_MAX_525_60; | |
902 | else | |
903 | hmax = TVP5150_V_MAX_OTHERS; | |
904 | ||
f90580ca RR |
905 | rect.height = clamp_t(unsigned int, rect.height, |
906 | hmax - TVP5150_MAX_CROP_TOP - rect.top, | |
907 | hmax - rect.top); | |
963ddc63 JM |
908 | |
909 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top); | |
910 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, | |
911 | rect.top + rect.height - hmax); | |
912 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB, | |
913 | rect.left >> TVP5150_CROP_SHIFT); | |
914 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB, | |
915 | rect.left | (1 << TVP5150_CROP_SHIFT)); | |
916 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB, | |
917 | (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> | |
918 | TVP5150_CROP_SHIFT); | |
919 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB, | |
920 | rect.left + rect.width - TVP5150_MAX_CROP_LEFT); | |
921 | ||
922 | decoder->rect = rect; | |
923 | ||
924 | return 0; | |
925 | } | |
926 | ||
927 | static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
928 | { | |
12bd10c7 | 929 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
930 | |
931 | a->c = decoder->rect; | |
932 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
933 | ||
934 | return 0; | |
935 | } | |
936 | ||
937 | static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
938 | { | |
12bd10c7 | 939 | struct tvp5150 *decoder = to_tvp5150(sd); |
963ddc63 JM |
940 | v4l2_std_id std; |
941 | ||
942 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
943 | return -EINVAL; | |
944 | ||
945 | a->bounds.left = 0; | |
946 | a->bounds.top = 0; | |
947 | a->bounds.width = TVP5150_H_MAX; | |
948 | ||
949 | /* Calculate height based on current standard */ | |
950 | if (decoder->norm == V4L2_STD_ALL) | |
951 | std = tvp5150_read_std(sd); | |
952 | else | |
953 | std = decoder->norm; | |
954 | ||
955 | if (std & V4L2_STD_525_60) | |
956 | a->bounds.height = TVP5150_V_MAX_525_60; | |
957 | else | |
958 | a->bounds.height = TVP5150_V_MAX_OTHERS; | |
959 | ||
960 | a->defrect = a->bounds; | |
961 | a->pixelaspect.numerator = 1; | |
962 | a->pixelaspect.denominator = 1; | |
963 | ||
964 | return 0; | |
965 | } | |
966 | ||
dd3a46bb LP |
967 | static int tvp5150_g_mbus_config(struct v4l2_subdev *sd, |
968 | struct v4l2_mbus_config *cfg) | |
969 | { | |
a2e5f1b3 JMC |
970 | struct tvp5150 *decoder = to_tvp5150(sd); |
971 | ||
972 | cfg->type = decoder->mbus_type; | |
dd3a46bb LP |
973 | cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
974 | | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH; | |
975 | ||
976 | return 0; | |
977 | } | |
978 | ||
e545ac87 LP |
979 | /**************************************************************************** |
980 | V4L2 subdev pad ops | |
981 | ****************************************************************************/ | |
982 | static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd, | |
983 | struct v4l2_subdev_pad_config *cfg, | |
984 | struct v4l2_subdev_mbus_code_enum *code) | |
985 | { | |
986 | if (code->pad || code->index) | |
987 | return -EINVAL; | |
988 | ||
989 | code->code = MEDIA_BUS_FMT_UYVY8_2X8; | |
990 | return 0; | |
991 | } | |
992 | ||
993 | static int tvp5150_enum_frame_size(struct v4l2_subdev *sd, | |
994 | struct v4l2_subdev_pad_config *cfg, | |
995 | struct v4l2_subdev_frame_size_enum *fse) | |
996 | { | |
997 | struct tvp5150 *decoder = to_tvp5150(sd); | |
998 | ||
999 | if (fse->index >= 8 || fse->code != MEDIA_BUS_FMT_UYVY8_2X8) | |
1000 | return -EINVAL; | |
1001 | ||
1002 | fse->code = MEDIA_BUS_FMT_UYVY8_2X8; | |
1003 | fse->min_width = decoder->rect.width; | |
1004 | fse->max_width = decoder->rect.width; | |
1005 | fse->min_height = decoder->rect.height / 2; | |
1006 | fse->max_height = decoder->rect.height / 2; | |
1007 | ||
1008 | return 0; | |
1009 | } | |
1010 | ||
f7b4b54e JMC |
1011 | /**************************************************************************** |
1012 | Media entity ops | |
1013 | ****************************************************************************/ | |
1014 | ||
1015 | static int tvp5150_link_setup(struct media_entity *entity, | |
1016 | const struct media_pad *local, | |
1017 | const struct media_pad *remote, u32 flags) | |
1018 | { | |
1019 | #ifdef CONFIG_MEDIA_CONTROLLER | |
1020 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); | |
1021 | struct tvp5150 *decoder = to_tvp5150(sd); | |
1022 | int i; | |
1023 | ||
1024 | for (i = 0; i < TVP5150_INPUT_NUM; i++) { | |
1025 | if (remote->entity == &decoder->input_ent[i]) | |
1026 | break; | |
1027 | } | |
1028 | ||
1029 | /* Do nothing for entities that are not input connectors */ | |
1030 | if (i == TVP5150_INPUT_NUM) | |
1031 | return 0; | |
1032 | ||
1033 | decoder->input = i; | |
1034 | ||
f7b4b54e JMC |
1035 | tvp5150_selmux(sd); |
1036 | #endif | |
1037 | ||
1038 | return 0; | |
1039 | } | |
1040 | ||
1041 | static const struct media_entity_operations tvp5150_sd_media_ops = { | |
1042 | .link_setup = tvp5150_link_setup, | |
1043 | }; | |
1044 | ||
84486d53 MCC |
1045 | /**************************************************************************** |
1046 | I2C Command | |
1047 | ****************************************************************************/ | |
c7c0b34c | 1048 | |
460b6c08 LP |
1049 | static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable) |
1050 | { | |
a2e5f1b3 | 1051 | struct tvp5150 *decoder = to_tvp5150(sd); |
841502d7 MCC |
1052 | /* Output format: 8-bit ITU-R BT.656 with embedded syncs */ |
1053 | int val = 0x09; | |
a2e5f1b3 JMC |
1054 | |
1055 | /* Output format: 8-bit 4:2:2 YUV with discrete sync */ | |
841502d7 MCC |
1056 | if (decoder->mbus_type == V4L2_MBUS_PARALLEL) |
1057 | val = 0x0d; | |
a2e5f1b3 | 1058 | |
460b6c08 LP |
1059 | /* Initializes TVP5150 to its default values */ |
1060 | /* # set PCLK (27MHz) */ | |
1061 | tvp5150_write(sd, TVP5150_CONF_SHARED_PIN, 0x00); | |
1062 | ||
460b6c08 | 1063 | if (enable) |
841502d7 | 1064 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
460b6c08 LP |
1065 | else |
1066 | tvp5150_write(sd, TVP5150_MISC_CTL, 0x00); | |
1067 | ||
1068 | return 0; | |
1069 | } | |
1070 | ||
5325b427 HV |
1071 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
1072 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
1073 | { |
1074 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 1075 | |
5325b427 HV |
1076 | decoder->input = input; |
1077 | decoder->output = output; | |
c43875f6 MCC |
1078 | |
1079 | if (output == TVP5150_BLACK_SCREEN) | |
1080 | decoder->enable = false; | |
1081 | else | |
1082 | decoder->enable = true; | |
1083 | ||
6b8fe025 HV |
1084 | tvp5150_selmux(sd); |
1085 | return 0; | |
1086 | } | |
6ac48b45 | 1087 | |
d37dad49 HV |
1088 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
1089 | { | |
1090 | /* this is for capturing 36 raw vbi lines | |
1091 | if there's a way to cut off the beginning 2 vbi lines | |
1092 | with the tvp5150 then the vbi line count could be lowered | |
1093 | to 17 lines/field again, although I couldn't find a register | |
1094 | which could do that cropping */ | |
1095 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
1096 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
1097 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
1098 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
1099 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
1100 | } | |
1101 | return 0; | |
1102 | } | |
1103 | ||
1104 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 1105 | { |
6b8fe025 HV |
1106 | int i; |
1107 | ||
6b8fe025 HV |
1108 | if (svbi->service_set != 0) { |
1109 | for (i = 0; i <= 23; i++) { | |
1110 | svbi->service_lines[1][i] = 0; | |
1111 | svbi->service_lines[0][i] = | |
1112 | tvp5150_set_vbi(sd, vbi_ram_default, | |
1113 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 1114 | } |
6b8fe025 HV |
1115 | /* Enables FIFO */ |
1116 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
1117 | } else { | |
1118 | /* Disables FIFO*/ | |
1119 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 1120 | |
6b8fe025 HV |
1121 | /* Disable Full Field */ |
1122 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 1123 | |
6b8fe025 HV |
1124 | /* Disable Line modes */ |
1125 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
1126 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 1127 | } |
6b8fe025 HV |
1128 | return 0; |
1129 | } | |
12db5607 | 1130 | |
d37dad49 HV |
1131 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
1132 | { | |
1133 | int i, mask = 0; | |
1134 | ||
30634e8e | 1135 | memset(svbi->service_lines, 0, sizeof(svbi->service_lines)); |
12db5607 | 1136 | |
6b8fe025 HV |
1137 | for (i = 0; i <= 23; i++) { |
1138 | svbi->service_lines[0][i] = | |
1139 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
1140 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 1141 | } |
6b8fe025 HV |
1142 | svbi->service_set = mask; |
1143 | return 0; | |
1144 | } | |
1145 | ||
21dcd8cc | 1146 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 1147 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 | 1148 | { |
8cd0d4ca DL |
1149 | int res; |
1150 | ||
8cd0d4ca DL |
1151 | res = tvp5150_read(sd, reg->reg & 0xff); |
1152 | if (res < 0) { | |
1153 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, res); | |
1154 | return res; | |
1155 | } | |
1156 | ||
1157 | reg->val = res; | |
aecde8b5 | 1158 | reg->size = 1; |
6b8fe025 HV |
1159 | return 0; |
1160 | } | |
84486d53 | 1161 | |
977ba3b1 | 1162 | static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) |
6b8fe025 | 1163 | { |
eca4ca84 | 1164 | return tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); |
6b8fe025 HV |
1165 | } |
1166 | #endif | |
a6c2ba28 | 1167 | |
6b8fe025 HV |
1168 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1169 | { | |
1170 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1171 | |
6b8fe025 HV |
1172 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1173 | return 0; | |
1174 | } | |
a6c2ba28 | 1175 | |
f7b4b54e JMC |
1176 | static int tvp5150_registered_async(struct v4l2_subdev *sd) |
1177 | { | |
1178 | #ifdef CONFIG_MEDIA_CONTROLLER | |
1179 | struct tvp5150 *decoder = to_tvp5150(sd); | |
1180 | int ret = 0; | |
1181 | int i; | |
1182 | ||
1183 | for (i = 0; i < TVP5150_INPUT_NUM; i++) { | |
1184 | struct media_entity *input = &decoder->input_ent[i]; | |
1185 | struct media_pad *pad = &decoder->input_pad[i]; | |
1186 | ||
1187 | if (!input->name) | |
1188 | continue; | |
1189 | ||
1190 | decoder->input_pad[i].flags = MEDIA_PAD_FL_SOURCE; | |
1191 | ||
1192 | ret = media_entity_pads_init(input, 1, pad); | |
1193 | if (ret < 0) | |
1194 | return ret; | |
1195 | ||
1196 | ret = media_device_register_entity(sd->v4l2_dev->mdev, input); | |
1197 | if (ret < 0) | |
1198 | return ret; | |
1199 | ||
1200 | ret = media_create_pad_link(input, 0, &sd->entity, | |
1201 | DEMOD_PAD_IF_INPUT, 0); | |
1202 | if (ret < 0) { | |
1203 | media_device_unregister_entity(input); | |
1204 | return ret; | |
1205 | } | |
1206 | } | |
1207 | #endif | |
1208 | ||
1209 | return 0; | |
1210 | } | |
1211 | ||
6b8fe025 HV |
1212 | /* ----------------------------------------------------------------------- */ |
1213 | ||
6c45ec71 HV |
1214 | static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { |
1215 | .s_ctrl = tvp5150_s_ctrl, | |
1216 | }; | |
1217 | ||
6b8fe025 HV |
1218 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { |
1219 | .log_status = tvp5150_log_status, | |
6b8fe025 HV |
1220 | .reset = tvp5150_reset, |
1221 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1222 | .g_register = tvp5150_g_register, | |
1223 | .s_register = tvp5150_s_register, | |
1224 | #endif | |
f7b4b54e | 1225 | .registered_async = tvp5150_registered_async, |
6b8fe025 HV |
1226 | }; |
1227 | ||
1228 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1229 | .g_tuner = tvp5150_g_tuner, |
1230 | }; | |
1231 | ||
1232 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
8774bed9 | 1233 | .s_std = tvp5150_s_std, |
460b6c08 | 1234 | .s_stream = tvp5150_s_stream, |
6b8fe025 | 1235 | .s_routing = tvp5150_s_routing, |
963ddc63 JM |
1236 | .s_crop = tvp5150_s_crop, |
1237 | .g_crop = tvp5150_g_crop, | |
1238 | .cropcap = tvp5150_cropcap, | |
dd3a46bb | 1239 | .g_mbus_config = tvp5150_g_mbus_config, |
32cd527f HV |
1240 | }; |
1241 | ||
1242 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1243 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1244 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1245 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1246 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1247 | }; |
1248 | ||
ebcff5fc HV |
1249 | static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = { |
1250 | .enum_mbus_code = tvp5150_enum_mbus_code, | |
e545ac87 | 1251 | .enum_frame_size = tvp5150_enum_frame_size, |
da298c6d HV |
1252 | .set_fmt = tvp5150_fill_fmt, |
1253 | .get_fmt = tvp5150_fill_fmt, | |
ebcff5fc HV |
1254 | }; |
1255 | ||
6b8fe025 HV |
1256 | static const struct v4l2_subdev_ops tvp5150_ops = { |
1257 | .core = &tvp5150_core_ops, | |
1258 | .tuner = &tvp5150_tuner_ops, | |
1259 | .video = &tvp5150_video_ops, | |
32cd527f | 1260 | .vbi = &tvp5150_vbi_ops, |
ebcff5fc | 1261 | .pad = &tvp5150_pad_ops, |
6b8fe025 HV |
1262 | }; |
1263 | ||
1264 | ||
cd4665c5 MCC |
1265 | /**************************************************************************** |
1266 | I2C Client & Driver | |
1267 | ****************************************************************************/ | |
cd4665c5 | 1268 | |
7871597a LP |
1269 | static int tvp5150_detect_version(struct tvp5150 *core) |
1270 | { | |
1271 | struct v4l2_subdev *sd = &core->sd; | |
1272 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
1273 | unsigned int i; | |
7871597a LP |
1274 | u8 regs[4]; |
1275 | int res; | |
1276 | ||
1277 | /* | |
1278 | * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, | |
1279 | * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER | |
1280 | */ | |
1281 | for (i = 0; i < 4; i++) { | |
1282 | res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i); | |
1283 | if (res < 0) | |
1284 | return res; | |
1285 | regs[i] = res; | |
1286 | } | |
1287 | ||
82275133 JMC |
1288 | core->dev_id = (regs[0] << 8) | regs[1]; |
1289 | core->rom_ver = (regs[2] << 8) | regs[3]; | |
7871597a LP |
1290 | |
1291 | v4l2_info(sd, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n", | |
82275133 JMC |
1292 | core->dev_id, regs[2], regs[3], c->addr << 1, |
1293 | c->adapter->name); | |
7871597a | 1294 | |
82275133 | 1295 | if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) { |
7871597a | 1296 | v4l2_info(sd, "tvp5150a detected.\n"); |
82275133 | 1297 | } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) { |
7871597a LP |
1298 | v4l2_info(sd, "tvp5150am1 detected.\n"); |
1299 | ||
1300 | /* ITU-T BT.656.4 timing */ | |
1301 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); | |
82275133 | 1302 | } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) { |
05676b3e | 1303 | v4l2_info(sd, "tvp5151 detected.\n"); |
7871597a | 1304 | } else { |
82275133 JMC |
1305 | v4l2_info(sd, "*** unknown tvp%04x chip detected.\n", |
1306 | core->dev_id); | |
7871597a LP |
1307 | } |
1308 | ||
1309 | return 0; | |
1310 | } | |
1311 | ||
09aa2609 JMC |
1312 | static int tvp5150_init(struct i2c_client *c) |
1313 | { | |
1314 | struct gpio_desc *pdn_gpio; | |
1315 | struct gpio_desc *reset_gpio; | |
1316 | ||
1317 | pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH); | |
1318 | if (IS_ERR(pdn_gpio)) | |
1319 | return PTR_ERR(pdn_gpio); | |
1320 | ||
1321 | if (pdn_gpio) { | |
1322 | gpiod_set_value_cansleep(pdn_gpio, 0); | |
1323 | /* Delay time between power supplies active and reset */ | |
1324 | msleep(20); | |
1325 | } | |
1326 | ||
1327 | reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH); | |
1328 | if (IS_ERR(reset_gpio)) | |
1329 | return PTR_ERR(reset_gpio); | |
1330 | ||
1331 | if (reset_gpio) { | |
1332 | /* RESETB pulse duration */ | |
1333 | ndelay(500); | |
1334 | gpiod_set_value_cansleep(reset_gpio, 0); | |
1335 | /* Delay time between end of reset to I2C active */ | |
1336 | usleep_range(200, 250); | |
1337 | } | |
1338 | ||
1339 | return 0; | |
1340 | } | |
1341 | ||
a2e5f1b3 JMC |
1342 | static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np) |
1343 | { | |
1344 | struct v4l2_of_endpoint bus_cfg; | |
1345 | struct device_node *ep; | |
f7b4b54e JMC |
1346 | #ifdef CONFIG_MEDIA_CONTROLLER |
1347 | struct device_node *connectors, *child; | |
1348 | struct media_entity *input; | |
1349 | const char *name; | |
1350 | u32 input_type; | |
1351 | #endif | |
a2e5f1b3 JMC |
1352 | unsigned int flags; |
1353 | int ret = 0; | |
1354 | ||
1355 | ep = of_graph_get_next_endpoint(np, NULL); | |
1356 | if (!ep) | |
1357 | return -EINVAL; | |
1358 | ||
1359 | ret = v4l2_of_parse_endpoint(ep, &bus_cfg); | |
1360 | if (ret) | |
1361 | goto err; | |
1362 | ||
1363 | flags = bus_cfg.bus.parallel.flags; | |
1364 | ||
1365 | if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL && | |
1366 | !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH && | |
1367 | flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH && | |
2bd5e437 JMC |
1368 | flags & V4L2_MBUS_FIELD_EVEN_LOW)) { |
1369 | ret = -EINVAL; | |
1370 | goto err; | |
1371 | } | |
a2e5f1b3 JMC |
1372 | |
1373 | decoder->mbus_type = bus_cfg.bus_type; | |
1374 | ||
f7b4b54e JMC |
1375 | #ifdef CONFIG_MEDIA_CONTROLLER |
1376 | connectors = of_get_child_by_name(np, "connectors"); | |
1377 | ||
1378 | if (!connectors) | |
1379 | goto err; | |
1380 | ||
1381 | for_each_available_child_of_node(connectors, child) { | |
1382 | ret = of_property_read_u32(child, "input", &input_type); | |
1383 | if (ret) { | |
1384 | v4l2_err(&decoder->sd, | |
1385 | "missing type property in node %s\n", | |
1386 | child->name); | |
1387 | goto err_connector; | |
1388 | } | |
1389 | ||
60ad7689 | 1390 | if (input_type >= TVP5150_INPUT_NUM) { |
f7b4b54e JMC |
1391 | ret = -EINVAL; |
1392 | goto err_connector; | |
1393 | } | |
1394 | ||
1395 | input = &decoder->input_ent[input_type]; | |
1396 | ||
1397 | /* Each input connector can only be defined once */ | |
1398 | if (input->name) { | |
1399 | v4l2_err(&decoder->sd, | |
1400 | "input %s with same type already exists\n", | |
1401 | input->name); | |
1402 | ret = -EINVAL; | |
1403 | goto err_connector; | |
1404 | } | |
1405 | ||
1406 | switch (input_type) { | |
1407 | case TVP5150_COMPOSITE0: | |
1408 | case TVP5150_COMPOSITE1: | |
1409 | input->function = MEDIA_ENT_F_CONN_COMPOSITE; | |
1410 | break; | |
1411 | case TVP5150_SVIDEO: | |
1412 | input->function = MEDIA_ENT_F_CONN_SVIDEO; | |
1413 | break; | |
f7b4b54e JMC |
1414 | } |
1415 | ||
1416 | input->flags = MEDIA_ENT_FL_CONNECTOR; | |
1417 | ||
1418 | ret = of_property_read_string(child, "label", &name); | |
1419 | if (ret < 0) { | |
1420 | v4l2_err(&decoder->sd, | |
1421 | "missing label property in node %s\n", | |
1422 | child->name); | |
1423 | goto err_connector; | |
1424 | } | |
1425 | ||
1426 | input->name = name; | |
1427 | } | |
1428 | ||
1429 | err_connector: | |
1430 | of_node_put(connectors); | |
1431 | #endif | |
a2e5f1b3 JMC |
1432 | err: |
1433 | of_node_put(ep); | |
1434 | return ret; | |
1435 | } | |
1436 | ||
c43875f6 MCC |
1437 | static const char * const tvp5150_test_patterns[2] = { |
1438 | "Disabled", | |
1439 | "Black screen" | |
1440 | }; | |
1441 | ||
6b8fe025 HV |
1442 | static int tvp5150_probe(struct i2c_client *c, |
1443 | const struct i2c_device_id *id) | |
cd4665c5 | 1444 | { |
cd4665c5 | 1445 | struct tvp5150 *core; |
6b8fe025 | 1446 | struct v4l2_subdev *sd; |
a2e5f1b3 | 1447 | struct device_node *np = c->dev.of_node; |
7871597a | 1448 | int res; |
cd4665c5 MCC |
1449 | |
1450 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1451 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1452 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1453 | return -EIO; |
cd4665c5 | 1454 | |
09aa2609 JMC |
1455 | res = tvp5150_init(c); |
1456 | if (res) | |
1457 | return res; | |
1458 | ||
c02b211d LP |
1459 | core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL); |
1460 | if (!core) | |
cd4665c5 | 1461 | return -ENOMEM; |
a2e5f1b3 | 1462 | |
6b8fe025 | 1463 | sd = &core->sd; |
a2e5f1b3 JMC |
1464 | |
1465 | if (IS_ENABLED(CONFIG_OF) && np) { | |
1466 | res = tvp5150_parse_dt(core, np); | |
1467 | if (res) { | |
1468 | v4l2_err(sd, "DT parsing error: %d\n", res); | |
1469 | return res; | |
1470 | } | |
1471 | } else { | |
1472 | /* Default to BT.656 embedded sync */ | |
1473 | core->mbus_type = V4L2_MBUS_BT656; | |
1474 | } | |
1475 | ||
6b8fe025 | 1476 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); |
e545ac87 LP |
1477 | sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
1478 | ||
1479 | #if defined(CONFIG_MEDIA_CONTROLLER) | |
55606310 MCC |
1480 | core->pads[DEMOD_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK; |
1481 | core->pads[DEMOD_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE; | |
1482 | core->pads[DEMOD_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE; | |
f92c70ad MCC |
1483 | |
1484 | sd->entity.function = MEDIA_ENT_F_ATV_DECODER; | |
1485 | ||
55606310 | 1486 | res = media_entity_pads_init(&sd->entity, DEMOD_NUM_PADS, core->pads); |
e545ac87 LP |
1487 | if (res < 0) |
1488 | return res; | |
f7b4b54e JMC |
1489 | |
1490 | sd->entity.ops = &tvp5150_sd_media_ops; | |
e545ac87 | 1491 | #endif |
8cd0d4ca | 1492 | |
7871597a LP |
1493 | res = tvp5150_detect_version(core); |
1494 | if (res < 0) | |
1495 | return res; | |
0e09a3c9 | 1496 | |
3ad96835 | 1497 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1498 | core->input = TVP5150_COMPOSITE1; |
c43875f6 | 1499 | core->enable = true; |
6c45ec71 | 1500 | |
b1950b8d | 1501 | v4l2_ctrl_handler_init(&core->hdl, 5); |
6c45ec71 HV |
1502 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, |
1503 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
1504 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1505 | V4L2_CID_CONTRAST, 0, 255, 1, 128); | |
1506 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1507 | V4L2_CID_SATURATION, 0, 255, 1, 128); | |
1508 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1509 | V4L2_CID_HUE, -128, 127, 1, 0); | |
b1950b8d LP |
1510 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, |
1511 | V4L2_CID_PIXEL_RATE, 27000000, | |
1512 | 27000000, 1, 27000000); | |
c43875f6 MCC |
1513 | v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops, |
1514 | V4L2_CID_TEST_PATTERN, | |
1515 | ARRAY_SIZE(tvp5150_test_patterns), | |
1516 | 0, 0, tvp5150_test_patterns); | |
6c45ec71 HV |
1517 | sd->ctrl_handler = &core->hdl; |
1518 | if (core->hdl.error) { | |
8cd0d4ca | 1519 | res = core->hdl.error; |
c7d97499 | 1520 | goto err; |
6c45ec71 HV |
1521 | } |
1522 | v4l2_ctrl_handler_setup(&core->hdl); | |
4c86f973 | 1523 | |
963ddc63 JM |
1524 | /* Default is no cropping */ |
1525 | core->rect.top = 0; | |
1526 | if (tvp5150_read_std(sd) & V4L2_STD_525_60) | |
1527 | core->rect.height = TVP5150_V_MAX_525_60; | |
1528 | else | |
1529 | core->rect.height = TVP5150_V_MAX_OTHERS; | |
1530 | core->rect.left = 0; | |
1531 | core->rect.width = TVP5150_H_MAX; | |
1532 | ||
c7d97499 JMC |
1533 | res = v4l2_async_register_subdev(sd); |
1534 | if (res < 0) | |
1535 | goto err; | |
1536 | ||
f1e5ee45 | 1537 | if (debug > 1) |
6b8fe025 | 1538 | tvp5150_log_status(sd); |
cd4665c5 | 1539 | return 0; |
c7d97499 JMC |
1540 | |
1541 | err: | |
1542 | v4l2_ctrl_handler_free(&core->hdl); | |
1543 | return res; | |
cd4665c5 MCC |
1544 | } |
1545 | ||
6b8fe025 | 1546 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1547 | { |
6b8fe025 | 1548 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
6c45ec71 | 1549 | struct tvp5150 *decoder = to_tvp5150(sd); |
cd4665c5 | 1550 | |
6b8fe025 | 1551 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1552 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1553 | c->addr << 1); | |
1554 | ||
c7d97499 | 1555 | v4l2_async_unregister_subdev(sd); |
6c45ec71 | 1556 | v4l2_ctrl_handler_free(&decoder->hdl); |
cd4665c5 MCC |
1557 | return 0; |
1558 | } | |
1559 | ||
1560 | /* ----------------------------------------------------------------------- */ | |
1561 | ||
6b8fe025 HV |
1562 | static const struct i2c_device_id tvp5150_id[] = { |
1563 | { "tvp5150", 0 }, | |
1564 | { } | |
1565 | }; | |
1566 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1567 | |
7ef930a7 EG |
1568 | #if IS_ENABLED(CONFIG_OF) |
1569 | static const struct of_device_id tvp5150_of_match[] = { | |
1570 | { .compatible = "ti,tvp5150", }, | |
1571 | { /* sentinel */ }, | |
1572 | }; | |
1573 | MODULE_DEVICE_TABLE(of, tvp5150_of_match); | |
1574 | #endif | |
1575 | ||
c771145b HV |
1576 | static struct i2c_driver tvp5150_driver = { |
1577 | .driver = { | |
7ef930a7 | 1578 | .of_match_table = of_match_ptr(tvp5150_of_match), |
c771145b HV |
1579 | .name = "tvp5150", |
1580 | }, | |
1581 | .probe = tvp5150_probe, | |
1582 | .remove = tvp5150_remove, | |
1583 | .id_table = tvp5150_id, | |
cd4665c5 | 1584 | }; |
c771145b | 1585 | |
c6e8d86f | 1586 | module_i2c_driver(tvp5150_driver); |