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Merge branch 'upstream-fixes' into upstream
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
7cc33234 39#define DRV_VERSION "7.2.7-k2"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
d3148ce9 51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
1da177e4
LT		 52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 107 /* required last entry */
108 {0,}
109};
110
111MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
112
3ad2cc67 113static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 114 struct e1000_tx_ring *txdr);
3ad2cc67 115static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 116 struct e1000_rx_ring *rxdr);
3ad2cc67 117static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 118 struct e1000_tx_ring *tx_ring);
3ad2cc67 119static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 120 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 121
122/* Local Function Prototypes */
123
124static int e1000_init_module(void);
125static void e1000_exit_module(void);
126static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
127static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 128static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 129static int e1000_sw_init(struct e1000_adapter *adapter);
130static int e1000_open(struct net_device *netdev);
131static int e1000_close(struct net_device *netdev);
132static void e1000_configure_tx(struct e1000_adapter *adapter);
133static void e1000_configure_rx(struct e1000_adapter *adapter);
134static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 135static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
136static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
137static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
138 struct e1000_tx_ring *tx_ring);
139static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
140 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 141static void e1000_set_multi(struct net_device *netdev);
142static void e1000_update_phy_info(unsigned long data);
143static void e1000_watchdog(unsigned long data);
1da177e4
LT		 144static void e1000_82547_tx_fifo_stall(unsigned long data);
145static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
146static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
147static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
148static int e1000_set_mac(struct net_device *netdev, void *p);
149static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 150static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
151 struct e1000_tx_ring *tx_ring);
1da177e4 152#ifdef CONFIG_E1000_NAPI
581d708e 153static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 154static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 155 struct e1000_rx_ring *rx_ring,
1da177e4 156 int *work_done, int work_to_do);
2d7edb92 157static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 158 struct e1000_rx_ring *rx_ring,
2d7edb92 159 int *work_done, int work_to_do);
1da177e4 160#else
581d708e
MC		 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring);
163static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
164 struct e1000_rx_ring *rx_ring);
1da177e4 165#endif
581d708e 166static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 167 struct e1000_rx_ring *rx_ring,
168 int cleaned_count);
581d708e 169static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 170 struct e1000_rx_ring *rx_ring,
171 int cleaned_count);
1da177e4
LT		 172static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
173static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
174 int cmd);
1da177e4
LT		 175static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
176static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
177static void e1000_tx_timeout(struct net_device *dev);
87041639 178static void e1000_reset_task(struct net_device *dev);
1da177e4 179static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 180static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
181 struct sk_buff *skb);
1da177e4
LT		 182
183static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
184static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
185static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
186static void e1000_restore_vlan(struct e1000_adapter *adapter);
187
977e74b5 188static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 189#ifdef CONFIG_PM
1da177e4
LT		 190static int e1000_resume(struct pci_dev *pdev);
191#endif
c653e635 192static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 193
194#ifdef CONFIG_NET_POLL_CONTROLLER
195/* for netdump / net console */
196static void e1000_netpoll (struct net_device *netdev);
197#endif
198
9026729b
AK		 199static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
200 pci_channel_state_t state);
201static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
202static void e1000_io_resume(struct pci_dev *pdev);
203
204static struct pci_error_handlers e1000_err_handler = {
205 .error_detected = e1000_io_error_detected,
206 .slot_reset = e1000_io_slot_reset,
207 .resume = e1000_io_resume,
208};
24025e4e 209
1da177e4
LT		 210static struct pci_driver e1000_driver = {
211 .name = e1000_driver_name,
212 .id_table = e1000_pci_tbl,
213 .probe = e1000_probe,
214 .remove = __devexit_p(e1000_remove),
215 /* Power Managment Hooks */
1da177e4 216 .suspend = e1000_suspend,
6fdfef16 217#ifdef CONFIG_PM
c653e635 218 .resume = e1000_resume,
1da177e4 219#endif
9026729b
AK		 220 .shutdown = e1000_shutdown,
221 .err_handler = &e1000_err_handler
1da177e4
LT		 222};
223
224MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
225MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
226MODULE_LICENSE("GPL");
227MODULE_VERSION(DRV_VERSION);
228
229static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
230module_param(debug, int, 0);
231MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
232
233/**
234 * e1000_init_module - Driver Registration Routine
235 *
236 * e1000_init_module is the first routine called when the driver is
237 * loaded. All it does is register with the PCI subsystem.
238 **/
239
240static int __init
241e1000_init_module(void)
242{
243 int ret;
244 printk(KERN_INFO "%s - version %s\n",
245 e1000_driver_string, e1000_driver_version);
246
247 printk(KERN_INFO "%s\n", e1000_copyright);
248
29917620 249 ret = pci_register_driver(&e1000_driver);
8b378def 250
1da177e4
LT		 251 return ret;
252}
253
254module_init(e1000_init_module);
255
256/**
257 * e1000_exit_module - Driver Exit Cleanup Routine
258 *
259 * e1000_exit_module is called just before the driver is removed
260 * from memory.
261 **/
262
263static void __exit
264e1000_exit_module(void)
265{
1da177e4
LT		 266 pci_unregister_driver(&e1000_driver);
267}
268
269module_exit(e1000_exit_module);
270
2db10a08
AK		 271static int e1000_request_irq(struct e1000_adapter *adapter)
272{
273 struct net_device *netdev = adapter->netdev;
274 int flags, err = 0;
275
c0bc8721 276 flags = IRQF_SHARED;
2db10a08
AK		 277#ifdef CONFIG_PCI_MSI
278 if (adapter->hw.mac_type > e1000_82547_rev_2) {
279 adapter->have_msi = TRUE;
280 if ((err = pci_enable_msi(adapter->pdev))) {
281 DPRINTK(PROBE, ERR,
282 "Unable to allocate MSI interrupt Error: %d\n", err);
283 adapter->have_msi = FALSE;
284 }
285 }
286 if (adapter->have_msi)
61ef5c00 287 flags &= ~IRQF_SHARED;
2db10a08
AK		 288#endif
289 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
290 netdev->name, netdev)))
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate interrupt Error: %d\n", err);
293
294 return err;
295}
296
297static void e1000_free_irq(struct e1000_adapter *adapter)
298{
299 struct net_device *netdev = adapter->netdev;
300
301 free_irq(adapter->pdev->irq, netdev);
302
303#ifdef CONFIG_PCI_MSI
304 if (adapter->have_msi)
305 pci_disable_msi(adapter->pdev);
306#endif
307}
308
1da177e4
LT		 309/**
310 * e1000_irq_disable - Mask off interrupt generation on the NIC
311 * @adapter: board private structure
312 **/
313
e619d523 314static void
1da177e4
LT		 315e1000_irq_disable(struct e1000_adapter *adapter)
316{
317 atomic_inc(&adapter->irq_sem);
318 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
319 E1000_WRITE_FLUSH(&adapter->hw);
320 synchronize_irq(adapter->pdev->irq);
321}
322
323/**
324 * e1000_irq_enable - Enable default interrupt generation settings
325 * @adapter: board private structure
326 **/
327
e619d523 328static void
1da177e4
LT		 329e1000_irq_enable(struct e1000_adapter *adapter)
330{
96838a40 331 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 332 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
333 E1000_WRITE_FLUSH(&adapter->hw);
334 }
335}
3ad2cc67
AB		 336
337static void
2d7edb92
MC		 338e1000_update_mng_vlan(struct e1000_adapter *adapter)
339{
340 struct net_device *netdev = adapter->netdev;
341 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
342 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 343 if (adapter->vlgrp) {
344 if (!adapter->vlgrp->vlan_devices[vid]) {
345 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 346 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
347 e1000_vlan_rx_add_vid(netdev, vid);
348 adapter->mng_vlan_id = vid;
349 } else
350 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 351
352 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
353 (vid != old_vid) &&
2d7edb92
MC		 354 !adapter->vlgrp->vlan_devices[old_vid])
355 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 356 } else
357 adapter->mng_vlan_id = vid;
2d7edb92
MC		 358 }
359}
b55ccb35
JK		 360
361/**
362 * e1000_release_hw_control - release control of the h/w to f/w
363 * @adapter: address of board private structure
364 *
365 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that the
367 * driver is no longer loaded. For AMT version (only with 82573) i
368 * of the f/w this means that the netowrk i/f is closed.
76c224bc 369 *
b55ccb35
JK		 370 **/
371
e619d523 372static void
b55ccb35
JK		 373e1000_release_hw_control(struct e1000_adapter *adapter)
374{
375 uint32_t ctrl_ext;
376 uint32_t swsm;
cd94dd0b 377 uint32_t extcnf;
b55ccb35
JK		 378
379 /* Let firmware taken over control of h/w */
380 switch (adapter->hw.mac_type) {
381 case e1000_82571:
382 case e1000_82572:
4cc15f54 383 case e1000_80003es2lan:
b55ccb35
JK		 384 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
385 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
386 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
387 break;
388 case e1000_82573:
389 swsm = E1000_READ_REG(&adapter->hw, SWSM);
390 E1000_WRITE_REG(&adapter->hw, SWSM,
391 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 392 case e1000_ich8lan:
393 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
394 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
395 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
396 break;
b55ccb35
JK		 397 default:
398 break;
399 }
400}
401
402/**
403 * e1000_get_hw_control - get control of the h/w from f/w
404 * @adapter: address of board private structure
405 *
406 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 407 * For ASF and Pass Through versions of f/w this means that
408 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 409 * of the f/w this means that the netowrk i/f is open.
76c224bc 410 *
b55ccb35
JK		 411 **/
412
e619d523 413static void
b55ccb35
JK		 414e1000_get_hw_control(struct e1000_adapter *adapter)
415{
416 uint32_t ctrl_ext;
417 uint32_t swsm;
cd94dd0b 418 uint32_t extcnf;
b55ccb35
JK		 419 /* Let firmware know the driver has taken over */
420 switch (adapter->hw.mac_type) {
421 case e1000_82571:
422 case e1000_82572:
4cc15f54 423 case e1000_80003es2lan:
b55ccb35
JK		 424 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
425 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
426 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
427 break;
428 case e1000_82573:
429 swsm = E1000_READ_REG(&adapter->hw, SWSM);
430 E1000_WRITE_REG(&adapter->hw, SWSM,
431 swsm | E1000_SWSM_DRV_LOAD);
432 break;
cd94dd0b
AK		 433 case e1000_ich8lan:
434 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
435 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
436 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
437 break;
b55ccb35
JK		 438 default:
439 break;
440 }
441}
442
1da177e4
LT		 443int
444e1000_up(struct e1000_adapter *adapter)
445{
446 struct net_device *netdev = adapter->netdev;
2db10a08 447 int i;
1da177e4
LT		 448
449 /* hardware has been reset, we need to reload some things */
450
1da177e4
LT		 451 e1000_set_multi(netdev);
452
453 e1000_restore_vlan(adapter);
454
455 e1000_configure_tx(adapter);
456 e1000_setup_rctl(adapter);
457 e1000_configure_rx(adapter);
72d64a43
JK		 458 /* call E1000_DESC_UNUSED which always leaves
459 * at least 1 descriptor unused to make sure
460 * next_to_use != next_to_clean */
f56799ea 461 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 462 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 463 adapter->alloc_rx_buf(adapter, ring,
464 E1000_DESC_UNUSED(ring));
f56799ea 465 }
1da177e4 466
7bfa4816
JK		 467 adapter->tx_queue_len = netdev->tx_queue_len;
468
1da177e4 469 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 470
471#ifdef CONFIG_E1000_NAPI
472 netif_poll_enable(netdev);
473#endif
5de55624
MC		 474 e1000_irq_enable(adapter);
475
1da177e4
LT		 476 return 0;
477}
478
79f05bf0
AK		 479/**
480 * e1000_power_up_phy - restore link in case the phy was powered down
481 * @adapter: address of board private structure
482 *
483 * The phy may be powered down to save power and turn off link when the
484 * driver is unloaded and wake on lan is not enabled (among others)
485 * *** this routine MUST be followed by a call to e1000_reset ***
486 *
487 **/
488
d658266e 489void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 490{
491 uint16_t mii_reg = 0;
492
493 /* Just clear the power down bit to wake the phy back up */
494 if (adapter->hw.media_type == e1000_media_type_copper) {
495 /* according to the manual, the phy will retain its
496 * settings across a power-down/up cycle */
497 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
498 mii_reg &= ~MII_CR_POWER_DOWN;
499 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
500 }
501}
502
503static void e1000_power_down_phy(struct e1000_adapter *adapter)
504{
505 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
506 e1000_check_mng_mode(&adapter->hw);
507 /* Power down the PHY so no link is implied when interface is down
508 * The PHY cannot be powered down if any of the following is TRUE
509 * (a) WoL is enabled
510 * (b) AMT is active
511 * (c) SoL/IDER session is active */
512 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 513 adapter->hw.mac_type != e1000_ich8lan &&
79f05bf0
AK		 514 adapter->hw.media_type == e1000_media_type_copper &&
515 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
516 !mng_mode_enabled &&
517 !e1000_check_phy_reset_block(&adapter->hw)) {
518 uint16_t mii_reg = 0;
519 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
520 mii_reg |= MII_CR_POWER_DOWN;
521 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
522 mdelay(1);
523 }
524}
525
1da177e4
LT		 526void
527e1000_down(struct e1000_adapter *adapter)
528{
529 struct net_device *netdev = adapter->netdev;
530
531 e1000_irq_disable(adapter);
c1605eb3 532
1da177e4
LT		 533 del_timer_sync(&adapter->tx_fifo_stall_timer);
534 del_timer_sync(&adapter->watchdog_timer);
535 del_timer_sync(&adapter->phy_info_timer);
536
537#ifdef CONFIG_E1000_NAPI
538 netif_poll_disable(netdev);
539#endif
7bfa4816 540 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 541 adapter->link_speed = 0;
542 adapter->link_duplex = 0;
543 netif_carrier_off(netdev);
544 netif_stop_queue(netdev);
545
546 e1000_reset(adapter);
581d708e
MC		 547 e1000_clean_all_tx_rings(adapter);
548 e1000_clean_all_rx_rings(adapter);
1da177e4 549}
1da177e4 550
2db10a08
AK		 551void
552e1000_reinit_locked(struct e1000_adapter *adapter)
553{
554 WARN_ON(in_interrupt());
555 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
556 msleep(1);
557 e1000_down(adapter);
558 e1000_up(adapter);
559 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 560}
561
562void
563e1000_reset(struct e1000_adapter *adapter)
564{
2d7edb92 565 uint32_t pba, manc;
1125ecbc 566 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 567
568 /* Repartition Pba for greater than 9k mtu
569 * To take effect CTRL.RST is required.
570 */
571
2d7edb92
MC		 572 switch (adapter->hw.mac_type) {
573 case e1000_82547:
0e6ef3e0 574 case e1000_82547_rev_2:
2d7edb92
MC		 575 pba = E1000_PBA_30K;
576 break;
868d5309
MC		 577 case e1000_82571:
578 case e1000_82572:
6418ecc6 579 case e1000_80003es2lan:
868d5309
MC		 580 pba = E1000_PBA_38K;
581 break;
2d7edb92
MC		 582 case e1000_82573:
583 pba = E1000_PBA_12K;
584 break;
cd94dd0b
AK		 585 case e1000_ich8lan:
586 pba = E1000_PBA_8K;
587 break;
2d7edb92
MC		 588 default:
589 pba = E1000_PBA_48K;
590 break;
591 }
592
96838a40 593 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 594 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 595 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 596
597
96838a40 598 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 599 adapter->tx_fifo_head = 0;
600 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
601 adapter->tx_fifo_size =
602 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
603 atomic_set(&adapter->tx_fifo_stall, 0);
604 }
2d7edb92 605
1da177e4
LT		 606 E1000_WRITE_REG(&adapter->hw, PBA, pba);
607
608 /* flow control settings */
f11b7f85
JK		 609 /* Set the FC high water mark to 90% of the FIFO size.
610 * Required to clear last 3 LSB */
611 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 612 /* We can't use 90% on small FIFOs because the remainder
613 * would be less than 1 full frame. In this case, we size
614 * it to allow at least a full frame above the high water
615 * mark. */
616 if (pba < E1000_PBA_16K)
617 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 618
619 adapter->hw.fc_high_water = fc_high_water_mark;
620 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 621 if (adapter->hw.mac_type == e1000_80003es2lan)
622 adapter->hw.fc_pause_time = 0xFFFF;
623 else
624 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 625 adapter->hw.fc_send_xon = 1;
626 adapter->hw.fc = adapter->hw.original_fc;
627
2d7edb92 628 /* Allow time for pending master requests to run */
1da177e4 629 e1000_reset_hw(&adapter->hw);
96838a40 630 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 631 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 632 if (e1000_init_hw(&adapter->hw))
1da177e4 633 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 634 e1000_update_mng_vlan(adapter);
1da177e4
LT		 635 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
636 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
637
638 e1000_reset_adaptive(&adapter->hw);
639 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 640
641 if (!adapter->smart_power_down &&
642 (adapter->hw.mac_type == e1000_82571 ||
643 adapter->hw.mac_type == e1000_82572)) {
644 uint16_t phy_data = 0;
645 /* speed up time to link by disabling smart power down, ignore
646 * the return value of this function because there is nothing
647 * different we would do if it failed */
648 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
649 &phy_data);
650 phy_data &= ~IGP02E1000_PM_SPD;
651 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
652 phy_data);
653 }
654
cd94dd0b
AK		 655 if (adapter->hw.mac_type < e1000_ich8lan)
656 /* FIXME: this code is duplicate and wrong for PCI Express */
2d7edb92
MC		 657 if (adapter->en_mng_pt) {
658 manc = E1000_READ_REG(&adapter->hw, MANC);
659 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
660 E1000_WRITE_REG(&adapter->hw, MANC, manc);
661 }
1da177e4
LT		 662}
663
664/**
665 * e1000_probe - Device Initialization Routine
666 * @pdev: PCI device information struct
667 * @ent: entry in e1000_pci_tbl
668 *
669 * Returns 0 on success, negative on failure
670 *
671 * e1000_probe initializes an adapter identified by a pci_dev structure.
672 * The OS initialization, configuring of the adapter private structure,
673 * and a hardware reset occur.
674 **/
675
676static int __devinit
677e1000_probe(struct pci_dev *pdev,
678 const struct pci_device_id *ent)
679{
680 struct net_device *netdev;
681 struct e1000_adapter *adapter;
2d7edb92 682 unsigned long mmio_start, mmio_len;
cd94dd0b 683 unsigned long flash_start, flash_len;
2d7edb92 684
1da177e4 685 static int cards_found = 0;
120cd576 686 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 687 int i, err, pci_using_dac;
120cd576 688 uint16_t eeprom_data = 0;
1da177e4 689 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 690 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 691 return err;
692
cd94dd0b
AK		 693 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
694 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 695 pci_using_dac = 1;
696 } else {
cd94dd0b
AK		 697 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
698 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 699 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 700 goto err_dma;
1da177e4
LT		 701 }
702 pci_using_dac = 0;
703 }
704
96838a40 705 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 706 goto err_pci_reg;
1da177e4
LT		 707
708 pci_set_master(pdev);
709
6dd62ab0 710 err = -ENOMEM;
1da177e4 711 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 712 if (!netdev)
1da177e4 713 goto err_alloc_etherdev;
1da177e4
LT		 714
715 SET_MODULE_OWNER(netdev);
716 SET_NETDEV_DEV(netdev, &pdev->dev);
717
718 pci_set_drvdata(pdev, netdev);
60490fe0 719 adapter = netdev_priv(netdev);
1da177e4
LT		 720 adapter->netdev = netdev;
721 adapter->pdev = pdev;
722 adapter->hw.back = adapter;
723 adapter->msg_enable = (1 << debug) - 1;
724
725 mmio_start = pci_resource_start(pdev, BAR_0);
726 mmio_len = pci_resource_len(pdev, BAR_0);
727
6dd62ab0 728 err = -EIO;
1da177e4 729 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 730 if (!adapter->hw.hw_addr)
1da177e4 731 goto err_ioremap;
1da177e4 732
96838a40
JB		 733 for (i = BAR_1; i <= BAR_5; i++) {
734 if (pci_resource_len(pdev, i) == 0)
1da177e4 735 continue;
96838a40 736 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 737 adapter->hw.io_base = pci_resource_start(pdev, i);
738 break;
739 }
740 }
741
742 netdev->open = &e1000_open;
743 netdev->stop = &e1000_close;
744 netdev->hard_start_xmit = &e1000_xmit_frame;
745 netdev->get_stats = &e1000_get_stats;
746 netdev->set_multicast_list = &e1000_set_multi;
747 netdev->set_mac_address = &e1000_set_mac;
748 netdev->change_mtu = &e1000_change_mtu;
749 netdev->do_ioctl = &e1000_ioctl;
750 e1000_set_ethtool_ops(netdev);
751 netdev->tx_timeout = &e1000_tx_timeout;
752 netdev->watchdog_timeo = 5 * HZ;
753#ifdef CONFIG_E1000_NAPI
754 netdev->poll = &e1000_clean;
755 netdev->weight = 64;
756#endif
757 netdev->vlan_rx_register = e1000_vlan_rx_register;
758 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
759 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
760#ifdef CONFIG_NET_POLL_CONTROLLER
761 netdev->poll_controller = e1000_netpoll;
762#endif
763 strcpy(netdev->name, pci_name(pdev));
764
765 netdev->mem_start = mmio_start;
766 netdev->mem_end = mmio_start + mmio_len;
767 netdev->base_addr = adapter->hw.io_base;
768
769 adapter->bd_number = cards_found;
770
771 /* setup the private structure */
772
96838a40 773 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 774 goto err_sw_init;
775
6dd62ab0 776 err = -EIO;
cd94dd0b
AK		 777 /* Flash BAR mapping must happen after e1000_sw_init
778 * because it depends on mac_type */
779 if ((adapter->hw.mac_type == e1000_ich8lan) &&
780 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
781 flash_start = pci_resource_start(pdev, 1);
782 flash_len = pci_resource_len(pdev, 1);
783 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 784 if (!adapter->hw.flash_address)
cd94dd0b 785 goto err_flashmap;
cd94dd0b
AK		 786 }
787
6dd62ab0 788 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 789 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
790
96838a40 791 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 792 netdev->features = NETIF_F_SG |
793 NETIF_F_HW_CSUM |
794 NETIF_F_HW_VLAN_TX |
795 NETIF_F_HW_VLAN_RX |
796 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 797 if (adapter->hw.mac_type == e1000_ich8lan)
798 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 799 }
800
801#ifdef NETIF_F_TSO
96838a40 802 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 803 (adapter->hw.mac_type != e1000_82547))
804 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 805
806#ifdef NETIF_F_TSO_IPV6
96838a40 807 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 808 netdev->features |= NETIF_F_TSO_IPV6;
809#endif
1da177e4 810#endif
96838a40 811 if (pci_using_dac)
1da177e4
LT		 812 netdev->features |= NETIF_F_HIGHDMA;
813
76c224bc
AK		 814 netdev->features |= NETIF_F_LLTX;
815
2d7edb92
MC		 816 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
817
cd94dd0b
AK		 818 /* initialize eeprom parameters */
819
820 if (e1000_init_eeprom_params(&adapter->hw)) {
821 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 822 goto err_eeprom;
cd94dd0b
AK		 823 }
824
96838a40 825 /* before reading the EEPROM, reset the controller to
1da177e4 826 * put the device in a known good starting state */
96838a40 827
1da177e4
LT		 828 e1000_reset_hw(&adapter->hw);
829
830 /* make sure the EEPROM is good */
831
96838a40 832 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 833 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 834 goto err_eeprom;
835 }
836
837 /* copy the MAC address out of the EEPROM */
838
96838a40 839 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 840 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
841 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 842 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 843
96838a40 844 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 845 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 846 goto err_eeprom;
847 }
848
1da177e4
LT		 849 e1000_get_bus_info(&adapter->hw);
850
851 init_timer(&adapter->tx_fifo_stall_timer);
852 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
853 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
854
855 init_timer(&adapter->watchdog_timer);
856 adapter->watchdog_timer.function = &e1000_watchdog;
857 adapter->watchdog_timer.data = (unsigned long) adapter;
858
1da177e4
LT		 859 init_timer(&adapter->phy_info_timer);
860 adapter->phy_info_timer.function = &e1000_update_phy_info;
861 adapter->phy_info_timer.data = (unsigned long) adapter;
862
87041639
JK		 863 INIT_WORK(&adapter->reset_task,
864 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 865
866 /* we're going to reset, so assume we have no link for now */
867
868 netif_carrier_off(netdev);
869 netif_stop_queue(netdev);
870
871 e1000_check_options(adapter);
872
873 /* Initial Wake on LAN setting
874 * If APM wake is enabled in the EEPROM,
875 * enable the ACPI Magic Packet filter
876 */
877
96838a40 878 switch (adapter->hw.mac_type) {
1da177e4
LT		 879 case e1000_82542_rev2_0:
880 case e1000_82542_rev2_1:
881 case e1000_82543:
882 break;
883 case e1000_82544:
884 e1000_read_eeprom(&adapter->hw,
885 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
886 eeprom_apme_mask = E1000_EEPROM_82544_APM;
887 break;
cd94dd0b
AK		 888 case e1000_ich8lan:
889 e1000_read_eeprom(&adapter->hw,
890 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
891 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
892 break;
1da177e4
LT		 893 case e1000_82546:
894 case e1000_82546_rev_3:
fd803241 895 case e1000_82571:
6418ecc6 896 case e1000_80003es2lan:
96838a40 897 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 898 e1000_read_eeprom(&adapter->hw,
899 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
900 break;
901 }
902 /* Fall Through */
903 default:
904 e1000_read_eeprom(&adapter->hw,
905 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
906 break;
907 }
96838a40 908 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 909 adapter->eeprom_wol |= E1000_WUFC_MAG;
910
911 /* now that we have the eeprom settings, apply the special cases
912 * where the eeprom may be wrong or the board simply won't support
913 * wake on lan on a particular port */
914 switch (pdev->device) {
915 case E1000_DEV_ID_82546GB_PCIE:
916 adapter->eeprom_wol = 0;
917 break;
918 case E1000_DEV_ID_82546EB_FIBER:
919 case E1000_DEV_ID_82546GB_FIBER:
920 case E1000_DEV_ID_82571EB_FIBER:
921 /* Wake events only supported on port A for dual fiber
922 * regardless of eeprom setting */
923 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
924 adapter->eeprom_wol = 0;
925 break;
926 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 927 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 928 /* if quad port adapter, disable WoL on all but port A */
929 if (global_quad_port_a != 0)
930 adapter->eeprom_wol = 0;
931 else
932 adapter->quad_port_a = 1;
933 /* Reset for multiple quad port adapters */
934 if (++global_quad_port_a == 4)
935 global_quad_port_a = 0;
936 break;
937 }
938
939 /* initialize the wol settings based on the eeprom settings */
940 adapter->wol = adapter->eeprom_wol;
1da177e4 941
fb3d47d4
JK		 942 /* print bus type/speed/width info */
943 {
944 struct e1000_hw *hw = &adapter->hw;
945 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
946 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
947 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
948 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
949 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
950 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
951 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
952 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
953 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
954 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
955 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
956 "32-bit"));
957 }
958
959 for (i = 0; i < 6; i++)
960 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
961
1da177e4
LT		 962 /* reset the hardware with the new settings */
963 e1000_reset(adapter);
964
b55ccb35
JK		 965 /* If the controller is 82573 and f/w is AMT, do not set
966 * DRV_LOAD until the interface is up. For all other cases,
967 * let the f/w know that the h/w is now under the control
968 * of the driver. */
969 if (adapter->hw.mac_type != e1000_82573 ||
970 !e1000_check_mng_mode(&adapter->hw))
971 e1000_get_hw_control(adapter);
2d7edb92 972
1da177e4 973 strcpy(netdev->name, "eth%d");
96838a40 974 if ((err = register_netdev(netdev)))
1da177e4
LT		 975 goto err_register;
976
977 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
978
979 cards_found++;
980 return 0;
981
982err_register:
6dd62ab0
VA		 983 e1000_release_hw_control(adapter);
984err_eeprom:
985 if (!e1000_check_phy_reset_block(&adapter->hw))
986 e1000_phy_hw_reset(&adapter->hw);
987
cd94dd0b
AK		 988 if (adapter->hw.flash_address)
989 iounmap(adapter->hw.flash_address);
990err_flashmap:
6dd62ab0
VA		 991#ifdef CONFIG_E1000_NAPI
992 for (i = 0; i < adapter->num_rx_queues; i++)
993 dev_put(&adapter->polling_netdev[i]);
994#endif
995
996 kfree(adapter->tx_ring);
997 kfree(adapter->rx_ring);
998#ifdef CONFIG_E1000_NAPI
999 kfree(adapter->polling_netdev);
1000#endif
1da177e4 1001err_sw_init:
1da177e4
LT		 1002 iounmap(adapter->hw.hw_addr);
1003err_ioremap:
1004 free_netdev(netdev);
1005err_alloc_etherdev:
1006 pci_release_regions(pdev);
6dd62ab0
VA		 1007err_pci_reg:
1008err_dma:
1009 pci_disable_device(pdev);
1da177e4
LT		 1010 return err;
1011}
1012
1013/**
1014 * e1000_remove - Device Removal Routine
1015 * @pdev: PCI device information struct
1016 *
1017 * e1000_remove is called by the PCI subsystem to alert the driver
1018 * that it should release a PCI device. The could be caused by a
1019 * Hot-Plug event, or because the driver is going to be removed from
1020 * memory.
1021 **/
1022
1023static void __devexit
1024e1000_remove(struct pci_dev *pdev)
1025{
1026 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1027 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1028 uint32_t manc;
581d708e
MC		 1029#ifdef CONFIG_E1000_NAPI
1030 int i;
1031#endif
1da177e4 1032
be2b28ed
JG		 1033 flush_scheduled_work();
1034
96838a40 1035 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 1036 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 1037 adapter->hw.media_type == e1000_media_type_copper) {
1038 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1039 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1040 manc |= E1000_MANC_ARP_EN;
1041 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1042 }
1043 }
1044
b55ccb35
JK		 1045 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1046 * would have already happened in close and is redundant. */
1047 e1000_release_hw_control(adapter);
2d7edb92 1048
1da177e4 1049 unregister_netdev(netdev);
581d708e 1050#ifdef CONFIG_E1000_NAPI
f56799ea 1051 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1052 dev_put(&adapter->polling_netdev[i]);
581d708e 1053#endif
1da177e4 1054
96838a40 1055 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1056 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1057
24025e4e
MC		 1058 kfree(adapter->tx_ring);
1059 kfree(adapter->rx_ring);
1060#ifdef CONFIG_E1000_NAPI
1061 kfree(adapter->polling_netdev);
1062#endif
1063
1da177e4 1064 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1065 if (adapter->hw.flash_address)
1066 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1067 pci_release_regions(pdev);
1068
1069 free_netdev(netdev);
1070
1071 pci_disable_device(pdev);
1072}
1073
1074/**
1075 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1076 * @adapter: board private structure to initialize
1077 *
1078 * e1000_sw_init initializes the Adapter private data structure.
1079 * Fields are initialized based on PCI device information and
1080 * OS network device settings (MTU size).
1081 **/
1082
1083static int __devinit
1084e1000_sw_init(struct e1000_adapter *adapter)
1085{
1086 struct e1000_hw *hw = &adapter->hw;
1087 struct net_device *netdev = adapter->netdev;
1088 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1089#ifdef CONFIG_E1000_NAPI
1090 int i;
1091#endif
1da177e4
LT		 1092
1093 /* PCI config space info */
1094
1095 hw->vendor_id = pdev->vendor;
1096 hw->device_id = pdev->device;
1097 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1098 hw->subsystem_id = pdev->subsystem_device;
1099
1100 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1101
1102 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1103
eb0f8054 1104 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1105 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1106 hw->max_frame_size = netdev->mtu +
1107 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1108 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1109
1110 /* identify the MAC */
1111
96838a40 1112 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1113 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1114 return -EIO;
1115 }
1116
96838a40 1117 switch (hw->mac_type) {
1da177e4
LT		 1118 default:
1119 break;
1120 case e1000_82541:
1121 case e1000_82547:
1122 case e1000_82541_rev_2:
1123 case e1000_82547_rev_2:
1124 hw->phy_init_script = 1;
1125 break;
1126 }
1127
1128 e1000_set_media_type(hw);
1129
1130 hw->wait_autoneg_complete = FALSE;
1131 hw->tbi_compatibility_en = TRUE;
1132 hw->adaptive_ifs = TRUE;
1133
1134 /* Copper options */
1135
96838a40 1136 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1137 hw->mdix = AUTO_ALL_MODES;
1138 hw->disable_polarity_correction = FALSE;
1139 hw->master_slave = E1000_MASTER_SLAVE;
1140 }
1141
f56799ea
JK		 1142 adapter->num_tx_queues = 1;
1143 adapter->num_rx_queues = 1;
581d708e
MC		 1144
1145 if (e1000_alloc_queues(adapter)) {
1146 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1147 return -ENOMEM;
1148 }
1149
1150#ifdef CONFIG_E1000_NAPI
f56799ea 1151 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1152 adapter->polling_netdev[i].priv = adapter;
1153 adapter->polling_netdev[i].poll = &e1000_clean;
1154 adapter->polling_netdev[i].weight = 64;
1155 dev_hold(&adapter->polling_netdev[i]);
1156 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1157 }
7bfa4816 1158 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1159#endif
1160
1da177e4
LT		 1161 atomic_set(&adapter->irq_sem, 1);
1162 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1163
1164 return 0;
1165}
1166
581d708e
MC		 1167/**
1168 * e1000_alloc_queues - Allocate memory for all rings
1169 * @adapter: board private structure to initialize
1170 *
1171 * We allocate one ring per queue at run-time since we don't know the
1172 * number of queues at compile-time. The polling_netdev array is
1173 * intended for Multiqueue, but should work fine with a single queue.
1174 **/
1175
1176static int __devinit
1177e1000_alloc_queues(struct e1000_adapter *adapter)
1178{
1179 int size;
1180
f56799ea 1181 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1182 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1183 if (!adapter->tx_ring)
1184 return -ENOMEM;
1185 memset(adapter->tx_ring, 0, size);
1186
f56799ea 1187 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1188 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1189 if (!adapter->rx_ring) {
1190 kfree(adapter->tx_ring);
1191 return -ENOMEM;
1192 }
1193 memset(adapter->rx_ring, 0, size);
1194
1195#ifdef CONFIG_E1000_NAPI
f56799ea 1196 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1197 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1198 if (!adapter->polling_netdev) {
1199 kfree(adapter->tx_ring);
1200 kfree(adapter->rx_ring);
1201 return -ENOMEM;
1202 }
1203 memset(adapter->polling_netdev, 0, size);
1204#endif
1205
1206 return E1000_SUCCESS;
1207}
1208
1da177e4
LT		 1209/**
1210 * e1000_open - Called when a network interface is made active
1211 * @netdev: network interface device structure
1212 *
1213 * Returns 0 on success, negative value on failure
1214 *
1215 * The open entry point is called when a network interface is made
1216 * active by the system (IFF_UP). At this point all resources needed
1217 * for transmit and receive operations are allocated, the interrupt
1218 * handler is registered with the OS, the watchdog timer is started,
1219 * and the stack is notified that the interface is ready.
1220 **/
1221
1222static int
1223e1000_open(struct net_device *netdev)
1224{
60490fe0 1225 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1226 int err;
1227
2db10a08
AK		 1228 /* disallow open during test */
1229 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1230 return -EBUSY;
1231
1da177e4
LT		 1232 /* allocate transmit descriptors */
1233
581d708e 1234 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1235 goto err_setup_tx;
1236
1237 /* allocate receive descriptors */
1238
581d708e 1239 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1240 goto err_setup_rx;
1241
2db10a08
AK		 1242 err = e1000_request_irq(adapter);
1243 if (err)
401a552b 1244 goto err_req_irq;
2db10a08 1245
79f05bf0
AK		 1246 e1000_power_up_phy(adapter);
1247
96838a40 1248 if ((err = e1000_up(adapter)))
1da177e4 1249 goto err_up;
2d7edb92 1250 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1251 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1252 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1253 e1000_update_mng_vlan(adapter);
1254 }
1da177e4 1255
b55ccb35
JK		 1256 /* If AMT is enabled, let the firmware know that the network
1257 * interface is now open */
1258 if (adapter->hw.mac_type == e1000_82573 &&
1259 e1000_check_mng_mode(&adapter->hw))
1260 e1000_get_hw_control(adapter);
1261
1da177e4
LT		 1262 return E1000_SUCCESS;
1263
1264err_up:
401a552b
VA		 1265 e1000_power_down_phy(adapter);
1266 e1000_free_irq(adapter);
1267err_req_irq:
581d708e 1268 e1000_free_all_rx_resources(adapter);
1da177e4 1269err_setup_rx:
581d708e 1270 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1271err_setup_tx:
1272 e1000_reset(adapter);
1273
1274 return err;
1275}
1276
1277/**
1278 * e1000_close - Disables a network interface
1279 * @netdev: network interface device structure
1280 *
1281 * Returns 0, this is not allowed to fail
1282 *
1283 * The close entry point is called when an interface is de-activated
1284 * by the OS. The hardware is still under the drivers control, but
1285 * needs to be disabled. A global MAC reset is issued to stop the
1286 * hardware, and all transmit and receive resources are freed.
1287 **/
1288
1289static int
1290e1000_close(struct net_device *netdev)
1291{
60490fe0 1292 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1293
2db10a08 1294 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1295 e1000_down(adapter);
79f05bf0 1296 e1000_power_down_phy(adapter);
2db10a08 1297 e1000_free_irq(adapter);
1da177e4 1298
581d708e
MC		 1299 e1000_free_all_tx_resources(adapter);
1300 e1000_free_all_rx_resources(adapter);
1da177e4 1301
96838a40 1302 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1303 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1304 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1305 }
b55ccb35
JK		 1306
1307 /* If AMT is enabled, let the firmware know that the network
1308 * interface is now closed */
1309 if (adapter->hw.mac_type == e1000_82573 &&
1310 e1000_check_mng_mode(&adapter->hw))
1311 e1000_release_hw_control(adapter);
1312
1da177e4
LT		 1313 return 0;
1314}
1315
1316/**
1317 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1318 * @adapter: address of board private structure
2d7edb92
MC		 1319 * @start: address of beginning of memory
1320 * @len: length of memory
1da177e4 1321 **/
e619d523 1322static boolean_t
1da177e4
LT		 1323e1000_check_64k_bound(struct e1000_adapter *adapter,
1324 void *start, unsigned long len)
1325{
1326 unsigned long begin = (unsigned long) start;
1327 unsigned long end = begin + len;
1328
2648345f
MC		 1329 /* First rev 82545 and 82546 need to not allow any memory
1330 * write location to cross 64k boundary due to errata 23 */
1da177e4 1331 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1332 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1333 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1334 }
1335
1336 return TRUE;
1337}
1338
1339/**
1340 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1341 * @adapter: board private structure
581d708e 1342 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1343 *
1344 * Return 0 on success, negative on failure
1345 **/
1346
3ad2cc67 1347static int
581d708e
MC		 1348e1000_setup_tx_resources(struct e1000_adapter *adapter,
1349 struct e1000_tx_ring *txdr)
1da177e4 1350{
1da177e4
LT		 1351 struct pci_dev *pdev = adapter->pdev;
1352 int size;
1353
1354 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1355 txdr->buffer_info = vmalloc(size);
96838a40 1356 if (!txdr->buffer_info) {
2648345f
MC		 1357 DPRINTK(PROBE, ERR,
1358 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1359 return -ENOMEM;
1360 }
1361 memset(txdr->buffer_info, 0, size);
1362
1363 /* round up to nearest 4K */
1364
1365 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1366 E1000_ROUNDUP(txdr->size, 4096);
1367
1368 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1369 if (!txdr->desc) {
1da177e4 1370setup_tx_desc_die:
1da177e4 1371 vfree(txdr->buffer_info);
2648345f
MC		 1372 DPRINTK(PROBE, ERR,
1373 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1374 return -ENOMEM;
1375 }
1376
2648345f 1377 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1378 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1379 void *olddesc = txdr->desc;
1380 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1381 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1382 "at %p\n", txdr->size, txdr->desc);
1383 /* Try again, without freeing the previous */
1da177e4 1384 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1385 /* Failed allocation, critical failure */
96838a40 1386 if (!txdr->desc) {
1da177e4
LT		 1387 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1388 goto setup_tx_desc_die;
1389 }
1390
1391 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1392 /* give up */
2648345f
MC		 1393 pci_free_consistent(pdev, txdr->size, txdr->desc,
1394 txdr->dma);
1da177e4
LT		 1395 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1396 DPRINTK(PROBE, ERR,
2648345f
MC		 1397 "Unable to allocate aligned memory "
1398 "for the transmit descriptor ring\n");
1da177e4
LT		 1399 vfree(txdr->buffer_info);
1400 return -ENOMEM;
1401 } else {
2648345f 1402 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1403 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1404 }
1405 }
1406 memset(txdr->desc, 0, txdr->size);
1407
1408 txdr->next_to_use = 0;
1409 txdr->next_to_clean = 0;
2ae76d98 1410 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1411
1412 return 0;
1413}
1414
581d708e
MC		 1415/**
1416 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1417 * (Descriptors) for all queues
1418 * @adapter: board private structure
1419 *
581d708e
MC		 1420 * Return 0 on success, negative on failure
1421 **/
1422
1423int
1424e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1425{
1426 int i, err = 0;
1427
f56799ea 1428 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1429 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1430 if (err) {
1431 DPRINTK(PROBE, ERR,
1432 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1433 for (i-- ; i >= 0; i--)
1434 e1000_free_tx_resources(adapter,
1435 &adapter->tx_ring[i]);
581d708e
MC		 1436 break;
1437 }
1438 }
1439
1440 return err;
1441}
1442
1da177e4
LT		 1443/**
1444 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1445 * @adapter: board private structure
1446 *
1447 * Configure the Tx unit of the MAC after a reset.
1448 **/
1449
1450static void
1451e1000_configure_tx(struct e1000_adapter *adapter)
1452{
581d708e
MC		 1453 uint64_t tdba;
1454 struct e1000_hw *hw = &adapter->hw;
1455 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1456 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1457
1458 /* Setup the HW Tx Head and Tail descriptor pointers */
1459
f56799ea 1460 switch (adapter->num_tx_queues) {
24025e4e
MC		 1461 case 1:
1462 default:
581d708e
MC		 1463 tdba = adapter->tx_ring[0].dma;
1464 tdlen = adapter->tx_ring[0].count *
1465 sizeof(struct e1000_tx_desc);
581d708e 1466 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1467 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1468 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1469 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1470 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1471 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1472 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1473 break;
1474 }
1da177e4
LT		 1475
1476 /* Set the default values for the Tx Inter Packet Gap timer */
1477
0fadb059
JK		 1478 if (hw->media_type == e1000_media_type_fiber ||
1479 hw->media_type == e1000_media_type_internal_serdes)
1480 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1481 else
1482 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1483
581d708e 1484 switch (hw->mac_type) {
1da177e4
LT		 1485 case e1000_82542_rev2_0:
1486 case e1000_82542_rev2_1:
1487 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1488 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1489 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1490 break;
87041639
JK		 1491 case e1000_80003es2lan:
1492 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1493 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1494 break;
1da177e4 1495 default:
0fadb059
JK		 1496 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1497 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1498 break;
1da177e4 1499 }
0fadb059
JK		 1500 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1501 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1502 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1503
1504 /* Set the Tx Interrupt Delay register */
1505
581d708e
MC		 1506 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1507 if (hw->mac_type >= e1000_82540)
1508 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1509
1510 /* Program the Transmit Control Register */
1511
581d708e 1512 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1513
1514 tctl &= ~E1000_TCTL_CT;
7e6c9861 1515 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1516 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1517
7e6c9861
JK		 1518#ifdef DISABLE_MULR
1519 /* disable Multiple Reads for debugging */
1520 tctl &= ~E1000_TCTL_MULR;
1521#endif
1da177e4 1522
2ae76d98
MC		 1523 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1524 tarc = E1000_READ_REG(hw, TARC0);
1525 tarc |= ((1 << 25) | (1 << 21));
1526 E1000_WRITE_REG(hw, TARC0, tarc);
1527 tarc = E1000_READ_REG(hw, TARC1);
1528 tarc |= (1 << 25);
1529 if (tctl & E1000_TCTL_MULR)
1530 tarc &= ~(1 << 28);
1531 else
1532 tarc |= (1 << 28);
1533 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1534 } else if (hw->mac_type == e1000_80003es2lan) {
1535 tarc = E1000_READ_REG(hw, TARC0);
1536 tarc |= 1;
87041639
JK		 1537 E1000_WRITE_REG(hw, TARC0, tarc);
1538 tarc = E1000_READ_REG(hw, TARC1);
1539 tarc |= 1;
1540 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1541 }
1542
581d708e 1543 e1000_config_collision_dist(hw);
1da177e4
LT		 1544
1545 /* Setup Transmit Descriptor Settings for eop descriptor */
1546 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1547 E1000_TXD_CMD_IFCS;
1548
581d708e 1549 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1550 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1551 else
1552 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1553
1554 /* Cache if we're 82544 running in PCI-X because we'll
1555 * need this to apply a workaround later in the send path. */
581d708e
MC		 1556 if (hw->mac_type == e1000_82544 &&
1557 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1558 adapter->pcix_82544 = 1;
7e6c9861
JK		 1559
1560 E1000_WRITE_REG(hw, TCTL, tctl);
1561
1da177e4
LT		 1562}
1563
1564/**
1565 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1566 * @adapter: board private structure
581d708e 1567 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1568 *
1569 * Returns 0 on success, negative on failure
1570 **/
1571
3ad2cc67 1572static int
581d708e
MC		 1573e1000_setup_rx_resources(struct e1000_adapter *adapter,
1574 struct e1000_rx_ring *rxdr)
1da177e4 1575{
1da177e4 1576 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1577 int size, desc_len;
1da177e4
LT		 1578
1579 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1580 rxdr->buffer_info = vmalloc(size);
581d708e 1581 if (!rxdr->buffer_info) {
2648345f
MC		 1582 DPRINTK(PROBE, ERR,
1583 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1584 return -ENOMEM;
1585 }
1586 memset(rxdr->buffer_info, 0, size);
1587
2d7edb92
MC		 1588 size = sizeof(struct e1000_ps_page) * rxdr->count;
1589 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1590 if (!rxdr->ps_page) {
2d7edb92
MC		 1591 vfree(rxdr->buffer_info);
1592 DPRINTK(PROBE, ERR,
1593 "Unable to allocate memory for the receive descriptor ring\n");
1594 return -ENOMEM;
1595 }
1596 memset(rxdr->ps_page, 0, size);
1597
1598 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1599 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1600 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1601 vfree(rxdr->buffer_info);
1602 kfree(rxdr->ps_page);
1603 DPRINTK(PROBE, ERR,
1604 "Unable to allocate memory for the receive descriptor ring\n");
1605 return -ENOMEM;
1606 }
1607 memset(rxdr->ps_page_dma, 0, size);
1608
96838a40 1609 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1610 desc_len = sizeof(struct e1000_rx_desc);
1611 else
1612 desc_len = sizeof(union e1000_rx_desc_packet_split);
1613
1da177e4
LT		 1614 /* Round up to nearest 4K */
1615
2d7edb92 1616 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1617 E1000_ROUNDUP(rxdr->size, 4096);
1618
1619 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1620
581d708e
MC		 1621 if (!rxdr->desc) {
1622 DPRINTK(PROBE, ERR,
1623 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1624setup_rx_desc_die:
1da177e4 1625 vfree(rxdr->buffer_info);
2d7edb92
MC		 1626 kfree(rxdr->ps_page);
1627 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1628 return -ENOMEM;
1629 }
1630
2648345f 1631 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1632 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1633 void *olddesc = rxdr->desc;
1634 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1635 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1636 "at %p\n", rxdr->size, rxdr->desc);
1637 /* Try again, without freeing the previous */
1da177e4 1638 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1639 /* Failed allocation, critical failure */
581d708e 1640 if (!rxdr->desc) {
1da177e4 1641 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1642 DPRINTK(PROBE, ERR,
1643 "Unable to allocate memory "
1644 "for the receive descriptor ring\n");
1da177e4
LT		 1645 goto setup_rx_desc_die;
1646 }
1647
1648 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1649 /* give up */
2648345f
MC		 1650 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1651 rxdr->dma);
1da177e4 1652 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1653 DPRINTK(PROBE, ERR,
1654 "Unable to allocate aligned memory "
1655 "for the receive descriptor ring\n");
581d708e 1656 goto setup_rx_desc_die;
1da177e4 1657 } else {
2648345f 1658 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1659 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1660 }
1661 }
1662 memset(rxdr->desc, 0, rxdr->size);
1663
1664 rxdr->next_to_clean = 0;
1665 rxdr->next_to_use = 0;
1666
1667 return 0;
1668}
1669
581d708e
MC		 1670/**
1671 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1672 * (Descriptors) for all queues
1673 * @adapter: board private structure
1674 *
581d708e
MC		 1675 * Return 0 on success, negative on failure
1676 **/
1677
1678int
1679e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1680{
1681 int i, err = 0;
1682
f56799ea 1683 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1684 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1685 if (err) {
1686 DPRINTK(PROBE, ERR,
1687 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1688 for (i-- ; i >= 0; i--)
1689 e1000_free_rx_resources(adapter,
1690 &adapter->rx_ring[i]);
581d708e
MC		 1691 break;
1692 }
1693 }
1694
1695 return err;
1696}
1697
1da177e4 1698/**
2648345f 1699 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1700 * @adapter: Board private structure
1701 **/
e4c811c9
MC		 1702#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1703 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1704static void
1705e1000_setup_rctl(struct e1000_adapter *adapter)
1706{
2d7edb92
MC		 1707 uint32_t rctl, rfctl;
1708 uint32_t psrctl = 0;
35ec56bb 1709#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1710 uint32_t pages = 0;
1711#endif
1da177e4
LT		 1712
1713 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1714
1715 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1716
1717 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1718 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1719 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1720
0fadb059 1721 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1722 rctl |= E1000_RCTL_SBP;
1723 else
1724 rctl &= ~E1000_RCTL_SBP;
1725
2d7edb92
MC		 1726 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1727 rctl &= ~E1000_RCTL_LPE;
1728 else
1729 rctl |= E1000_RCTL_LPE;
1730
1da177e4 1731 /* Setup buffer sizes */
9e2feace
AK		 1732 rctl &= ~E1000_RCTL_SZ_4096;
1733 rctl |= E1000_RCTL_BSEX;
1734 switch (adapter->rx_buffer_len) {
1735 case E1000_RXBUFFER_256:
1736 rctl |= E1000_RCTL_SZ_256;
1737 rctl &= ~E1000_RCTL_BSEX;
1738 break;
1739 case E1000_RXBUFFER_512:
1740 rctl |= E1000_RCTL_SZ_512;
1741 rctl &= ~E1000_RCTL_BSEX;
1742 break;
1743 case E1000_RXBUFFER_1024:
1744 rctl |= E1000_RCTL_SZ_1024;
1745 rctl &= ~E1000_RCTL_BSEX;
1746 break;
a1415ee6
JK		 1747 case E1000_RXBUFFER_2048:
1748 default:
1749 rctl |= E1000_RCTL_SZ_2048;
1750 rctl &= ~E1000_RCTL_BSEX;
1751 break;
1752 case E1000_RXBUFFER_4096:
1753 rctl |= E1000_RCTL_SZ_4096;
1754 break;
1755 case E1000_RXBUFFER_8192:
1756 rctl |= E1000_RCTL_SZ_8192;
1757 break;
1758 case E1000_RXBUFFER_16384:
1759 rctl |= E1000_RCTL_SZ_16384;
1760 break;
2d7edb92
MC		 1761 }
1762
35ec56bb 1763#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1764 /* 82571 and greater support packet-split where the protocol
1765 * header is placed in skb->data and the packet data is
1766 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1767 * In the case of a non-split, skb->data is linearly filled,
1768 * followed by the page buffers. Therefore, skb->data is
1769 * sized to hold the largest protocol header.
1770 */
e4c811c9
MC		 1771 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1772 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1773 PAGE_SIZE <= 16384)
1774 adapter->rx_ps_pages = pages;
1775 else
1776 adapter->rx_ps_pages = 0;
2d7edb92 1777#endif
e4c811c9 1778 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1779 /* Configure extra packet-split registers */
1780 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1781 rfctl |= E1000_RFCTL_EXTEN;
1782 /* disable IPv6 packet split support */
1783 rfctl |= E1000_RFCTL_IPV6_DIS;
1784 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1785
7dfee0cb 1786 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1787
2d7edb92
MC		 1788 psrctl |= adapter->rx_ps_bsize0 >>
1789 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1790
1791 switch (adapter->rx_ps_pages) {
1792 case 3:
1793 psrctl |= PAGE_SIZE <<
1794 E1000_PSRCTL_BSIZE3_SHIFT;
1795 case 2:
1796 psrctl |= PAGE_SIZE <<
1797 E1000_PSRCTL_BSIZE2_SHIFT;
1798 case 1:
1799 psrctl |= PAGE_SIZE >>
1800 E1000_PSRCTL_BSIZE1_SHIFT;
1801 break;
1802 }
2d7edb92
MC		 1803
1804 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1805 }
1806
1807 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1808}
1809
1810/**
1811 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1812 * @adapter: board private structure
1813 *
1814 * Configure the Rx unit of the MAC after a reset.
1815 **/
1816
1817static void
1818e1000_configure_rx(struct e1000_adapter *adapter)
1819{
581d708e
MC		 1820 uint64_t rdba;
1821 struct e1000_hw *hw = &adapter->hw;
1822 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1823
e4c811c9 1824 if (adapter->rx_ps_pages) {
0f15a8fa 1825 /* this is a 32 byte descriptor */
581d708e 1826 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1827 sizeof(union e1000_rx_desc_packet_split);
1828 adapter->clean_rx = e1000_clean_rx_irq_ps;
1829 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1830 } else {
581d708e
MC		 1831 rdlen = adapter->rx_ring[0].count *
1832 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1833 adapter->clean_rx = e1000_clean_rx_irq;
1834 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1835 }
1da177e4
LT		 1836
1837 /* disable receives while setting up the descriptors */
581d708e
MC		 1838 rctl = E1000_READ_REG(hw, RCTL);
1839 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1840
1841 /* set the Receive Delay Timer Register */
581d708e 1842 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1843
581d708e
MC		 1844 if (hw->mac_type >= e1000_82540) {
1845 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1846 if (adapter->itr > 1)
581d708e 1847 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1848 1000000000 / (adapter->itr * 256));
1849 }
1850
2ae76d98 1851 if (hw->mac_type >= e1000_82571) {
2ae76d98 1852 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1853 /* Reset delay timers after every interrupt */
6fc7a7ec 1854 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1855#ifdef CONFIG_E1000_NAPI
1856 /* Auto-Mask interrupts upon ICR read. */
1857 ctrl_ext |= E1000_CTRL_EXT_IAME;
1858#endif
2ae76d98 1859 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1860 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1861 E1000_WRITE_FLUSH(hw);
1862 }
1863
581d708e
MC		 1864 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1865 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1866 switch (adapter->num_rx_queues) {
24025e4e
MC		 1867 case 1:
1868 default:
581d708e 1869 rdba = adapter->rx_ring[0].dma;
581d708e 1870 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1871 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1872 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1873 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1874 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1875 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1876 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1877 break;
24025e4e
MC		 1878 }
1879
1da177e4 1880 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1881 if (hw->mac_type >= e1000_82543) {
1882 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1883 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1884 rxcsum |= E1000_RXCSUM_TUOFL;
1885
868d5309 1886 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1887 * Must be used in conjunction with packet-split. */
96838a40
JB		 1888 if ((hw->mac_type >= e1000_82571) &&
1889 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1890 rxcsum |= E1000_RXCSUM_IPPCSE;
1891 }
1892 } else {
1893 rxcsum &= ~E1000_RXCSUM_TUOFL;
1894 /* don't need to clear IPPCSE as it defaults to 0 */
1895 }
581d708e 1896 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1897 }
1898
1899 /* Enable Receives */
581d708e 1900 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1901}
1902
1903/**
581d708e 1904 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1905 * @adapter: board private structure
581d708e 1906 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1907 *
1908 * Free all transmit software resources
1909 **/
1910
3ad2cc67 1911static void
581d708e
MC		 1912e1000_free_tx_resources(struct e1000_adapter *adapter,
1913 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1914{
1915 struct pci_dev *pdev = adapter->pdev;
1916
581d708e 1917 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1918
581d708e
MC		 1919 vfree(tx_ring->buffer_info);
1920 tx_ring->buffer_info = NULL;
1da177e4 1921
581d708e 1922 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1923
581d708e
MC		 1924 tx_ring->desc = NULL;
1925}
1926
1927/**
1928 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1929 * @adapter: board private structure
1930 *
1931 * Free all transmit software resources
1932 **/
1933
1934void
1935e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1936{
1937 int i;
1938
f56799ea 1939 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1940 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1941}
1942
e619d523 1943static void
1da177e4
LT		 1944e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1945 struct e1000_buffer *buffer_info)
1946{
96838a40 1947 if (buffer_info->dma) {
2648345f
MC		 1948 pci_unmap_page(adapter->pdev,
1949 buffer_info->dma,
1950 buffer_info->length,
1951 PCI_DMA_TODEVICE);
1da177e4 1952 }
8241e35e 1953 if (buffer_info->skb)
1da177e4 1954 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1955 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1956}
1957
1958/**
1959 * e1000_clean_tx_ring - Free Tx Buffers
1960 * @adapter: board private structure
581d708e 1961 * @tx_ring: ring to be cleaned
1da177e4
LT		 1962 **/
1963
1964static void
581d708e
MC		 1965e1000_clean_tx_ring(struct e1000_adapter *adapter,
1966 struct e1000_tx_ring *tx_ring)
1da177e4 1967{
1da177e4
LT		 1968 struct e1000_buffer *buffer_info;
1969 unsigned long size;
1970 unsigned int i;
1971
1972 /* Free all the Tx ring sk_buffs */
1973
96838a40 1974 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1975 buffer_info = &tx_ring->buffer_info[i];
1976 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1977 }
1978
1979 size = sizeof(struct e1000_buffer) * tx_ring->count;
1980 memset(tx_ring->buffer_info, 0, size);
1981
1982 /* Zero out the descriptor ring */
1983
1984 memset(tx_ring->desc, 0, tx_ring->size);
1985
1986 tx_ring->next_to_use = 0;
1987 tx_ring->next_to_clean = 0;
fd803241 1988 tx_ring->last_tx_tso = 0;
1da177e4 1989
581d708e
MC		 1990 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1991 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1992}
1993
1994/**
1995 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1996 * @adapter: board private structure
1997 **/
1998
1999static void
2000e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2001{
2002 int i;
2003
f56799ea 2004 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2005 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2006}
2007
2008/**
2009 * e1000_free_rx_resources - Free Rx Resources
2010 * @adapter: board private structure
581d708e 2011 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2012 *
2013 * Free all receive software resources
2014 **/
2015
3ad2cc67 2016static void
581d708e
MC		 2017e1000_free_rx_resources(struct e1000_adapter *adapter,
2018 struct e1000_rx_ring *rx_ring)
1da177e4 2019{
1da177e4
LT		 2020 struct pci_dev *pdev = adapter->pdev;
2021
581d708e 2022 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2023
2024 vfree(rx_ring->buffer_info);
2025 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2026 kfree(rx_ring->ps_page);
2027 rx_ring->ps_page = NULL;
2028 kfree(rx_ring->ps_page_dma);
2029 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2030
2031 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2032
2033 rx_ring->desc = NULL;
2034}
2035
2036/**
581d708e 2037 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2038 * @adapter: board private structure
581d708e
MC		 2039 *
2040 * Free all receive software resources
2041 **/
2042
2043void
2044e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2045{
2046 int i;
2047
f56799ea 2048 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2049 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2050}
2051
2052/**
2053 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2054 * @adapter: board private structure
2055 * @rx_ring: ring to free buffers from
1da177e4
LT		 2056 **/
2057
2058static void
581d708e
MC		 2059e1000_clean_rx_ring(struct e1000_adapter *adapter,
2060 struct e1000_rx_ring *rx_ring)
1da177e4 2061{
1da177e4 2062 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2063 struct e1000_ps_page *ps_page;
2064 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2065 struct pci_dev *pdev = adapter->pdev;
2066 unsigned long size;
2d7edb92 2067 unsigned int i, j;
1da177e4
LT		 2068
2069 /* Free all the Rx ring sk_buffs */
96838a40 2070 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2071 buffer_info = &rx_ring->buffer_info[i];
96838a40 2072 if (buffer_info->skb) {
1da177e4
LT		 2073 pci_unmap_single(pdev,
2074 buffer_info->dma,
2075 buffer_info->length,
2076 PCI_DMA_FROMDEVICE);
2077
2078 dev_kfree_skb(buffer_info->skb);
2079 buffer_info->skb = NULL;
997f5cbd
JK		 2080 }
2081 ps_page = &rx_ring->ps_page[i];
2082 ps_page_dma = &rx_ring->ps_page_dma[i];
2083 for (j = 0; j < adapter->rx_ps_pages; j++) {
2084 if (!ps_page->ps_page[j]) break;
2085 pci_unmap_page(pdev,
2086 ps_page_dma->ps_page_dma[j],
2087 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2088 ps_page_dma->ps_page_dma[j] = 0;
2089 put_page(ps_page->ps_page[j]);
2090 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2091 }
2092 }
2093
2094 size = sizeof(struct e1000_buffer) * rx_ring->count;
2095 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2096 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2097 memset(rx_ring->ps_page, 0, size);
2098 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2099 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2100
2101 /* Zero out the descriptor ring */
2102
2103 memset(rx_ring->desc, 0, rx_ring->size);
2104
2105 rx_ring->next_to_clean = 0;
2106 rx_ring->next_to_use = 0;
2107
581d708e
MC		 2108 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2109 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2110}
2111
2112/**
2113 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2114 * @adapter: board private structure
2115 **/
2116
2117static void
2118e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2119{
2120 int i;
2121
f56799ea 2122 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2123 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2124}
2125
2126/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2127 * and memory write and invalidate disabled for certain operations
2128 */
2129static void
2130e1000_enter_82542_rst(struct e1000_adapter *adapter)
2131{
2132 struct net_device *netdev = adapter->netdev;
2133 uint32_t rctl;
2134
2135 e1000_pci_clear_mwi(&adapter->hw);
2136
2137 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2138 rctl |= E1000_RCTL_RST;
2139 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2140 E1000_WRITE_FLUSH(&adapter->hw);
2141 mdelay(5);
2142
96838a40 2143 if (netif_running(netdev))
581d708e 2144 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2145}
2146
2147static void
2148e1000_leave_82542_rst(struct e1000_adapter *adapter)
2149{
2150 struct net_device *netdev = adapter->netdev;
2151 uint32_t rctl;
2152
2153 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2154 rctl &= ~E1000_RCTL_RST;
2155 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2156 E1000_WRITE_FLUSH(&adapter->hw);
2157 mdelay(5);
2158
96838a40 2159 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2160 e1000_pci_set_mwi(&adapter->hw);
2161
96838a40 2162 if (netif_running(netdev)) {
72d64a43
JK		 2163 /* No need to loop, because 82542 supports only 1 queue */
2164 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2165 e1000_configure_rx(adapter);
72d64a43 2166 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2167 }
2168}
2169
2170/**
2171 * e1000_set_mac - Change the Ethernet Address of the NIC
2172 * @netdev: network interface device structure
2173 * @p: pointer to an address structure
2174 *
2175 * Returns 0 on success, negative on failure
2176 **/
2177
2178static int
2179e1000_set_mac(struct net_device *netdev, void *p)
2180{
60490fe0 2181 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2182 struct sockaddr *addr = p;
2183
96838a40 2184 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2185 return -EADDRNOTAVAIL;
2186
2187 /* 82542 2.0 needs to be in reset to write receive address registers */
2188
96838a40 2189 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2190 e1000_enter_82542_rst(adapter);
2191
2192 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2193 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2194
2195 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2196
868d5309
MC		 2197 /* With 82571 controllers, LAA may be overwritten (with the default)
2198 * due to controller reset from the other port. */
2199 if (adapter->hw.mac_type == e1000_82571) {
2200 /* activate the work around */
2201 adapter->hw.laa_is_present = 1;
2202
96838a40
JB		 2203 /* Hold a copy of the LAA in RAR[14] This is done so that
2204 * between the time RAR[0] gets clobbered and the time it
2205 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2206 * of the RARs and no incoming packets directed to this port
96838a40 2207 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2208 * RAR[14] */
96838a40 2209 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2210 E1000_RAR_ENTRIES - 1);
2211 }
2212
96838a40 2213 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2214 e1000_leave_82542_rst(adapter);
2215
2216 return 0;
2217}
2218
2219/**
2220 * e1000_set_multi - Multicast and Promiscuous mode set
2221 * @netdev: network interface device structure
2222 *
2223 * The set_multi entry point is called whenever the multicast address
2224 * list or the network interface flags are updated. This routine is
2225 * responsible for configuring the hardware for proper multicast,
2226 * promiscuous mode, and all-multi behavior.
2227 **/
2228
2229static void
2230e1000_set_multi(struct net_device *netdev)
2231{
60490fe0 2232 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2233 struct e1000_hw *hw = &adapter->hw;
2234 struct dev_mc_list *mc_ptr;
2235 uint32_t rctl;
2236 uint32_t hash_value;
868d5309 2237 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2238 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2239 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2240 E1000_NUM_MTA_REGISTERS;
2241
2242 if (adapter->hw.mac_type == e1000_ich8lan)
2243 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2244
868d5309
MC		 2245 /* reserve RAR[14] for LAA over-write work-around */
2246 if (adapter->hw.mac_type == e1000_82571)
2247 rar_entries--;
1da177e4 2248
2648345f
MC		 2249 /* Check for Promiscuous and All Multicast modes */
2250
1da177e4
LT		 2251 rctl = E1000_READ_REG(hw, RCTL);
2252
96838a40 2253 if (netdev->flags & IFF_PROMISC) {
1da177e4 2254 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2255 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2256 rctl |= E1000_RCTL_MPE;
2257 rctl &= ~E1000_RCTL_UPE;
2258 } else {
2259 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2260 }
2261
2262 E1000_WRITE_REG(hw, RCTL, rctl);
2263
2264 /* 82542 2.0 needs to be in reset to write receive address registers */
2265
96838a40 2266 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2267 e1000_enter_82542_rst(adapter);
2268
2269 /* load the first 14 multicast address into the exact filters 1-14
2270 * RAR 0 is used for the station MAC adddress
2271 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2272 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2273 */
2274 mc_ptr = netdev->mc_list;
2275
96838a40 2276 for (i = 1; i < rar_entries; i++) {
868d5309 2277 if (mc_ptr) {
1da177e4
LT		 2278 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2279 mc_ptr = mc_ptr->next;
2280 } else {
2281 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2282 E1000_WRITE_FLUSH(hw);
1da177e4 2283 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2284 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2285 }
2286 }
2287
2288 /* clear the old settings from the multicast hash table */
2289
cd94dd0b 2290 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2291 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2292 E1000_WRITE_FLUSH(hw);
2293 }
1da177e4
LT		 2294
2295 /* load any remaining addresses into the hash table */
2296
96838a40 2297 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2298 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2299 e1000_mta_set(hw, hash_value);
2300 }
2301
96838a40 2302 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2303 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2304}
2305
2306/* Need to wait a few seconds after link up to get diagnostic information from
2307 * the phy */
2308
2309static void
2310e1000_update_phy_info(unsigned long data)
2311{
2312 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2313 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2314}
2315
2316/**
2317 * e1000_82547_tx_fifo_stall - Timer Call-back
2318 * @data: pointer to adapter cast into an unsigned long
2319 **/
2320
2321static void
2322e1000_82547_tx_fifo_stall(unsigned long data)
2323{
2324 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2325 struct net_device *netdev = adapter->netdev;
2326 uint32_t tctl;
2327
96838a40
JB		 2328 if (atomic_read(&adapter->tx_fifo_stall)) {
2329 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2330 E1000_READ_REG(&adapter->hw, TDH)) &&
2331 (E1000_READ_REG(&adapter->hw, TDFT) ==
2332 E1000_READ_REG(&adapter->hw, TDFH)) &&
2333 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2334 E1000_READ_REG(&adapter->hw, TDFHS))) {
2335 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2336 E1000_WRITE_REG(&adapter->hw, TCTL,
2337 tctl & ~E1000_TCTL_EN);
2338 E1000_WRITE_REG(&adapter->hw, TDFT,
2339 adapter->tx_head_addr);
2340 E1000_WRITE_REG(&adapter->hw, TDFH,
2341 adapter->tx_head_addr);
2342 E1000_WRITE_REG(&adapter->hw, TDFTS,
2343 adapter->tx_head_addr);
2344 E1000_WRITE_REG(&adapter->hw, TDFHS,
2345 adapter->tx_head_addr);
2346 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2347 E1000_WRITE_FLUSH(&adapter->hw);
2348
2349 adapter->tx_fifo_head = 0;
2350 atomic_set(&adapter->tx_fifo_stall, 0);
2351 netif_wake_queue(netdev);
2352 } else {
2353 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2354 }
2355 }
2356}
2357
2358/**
2359 * e1000_watchdog - Timer Call-back
2360 * @data: pointer to adapter cast into an unsigned long
2361 **/
2362static void
2363e1000_watchdog(unsigned long data)
2364{
2365 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2366 struct net_device *netdev = adapter->netdev;
545c67c0 2367 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2368 uint32_t link, tctl;
cd94dd0b
AK		 2369 int32_t ret_val;
2370
2371 ret_val = e1000_check_for_link(&adapter->hw);
2372 if ((ret_val == E1000_ERR_PHY) &&
2373 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2374 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2375 /* See e1000_kumeran_lock_loss_workaround() */
2376 DPRINTK(LINK, INFO,
2377 "Gigabit has been disabled, downgrading speed\n");
2378 }
2d7edb92
MC		 2379 if (adapter->hw.mac_type == e1000_82573) {
2380 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2381 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2382 e1000_update_mng_vlan(adapter);
96838a40 2383 }
1da177e4 2384
96838a40 2385 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2386 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2387 link = !adapter->hw.serdes_link_down;
2388 else
2389 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2390
96838a40
JB		 2391 if (link) {
2392 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2393 boolean_t txb2b = 1;
1da177e4
LT		 2394 e1000_get_speed_and_duplex(&adapter->hw,
2395 &adapter->link_speed,
2396 &adapter->link_duplex);
2397
2398 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2399 adapter->link_speed,
2400 adapter->link_duplex == FULL_DUPLEX ?
2401 "Full Duplex" : "Half Duplex");
2402
7e6c9861
JK		 2403 /* tweak tx_queue_len according to speed/duplex
2404 * and adjust the timeout factor */
66a2b0a3
JK		 2405 netdev->tx_queue_len = adapter->tx_queue_len;
2406 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2407 switch (adapter->link_speed) {
2408 case SPEED_10:
fe7fe28e 2409 txb2b = 0;
7e6c9861
JK		 2410 netdev->tx_queue_len = 10;
2411 adapter->tx_timeout_factor = 8;
2412 break;
2413 case SPEED_100:
fe7fe28e 2414 txb2b = 0;
7e6c9861
JK		 2415 netdev->tx_queue_len = 100;
2416 /* maybe add some timeout factor ? */
2417 break;
2418 }
2419
fe7fe28e 2420 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2421 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2422 txb2b == 0) {
7e6c9861
JK		 2423#define SPEED_MODE_BIT (1 << 21)
2424 uint32_t tarc0;
2425 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2426 tarc0 &= ~SPEED_MODE_BIT;
2427 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2428 }
2429
2430#ifdef NETIF_F_TSO
2431 /* disable TSO for pcie and 10/100 speeds, to avoid
2432 * some hardware issues */
2433 if (!adapter->tso_force &&
2434 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2435 switch (adapter->link_speed) {
2436 case SPEED_10:
66a2b0a3 2437 case SPEED_100:
7e6c9861
JK		 2438 DPRINTK(PROBE,INFO,
2439 "10/100 speed: disabling TSO\n");
2440 netdev->features &= ~NETIF_F_TSO;
2441 break;
2442 case SPEED_1000:
2443 netdev->features |= NETIF_F_TSO;
2444 break;
2445 default:
2446 /* oops */
66a2b0a3
JK		 2447 break;
2448 }
2449 }
7e6c9861
JK		 2450#endif
2451
2452 /* enable transmits in the hardware, need to do this
2453 * after setting TARC0 */
2454 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2455 tctl |= E1000_TCTL_EN;
2456 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2457
1da177e4
LT		 2458 netif_carrier_on(netdev);
2459 netif_wake_queue(netdev);
2460 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2461 adapter->smartspeed = 0;
2462 }
2463 } else {
96838a40 2464 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2465 adapter->link_speed = 0;
2466 adapter->link_duplex = 0;
2467 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2468 netif_carrier_off(netdev);
2469 netif_stop_queue(netdev);
2470 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2471
2472 /* 80003ES2LAN workaround--
2473 * For packet buffer work-around on link down event;
2474 * disable receives in the ISR and
2475 * reset device here in the watchdog
2476 */
8fc897b0 2477 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2478 /* reset device */
2479 schedule_work(&adapter->reset_task);
1da177e4
LT		 2480 }
2481
2482 e1000_smartspeed(adapter);
2483 }
2484
2485 e1000_update_stats(adapter);
2486
2487 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2488 adapter->tpt_old = adapter->stats.tpt;
2489 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2490 adapter->colc_old = adapter->stats.colc;
2491
2492 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2493 adapter->gorcl_old = adapter->stats.gorcl;
2494 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2495 adapter->gotcl_old = adapter->stats.gotcl;
2496
2497 e1000_update_adaptive(&adapter->hw);
2498
f56799ea 2499 if (!netif_carrier_ok(netdev)) {
581d708e 2500 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2501 /* We've lost link, so the controller stops DMA,
2502 * but we've got queued Tx work that's never going
2503 * to get done, so reset controller to flush Tx.
2504 * (Do the reset outside of interrupt context). */
87041639
JK		 2505 adapter->tx_timeout_count++;
2506 schedule_work(&adapter->reset_task);
1da177e4
LT		 2507 }
2508 }
2509
2510 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2511 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2512 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2513 * asymmetrical Tx or Rx gets ITR=8000; everyone
2514 * else is between 2000-8000. */
2515 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2516 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2517 adapter->gotcl - adapter->gorcl :
2518 adapter->gorcl - adapter->gotcl) / 10000;
2519 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2520 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2521 }
2522
2523 /* Cause software interrupt to ensure rx ring is cleaned */
2524 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2525
2648345f 2526 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2527 adapter->detect_tx_hung = TRUE;
2528
96838a40 2529 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2530 * reset from the other port. Set the appropriate LAA in RAR[0] */
2531 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2532 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2533
1da177e4
LT		 2534 /* Reset the timer */
2535 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2536}
2537
2538#define E1000_TX_FLAGS_CSUM 0x00000001
2539#define E1000_TX_FLAGS_VLAN 0x00000002
2540#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2541#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2542#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2543#define E1000_TX_FLAGS_VLAN_SHIFT 16
2544
e619d523 2545static int
581d708e
MC		 2546e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2547 struct sk_buff *skb)
1da177e4
LT		 2548{
2549#ifdef NETIF_F_TSO
2550 struct e1000_context_desc *context_desc;
545c67c0 2551 struct e1000_buffer *buffer_info;
1da177e4
LT		 2552 unsigned int i;
2553 uint32_t cmd_length = 0;
2d7edb92 2554 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2555 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2556 int err;
2557
89114afd 2558 if (skb_is_gso(skb)) {
1da177e4
LT		 2559 if (skb_header_cloned(skb)) {
2560 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2561 if (err)
2562 return err;
2563 }
2564
2565 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2566 mss = skb_shinfo(skb)->gso_size;
60828236 2567 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2568 skb->nh.iph->tot_len = 0;
2569 skb->nh.iph->check = 0;
2570 skb->h.th->check =
2571 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2572 skb->nh.iph->daddr,
2573 0,
2574 IPPROTO_TCP,
2575 0);
2576 cmd_length = E1000_TXD_CMD_IP;
2577 ipcse = skb->h.raw - skb->data - 1;
2578#ifdef NETIF_F_TSO_IPV6
e15fdd03 2579 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2580 skb->nh.ipv6h->payload_len = 0;
2581 skb->h.th->check =
2582 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2583 &skb->nh.ipv6h->daddr,
2584 0,
2585 IPPROTO_TCP,
2586 0);
2587 ipcse = 0;
2588#endif
2589 }
1da177e4
LT		 2590 ipcss = skb->nh.raw - skb->data;
2591 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2592 tucss = skb->h.raw - skb->data;
2593 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2594 tucse = 0;
2595
2596 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2597 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2598
581d708e
MC		 2599 i = tx_ring->next_to_use;
2600 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2601 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2602
2603 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2604 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2605 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2606 context_desc->upper_setup.tcp_fields.tucss = tucss;
2607 context_desc->upper_setup.tcp_fields.tucso = tucso;
2608 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2609 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2610 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2611 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2612
545c67c0
JK		 2613 buffer_info->time_stamp = jiffies;
2614
581d708e
MC		 2615 if (++i == tx_ring->count) i = 0;
2616 tx_ring->next_to_use = i;
1da177e4 2617
8241e35e 2618 return TRUE;
1da177e4
LT		 2619 }
2620#endif
2621
8241e35e 2622 return FALSE;
1da177e4
LT		 2623}
2624
e619d523 2625static boolean_t
581d708e
MC		 2626e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2627 struct sk_buff *skb)
1da177e4
LT		 2628{
2629 struct e1000_context_desc *context_desc;
545c67c0 2630 struct e1000_buffer *buffer_info;
1da177e4
LT		 2631 unsigned int i;
2632 uint8_t css;
2633
96838a40 2634 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2635 css = skb->h.raw - skb->data;
2636
581d708e 2637 i = tx_ring->next_to_use;
545c67c0 2638 buffer_info = &tx_ring->buffer_info[i];
581d708e 2639 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2640
2641 context_desc->upper_setup.tcp_fields.tucss = css;
2642 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2643 context_desc->upper_setup.tcp_fields.tucse = 0;
2644 context_desc->tcp_seg_setup.data = 0;
2645 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2646
545c67c0
JK		 2647 buffer_info->time_stamp = jiffies;
2648
581d708e
MC		 2649 if (unlikely(++i == tx_ring->count)) i = 0;
2650 tx_ring->next_to_use = i;
1da177e4
LT		 2651
2652 return TRUE;
2653 }
2654
2655 return FALSE;
2656}
2657
2658#define E1000_MAX_TXD_PWR 12
2659#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2660
e619d523 2661static int
581d708e
MC		 2662e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2663 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2664 unsigned int nr_frags, unsigned int mss)
1da177e4 2665{
1da177e4
LT		 2666 struct e1000_buffer *buffer_info;
2667 unsigned int len = skb->len;
2668 unsigned int offset = 0, size, count = 0, i;
2669 unsigned int f;
2670 len -= skb->data_len;
2671
2672 i = tx_ring->next_to_use;
2673
96838a40 2674 while (len) {
1da177e4
LT		 2675 buffer_info = &tx_ring->buffer_info[i];
2676 size = min(len, max_per_txd);
2677#ifdef NETIF_F_TSO
fd803241
JK		 2678 /* Workaround for Controller erratum --
2679 * descriptor for non-tso packet in a linear SKB that follows a
2680 * tso gets written back prematurely before the data is fully
0f15a8fa 2681 * DMA'd to the controller */
fd803241 2682 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2683 !skb_is_gso(skb)) {
fd803241
JK		 2684 tx_ring->last_tx_tso = 0;
2685 size -= 4;
2686 }
2687
1da177e4
LT		 2688 /* Workaround for premature desc write-backs
2689 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2690 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2691 size -= 4;
2692#endif
97338bde
MC		 2693 /* work-around for errata 10 and it applies
2694 * to all controllers in PCI-X mode
2695 * The fix is to make sure that the first descriptor of a
2696 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2697 */
96838a40 2698 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2699 (size > 2015) && count == 0))
2700 size = 2015;
96838a40 2701
1da177e4
LT		 2702 /* Workaround for potential 82544 hang in PCI-X. Avoid
2703 * terminating buffers within evenly-aligned dwords. */
96838a40 2704 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2705 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2706 size > 4))
2707 size -= 4;
2708
2709 buffer_info->length = size;
2710 buffer_info->dma =
2711 pci_map_single(adapter->pdev,
2712 skb->data + offset,
2713 size,
2714 PCI_DMA_TODEVICE);
2715 buffer_info->time_stamp = jiffies;
2716
2717 len -= size;
2718 offset += size;
2719 count++;
96838a40 2720 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2721 }
2722
96838a40 2723 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2724 struct skb_frag_struct *frag;
2725
2726 frag = &skb_shinfo(skb)->frags[f];
2727 len = frag->size;
2728 offset = frag->page_offset;
2729
96838a40 2730 while (len) {
1da177e4
LT		 2731 buffer_info = &tx_ring->buffer_info[i];
2732 size = min(len, max_per_txd);
2733#ifdef NETIF_F_TSO
2734 /* Workaround for premature desc write-backs
2735 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2736 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2737 size -= 4;
2738#endif
2739 /* Workaround for potential 82544 hang in PCI-X.
2740 * Avoid terminating buffers within evenly-aligned
2741 * dwords. */
96838a40 2742 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2743 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2744 size > 4))
2745 size -= 4;
2746
2747 buffer_info->length = size;
2748 buffer_info->dma =
2749 pci_map_page(adapter->pdev,
2750 frag->page,
2751 offset,
2752 size,
2753 PCI_DMA_TODEVICE);
2754 buffer_info->time_stamp = jiffies;
2755
2756 len -= size;
2757 offset += size;
2758 count++;
96838a40 2759 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2760 }
2761 }
2762
2763 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2764 tx_ring->buffer_info[i].skb = skb;
2765 tx_ring->buffer_info[first].next_to_watch = i;
2766
2767 return count;
2768}
2769
e619d523 2770static void
581d708e
MC		 2771e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2772 int tx_flags, int count)
1da177e4 2773{
1da177e4
LT		 2774 struct e1000_tx_desc *tx_desc = NULL;
2775 struct e1000_buffer *buffer_info;
2776 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2777 unsigned int i;
2778
96838a40 2779 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2780 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2781 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2782 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2783
96838a40 2784 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2785 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2786 }
2787
96838a40 2788 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2789 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2790 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2791 }
2792
96838a40 2793 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2794 txd_lower |= E1000_TXD_CMD_VLE;
2795 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2796 }
2797
2798 i = tx_ring->next_to_use;
2799
96838a40 2800 while (count--) {
1da177e4
LT		 2801 buffer_info = &tx_ring->buffer_info[i];
2802 tx_desc = E1000_TX_DESC(*tx_ring, i);
2803 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2804 tx_desc->lower.data =
2805 cpu_to_le32(txd_lower | buffer_info->length);
2806 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2807 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2808 }
2809
2810 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2811
2812 /* Force memory writes to complete before letting h/w
2813 * know there are new descriptors to fetch. (Only
2814 * applicable for weak-ordered memory model archs,
2815 * such as IA-64). */
2816 wmb();
2817
2818 tx_ring->next_to_use = i;
581d708e 2819 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2820}
2821
2822/**
2823 * 82547 workaround to avoid controller hang in half-duplex environment.
2824 * The workaround is to avoid queuing a large packet that would span
2825 * the internal Tx FIFO ring boundary by notifying the stack to resend
2826 * the packet at a later time. This gives the Tx FIFO an opportunity to
2827 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2828 * to the beginning of the Tx FIFO.
2829 **/
2830
2831#define E1000_FIFO_HDR 0x10
2832#define E1000_82547_PAD_LEN 0x3E0
2833
e619d523 2834static int
1da177e4
LT		 2835e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2836{
2837 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2838 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2839
2840 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2841
96838a40 2842 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2843 goto no_fifo_stall_required;
2844
96838a40 2845 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2846 return 1;
2847
96838a40 2848 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2849 atomic_set(&adapter->tx_fifo_stall, 1);
2850 return 1;
2851 }
2852
2853no_fifo_stall_required:
2854 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2855 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2856 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2857 return 0;
2858}
2859
2d7edb92 2860#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2861static int
2d7edb92
MC		 2862e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2863{
2864 struct e1000_hw *hw = &adapter->hw;
2865 uint16_t length, offset;
96838a40
JB		 2866 if (vlan_tx_tag_present(skb)) {
2867 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2868 ( adapter->hw.mng_cookie.status &
2869 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2870 return 0;
2871 }
20a44028 2872 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2873 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2874 if ((htons(ETH_P_IP) == eth->h_proto)) {
2875 const struct iphdr *ip =
2d7edb92 2876 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2877 if (IPPROTO_UDP == ip->protocol) {
2878 struct udphdr *udp =
2879 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2880 (ip->ihl << 2));
96838a40 2881 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2882 offset = (uint8_t *)udp + 8 - skb->data;
2883 length = skb->len - offset;
2884
2885 return e1000_mng_write_dhcp_info(hw,
96838a40 2886 (uint8_t *)udp + 8,
2d7edb92
MC		 2887 length);
2888 }
2889 }
2890 }
2891 }
2892 return 0;
2893}
2894
1da177e4
LT		 2895#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2896static int
2897e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2898{
60490fe0 2899 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2900 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2901 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2902 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2903 unsigned int tx_flags = 0;
2904 unsigned int len = skb->len;
2905 unsigned long flags;
2906 unsigned int nr_frags = 0;
2907 unsigned int mss = 0;
2908 int count = 0;
76c224bc 2909 int tso;
1da177e4
LT		 2910 unsigned int f;
2911 len -= skb->data_len;
2912
581d708e 2913 tx_ring = adapter->tx_ring;
24025e4e 2914
581d708e 2915 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2916 dev_kfree_skb_any(skb);
2917 return NETDEV_TX_OK;
2918 }
2919
2920#ifdef NETIF_F_TSO
7967168c 2921 mss = skb_shinfo(skb)->gso_size;
76c224bc 2922 /* The controller does a simple calculation to
1da177e4
LT		 2923 * make sure there is enough room in the FIFO before
2924 * initiating the DMA for each buffer. The calc is:
2925 * 4 = ceil(buffer len/mss). To make sure we don't
2926 * overrun the FIFO, adjust the max buffer len if mss
2927 * drops. */
96838a40 2928 if (mss) {
9a3056da 2929 uint8_t hdr_len;
1da177e4
LT		 2930 max_per_txd = min(mss << 2, max_per_txd);
2931 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2932
9f687888 2933 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2934 * points to just header, pull a few bytes of payload from
2935 * frags into skb->data */
2936 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2937 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2938 switch (adapter->hw.mac_type) {
2939 unsigned int pull_size;
2940 case e1000_82571:
2941 case e1000_82572:
2942 case e1000_82573:
cd94dd0b 2943 case e1000_ich8lan:
9f687888
JK		 2944 pull_size = min((unsigned int)4, skb->data_len);
2945 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2946 DPRINTK(DRV, ERR,
9f687888
JK		 2947 "__pskb_pull_tail failed.\n");
2948 dev_kfree_skb_any(skb);
749dfc70 2949 return NETDEV_TX_OK;
9f687888
JK		 2950 }
2951 len = skb->len - skb->data_len;
2952 break;
2953 default:
2954 /* do nothing */
2955 break;
d74bbd3b 2956 }
9a3056da 2957 }
1da177e4
LT		 2958 }
2959
9a3056da 2960 /* reserve a descriptor for the offload context */
96838a40 2961 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2962 count++;
2648345f 2963 count++;
1da177e4 2964#else
96838a40 2965 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2966 count++;
2967#endif
fd803241
JK		 2968
2969#ifdef NETIF_F_TSO
2970 /* Controller Erratum workaround */
89114afd 2971 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 2972 count++;
2973#endif
2974
1da177e4
LT		 2975 count += TXD_USE_COUNT(len, max_txd_pwr);
2976
96838a40 2977 if (adapter->pcix_82544)
1da177e4
LT		 2978 count++;
2979
96838a40 2980 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2981 * in PCI-X mode, so add one more descriptor to the count
2982 */
96838a40 2983 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2984 (len > 2015)))
2985 count++;
2986
1da177e4 2987 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2988 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2989 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2990 max_txd_pwr);
96838a40 2991 if (adapter->pcix_82544)
1da177e4
LT		 2992 count += nr_frags;
2993
0f15a8fa
JK		 2994
2995 if (adapter->hw.tx_pkt_filtering &&
2996 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2997 e1000_transfer_dhcp_info(adapter, skb);
2998
581d708e
MC		 2999 local_irq_save(flags);
3000 if (!spin_trylock(&tx_ring->tx_lock)) {
3001 /* Collision - tell upper layer to requeue */
3002 local_irq_restore(flags);
3003 return NETDEV_TX_LOCKED;
3004 }
1da177e4
LT		 3005
3006 /* need: count + 2 desc gap to keep tail from touching
3007 * head, otherwise try next time */
581d708e 3008 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 3009 netif_stop_queue(netdev);
581d708e 3010 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3011 return NETDEV_TX_BUSY;
3012 }
3013
96838a40
JB		 3014 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3015 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 3016 netif_stop_queue(netdev);
3017 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 3018 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3019 return NETDEV_TX_BUSY;
3020 }
3021 }
3022
96838a40 3023 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3024 tx_flags |= E1000_TX_FLAGS_VLAN;
3025 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3026 }
3027
581d708e 3028 first = tx_ring->next_to_use;
96838a40 3029
581d708e 3030 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3031 if (tso < 0) {
3032 dev_kfree_skb_any(skb);
581d708e 3033 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3034 return NETDEV_TX_OK;
3035 }
3036
fd803241
JK		 3037 if (likely(tso)) {
3038 tx_ring->last_tx_tso = 1;
1da177e4 3039 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3040 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3041 tx_flags |= E1000_TX_FLAGS_CSUM;
3042
2d7edb92 3043 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3044 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3045 * no longer assume, we must. */
60828236 3046 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3047 tx_flags |= E1000_TX_FLAGS_IPV4;
3048
581d708e
MC		 3049 e1000_tx_queue(adapter, tx_ring, tx_flags,
3050 e1000_tx_map(adapter, tx_ring, skb, first,
3051 max_per_txd, nr_frags, mss));
1da177e4
LT		 3052
3053 netdev->trans_start = jiffies;
3054
3055 /* Make sure there is space in the ring for the next send. */
581d708e 3056 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3057 netif_stop_queue(netdev);
3058
581d708e 3059 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3060 return NETDEV_TX_OK;
3061}
3062
3063/**
3064 * e1000_tx_timeout - Respond to a Tx Hang
3065 * @netdev: network interface device structure
3066 **/
3067
3068static void
3069e1000_tx_timeout(struct net_device *netdev)
3070{
60490fe0 3071 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3072
3073 /* Do the reset outside of interrupt context */
87041639
JK		 3074 adapter->tx_timeout_count++;
3075 schedule_work(&adapter->reset_task);
1da177e4
LT		 3076}
3077
3078static void
87041639 3079e1000_reset_task(struct net_device *netdev)
1da177e4 3080{
60490fe0 3081 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3082
2db10a08 3083 e1000_reinit_locked(adapter);
1da177e4
LT		 3084}
3085
3086/**
3087 * e1000_get_stats - Get System Network Statistics
3088 * @netdev: network interface device structure
3089 *
3090 * Returns the address of the device statistics structure.
3091 * The statistics are actually updated from the timer callback.
3092 **/
3093
3094static struct net_device_stats *
3095e1000_get_stats(struct net_device *netdev)
3096{
60490fe0 3097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3098
6b7660cd 3099 /* only return the current stats */
1da177e4
LT		 3100 return &adapter->net_stats;
3101}
3102
3103/**
3104 * e1000_change_mtu - Change the Maximum Transfer Unit
3105 * @netdev: network interface device structure
3106 * @new_mtu: new value for maximum frame size
3107 *
3108 * Returns 0 on success, negative on failure
3109 **/
3110
3111static int
3112e1000_change_mtu(struct net_device *netdev, int new_mtu)
3113{
60490fe0 3114 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3115 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3116 uint16_t eeprom_data = 0;
1da177e4 3117
96838a40
JB		 3118 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3119 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3120 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3121 return -EINVAL;
2d7edb92 3122 }
1da177e4 3123
997f5cbd
JK		 3124 /* Adapter-specific max frame size limits. */
3125 switch (adapter->hw.mac_type) {
9e2feace 3126 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3127 case e1000_ich8lan:
997f5cbd
JK		 3128 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3129 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3130 return -EINVAL;
2d7edb92 3131 }
997f5cbd 3132 break;
85b22eb6
JK		 3133 case e1000_82573:
3134 /* only enable jumbo frames if ASPM is disabled completely
3135 * this means both bits must be zero in 0x1A bits 3:2 */
3136 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3137 &eeprom_data);
3138 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3139 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3140 DPRINTK(PROBE, ERR,
3141 "Jumbo Frames not supported.\n");
3142 return -EINVAL;
3143 }
3144 break;
3145 }
3146 /* fall through to get support */
997f5cbd
JK		 3147 case e1000_82571:
3148 case e1000_82572:
87041639 3149 case e1000_80003es2lan:
997f5cbd
JK		 3150#define MAX_STD_JUMBO_FRAME_SIZE 9234
3151 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3152 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3153 return -EINVAL;
3154 }
3155 break;
3156 default:
3157 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3158 break;
1da177e4
LT		 3159 }
3160
87f5032e 3161 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3162 * means we reserve 2 more, this pushes us to allocate from the next
3163 * larger slab size
3164 * i.e. RXBUFFER_2048 --> size-4096 slab */
3165
3166 if (max_frame <= E1000_RXBUFFER_256)
3167 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3168 else if (max_frame <= E1000_RXBUFFER_512)
3169 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3170 else if (max_frame <= E1000_RXBUFFER_1024)
3171 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3172 else if (max_frame <= E1000_RXBUFFER_2048)
3173 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3174 else if (max_frame <= E1000_RXBUFFER_4096)
3175 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3176 else if (max_frame <= E1000_RXBUFFER_8192)
3177 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3178 else if (max_frame <= E1000_RXBUFFER_16384)
3179 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3180
3181 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3182 if (!adapter->hw.tbi_compatibility_on &&
3183 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3184 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3185 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3186
2d7edb92
MC		 3187 netdev->mtu = new_mtu;
3188
2db10a08
AK		 3189 if (netif_running(netdev))
3190 e1000_reinit_locked(adapter);
1da177e4 3191
1da177e4
LT		 3192 adapter->hw.max_frame_size = max_frame;
3193
3194 return 0;
3195}
3196
3197/**
3198 * e1000_update_stats - Update the board statistics counters
3199 * @adapter: board private structure
3200 **/
3201
3202void
3203e1000_update_stats(struct e1000_adapter *adapter)
3204{
3205 struct e1000_hw *hw = &adapter->hw;
282f33c9 3206 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3207 unsigned long flags;
3208 uint16_t phy_tmp;
3209
3210#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3211
282f33c9
LV		 3212 /*
3213 * Prevent stats update while adapter is being reset, or if the pci
3214 * connection is down.
3215 */
9026729b 3216 if (adapter->link_speed == 0)
282f33c9
LV		 3217 return;
3218 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3219 return;
3220
1da177e4
LT		 3221 spin_lock_irqsave(&adapter->stats_lock, flags);
3222
3223 /* these counters are modified from e1000_adjust_tbi_stats,
3224 * called from the interrupt context, so they must only
3225 * be written while holding adapter->stats_lock
3226 */
3227
3228 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3229 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3230 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3231 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3232 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3233 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3234 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3235
3236 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3237 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3238 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3239 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3240 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3241 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3242 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3243 }
1da177e4
LT		 3244
3245 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3246 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3247 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3248 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3249 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3250 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3251 adapter->stats.dc += E1000_READ_REG(hw, DC);
3252 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3253 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3254 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3255 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3256 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3257 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3258 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3259 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3260 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3261 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3262 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3263 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3264 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3265 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3266 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3267 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3268 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3269 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3270 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3271
3272 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3273 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3274 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3275 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3276 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3277 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3278 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3279 }
3280
1da177e4
LT		 3281 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3282 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3283
3284 /* used for adaptive IFS */
3285
3286 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3287 adapter->stats.tpt += hw->tx_packet_delta;
3288 hw->collision_delta = E1000_READ_REG(hw, COLC);
3289 adapter->stats.colc += hw->collision_delta;
3290
96838a40 3291 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3292 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3293 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3294 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3295 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3296 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3297 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3298 }
96838a40 3299 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3300 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3301 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3302
3303 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3304 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3305 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3306 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3307 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3308 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3309 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3310 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3311 }
2d7edb92 3312 }
1da177e4
LT		 3313
3314 /* Fill out the OS statistics structure */
3315
3316 adapter->net_stats.rx_packets = adapter->stats.gprc;
3317 adapter->net_stats.tx_packets = adapter->stats.gptc;
3318 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3319 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3320 adapter->net_stats.multicast = adapter->stats.mprc;
3321 adapter->net_stats.collisions = adapter->stats.colc;
3322
3323 /* Rx Errors */
3324
87041639
JK		 3325 /* RLEC on some newer hardware can be incorrect so build
3326 * our own version based on RUC and ROC */
1da177e4
LT		 3327 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3328 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3329 adapter->stats.ruc + adapter->stats.roc +
3330 adapter->stats.cexterr;
87041639
JK		 3331 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3332 adapter->stats.roc;
1da177e4
LT		 3333 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3334 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3335 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3336
3337 /* Tx Errors */
3338
3339 adapter->net_stats.tx_errors = adapter->stats.ecol +
3340 adapter->stats.latecol;
3341 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3342 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3343 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3344
3345 /* Tx Dropped needs to be maintained elsewhere */
3346
3347 /* Phy Stats */
3348
96838a40
JB		 3349 if (hw->media_type == e1000_media_type_copper) {
3350 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3351 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3352 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3353 adapter->phy_stats.idle_errors += phy_tmp;
3354 }
3355
96838a40 3356 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3357 (hw->phy_type == e1000_phy_m88) &&
3358 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3359 adapter->phy_stats.receive_errors += phy_tmp;
3360 }
3361
3362 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3363}
3364
3365/**
3366 * e1000_intr - Interrupt Handler
3367 * @irq: interrupt number
3368 * @data: pointer to a network interface device structure
3369 * @pt_regs: CPU registers structure
3370 **/
3371
3372static irqreturn_t
3373e1000_intr(int irq, void *data, struct pt_regs *regs)
3374{
3375 struct net_device *netdev = data;
60490fe0 3376 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3377 struct e1000_hw *hw = &adapter->hw;
87041639 3378 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3379#ifndef CONFIG_E1000_NAPI
581d708e 3380 int i;
1e613fd9
JK		 3381#else
3382 /* Interrupt Auto-Mask...upon reading ICR,
3383 * interrupts are masked. No need for the
3384 * IMC write, but it does mean we should
3385 * account for it ASAP. */
3386 if (likely(hw->mac_type >= e1000_82571))
3387 atomic_inc(&adapter->irq_sem);
be2b28ed 3388#endif
1da177e4 3389
1e613fd9
JK		 3390 if (unlikely(!icr)) {
3391#ifdef CONFIG_E1000_NAPI
3392 if (hw->mac_type >= e1000_82571)
3393 e1000_irq_enable(adapter);
3394#endif
1da177e4 3395 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3396 }
1da177e4 3397
96838a40 3398 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3399 hw->get_link_status = 1;
87041639
JK		 3400 /* 80003ES2LAN workaround--
3401 * For packet buffer work-around on link down event;
3402 * disable receives here in the ISR and
3403 * reset adapter in watchdog
3404 */
3405 if (netif_carrier_ok(netdev) &&
3406 (adapter->hw.mac_type == e1000_80003es2lan)) {
3407 /* disable receives */
3408 rctl = E1000_READ_REG(hw, RCTL);
3409 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3410 }
1da177e4
LT		 3411 mod_timer(&adapter->watchdog_timer, jiffies);
3412 }
3413
3414#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3415 if (unlikely(hw->mac_type < e1000_82571)) {
3416 atomic_inc(&adapter->irq_sem);
3417 E1000_WRITE_REG(hw, IMC, ~0);
3418 E1000_WRITE_FLUSH(hw);
3419 }
d3d9e484
AK		 3420 if (likely(netif_rx_schedule_prep(netdev)))
3421 __netif_rx_schedule(netdev);
581d708e
MC		 3422 else
3423 e1000_irq_enable(adapter);
c1605eb3 3424#else
1da177e4 3425 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3426 * Due to Hub Link bus being occupied, an interrupt
3427 * de-assertion message is not able to be sent.
3428 * When an interrupt assertion message is generated later,
3429 * two messages are re-ordered and sent out.
3430 * That causes APIC to think 82547 is in de-assertion
3431 * state, while 82547 is in assertion state, resulting
3432 * in dead lock. Writing IMC forces 82547 into
3433 * de-assertion state.
3434 */
3435 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3436 atomic_inc(&adapter->irq_sem);
2648345f 3437 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3438 }
3439
96838a40
JB		 3440 for (i = 0; i < E1000_MAX_INTR; i++)
3441 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3442 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3443 break;
3444
96838a40 3445 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3446 e1000_irq_enable(adapter);
581d708e 3447
c1605eb3 3448#endif
1da177e4
LT		 3449
3450 return IRQ_HANDLED;
3451}
3452
3453#ifdef CONFIG_E1000_NAPI
3454/**
3455 * e1000_clean - NAPI Rx polling callback
3456 * @adapter: board private structure
3457 **/
3458
3459static int
581d708e 3460e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3461{
581d708e
MC		 3462 struct e1000_adapter *adapter;
3463 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3464 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3465
3466 /* Must NOT use netdev_priv macro here. */
3467 adapter = poll_dev->priv;
3468
3469 /* Keep link state information with original netdev */
d3d9e484 3470 if (!netif_carrier_ok(poll_dev))
581d708e 3471 goto quit_polling;
2648345f 3472
d3d9e484
AK		 3473 /* e1000_clean is called per-cpu. This lock protects
3474 * tx_ring[0] from being cleaned by multiple cpus
3475 * simultaneously. A failure obtaining the lock means
3476 * tx_ring[0] is currently being cleaned anyway. */
3477 if (spin_trylock(&adapter->tx_queue_lock)) {
3478 tx_cleaned = e1000_clean_tx_irq(adapter,
3479 &adapter->tx_ring[0]);
3480 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3481 }
3482
d3d9e484 3483 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3484 &work_done, work_to_do);
1da177e4
LT		 3485
3486 *budget -= work_done;
581d708e 3487 poll_dev->quota -= work_done;
96838a40 3488
2b02893e 3489 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3490 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3491 !netif_running(poll_dev)) {
581d708e
MC		 3492quit_polling:
3493 netif_rx_complete(poll_dev);
1da177e4
LT		 3494 e1000_irq_enable(adapter);
3495 return 0;
3496 }
3497
3498 return 1;
3499}
3500
3501#endif
3502/**
3503 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3504 * @adapter: board private structure
3505 **/
3506
3507static boolean_t
581d708e
MC		 3508e1000_clean_tx_irq(struct e1000_adapter *adapter,
3509 struct e1000_tx_ring *tx_ring)
1da177e4 3510{
1da177e4
LT		 3511 struct net_device *netdev = adapter->netdev;
3512 struct e1000_tx_desc *tx_desc, *eop_desc;
3513 struct e1000_buffer *buffer_info;
3514 unsigned int i, eop;
2a1af5d7
JK		 3515#ifdef CONFIG_E1000_NAPI
3516 unsigned int count = 0;
3517#endif
1da177e4
LT		 3518 boolean_t cleaned = FALSE;
3519
3520 i = tx_ring->next_to_clean;
3521 eop = tx_ring->buffer_info[i].next_to_watch;
3522 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3523
581d708e 3524 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3525 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3526 tx_desc = E1000_TX_DESC(*tx_ring, i);
3527 buffer_info = &tx_ring->buffer_info[i];
3528 cleaned = (i == eop);
3529
fd803241 3530 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3531 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3532
96838a40 3533 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3534 }
581d708e 3535
7bfa4816 3536
1da177e4
LT		 3537 eop = tx_ring->buffer_info[i].next_to_watch;
3538 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3539#ifdef CONFIG_E1000_NAPI
3540#define E1000_TX_WEIGHT 64
3541 /* weight of a sort for tx, to avoid endless transmit cleanup */
3542 if (count++ == E1000_TX_WEIGHT) break;
3543#endif
1da177e4
LT		 3544 }
3545
3546 tx_ring->next_to_clean = i;
3547
77b2aad5 3548#define TX_WAKE_THRESHOLD 32
96838a40 3549 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3550 netif_carrier_ok(netdev))) {
3551 spin_lock(&tx_ring->tx_lock);
3552 if (netif_queue_stopped(netdev) &&
3553 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3554 netif_wake_queue(netdev);
3555 spin_unlock(&tx_ring->tx_lock);
3556 }
2648345f 3557
581d708e 3558 if (adapter->detect_tx_hung) {
2648345f 3559 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3560 * check with the clearing of time_stamp and movement of i */
3561 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3562 if (tx_ring->buffer_info[eop].dma &&
3563 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3564 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3565 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3566 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3567
3568 /* detected Tx unit hang */
c6963ef5 3569 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3570 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3571 " TDH <%x>\n"
3572 " TDT <%x>\n"
3573 " next_to_use <%x>\n"
3574 " next_to_clean <%x>\n"
3575 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3576 " time_stamp <%lx>\n"
3577 " next_to_watch <%x>\n"
3578 " jiffies <%lx>\n"
3579 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3580 (unsigned long)((tx_ring - adapter->tx_ring) /
3581 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3582 readl(adapter->hw.hw_addr + tx_ring->tdh),
3583 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3584 tx_ring->next_to_use,
392137fa
JK		 3585 tx_ring->next_to_clean,
3586 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3587 eop,
3588 jiffies,
3589 eop_desc->upper.fields.status);
1da177e4 3590 netif_stop_queue(netdev);
70b8f1e1 3591 }
1da177e4 3592 }
1da177e4
LT		 3593 return cleaned;
3594}
3595
3596/**
3597 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3598 * @adapter: board private structure
3599 * @status_err: receive descriptor status and error fields
3600 * @csum: receive descriptor csum field
3601 * @sk_buff: socket buffer with received data
1da177e4
LT		 3602 **/
3603
e619d523 3604static void
1da177e4 3605e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3606 uint32_t status_err, uint32_t csum,
3607 struct sk_buff *skb)
1da177e4 3608{
2d7edb92
MC		 3609 uint16_t status = (uint16_t)status_err;
3610 uint8_t errors = (uint8_t)(status_err >> 24);
3611 skb->ip_summed = CHECKSUM_NONE;
3612
1da177e4 3613 /* 82543 or newer only */
96838a40 3614 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3615 /* Ignore Checksum bit is set */
96838a40 3616 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3617 /* TCP/UDP checksum error bit is set */
96838a40 3618 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3619 /* let the stack verify checksum errors */
1da177e4 3620 adapter->hw_csum_err++;
2d7edb92
MC		 3621 return;
3622 }
3623 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3624 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3625 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3626 return;
1da177e4 3627 } else {
96838a40 3628 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3629 return;
3630 }
3631 /* It must be a TCP or UDP packet with a valid checksum */
3632 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3633 /* TCP checksum is good */
3634 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3635 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3636 /* IP fragment with UDP payload */
3637 /* Hardware complements the payload checksum, so we undo it
3638 * and then put the value in host order for further stack use.
3639 */
3640 csum = ntohl(csum ^ 0xFFFF);
3641 skb->csum = csum;
3642 skb->ip_summed = CHECKSUM_HW;
1da177e4 3643 }
2d7edb92 3644 adapter->hw_csum_good++;
1da177e4
LT		 3645}
3646
3647/**
2d7edb92 3648 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3649 * @adapter: board private structure
3650 **/
3651
3652static boolean_t
3653#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3654e1000_clean_rx_irq(struct e1000_adapter *adapter,
3655 struct e1000_rx_ring *rx_ring,
3656 int *work_done, int work_to_do)
1da177e4 3657#else
581d708e
MC		 3658e1000_clean_rx_irq(struct e1000_adapter *adapter,
3659 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3660#endif
3661{
1da177e4
LT		 3662 struct net_device *netdev = adapter->netdev;
3663 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3664 struct e1000_rx_desc *rx_desc, *next_rxd;
3665 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3666 unsigned long flags;
3667 uint32_t length;
3668 uint8_t last_byte;
3669 unsigned int i;
72d64a43 3670 int cleaned_count = 0;
a1415ee6 3671 boolean_t cleaned = FALSE;
1da177e4
LT		 3672
3673 i = rx_ring->next_to_clean;
3674 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3675 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3676
b92ff8ee 3677 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3678 struct sk_buff *skb;
a292ca6e 3679 u8 status;
1da177e4 3680#ifdef CONFIG_E1000_NAPI
96838a40 3681 if (*work_done >= work_to_do)
1da177e4
LT		 3682 break;
3683 (*work_done)++;
3684#endif
a292ca6e 3685 status = rx_desc->status;
b92ff8ee 3686 skb = buffer_info->skb;
86c3d59f
JB		 3687 buffer_info->skb = NULL;
3688
30320be8
JK		 3689 prefetch(skb->data - NET_IP_ALIGN);
3690
86c3d59f
JB		 3691 if (++i == rx_ring->count) i = 0;
3692 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3693 prefetch(next_rxd);
3694
86c3d59f 3695 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3696
72d64a43
JK		 3697 cleaned = TRUE;
3698 cleaned_count++;
a292ca6e
JK		 3699 pci_unmap_single(pdev,
3700 buffer_info->dma,
3701 buffer_info->length,
1da177e4
LT		 3702 PCI_DMA_FROMDEVICE);
3703
1da177e4
LT		 3704 length = le16_to_cpu(rx_desc->length);
3705
f235a2ab
AK		 3706 /* adjust length to remove Ethernet CRC */
3707 length -= 4;
3708
a1415ee6
JK		 3709 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3710 /* All receives must fit into a single buffer */
3711 E1000_DBG("%s: Receive packet consumed multiple"
3712 " buffers\n", netdev->name);
864c4e45 3713 /* recycle */
8fc897b0 3714 buffer_info->skb = skb;
1da177e4
LT		 3715 goto next_desc;
3716 }
3717
96838a40 3718 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3719 last_byte = *(skb->data + length - 1);
b92ff8ee 3720 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3721 rx_desc->errors, length, last_byte)) {
3722 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3723 e1000_tbi_adjust_stats(&adapter->hw,
3724 &adapter->stats,
1da177e4
LT		 3725 length, skb->data);
3726 spin_unlock_irqrestore(&adapter->stats_lock,
3727 flags);
3728 length--;
3729 } else {
9e2feace
AK		 3730 /* recycle */
3731 buffer_info->skb = skb;
1da177e4
LT		 3732 goto next_desc;
3733 }
1cb5821f 3734 }
1da177e4 3735
a292ca6e
JK		 3736 /* code added for copybreak, this should improve
3737 * performance for small packets with large amounts
3738 * of reassembly being done in the stack */
3739#define E1000_CB_LENGTH 256
a1415ee6 3740 if (length < E1000_CB_LENGTH) {
a292ca6e 3741 struct sk_buff *new_skb =
87f5032e 3742 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3743 if (new_skb) {
3744 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3745 memcpy(new_skb->data - NET_IP_ALIGN,
3746 skb->data - NET_IP_ALIGN,
3747 length + NET_IP_ALIGN);
3748 /* save the skb in buffer_info as good */
3749 buffer_info->skb = skb;
3750 skb = new_skb;
3751 skb_put(skb, length);
3752 }
a1415ee6
JK		 3753 } else
3754 skb_put(skb, length);
a292ca6e
JK		 3755
3756 /* end copybreak code */
1da177e4
LT		 3757
3758 /* Receive Checksum Offload */
a292ca6e
JK		 3759 e1000_rx_checksum(adapter,
3760 (uint32_t)(status) |
2d7edb92 3761 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3762 le16_to_cpu(rx_desc->csum), skb);
96838a40 3763
1da177e4
LT		 3764 skb->protocol = eth_type_trans(skb, netdev);
3765#ifdef CONFIG_E1000_NAPI
96838a40 3766 if (unlikely(adapter->vlgrp &&
a292ca6e 3767 (status & E1000_RXD_STAT_VP))) {
1da177e4 3768 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3769 le16_to_cpu(rx_desc->special) &
3770 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3771 } else {
3772 netif_receive_skb(skb);
3773 }
3774#else /* CONFIG_E1000_NAPI */
96838a40 3775 if (unlikely(adapter->vlgrp &&
b92ff8ee 3776 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3777 vlan_hwaccel_rx(skb, adapter->vlgrp,
3778 le16_to_cpu(rx_desc->special) &
3779 E1000_RXD_SPC_VLAN_MASK);
3780 } else {
3781 netif_rx(skb);
3782 }
3783#endif /* CONFIG_E1000_NAPI */
3784 netdev->last_rx = jiffies;
3785
3786next_desc:
3787 rx_desc->status = 0;
1da177e4 3788
72d64a43
JK		 3789 /* return some buffers to hardware, one at a time is too slow */
3790 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3791 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3792 cleaned_count = 0;
3793 }
3794
30320be8 3795 /* use prefetched values */
86c3d59f
JB		 3796 rx_desc = next_rxd;
3797 buffer_info = next_buffer;
1da177e4 3798 }
1da177e4 3799 rx_ring->next_to_clean = i;
72d64a43
JK		 3800
3801 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3802 if (cleaned_count)
3803 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3804
3805 return cleaned;
3806}
3807
3808/**
3809 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3810 * @adapter: board private structure
3811 **/
3812
3813static boolean_t
3814#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3815e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3816 struct e1000_rx_ring *rx_ring,
3817 int *work_done, int work_to_do)
2d7edb92 3818#else
581d708e
MC		 3819e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3820 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3821#endif
3822{
86c3d59f 3823 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3824 struct net_device *netdev = adapter->netdev;
3825 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3826 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3827 struct e1000_ps_page *ps_page;
3828 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3829 struct sk_buff *skb;
2d7edb92
MC		 3830 unsigned int i, j;
3831 uint32_t length, staterr;
72d64a43 3832 int cleaned_count = 0;
2d7edb92
MC		 3833 boolean_t cleaned = FALSE;
3834
3835 i = rx_ring->next_to_clean;
3836 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3837 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3838 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3839
96838a40 3840 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3841 ps_page = &rx_ring->ps_page[i];
3842 ps_page_dma = &rx_ring->ps_page_dma[i];
3843#ifdef CONFIG_E1000_NAPI
96838a40 3844 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3845 break;
3846 (*work_done)++;
3847#endif
86c3d59f
JB		 3848 skb = buffer_info->skb;
3849
30320be8
JK		 3850 /* in the packet split case this is header only */
3851 prefetch(skb->data - NET_IP_ALIGN);
3852
86c3d59f
JB		 3853 if (++i == rx_ring->count) i = 0;
3854 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3855 prefetch(next_rxd);
3856
86c3d59f 3857 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3858
2d7edb92 3859 cleaned = TRUE;
72d64a43 3860 cleaned_count++;
2d7edb92
MC		 3861 pci_unmap_single(pdev, buffer_info->dma,
3862 buffer_info->length,
3863 PCI_DMA_FROMDEVICE);
3864
96838a40 3865 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3866 E1000_DBG("%s: Packet Split buffers didn't pick up"
3867 " the full packet\n", netdev->name);
3868 dev_kfree_skb_irq(skb);
3869 goto next_desc;
3870 }
1da177e4 3871
96838a40 3872 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3873 dev_kfree_skb_irq(skb);
3874 goto next_desc;
3875 }
3876
3877 length = le16_to_cpu(rx_desc->wb.middle.length0);
3878
96838a40 3879 if (unlikely(!length)) {
2d7edb92
MC		 3880 E1000_DBG("%s: Last part of the packet spanning"
3881 " multiple descriptors\n", netdev->name);
3882 dev_kfree_skb_irq(skb);
3883 goto next_desc;
3884 }
3885
3886 /* Good Receive */
3887 skb_put(skb, length);
3888
dc7c6add
JK		 3889 {
3890 /* this looks ugly, but it seems compiler issues make it
3891 more efficient than reusing j */
3892 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3893
3894 /* page alloc/put takes too long and effects small packet
3895 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3896 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3897 u8 *vaddr;
76c224bc 3898 /* there is no documentation about how to call
dc7c6add
JK		 3899 * kmap_atomic, so we can't hold the mapping
3900 * very long */
3901 pci_dma_sync_single_for_cpu(pdev,
3902 ps_page_dma->ps_page_dma[0],
3903 PAGE_SIZE,
3904 PCI_DMA_FROMDEVICE);
3905 vaddr = kmap_atomic(ps_page->ps_page[0],
3906 KM_SKB_DATA_SOFTIRQ);
3907 memcpy(skb->tail, vaddr, l1);
3908 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3909 pci_dma_sync_single_for_device(pdev,
3910 ps_page_dma->ps_page_dma[0],
3911 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3912 /* remove the CRC */
3913 l1 -= 4;
dc7c6add 3914 skb_put(skb, l1);
dc7c6add
JK		 3915 goto copydone;
3916 } /* if */
3917 }
3918
96838a40 3919 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3920 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3921 break;
2d7edb92
MC		 3922 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3923 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3924 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3925 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3926 length);
2d7edb92 3927 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3928 skb->len += length;
3929 skb->data_len += length;
5d51b80f 3930 skb->truesize += length;
2d7edb92
MC		 3931 }
3932
f235a2ab
AK		 3933 /* strip the ethernet crc, problem is we're using pages now so
3934 * this whole operation can get a little cpu intensive */
3935 pskb_trim(skb, skb->len - 4);
3936
dc7c6add 3937copydone:
2d7edb92 3938 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3939 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3940 skb->protocol = eth_type_trans(skb, netdev);
3941
96838a40 3942 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3943 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3944 adapter->rx_hdr_split++;
2d7edb92 3945#ifdef CONFIG_E1000_NAPI
96838a40 3946 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3947 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3948 le16_to_cpu(rx_desc->wb.middle.vlan) &
3949 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3950 } else {
3951 netif_receive_skb(skb);
3952 }
3953#else /* CONFIG_E1000_NAPI */
96838a40 3954 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3955 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3956 le16_to_cpu(rx_desc->wb.middle.vlan) &
3957 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3958 } else {
3959 netif_rx(skb);
3960 }
3961#endif /* CONFIG_E1000_NAPI */
3962 netdev->last_rx = jiffies;
3963
3964next_desc:
c3d7a3a4 3965 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3966 buffer_info->skb = NULL;
2d7edb92 3967
72d64a43
JK		 3968 /* return some buffers to hardware, one at a time is too slow */
3969 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3970 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3971 cleaned_count = 0;
3972 }
3973
30320be8 3974 /* use prefetched values */
86c3d59f
JB		 3975 rx_desc = next_rxd;
3976 buffer_info = next_buffer;
3977
683a38f3 3978 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3979 }
3980 rx_ring->next_to_clean = i;
72d64a43
JK		 3981
3982 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3983 if (cleaned_count)
3984 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3985
3986 return cleaned;
3987}
3988
3989/**
2d7edb92 3990 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3991 * @adapter: address of board private structure
3992 **/
3993
3994static void
581d708e 3995e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3996 struct e1000_rx_ring *rx_ring,
a292ca6e 3997 int cleaned_count)
1da177e4 3998{
1da177e4
LT		 3999 struct net_device *netdev = adapter->netdev;
4000 struct pci_dev *pdev = adapter->pdev;
4001 struct e1000_rx_desc *rx_desc;
4002 struct e1000_buffer *buffer_info;
4003 struct sk_buff *skb;
2648345f
MC		 4004 unsigned int i;
4005 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4006
4007 i = rx_ring->next_to_use;
4008 buffer_info = &rx_ring->buffer_info[i];
4009
a292ca6e 4010 while (cleaned_count--) {
ca6f7224
CH		 4011 skb = buffer_info->skb;
4012 if (skb) {
a292ca6e
JK		 4013 skb_trim(skb, 0);
4014 goto map_skb;
4015 }
4016
ca6f7224 4017 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4018 if (unlikely(!skb)) {
1da177e4 4019 /* Better luck next round */
72d64a43 4020 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4021 break;
4022 }
4023
2648345f 4024 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4025 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4026 struct sk_buff *oldskb = skb;
2648345f
MC		 4027 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4028 "at %p\n", bufsz, skb->data);
4029 /* Try again, without freeing the previous */
87f5032e 4030 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4031 /* Failed allocation, critical failure */
1da177e4
LT		 4032 if (!skb) {
4033 dev_kfree_skb(oldskb);
4034 break;
4035 }
2648345f 4036
1da177e4
LT		 4037 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4038 /* give up */
4039 dev_kfree_skb(skb);
4040 dev_kfree_skb(oldskb);
4041 break; /* while !buffer_info->skb */
1da177e4 4042 }
ca6f7224
CH		 4043
4044 /* Use new allocation */
4045 dev_kfree_skb(oldskb);
1da177e4 4046 }
1da177e4
LT		 4047 /* Make buffer alignment 2 beyond a 16 byte boundary
4048 * this will result in a 16 byte aligned IP header after
4049 * the 14 byte MAC header is removed
4050 */
4051 skb_reserve(skb, NET_IP_ALIGN);
4052
1da177e4
LT		 4053 buffer_info->skb = skb;
4054 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4055map_skb:
1da177e4
LT		 4056 buffer_info->dma = pci_map_single(pdev,
4057 skb->data,
4058 adapter->rx_buffer_len,
4059 PCI_DMA_FROMDEVICE);
4060
2648345f
MC		 4061 /* Fix for errata 23, can't cross 64kB boundary */
4062 if (!e1000_check_64k_bound(adapter,
4063 (void *)(unsigned long)buffer_info->dma,
4064 adapter->rx_buffer_len)) {
4065 DPRINTK(RX_ERR, ERR,
4066 "dma align check failed: %u bytes at %p\n",
4067 adapter->rx_buffer_len,
4068 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4069 dev_kfree_skb(skb);
4070 buffer_info->skb = NULL;
4071
2648345f 4072 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4073 adapter->rx_buffer_len,
4074 PCI_DMA_FROMDEVICE);
4075
4076 break; /* while !buffer_info->skb */
4077 }
1da177e4
LT		 4078 rx_desc = E1000_RX_DESC(*rx_ring, i);
4079 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4080
96838a40
JB		 4081 if (unlikely(++i == rx_ring->count))
4082 i = 0;
1da177e4
LT		 4083 buffer_info = &rx_ring->buffer_info[i];
4084 }
4085
b92ff8ee
JB		 4086 if (likely(rx_ring->next_to_use != i)) {
4087 rx_ring->next_to_use = i;
4088 if (unlikely(i-- == 0))
4089 i = (rx_ring->count - 1);
4090
4091 /* Force memory writes to complete before letting h/w
4092 * know there are new descriptors to fetch. (Only
4093 * applicable for weak-ordered memory model archs,
4094 * such as IA-64). */
4095 wmb();
4096 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4097 }
1da177e4
LT		 4098}
4099
2d7edb92
MC		 4100/**
4101 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4102 * @adapter: address of board private structure
4103 **/
4104
4105static void
581d708e 4106e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4107 struct e1000_rx_ring *rx_ring,
4108 int cleaned_count)
2d7edb92 4109{
2d7edb92
MC		 4110 struct net_device *netdev = adapter->netdev;
4111 struct pci_dev *pdev = adapter->pdev;
4112 union e1000_rx_desc_packet_split *rx_desc;
4113 struct e1000_buffer *buffer_info;
4114 struct e1000_ps_page *ps_page;
4115 struct e1000_ps_page_dma *ps_page_dma;
4116 struct sk_buff *skb;
4117 unsigned int i, j;
4118
4119 i = rx_ring->next_to_use;
4120 buffer_info = &rx_ring->buffer_info[i];
4121 ps_page = &rx_ring->ps_page[i];
4122 ps_page_dma = &rx_ring->ps_page_dma[i];
4123
72d64a43 4124 while (cleaned_count--) {
2d7edb92
MC		 4125 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4126
96838a40 4127 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4128 if (j < adapter->rx_ps_pages) {
4129 if (likely(!ps_page->ps_page[j])) {
4130 ps_page->ps_page[j] =
4131 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4132 if (unlikely(!ps_page->ps_page[j])) {
4133 adapter->alloc_rx_buff_failed++;
e4c811c9 4134 goto no_buffers;
b92ff8ee 4135 }
e4c811c9
MC		 4136 ps_page_dma->ps_page_dma[j] =
4137 pci_map_page(pdev,
4138 ps_page->ps_page[j],
4139 0, PAGE_SIZE,
4140 PCI_DMA_FROMDEVICE);
4141 }
4142 /* Refresh the desc even if buffer_addrs didn't
96838a40 4143 * change because each write-back erases
e4c811c9
MC		 4144 * this info.
4145 */
4146 rx_desc->read.buffer_addr[j+1] =
4147 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4148 } else
4149 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4150 }
4151
87f5032e
DM		 4152 skb = netdev_alloc_skb(netdev,
4153 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4154
b92ff8ee
JB		 4155 if (unlikely(!skb)) {
4156 adapter->alloc_rx_buff_failed++;
2d7edb92 4157 break;
b92ff8ee 4158 }
2d7edb92
MC		 4159
4160 /* Make buffer alignment 2 beyond a 16 byte boundary
4161 * this will result in a 16 byte aligned IP header after
4162 * the 14 byte MAC header is removed
4163 */
4164 skb_reserve(skb, NET_IP_ALIGN);
4165
2d7edb92
MC		 4166 buffer_info->skb = skb;
4167 buffer_info->length = adapter->rx_ps_bsize0;
4168 buffer_info->dma = pci_map_single(pdev, skb->data,
4169 adapter->rx_ps_bsize0,
4170 PCI_DMA_FROMDEVICE);
4171
4172 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4173
96838a40 4174 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4175 buffer_info = &rx_ring->buffer_info[i];
4176 ps_page = &rx_ring->ps_page[i];
4177 ps_page_dma = &rx_ring->ps_page_dma[i];
4178 }
4179
4180no_buffers:
b92ff8ee
JB		 4181 if (likely(rx_ring->next_to_use != i)) {
4182 rx_ring->next_to_use = i;
4183 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4184
4185 /* Force memory writes to complete before letting h/w
4186 * know there are new descriptors to fetch. (Only
4187 * applicable for weak-ordered memory model archs,
4188 * such as IA-64). */
4189 wmb();
4190 /* Hardware increments by 16 bytes, but packet split
4191 * descriptors are 32 bytes...so we increment tail
4192 * twice as much.
4193 */
4194 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4195 }
2d7edb92
MC		 4196}
4197
1da177e4
LT		 4198/**
4199 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4200 * @adapter:
4201 **/
4202
4203static void
4204e1000_smartspeed(struct e1000_adapter *adapter)
4205{
4206 uint16_t phy_status;
4207 uint16_t phy_ctrl;
4208
96838a40 4209 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4210 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4211 return;
4212
96838a40 4213 if (adapter->smartspeed == 0) {
1da177e4
LT		 4214 /* If Master/Slave config fault is asserted twice,
4215 * we assume back-to-back */
4216 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4217 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4218 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4219 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4220 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4221 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4222 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4223 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4224 phy_ctrl);
4225 adapter->smartspeed++;
96838a40 4226 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4227 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4228 &phy_ctrl)) {
4229 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4230 MII_CR_RESTART_AUTO_NEG);
4231 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4232 phy_ctrl);
4233 }
4234 }
4235 return;
96838a40 4236 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4237 /* If still no link, perhaps using 2/3 pair cable */
4238 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4239 phy_ctrl |= CR_1000T_MS_ENABLE;
4240 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4241 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4242 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4243 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4244 MII_CR_RESTART_AUTO_NEG);
4245 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4246 }
4247 }
4248 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4249 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4250 adapter->smartspeed = 0;
4251}
4252
4253/**
4254 * e1000_ioctl -
4255 * @netdev:
4256 * @ifreq:
4257 * @cmd:
4258 **/
4259
4260static int
4261e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4262{
4263 switch (cmd) {
4264 case SIOCGMIIPHY:
4265 case SIOCGMIIREG:
4266 case SIOCSMIIREG:
4267 return e1000_mii_ioctl(netdev, ifr, cmd);
4268 default:
4269 return -EOPNOTSUPP;
4270 }
4271}
4272
4273/**
4274 * e1000_mii_ioctl -
4275 * @netdev:
4276 * @ifreq:
4277 * @cmd:
4278 **/
4279
4280static int
4281e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4282{
60490fe0 4283 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4284 struct mii_ioctl_data *data = if_mii(ifr);
4285 int retval;
4286 uint16_t mii_reg;
4287 uint16_t spddplx;
97876fc6 4288 unsigned long flags;
1da177e4 4289
96838a40 4290 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4291 return -EOPNOTSUPP;
4292
4293 switch (cmd) {
4294 case SIOCGMIIPHY:
4295 data->phy_id = adapter->hw.phy_addr;
4296 break;
4297 case SIOCGMIIREG:
96838a40 4298 if (!capable(CAP_NET_ADMIN))
1da177e4 4299 return -EPERM;
97876fc6 4300 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4301 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4302 &data->val_out)) {
4303 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4304 return -EIO;
97876fc6
MC		 4305 }
4306 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4307 break;
4308 case SIOCSMIIREG:
96838a40 4309 if (!capable(CAP_NET_ADMIN))
1da177e4 4310 return -EPERM;
96838a40 4311 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4312 return -EFAULT;
4313 mii_reg = data->val_in;
97876fc6 4314 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4315 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4316 mii_reg)) {
4317 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4318 return -EIO;
97876fc6 4319 }
dc86d32a 4320 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4321 switch (data->reg_num) {
4322 case PHY_CTRL:
96838a40 4323 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4324 break;
96838a40 4325 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4326 adapter->hw.autoneg = 1;
4327 adapter->hw.autoneg_advertised = 0x2F;
4328 } else {
4329 if (mii_reg & 0x40)
4330 spddplx = SPEED_1000;
4331 else if (mii_reg & 0x2000)
4332 spddplx = SPEED_100;
4333 else
4334 spddplx = SPEED_10;
4335 spddplx += (mii_reg & 0x100)
cb764326
JK		 4336 ? DUPLEX_FULL :
4337 DUPLEX_HALF;
1da177e4
LT		 4338 retval = e1000_set_spd_dplx(adapter,
4339 spddplx);
96838a40 4340 if (retval) {
97876fc6 4341 spin_unlock_irqrestore(
96838a40 4342 &adapter->stats_lock,
97876fc6 4343 flags);
1da177e4 4344 return retval;
97876fc6 4345 }
1da177e4 4346 }
2db10a08
AK		 4347 if (netif_running(adapter->netdev))
4348 e1000_reinit_locked(adapter);
4349 else
1da177e4
LT		 4350 e1000_reset(adapter);
4351 break;
4352 case M88E1000_PHY_SPEC_CTRL:
4353 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4354 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4355 spin_unlock_irqrestore(
4356 &adapter->stats_lock, flags);
1da177e4 4357 return -EIO;
97876fc6 4358 }
1da177e4
LT		 4359 break;
4360 }
4361 } else {
4362 switch (data->reg_num) {
4363 case PHY_CTRL:
96838a40 4364 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4365 break;
2db10a08
AK		 4366 if (netif_running(adapter->netdev))
4367 e1000_reinit_locked(adapter);
4368 else
1da177e4
LT		 4369 e1000_reset(adapter);
4370 break;
4371 }
4372 }
97876fc6 4373 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4374 break;
4375 default:
4376 return -EOPNOTSUPP;
4377 }
4378 return E1000_SUCCESS;
4379}
4380
4381void
4382e1000_pci_set_mwi(struct e1000_hw *hw)
4383{
4384 struct e1000_adapter *adapter = hw->back;
2648345f 4385 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4386
96838a40 4387 if (ret_val)
2648345f 4388 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4389}
4390
4391void
4392e1000_pci_clear_mwi(struct e1000_hw *hw)
4393{
4394 struct e1000_adapter *adapter = hw->back;
4395
4396 pci_clear_mwi(adapter->pdev);
4397}
4398
4399void
4400e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4401{
4402 struct e1000_adapter *adapter = hw->back;
4403
4404 pci_read_config_word(adapter->pdev, reg, value);
4405}
4406
4407void
4408e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4409{
4410 struct e1000_adapter *adapter = hw->back;
4411
4412 pci_write_config_word(adapter->pdev, reg, *value);
4413}
4414
e4c780b1 4415#if 0
1da177e4
LT		 4416uint32_t
4417e1000_io_read(struct e1000_hw *hw, unsigned long port)
4418{
4419 return inl(port);
4420}
e4c780b1 4421#endif /* 0 */
1da177e4
LT		 4422
4423void
4424e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4425{
4426 outl(value, port);
4427}
4428
4429static void
4430e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4431{
60490fe0 4432 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4433 uint32_t ctrl, rctl;
4434
4435 e1000_irq_disable(adapter);
4436 adapter->vlgrp = grp;
4437
96838a40 4438 if (grp) {
1da177e4
LT		 4439 /* enable VLAN tag insert/strip */
4440 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4441 ctrl |= E1000_CTRL_VME;
4442 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4443
cd94dd0b 4444 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4445 /* enable VLAN receive filtering */
4446 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4447 rctl |= E1000_RCTL_VFE;
4448 rctl &= ~E1000_RCTL_CFIEN;
4449 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4450 e1000_update_mng_vlan(adapter);
cd94dd0b 4451 }
1da177e4
LT		 4452 } else {
4453 /* disable VLAN tag insert/strip */
4454 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4455 ctrl &= ~E1000_CTRL_VME;
4456 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4457
cd94dd0b 4458 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4459 /* disable VLAN filtering */
4460 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4461 rctl &= ~E1000_RCTL_VFE;
4462 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4463 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4464 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4465 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4466 }
cd94dd0b 4467 }
1da177e4
LT		 4468 }
4469
4470 e1000_irq_enable(adapter);
4471}
4472
4473static void
4474e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4475{
60490fe0 4476 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4477 uint32_t vfta, index;
96838a40
JB		 4478
4479 if ((adapter->hw.mng_cookie.status &
4480 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4481 (vid == adapter->mng_vlan_id))
2d7edb92 4482 return;
1da177e4
LT		 4483 /* add VID to filter table */
4484 index = (vid >> 5) & 0x7F;
4485 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4486 vfta |= (1 << (vid & 0x1F));
4487 e1000_write_vfta(&adapter->hw, index, vfta);
4488}
4489
4490static void
4491e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4492{
60490fe0 4493 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4494 uint32_t vfta, index;
4495
4496 e1000_irq_disable(adapter);
4497
96838a40 4498 if (adapter->vlgrp)
1da177e4
LT		 4499 adapter->vlgrp->vlan_devices[vid] = NULL;
4500
4501 e1000_irq_enable(adapter);
4502
96838a40
JB		 4503 if ((adapter->hw.mng_cookie.status &
4504 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4505 (vid == adapter->mng_vlan_id)) {
4506 /* release control to f/w */
4507 e1000_release_hw_control(adapter);
2d7edb92 4508 return;
ff147013
JK		 4509 }
4510
1da177e4
LT		 4511 /* remove VID from filter table */
4512 index = (vid >> 5) & 0x7F;
4513 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4514 vfta &= ~(1 << (vid & 0x1F));
4515 e1000_write_vfta(&adapter->hw, index, vfta);
4516}
4517
4518static void
4519e1000_restore_vlan(struct e1000_adapter *adapter)
4520{
4521 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4522
96838a40 4523 if (adapter->vlgrp) {
1da177e4 4524 uint16_t vid;
96838a40
JB		 4525 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4526 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4527 continue;
4528 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4529 }
4530 }
4531}
4532
4533int
4534e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4535{
4536 adapter->hw.autoneg = 0;
4537
6921368f 4538 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4539 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4540 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4541 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4542 return -EINVAL;
4543 }
4544
96838a40 4545 switch (spddplx) {
1da177e4
LT		 4546 case SPEED_10 + DUPLEX_HALF:
4547 adapter->hw.forced_speed_duplex = e1000_10_half;
4548 break;
4549 case SPEED_10 + DUPLEX_FULL:
4550 adapter->hw.forced_speed_duplex = e1000_10_full;
4551 break;
4552 case SPEED_100 + DUPLEX_HALF:
4553 adapter->hw.forced_speed_duplex = e1000_100_half;
4554 break;
4555 case SPEED_100 + DUPLEX_FULL:
4556 adapter->hw.forced_speed_duplex = e1000_100_full;
4557 break;
4558 case SPEED_1000 + DUPLEX_FULL:
4559 adapter->hw.autoneg = 1;
4560 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4561 break;
4562 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4563 default:
2648345f 4564 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4565 return -EINVAL;
4566 }
4567 return 0;
4568}
4569
b6a1d5f8 4570#ifdef CONFIG_PM
0f15a8fa
JK		 4571/* Save/restore 16 or 64 dwords of PCI config space depending on which
4572 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4573 */
4574#define PCIE_CONFIG_SPACE_LEN 256
4575#define PCI_CONFIG_SPACE_LEN 64
4576static int
4577e1000_pci_save_state(struct e1000_adapter *adapter)
4578{
4579 struct pci_dev *dev = adapter->pdev;
4580 int size;
4581 int i;
0f15a8fa 4582
2f82665f
JB		 4583 if (adapter->hw.mac_type >= e1000_82571)
4584 size = PCIE_CONFIG_SPACE_LEN;
4585 else
4586 size = PCI_CONFIG_SPACE_LEN;
4587
4588 WARN_ON(adapter->config_space != NULL);
4589
4590 adapter->config_space = kmalloc(size, GFP_KERNEL);
4591 if (!adapter->config_space) {
4592 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4593 return -ENOMEM;
4594 }
4595 for (i = 0; i < (size / 4); i++)
4596 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4597 return 0;
4598}
4599
4600static void
4601e1000_pci_restore_state(struct e1000_adapter *adapter)
4602{
4603 struct pci_dev *dev = adapter->pdev;
4604 int size;
4605 int i;
0f15a8fa 4606
2f82665f
JB		 4607 if (adapter->config_space == NULL)
4608 return;
0f15a8fa 4609
2f82665f
JB		 4610 if (adapter->hw.mac_type >= e1000_82571)
4611 size = PCIE_CONFIG_SPACE_LEN;
4612 else
4613 size = PCI_CONFIG_SPACE_LEN;
4614 for (i = 0; i < (size / 4); i++)
4615 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4616 kfree(adapter->config_space);
4617 adapter->config_space = NULL;
4618 return;
4619}
4620#endif /* CONFIG_PM */
4621
1da177e4 4622static int
829ca9a3 4623e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4624{
4625 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4626 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4627 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4628 uint32_t wufc = adapter->wol;
6fdfef16 4629#ifdef CONFIG_PM
240b1710 4630 int retval = 0;
6fdfef16 4631#endif
1da177e4
LT		 4632
4633 netif_device_detach(netdev);
4634
2db10a08
AK		 4635 if (netif_running(netdev)) {
4636 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4637 e1000_down(adapter);
2db10a08 4638 }
1da177e4 4639
2f82665f 4640#ifdef CONFIG_PM
0f15a8fa
JK		 4641 /* Implement our own version of pci_save_state(pdev) because pci-
4642 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4643 retval = e1000_pci_save_state(adapter);
4644 if (retval)
4645 return retval;
4646#endif
4647
1da177e4 4648 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4649 if (status & E1000_STATUS_LU)
1da177e4
LT		 4650 wufc &= ~E1000_WUFC_LNKC;
4651
96838a40 4652 if (wufc) {
1da177e4
LT		 4653 e1000_setup_rctl(adapter);
4654 e1000_set_multi(netdev);
4655
4656 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4657 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4658 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4659 rctl |= E1000_RCTL_MPE;
4660 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4661 }
4662
96838a40 4663 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4664 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4665 /* advertise wake from D3Cold */
4666 #define E1000_CTRL_ADVD3WUC 0x00100000
4667 /* phy power management enable */
4668 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4669 ctrl |= E1000_CTRL_ADVD3WUC |
4670 E1000_CTRL_EN_PHY_PWR_MGMT;
4671 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4672 }
4673
96838a40 4674 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4675 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4676 /* keep the laser running in D3 */
4677 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4678 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4679 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4680 }
4681
2d7edb92
MC		 4682 /* Allow time for pending master requests to run */
4683 e1000_disable_pciex_master(&adapter->hw);
4684
1da177e4
LT		 4685 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4686 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4687 pci_enable_wake(pdev, PCI_D3hot, 1);
4688 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4689 } else {
4690 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4691 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4692 pci_enable_wake(pdev, PCI_D3hot, 0);
4693 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4694 }
4695
cd94dd0b 4696 /* FIXME: this code is incorrect for PCI Express */
96838a40 4697 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4698 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4699 adapter->hw.media_type == e1000_media_type_copper) {
4700 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4701 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4702 manc |= E1000_MANC_ARP_EN;
4703 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4704 pci_enable_wake(pdev, PCI_D3hot, 1);
4705 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4706 }
4707 }
4708
cd94dd0b
AK		 4709 if (adapter->hw.phy_type == e1000_phy_igp_3)
4710 e1000_phy_powerdown_workaround(&adapter->hw);
4711
b55ccb35
JK		 4712 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4713 * would have already happened in close and is redundant. */
4714 e1000_release_hw_control(adapter);
2d7edb92 4715
1da177e4 4716 pci_disable_device(pdev);
240b1710 4717
d0e027db 4718 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4719
4720 return 0;
4721}
4722
2f82665f 4723#ifdef CONFIG_PM
1da177e4
LT		 4724static int
4725e1000_resume(struct pci_dev *pdev)
4726{
4727 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4728 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4729 uint32_t manc, err;
1da177e4 4730
d0e027db 4731 pci_set_power_state(pdev, PCI_D0);
2f82665f 4732 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4733 if ((err = pci_enable_device(pdev))) {
4734 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4735 return err;
4736 }
a4cb847d 4737 pci_set_master(pdev);
1da177e4 4738
d0e027db
AK		 4739 pci_enable_wake(pdev, PCI_D3hot, 0);
4740 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4741
4742 e1000_reset(adapter);
4743 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4744
96838a40 4745 if (netif_running(netdev))
1da177e4
LT		 4746 e1000_up(adapter);
4747
4748 netif_device_attach(netdev);
4749
cd94dd0b 4750 /* FIXME: this code is incorrect for PCI Express */
96838a40 4751 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4752 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4753 adapter->hw.media_type == e1000_media_type_copper) {
4754 manc = E1000_READ_REG(&adapter->hw, MANC);
4755 manc &= ~(E1000_MANC_ARP_EN);
4756 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4757 }
4758
b55ccb35
JK		 4759 /* If the controller is 82573 and f/w is AMT, do not set
4760 * DRV_LOAD until the interface is up. For all other cases,
4761 * let the f/w know that the h/w is now under the control
4762 * of the driver. */
4763 if (adapter->hw.mac_type != e1000_82573 ||
4764 !e1000_check_mng_mode(&adapter->hw))
4765 e1000_get_hw_control(adapter);
2d7edb92 4766
1da177e4
LT		 4767 return 0;
4768}
4769#endif
c653e635
AK		 4770
4771static void e1000_shutdown(struct pci_dev *pdev)
4772{
4773 e1000_suspend(pdev, PMSG_SUSPEND);
4774}
4775
1da177e4
LT		 4776#ifdef CONFIG_NET_POLL_CONTROLLER
4777/*
4778 * Polling 'interrupt' - used by things like netconsole to send skbs
4779 * without having to re-enable interrupts. It's not called while
4780 * the interrupt routine is executing.
4781 */
4782static void
2648345f 4783e1000_netpoll(struct net_device *netdev)
1da177e4 4784{
60490fe0 4785 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4786
1da177e4
LT		 4787 disable_irq(adapter->pdev->irq);
4788 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4789 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4790#ifndef CONFIG_E1000_NAPI
4791 adapter->clean_rx(adapter, adapter->rx_ring);
4792#endif
1da177e4
LT		 4793 enable_irq(adapter->pdev->irq);
4794}
4795#endif
4796
9026729b
AK		 4797/**
4798 * e1000_io_error_detected - called when PCI error is detected
4799 * @pdev: Pointer to PCI device
4800 * @state: The current pci conneection state
4801 *
4802 * This function is called after a PCI bus error affecting
4803 * this device has been detected.
4804 */
4805static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4806{
4807 struct net_device *netdev = pci_get_drvdata(pdev);
4808 struct e1000_adapter *adapter = netdev->priv;
4809
4810 netif_device_detach(netdev);
4811
4812 if (netif_running(netdev))
4813 e1000_down(adapter);
72e8d6bb 4814 pci_disable_device(pdev);
9026729b
AK		 4815
4816 /* Request a slot slot reset. */
4817 return PCI_ERS_RESULT_NEED_RESET;
4818}
4819
4820/**
4821 * e1000_io_slot_reset - called after the pci bus has been reset.
4822 * @pdev: Pointer to PCI device
4823 *
4824 * Restart the card from scratch, as if from a cold-boot. Implementation
4825 * resembles the first-half of the e1000_resume routine.
4826 */
4827static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4828{
4829 struct net_device *netdev = pci_get_drvdata(pdev);
4830 struct e1000_adapter *adapter = netdev->priv;
4831
4832 if (pci_enable_device(pdev)) {
4833 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4834 return PCI_ERS_RESULT_DISCONNECT;
4835 }
4836 pci_set_master(pdev);
4837
4838 pci_enable_wake(pdev, 3, 0);
4839 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4840
4841 /* Perform card reset only on one instance of the card */
4842 if (PCI_FUNC (pdev->devfn) != 0)
4843 return PCI_ERS_RESULT_RECOVERED;
4844
4845 e1000_reset(adapter);
4846 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4847
4848 return PCI_ERS_RESULT_RECOVERED;
4849}
4850
4851/**
4852 * e1000_io_resume - called when traffic can start flowing again.
4853 * @pdev: Pointer to PCI device
4854 *
4855 * This callback is called when the error recovery driver tells us that
4856 * its OK to resume normal operation. Implementation resembles the
4857 * second-half of the e1000_resume routine.
4858 */
4859static void e1000_io_resume(struct pci_dev *pdev)
4860{
4861 struct net_device *netdev = pci_get_drvdata(pdev);
4862 struct e1000_adapter *adapter = netdev->priv;
4863 uint32_t manc, swsm;
4864
4865 if (netif_running(netdev)) {
4866 if (e1000_up(adapter)) {
4867 printk("e1000: can't bring device back up after reset\n");
4868 return;
4869 }
4870 }
4871
4872 netif_device_attach(netdev);
4873
4874 if (adapter->hw.mac_type >= e1000_82540 &&
4875 adapter->hw.media_type == e1000_media_type_copper) {
4876 manc = E1000_READ_REG(&adapter->hw, MANC);
4877 manc &= ~(E1000_MANC_ARP_EN);
4878 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4879 }
4880
4881 switch (adapter->hw.mac_type) {
4882 case e1000_82573:
4883 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4884 E1000_WRITE_REG(&adapter->hw, SWSM,
4885 swsm | E1000_SWSM_DRV_LOAD);
4886 break;
4887 default:
4888 break;
4889 }
4890
4891 if (netif_running(netdev))
4892 mod_timer(&adapter->watchdog_timer, jiffies);
4893}
4894
1da177e4 4895/* e1000_main.c */
Linux kernel - Deliverables
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