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1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
dc641b73 | 4 | * Copyright(c) 2013 - 2014 Intel Corporation. |
56a62fc8 JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
56a62fc8 JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | #ifndef _I40E_LAN_HMC_H_ | |
28 | #define _I40E_LAN_HMC_H_ | |
29 | ||
30 | /* forward-declare the HW struct for the compiler */ | |
31 | struct i40e_hw; | |
32 | ||
33 | /* HMC element context information */ | |
34 | ||
3ba3faeb PSJ |
35 | /* Rx queue context data |
36 | * | |
37 | * The sizes of the variables may be larger than needed due to crossing byte | |
38 | * boundaries. If we do not have the width of the variable set to the correct | |
39 | * size then we could end up shifting bits off the top of the variable when the | |
40 | * variable is at the top of a byte and crosses over into the next byte. | |
41 | */ | |
56a62fc8 JB |
42 | struct i40e_hmc_obj_rxq { |
43 | u16 head; | |
3ba3faeb | 44 | u16 cpuid; /* bigger than needed, see above for reason */ |
56a62fc8 JB |
45 | u64 base; |
46 | u16 qlen; | |
47 | #define I40E_RXQ_CTX_DBUFF_SHIFT 7 | |
3ba3faeb | 48 | u16 dbuff; /* bigger than needed, see above for reason */ |
56a62fc8 | 49 | #define I40E_RXQ_CTX_HBUFF_SHIFT 6 |
3ba3faeb | 50 | u16 hbuff; /* bigger than needed, see above for reason */ |
56a62fc8 JB |
51 | u8 dtype; |
52 | u8 dsize; | |
53 | u8 crcstrip; | |
54 | u8 fc_ena; | |
55 | u8 l2tsel; | |
56 | u8 hsplit_0; | |
57 | u8 hsplit_1; | |
58 | u8 showiv; | |
3ba3faeb | 59 | u32 rxmax; /* bigger than needed, see above for reason */ |
56a62fc8 JB |
60 | u8 tphrdesc_ena; |
61 | u8 tphwdesc_ena; | |
62 | u8 tphdata_ena; | |
63 | u8 tphhead_ena; | |
3ba3faeb | 64 | u16 lrxqthresh; /* bigger than needed, see above for reason */ |
0b3aec85 | 65 | u8 prefena; /* NOTE: normally must be set to 1 at init */ |
56a62fc8 JB |
66 | }; |
67 | ||
3ba3faeb PSJ |
68 | /* Tx queue context data |
69 | * | |
70 | * The sizes of the variables may be larger than needed due to crossing byte | |
71 | * boundaries. If we do not have the width of the variable set to the correct | |
72 | * size then we could end up shifting bits off the top of the variable when the | |
73 | * variable is at the top of a byte and crosses over into the next byte. | |
74 | */ | |
56a62fc8 JB |
75 | struct i40e_hmc_obj_txq { |
76 | u16 head; | |
77 | u8 new_context; | |
78 | u64 base; | |
79 | u8 fc_ena; | |
80 | u8 timesync_ena; | |
81 | u8 fd_ena; | |
82 | u8 alt_vlan_ena; | |
83 | u16 thead_wb; | |
3ba3faeb | 84 | u8 cpuid; |
56a62fc8 JB |
85 | u8 head_wb_ena; |
86 | u16 qlen; | |
87 | u8 tphrdesc_ena; | |
88 | u8 tphrpacket_ena; | |
89 | u8 tphwdesc_ena; | |
90 | u64 head_wb_addr; | |
91 | u32 crc; | |
92 | u16 rdylist; | |
93 | u8 rdylist_act; | |
94 | }; | |
95 | ||
96 | /* for hsplit_0 field of Rx HMC context */ | |
97 | enum i40e_hmc_obj_rx_hsplit_0 { | |
98 | I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0, | |
99 | I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1, | |
100 | I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2, | |
101 | I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, | |
102 | I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8, | |
103 | }; | |
104 | ||
105 | /* fcoe_cntx and fcoe_filt are for debugging purpose only */ | |
106 | struct i40e_hmc_obj_fcoe_cntx { | |
107 | u32 rsv[32]; | |
108 | }; | |
109 | ||
110 | struct i40e_hmc_obj_fcoe_filt { | |
111 | u32 rsv[8]; | |
112 | }; | |
113 | ||
114 | /* Context sizes for LAN objects */ | |
115 | enum i40e_hmc_lan_object_size { | |
116 | I40E_HMC_LAN_OBJ_SZ_8 = 0x3, | |
117 | I40E_HMC_LAN_OBJ_SZ_16 = 0x4, | |
118 | I40E_HMC_LAN_OBJ_SZ_32 = 0x5, | |
119 | I40E_HMC_LAN_OBJ_SZ_64 = 0x6, | |
120 | I40E_HMC_LAN_OBJ_SZ_128 = 0x7, | |
121 | I40E_HMC_LAN_OBJ_SZ_256 = 0x8, | |
122 | I40E_HMC_LAN_OBJ_SZ_512 = 0x9, | |
123 | }; | |
124 | ||
125 | #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512 | |
126 | #define I40E_HMC_OBJ_SIZE_TXQ 128 | |
127 | #define I40E_HMC_OBJ_SIZE_RXQ 32 | |
91612c33 ASJ |
128 | #define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64 |
129 | #define I40E_HMC_OBJ_SIZE_FCOE_FILT 64 | |
56a62fc8 JB |
130 | |
131 | enum i40e_hmc_lan_rsrc_type { | |
132 | I40E_HMC_LAN_FULL = 0, | |
133 | I40E_HMC_LAN_TX = 1, | |
134 | I40E_HMC_LAN_RX = 2, | |
135 | I40E_HMC_FCOE_CTX = 3, | |
136 | I40E_HMC_FCOE_FILT = 4, | |
137 | I40E_HMC_LAN_MAX = 5 | |
138 | }; | |
139 | ||
140 | enum i40e_hmc_model { | |
141 | I40E_HMC_MODEL_DIRECT_PREFERRED = 0, | |
142 | I40E_HMC_MODEL_DIRECT_ONLY = 1, | |
143 | I40E_HMC_MODEL_PAGED_ONLY = 2, | |
144 | I40E_HMC_MODEL_UNKNOWN, | |
145 | }; | |
146 | ||
147 | struct i40e_hmc_lan_create_obj_info { | |
148 | struct i40e_hmc_info *hmc_info; | |
149 | u32 rsrc_type; | |
150 | u32 start_idx; | |
151 | u32 count; | |
152 | enum i40e_sd_entry_type entry_type; | |
153 | u64 direct_mode_sz; | |
154 | }; | |
155 | ||
156 | struct i40e_hmc_lan_delete_obj_info { | |
157 | struct i40e_hmc_info *hmc_info; | |
158 | u32 rsrc_type; | |
159 | u32 start_idx; | |
160 | u32 count; | |
161 | }; | |
162 | ||
163 | i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, | |
164 | u32 rxq_num, u32 fcoe_cntx_num, | |
165 | u32 fcoe_filt_num); | |
166 | i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw, | |
167 | enum i40e_hmc_model model); | |
168 | i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw); | |
169 | ||
170 | i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw, | |
171 | u16 queue); | |
172 | i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw, | |
173 | u16 queue, | |
174 | struct i40e_hmc_obj_txq *s); | |
175 | i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw, | |
176 | u16 queue); | |
177 | i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw, | |
178 | u16 queue, | |
179 | struct i40e_hmc_obj_rxq *s); | |
180 | ||
181 | #endif /* _I40E_LAN_HMC_H_ */ |