ath9k: Merge ath_hal and ath_hal_5416 structures
[deliverable/linux.git] / drivers / net / wireless / ath9k / beacon.c
CommitLineData
f078f209
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1/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
394cf0a1 17#include "ath9k.h"
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18
19/*
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20 * This function will modify certain transmit queue properties depending on
21 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
22 * settings and channel width min/max
23*/
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24static int ath_beaconq_config(struct ath_softc *sc)
25{
cbe61d8a 26 struct ath_hw *ah = sc->sc_ah;
ea9880fb 27 struct ath9k_tx_queue_info qi;
f078f209 28
b77f483f 29 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
d97809db 30 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
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31 /* Always burst out beacon and CAB traffic. */
32 qi.tqi_aifs = 1;
33 qi.tqi_cwmin = 0;
34 qi.tqi_cwmax = 0;
35 } else {
36 /* Adhoc mode; important thing is to use 2x cwmin. */
b77f483f
S
37 qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
38 qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
39 qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
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40 }
41
b77f483f 42 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
f078f209 43 DPRINTF(sc, ATH_DBG_FATAL,
04bd4638 44 "unable to update h/w beacon queue parameters\n");
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45 return 0;
46 } else {
b77f483f 47 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); /* push to h/w */
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48 return 1;
49 }
50}
51
ff37e337
S
52static void ath_bstuck_process(struct ath_softc *sc)
53{
54 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 55 "stuck beacon; resetting (bmiss count %u)\n",
b77f483f 56 sc->beacon.bmisscnt);
ff37e337
S
57 ath_reset(sc, false);
58}
59
f078f209 60/*
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61 * Associates the beacon frame buffer with a transmit descriptor. Will set
62 * up all required antenna switch parameters, rate codes, and channel flags.
63 * Beacons are always sent out at the lowest rate, and are not retried.
64*/
f078f209 65static void ath_beacon_setup(struct ath_softc *sc,
17d7904d 66 struct ath_vif *avp, struct ath_buf *bf)
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67{
68 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
cbe61d8a 69 struct ath_hw *ah = sc->sc_ah;
f078f209 70 struct ath_desc *ds;
980b24da 71 struct ath9k_11n_rate_series series[4];
e63835b0 72 struct ath_rate_table *rt;
980b24da 73 int flags, antenna;
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74 u8 rix, rate;
75 int ctsrate = 0;
76 int ctsduration = 0;
f078f209 77
04bd4638 78 DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
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79
80 /* setup descriptors */
81 ds = bf->bf_desc;
82
83 flags = ATH9K_TXDESC_NOACK;
84
d97809db 85 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
60b67f51 86 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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87 ds->ds_link = bf->bf_daddr; /* self-linked */
88 flags |= ATH9K_TXDESC_VEOL;
89 /* Let hardware handle antenna switching. */
90 antenna = 0;
91 } else {
92 ds->ds_link = 0;
93 /*
94 * Switch antenna every beacon.
95 * Should only switch every beacon period, not for every
96 * SWBA's
97 * XXX assumes two antenna
98 */
17d7904d 99 antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1);
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100 }
101
102 ds->ds_data = bf->bf_buf_addr;
103
104 /*
105 * Calculate rate code.
106 * XXX everything at min xmit rate
107 */
86b89eed 108 rix = 0;
3706de6f 109 rt = sc->cur_rate_table;
e63835b0 110 rate = rt->info[rix].ratecode;
672840ac 111 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
e63835b0 112 rate |= rt->info[rix].short_preamble;
f078f209 113
ff9b662d 114 ath9k_hw_set11n_txdesc(ah, ds,
980b24da
S
115 skb->len + FCS_LEN, /* frame length */
116 ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
528f0c6b 117 MAX_RATE_POWER, /* FIXME */
980b24da
S
118 ATH9K_TXKEYIX_INVALID, /* no encryption */
119 ATH9K_KEY_TYPE_CLEAR, /* no encryption */
120 flags /* no ack,
121 veol for beacons */
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122 );
123
124 /* NB: beacon's BufLen must be a multiple of 4 bytes */
ff9b662d
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125 ath9k_hw_filltxdesc(ah, ds,
126 roundup(skb->len, 4), /* buffer length */
980b24da
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127 true, /* first segment */
128 true, /* last segment */
129 ds /* first descriptor */
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130 );
131
0345f37b 132 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
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133 series[0].Tries = 1;
134 series[0].Rate = rate;
17d7904d 135 series[0].ChSel = sc->tx_chainmask;
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136 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
137 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
138 ctsrate, ctsduration, series, 4, 0);
139}
140
17d7904d 141/* Generate beacon frame and queue cab data for a VIF */
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142static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
143{
f078f209 144 struct ath_buf *bf;
17d7904d 145 struct ath_vif *avp;
f078f209 146 struct sk_buff *skb;
f078f209 147 struct ath_txq *cabq;
5640b08e 148 struct ieee80211_vif *vif;
147583c0 149 struct ieee80211_tx_info *info;
980b24da
S
150 int cabq_depth;
151
17d7904d 152 vif = sc->vifs[if_id];
5640b08e 153 ASSERT(vif);
f078f209 154
5640b08e 155 avp = (void *)vif->drv_priv;
b77f483f 156 cabq = sc->beacon.cabq;
f078f209 157
f078f209 158 if (avp->av_bcbuf == NULL) {
04bd4638
S
159 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
160 avp, avp->av_bcbuf);
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161 return NULL;
162 }
980b24da 163
f078f209 164 bf = avp->av_bcbuf;
980b24da 165 skb = (struct sk_buff *)bf->bf_mpdu;
a8fff50e 166 if (skb) {
7da3c55c 167 dma_unmap_single(sc->dev, bf->bf_dmacontext,
ca0c7e51 168 skb->len,
7da3c55c 169 DMA_TO_DEVICE);
3fbb9d95 170 dev_kfree_skb_any(skb);
a8fff50e 171 }
f078f209 172
5640b08e 173 skb = ieee80211_beacon_get(sc->hw, vif);
a8fff50e
JM
174 bf->bf_mpdu = skb;
175 if (skb == NULL)
176 return NULL;
980b24da 177
147583c0
JM
178 info = IEEE80211_SKB_CB(skb);
179 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
180 /*
181 * TODO: make sure the seq# gets assigned properly (vs. other
182 * TX frames)
183 */
980b24da 184 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
b77f483f 185 sc->tx.seq_no += 0x10;
147583c0 186 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
b77f483f 187 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
147583c0 188 }
980b24da 189
a8fff50e 190 bf->bf_buf_addr = bf->bf_dmacontext =
7da3c55c 191 dma_map_single(sc->dev, skb->data,
ca0c7e51 192 skb->len,
7da3c55c
GJ
193 DMA_TO_DEVICE);
194 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
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195 dev_kfree_skb_any(skb);
196 bf->bf_mpdu = NULL;
197 DPRINTF(sc, ATH_DBG_CONFIG,
7da3c55c 198 "dma_mapping_error() on beaconing\n");
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199 return NULL;
200 }
f078f209 201
5640b08e 202 skb = ieee80211_get_buffered_bc(sc->hw, vif);
f078f209 203
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204 /*
205 * if the CABQ traffic from previous DTIM is pending and the current
206 * beacon is also a DTIM.
17d7904d
S
207 * 1) if there is only one vif let the cab traffic continue.
208 * 2) if there are more than one vif and we are using staggered
f078f209 209 * beacons, then drain the cabq by dropping all the frames in
17d7904d 210 * the cabq so that the current vifs cab traffic can be scheduled.
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211 */
212 spin_lock_bh(&cabq->axq_lock);
213 cabq_depth = cabq->axq_depth;
214 spin_unlock_bh(&cabq->axq_lock);
215
e022edbd 216 if (skb && cabq_depth) {
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217 /*
218 * Unlock the cabq lock as ath_tx_draintxq acquires
219 * the lock again which is a common function and that
220 * acquires txq lock inside.
221 */
17d7904d 222 if (sc->nvifs > 1) {
043a0405 223 ath_draintxq(sc, cabq, false);
f078f209 224 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 225 "flush previous cabq traffic\n");
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226 }
227 }
228
229 /* Construct tx descriptor. */
230 ath_beacon_setup(sc, avp, bf);
231
232 /*
233 * Enable the CAB queue before the beacon queue to
234 * insure cab frames are triggered by this beacon.
235 */
e022edbd
JM
236 while (skb) {
237 ath_tx_cabq(sc, skb);
5640b08e 238 skb = ieee80211_get_buffered_bc(sc->hw, vif);
e022edbd 239 }
f078f209 240
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241 return bf;
242}
243
244/*
245 * Startup beacon transmission for adhoc mode when they are sent entirely
246 * by the hardware using the self-linked descriptor + veol trick.
247*/
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248static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
249{
5640b08e 250 struct ieee80211_vif *vif;
cbe61d8a 251 struct ath_hw *ah = sc->sc_ah;
f078f209 252 struct ath_buf *bf;
17d7904d 253 struct ath_vif *avp;
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254 struct sk_buff *skb;
255
17d7904d 256 vif = sc->vifs[if_id];
5640b08e
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257 ASSERT(vif);
258
259 avp = (void *)vif->drv_priv;
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260
261 if (avp->av_bcbuf == NULL) {
04bd4638
S
262 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
263 avp, avp != NULL ? avp->av_bcbuf : NULL);
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264 return;
265 }
266 bf = avp->av_bcbuf;
267 skb = (struct sk_buff *) bf->bf_mpdu;
268
269 /* Construct tx descriptor. */
270 ath_beacon_setup(sc, avp, bf);
271
272 /* NB: caller is known to have already stopped tx dma */
b77f483f
S
273 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
274 ath9k_hw_txstart(ah, sc->beacon.beaconq);
04bd4638 275 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
b77f483f 276 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
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277}
278
cbe61d8a 279int ath_beaconq_setup(struct ath_hw *ah)
f078f209 280{
ea9880fb 281 struct ath9k_tx_queue_info qi;
f078f209 282
0345f37b 283 memset(&qi, 0, sizeof(qi));
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284 qi.tqi_aifs = 1;
285 qi.tqi_cwmin = 0;
286 qi.tqi_cwmax = 0;
287 /* NB: don't enable any interrupts */
288 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
289}
290
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291int ath_beacon_alloc(struct ath_softc *sc, int if_id)
292{
5640b08e 293 struct ieee80211_vif *vif;
17d7904d 294 struct ath_vif *avp;
980b24da 295 struct ieee80211_hdr *hdr;
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296 struct ath_buf *bf;
297 struct sk_buff *skb;
459f5f90 298 __le64 tstamp;
f078f209 299
17d7904d 300 vif = sc->vifs[if_id];
5640b08e
S
301 ASSERT(vif);
302
303 avp = (void *)vif->drv_priv;
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304
305 /* Allocate a beacon descriptor if we haven't done so. */
306 if (!avp->av_bcbuf) {
980b24da
S
307 /* Allocate beacon state for hostap/ibss. We know
308 * a buffer is available. */
b77f483f 309 avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
980b24da 310 struct ath_buf, list);
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311 list_del(&avp->av_bcbuf->list);
312
d97809db 313 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
60b67f51 314 !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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315 int slot;
316 /*
17d7904d 317 * Assign the vif to a beacon xmit slot. As
f078f209
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318 * above, this cannot fail to find one.
319 */
320 avp->av_bslot = 0;
321 for (slot = 0; slot < ATH_BCBUF; slot++)
b77f483f 322 if (sc->beacon.bslot[slot] == ATH_IF_ID_ANY) {
f078f209
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323 /*
324 * XXX hack, space out slots to better
325 * deal with misses
326 */
327 if (slot+1 < ATH_BCBUF &&
b77f483f 328 sc->beacon.bslot[slot+1] ==
f078f209
LR
329 ATH_IF_ID_ANY) {
330 avp->av_bslot = slot+1;
331 break;
332 }
333 avp->av_bslot = slot;
334 /* NB: keep looking for a double slot */
335 }
b77f483f
S
336 BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY);
337 sc->beacon.bslot[avp->av_bslot] = if_id;
17d7904d 338 sc->nbcnvifs++;
f078f209
LR
339 }
340 }
341
342 /* release the previous beacon frame , if it already exists. */
343 bf = avp->av_bcbuf;
344 if (bf->bf_mpdu != NULL) {
345 skb = (struct sk_buff *)bf->bf_mpdu;
7da3c55c 346 dma_unmap_single(sc->dev, bf->bf_dmacontext,
ca0c7e51 347 skb->len,
7da3c55c 348 DMA_TO_DEVICE);
f078f209
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349 dev_kfree_skb_any(skb);
350 bf->bf_mpdu = NULL;
351 }
352
353 /*
980b24da 354 * NB: the beacon data buffer must be 32-bit aligned.
e022edbd 355 * FIXME: Fill avp->av_btxctl.txpower and
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356 * avp->av_btxctl.shortPreamble
357 */
5640b08e 358 skb = ieee80211_beacon_get(sc->hw, vif);
f078f209 359 if (skb == NULL) {
04bd4638 360 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
f078f209
LR
361 return -ENOMEM;
362 }
363
459f5f90 364 tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b77f483f 365 sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
459f5f90 366
f078f209
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367 /*
368 * Calculate a TSF adjustment factor required for
369 * staggered beacons. Note that we assume the format
370 * of the beacon frame leaves the tstamp field immediately
371 * following the header.
372 */
373 if (avp->av_bslot > 0) {
374 u64 tsfadjust;
375 __le64 val;
376 int intval;
377
a8fff50e
JM
378 intval = sc->hw->conf.beacon_int ?
379 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
f078f209
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380
381 /*
382 * The beacon interval is in TU's; the TSF in usecs.
383 * We figure out how many TU's to add to align the
384 * timestamp then convert to TSF units and handle
385 * byte swapping before writing it in the frame.
386 * The hardware will then add this each time a beacon
17d7904d
S
387 * frame is sent. Note that we align vif's 1..N
388 * and leave vif 0 untouched. This means vap 0
f078f209
LR
389 * has a timestamp in one beacon interval while the
390 * others get a timestamp aligned to the next interval.
391 */
392 tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
393 val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
394
395 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 396 "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
f078f209
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397 avp->av_bslot, intval, (unsigned long long)tsfadjust);
398
980b24da
S
399 hdr = (struct ieee80211_hdr *)skb->data;
400 memcpy(&hdr[1], &val, sizeof(val));
f078f209
LR
401 }
402
f8316df1 403 bf->bf_mpdu = skb;
a8fff50e 404 bf->bf_buf_addr = bf->bf_dmacontext =
7da3c55c 405 dma_map_single(sc->dev, skb->data,
ca0c7e51 406 skb->len,
7da3c55c
GJ
407 DMA_TO_DEVICE);
408 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
f8316df1
LR
409 dev_kfree_skb_any(skb);
410 bf->bf_mpdu = NULL;
411 DPRINTF(sc, ATH_DBG_CONFIG,
7da3c55c 412 "dma_mapping_error() on beacon alloc\n");
f8316df1
LR
413 return -ENOMEM;
414 }
f078f209
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415
416 return 0;
417}
418
17d7904d 419void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
f078f209
LR
420{
421 if (avp->av_bcbuf != NULL) {
422 struct ath_buf *bf;
423
424 if (avp->av_bslot != -1) {
b77f483f 425 sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY;
17d7904d 426 sc->nbcnvifs--;
f078f209
LR
427 }
428
429 bf = avp->av_bcbuf;
430 if (bf->bf_mpdu != NULL) {
431 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
7da3c55c 432 dma_unmap_single(sc->dev, bf->bf_dmacontext,
ca0c7e51 433 skb->len,
7da3c55c 434 DMA_TO_DEVICE);
f078f209
LR
435 dev_kfree_skb_any(skb);
436 bf->bf_mpdu = NULL;
437 }
b77f483f 438 list_add_tail(&bf->list, &sc->beacon.bbuf);
f078f209
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439
440 avp->av_bcbuf = NULL;
441 }
442}
443
f078f209
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444void ath9k_beacon_tasklet(unsigned long data)
445{
f078f209 446 struct ath_softc *sc = (struct ath_softc *)data;
cbe61d8a 447 struct ath_hw *ah = sc->sc_ah;
f078f209
LR
448 struct ath_buf *bf = NULL;
449 int slot, if_id;
450 u32 bfaddr;
451 u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
452 u32 show_cycles = 0;
453 u32 bc = 0; /* beacon count */
454 u64 tsf;
455 u32 tsftu;
456 u16 intval;
457
98deeea0 458 if (sc->sc_flags & SC_OP_NO_RESET) {
f078f209 459 show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
ff37e337 460 &rx_clear, &rx_frame, &tx_frame);
f078f209
LR
461 }
462
463 /*
464 * Check if the previous beacon has gone out. If
465 * not don't try to post another, skip this period
466 * and wait for the next. Missed beacons indicate
467 * a problem and should not occur. If we miss too
468 * many consecutive beacons reset the device.
980b24da
S
469 *
470 * FIXME: Clean up this mess !!
f078f209 471 */
b77f483f
S
472 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
473 sc->beacon.bmisscnt++;
f078f209
LR
474 /* XXX: doth needs the chanchange IE countdown decremented.
475 * We should consider adding a mac80211 call to indicate
476 * a beacon miss so appropriate action could be taken
477 * (in that layer).
478 */
b77f483f 479 if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
98deeea0 480 if (sc->sc_flags & SC_OP_NO_RESET) {
f078f209 481 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 482 "missed %u consecutive beacons\n",
b77f483f 483 sc->beacon.bmisscnt);
f078f209
LR
484 if (show_cycles) {
485 /*
980b24da
S
486 * Display cycle counter stats from HW
487 * to aide in debug of stickiness.
f078f209 488 */
980b24da 489 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 490 "busy times: rx_clear=%d, "
f078f209 491 "rx_frame=%d, tx_frame=%d\n",
04bd4638 492 rx_clear, rx_frame,
f078f209
LR
493 tx_frame);
494 } else {
980b24da 495 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638
S
496 "unable to obtain "
497 "busy times\n");
f078f209
LR
498 }
499 } else {
500 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 501 "missed %u consecutive beacons\n",
b77f483f 502 sc->beacon.bmisscnt);
f078f209 503 }
b77f483f 504 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
98deeea0 505 if (sc->sc_flags & SC_OP_NO_RESET) {
b77f483f 506 if (sc->beacon.bmisscnt == BSTUCK_THRESH) {
980b24da 507 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638
S
508 "beacon is officially "
509 "stuck\n");
f078f209
LR
510 }
511 } else {
512 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 513 "beacon is officially stuck\n");
f078f209
LR
514 ath_bstuck_process(sc);
515 }
516 }
f078f209
LR
517 return;
518 }
980b24da 519
b77f483f 520 if (sc->beacon.bmisscnt != 0) {
98deeea0 521 if (sc->sc_flags & SC_OP_NO_RESET) {
980b24da 522 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 523 "resume beacon xmit after %u misses\n",
b77f483f 524 sc->beacon.bmisscnt);
f078f209
LR
525 } else {
526 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 527 "resume beacon xmit after %u misses\n",
b77f483f 528 sc->beacon.bmisscnt);
f078f209 529 }
b77f483f 530 sc->beacon.bmisscnt = 0;
f078f209
LR
531 }
532
533 /*
534 * Generate beacon frames. we are sending frames
535 * staggered so calculate the slot for this frame based
536 * on the tsf to safeguard against missing an swba.
537 */
538
a8fff50e
JM
539 intval = sc->hw->conf.beacon_int ?
540 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
f078f209
LR
541
542 tsf = ath9k_hw_gettsf64(ah);
543 tsftu = TSF_TO_TU(tsf>>32, tsf);
544 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
b77f483f 545 if_id = sc->beacon.bslot[(slot + 1) % ATH_BCBUF];
980b24da 546
f078f209 547 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638
S
548 "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
549 slot, (unsigned long long)tsf, tsftu,
980b24da
S
550 intval, if_id);
551
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LR
552 bfaddr = 0;
553 if (if_id != ATH_IF_ID_ANY) {
554 bf = ath_beacon_generate(sc, if_id);
555 if (bf != NULL) {
556 bfaddr = bf->bf_daddr;
557 bc = 1;
558 }
559 }
560 /*
561 * Handle slot time change when a non-ERP station joins/leaves
562 * an 11g network. The 802.11 layer notifies us via callback,
563 * we mark updateslot, then wait one beacon before effecting
564 * the change. This gives associated stations at least one
565 * beacon interval to note the state change.
566 *
567 * NB: The slot time change state machine is clocked according
568 * to whether we are bursting or staggering beacons. We
569 * recognize the request to update and record the current
570 * slot then don't transition until that slot is reached
571 * again. If we miss a beacon for that slot then we'll be
572 * slow to transition but we'll be sure at least one beacon
573 * interval has passed. When bursting slot is always left
574 * set to ATH_BCBUF so this check is a noop.
575 */
576 /* XXX locking */
b77f483f
S
577 if (sc->beacon.updateslot == UPDATE) {
578 sc->beacon.updateslot = COMMIT; /* commit next beacon */
579 sc->beacon.slotupdate = slot;
580 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
581 ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
582 sc->beacon.updateslot = OK;
ff37e337 583 }
f078f209
LR
584 if (bfaddr != 0) {
585 /*
586 * Stop any current dma and put the new frame(s) on the queue.
587 * This should never fail since we check above that no frames
588 * are still pending on the queue.
589 */
b77f483f 590 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
f078f209 591 DPRINTF(sc, ATH_DBG_FATAL,
b77f483f 592 "beacon queue %u did not stop?\n", sc->beacon.beaconq);
f078f209
LR
593 /* NB: the HAL still stops DMA, so proceed */
594 }
595
596 /* NB: cabq traffic should already be queued and primed */
b77f483f
S
597 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
598 ath9k_hw_txstart(ah, sc->beacon.beaconq);
f078f209 599
17d7904d 600 sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
f078f209 601 }
f078f209
LR
602}
603
f078f209
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604/*
605 * Configure the beacon and sleep timers.
606 *
607 * When operating as an AP this resets the TSF and sets
608 * up the hardware to notify us when we need to issue beacons.
609 *
610 * When operating in station mode this sets up the beacon
611 * timers according to the timestamp of the last received
612 * beacon and the current TSF, configures PCF and DTIM
613 * handling, programs the sleep registers so the hardware
614 * will wakeup in time to receive beacons, and configures
615 * the beacon miss handling so we'll receive a BMISS
616 * interrupt when we stop seeing beacons from the AP
617 * we've associated with.
618 */
f078f209
LR
619void ath_beacon_config(struct ath_softc *sc, int if_id)
620{
5640b08e 621 struct ieee80211_vif *vif;
cbe61d8a 622 struct ath_hw *ah = sc->sc_ah;
f078f209 623 struct ath_beacon_config conf;
17d7904d 624 struct ath_vif *avp;
d97809db 625 enum nl80211_iftype opmode;
980b24da 626 u32 nexttbtt, intval;
f078f209 627
5640b08e 628 if (if_id != ATH_IF_ID_ANY) {
17d7904d 629 vif = sc->vifs[if_id];
5640b08e
S
630 ASSERT(vif);
631 avp = (void *)vif->drv_priv;
d97809db 632 opmode = avp->av_opmode;
5640b08e 633 } else {
d97809db 634 opmode = sc->sc_ah->ah_opmode;
5640b08e 635 }
f078f209 636
0345f37b 637 memset(&conf, 0, sizeof(struct ath_beacon_config));
f078f209 638
a8fff50e
JM
639 conf.beacon_interval = sc->hw->conf.beacon_int ?
640 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
f078f209
LR
641 conf.listen_interval = 1;
642 conf.dtim_period = conf.beacon_interval;
643 conf.dtim_count = 1;
644 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
645
646 /* extract tstamp from last beacon and convert to TU */
b77f483f 647 nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
459f5f90 648
f078f209 649 /* XXX conditionalize multi-bss support? */
d97809db 650 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
f078f209
LR
651 /*
652 * For multi-bss ap support beacons are either staggered
653 * evenly over N slots or burst together. For the former
654 * arrange for the SWBA to be delivered for each slot.
655 * Slots that are not occupied will generate nothing.
656 */
657 /* NB: the beacon interval is kept internally in TU's */
658 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
659 intval /= ATH_BCBUF; /* for staggered beacons */
660 } else {
661 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
662 }
663
980b24da 664 if (nexttbtt == 0) /* e.g. for ap mode */
f078f209 665 nexttbtt = intval;
980b24da 666 else if (intval) /* NB: can be 0 for monitor mode */
f078f209 667 nexttbtt = roundup(nexttbtt, intval);
980b24da 668
04bd4638
S
669 DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
670 nexttbtt, intval, conf.beacon_interval);
980b24da 671
d97809db
CM
672 /* Check for NL80211_IFTYPE_AP and sc_nostabeacons for WDS client */
673 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) {
f078f209
LR
674 struct ath9k_beacon_state bs;
675 u64 tsf;
676 u32 tsftu;
677 int dtimperiod, dtimcount, sleepduration;
678 int cfpperiod, cfpcount;
679
680 /*
681 * Setup dtim and cfp parameters according to
682 * last beacon we received (which may be none).
683 */
684 dtimperiod = conf.dtim_period;
980b24da 685 if (dtimperiod <= 0) /* NB: 0 if not known */
f078f209
LR
686 dtimperiod = 1;
687 dtimcount = conf.dtim_count;
980b24da
S
688 if (dtimcount >= dtimperiod) /* NB: sanity check */
689 dtimcount = 0;
690 cfpperiod = 1; /* NB: no PCF support yet */
f078f209
LR
691 cfpcount = 0;
692
693 sleepduration = conf.listen_interval * intval;
694 if (sleepduration <= 0)
695 sleepduration = intval;
696
980b24da 697#define FUDGE 2
f078f209
LR
698 /*
699 * Pull nexttbtt forward to reflect the current
700 * TSF and calculate dtim+cfp state for the result.
701 */
702 tsf = ath9k_hw_gettsf64(ah);
703 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
704 do {
705 nexttbtt += intval;
706 if (--dtimcount < 0) {
707 dtimcount = dtimperiod - 1;
708 if (--cfpcount < 0)
709 cfpcount = cfpperiod - 1;
710 }
711 } while (nexttbtt < tsftu);
712#undef FUDGE
0345f37b 713 memset(&bs, 0, sizeof(bs));
f078f209
LR
714 bs.bs_intval = intval;
715 bs.bs_nexttbtt = nexttbtt;
716 bs.bs_dtimperiod = dtimperiod*intval;
717 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
718 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
719 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
720 bs.bs_cfpmaxduration = 0;
980b24da 721
f078f209
LR
722 /*
723 * Calculate the number of consecutive beacons to miss
724 * before taking a BMISS interrupt. The configuration
725 * is specified in TU so we only need calculate based
726 * on the beacon interval. Note that we clamp the
727 * result to at most 15 beacons.
728 */
729 if (sleepduration > intval) {
980b24da
S
730 bs.bs_bmissthreshold = conf.listen_interval *
731 ATH_DEFAULT_BMISS_LIMIT / 2;
f078f209
LR
732 } else {
733 bs.bs_bmissthreshold =
734 DIV_ROUND_UP(conf.bmiss_timeout, intval);
735 if (bs.bs_bmissthreshold > 15)
736 bs.bs_bmissthreshold = 15;
737 else if (bs.bs_bmissthreshold <= 0)
738 bs.bs_bmissthreshold = 1;
739 }
740
741 /*
742 * Calculate sleep duration. The configuration is
743 * given in ms. We insure a multiple of the beacon
744 * period is used. Also, if the sleep duration is
745 * greater than the DTIM period then it makes senses
746 * to make it a multiple of that.
747 *
748 * XXX fixed at 100ms
749 */
750
980b24da
S
751 bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100),
752 sleepduration);
f078f209
LR
753 if (bs.bs_sleepduration > bs.bs_dtimperiod)
754 bs.bs_sleepduration = bs.bs_dtimperiod;
755
756 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 757 "tsf %llu "
f078f209
LR
758 "tsf:tu %u "
759 "intval %u "
760 "nexttbtt %u "
761 "dtim %u "
762 "nextdtim %u "
763 "bmiss %u "
764 "sleep %u "
765 "cfp:period %u "
766 "maxdur %u "
767 "next %u "
ff9b662d 768 "timoffset %u\n",
ff9b662d
S
769 (unsigned long long)tsf, tsftu,
770 bs.bs_intval,
771 bs.bs_nexttbtt,
772 bs.bs_dtimperiod,
773 bs.bs_nextdtim,
774 bs.bs_bmissthreshold,
775 bs.bs_sleepduration,
776 bs.bs_cfpperiod,
777 bs.bs_cfpmaxduration,
778 bs.bs_cfpnext,
779 bs.bs_timoffset
f078f209
LR
780 );
781
782 ath9k_hw_set_interrupts(ah, 0);
783 ath9k_hw_set_sta_beacon_timers(ah, &bs);
17d7904d
S
784 sc->imask |= ATH9K_INT_BMISS;
785 ath9k_hw_set_interrupts(ah, sc->imask);
f078f209
LR
786 } else {
787 u64 tsf;
788 u32 tsftu;
789 ath9k_hw_set_interrupts(ah, 0);
790 if (nexttbtt == intval)
791 intval |= ATH9K_BEACON_RESET_TSF;
d97809db 792 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
f078f209
LR
793 /*
794 * Pull nexttbtt forward to reflect the current
980b24da 795 * TSF
f078f209 796 */
980b24da 797#define FUDGE 2
f078f209
LR
798 if (!(intval & ATH9K_BEACON_RESET_TSF)) {
799 tsf = ath9k_hw_gettsf64(ah);
800 tsftu = TSF_TO_TU((u32)(tsf>>32),
801 (u32)tsf) + FUDGE;
802 do {
803 nexttbtt += intval;
804 } while (nexttbtt < tsftu);
805 }
806#undef FUDGE
807 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638
S
808 "IBSS nexttbtt %u intval %u (%u)\n",
809 nexttbtt,
f078f209
LR
810 intval & ~ATH9K_BEACON_RESET_TSF,
811 conf.beacon_interval);
812
813 /*
814 * In IBSS mode enable the beacon timers but only
815 * enable SWBA interrupts if we need to manually
816 * prepare beacon frames. Otherwise we use a
817 * self-linked tx descriptor and let the hardware
818 * deal with things.
819 */
820 intval |= ATH9K_BEACON_ENA;
60b67f51 821 if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
17d7904d 822 sc->imask |= ATH9K_INT_SWBA;
f078f209 823 ath_beaconq_config(sc);
d97809db 824 } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
f078f209
LR
825 /*
826 * In AP mode we enable the beacon timers and
827 * SWBA interrupts to prepare beacon frames.
828 */
829 intval |= ATH9K_BEACON_ENA;
17d7904d 830 sc->imask |= ATH9K_INT_SWBA; /* beacon prepare */
f078f209
LR
831 ath_beaconq_config(sc);
832 }
833 ath9k_hw_beaconinit(ah, nexttbtt, intval);
b77f483f 834 sc->beacon.bmisscnt = 0;
17d7904d 835 ath9k_hw_set_interrupts(ah, sc->imask);
f078f209
LR
836 /*
837 * When using a self-linked beacon descriptor in
838 * ibss mode load it once here.
839 */
d97809db 840 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
60b67f51 841 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
f078f209
LR
842 ath_beacon_start_adhoc(sc, 0);
843 }
f078f209
LR
844}
845
f078f209
LR
846void ath_beacon_sync(struct ath_softc *sc, int if_id)
847{
848 /*
849 * Resync beacon timers using the tsf of the
850 * beacon frame we just received.
851 */
852 ath_beacon_config(sc, if_id);
672840ac 853 sc->sc_flags |= SC_OP_BEACONS;
f078f209 854}
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