rtc: s3c: Remove unnecessary call to disable already disabled clock
[deliverable/linux.git] / drivers / rtc / rtc-s3c.c
CommitLineData
1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
dbd9acbe
SK
29#include <linux/uaccess.h>
30#include <linux/io.h>
1add6781 31
1add6781 32#include <asm/irq.h>
b9d7c5d3 33#include "rtc-s3c.h"
1add6781 34
19be09f5
CC
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
df9e26d0 41 struct clk *rtc_src_clk;
1fb1c35f 42 bool clk_disabled;
19be09f5 43
ae05c950 44 struct s3c_rtc_data *data;
1add6781 45
19be09f5
CC
46 int irq_alarm;
47 int irq_tick;
1add6781 48
19be09f5
CC
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
1add6781 51
19be09f5
CC
52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54};
55
ae05c950
CC
56struct s3c_rtc_data {
57 int max_user_freq;
df9e26d0 58 bool needs_src_clk;
ae05c950
CC
59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68};
69
24e14554 70static void s3c_rtc_enable_clk(struct s3c_rtc *info)
88cee8fd 71{
88cee8fd
DK
72 unsigned long irq_flags;
73
19be09f5 74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS
75 if (info->clk_disabled) {
76 clk_enable(info->rtc_clk);
77 if (info->data->needs_src_clk)
78 clk_enable(info->rtc_src_clk);
79 info->clk_disabled = false;
80 }
24e14554
CC
81 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
82}
83
84static void s3c_rtc_disable_clk(struct s3c_rtc *info)
85{
86 unsigned long irq_flags;
87
88 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS
89 if (!info->clk_disabled) {
90 if (info->data->needs_src_clk)
91 clk_disable(info->rtc_src_clk);
92 clk_disable(info->rtc_clk);
93 info->clk_disabled = true;
94 }
19be09f5 95 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
88cee8fd
DK
96}
97
1add6781 98/* IRQ Handlers */
ae05c950 99static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 100{
19be09f5 101 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 102
ae05c950
CC
103 if (info->data->irq_handler)
104 info->data->irq_handler(info, S3C2410_INTP_TIC);
88cee8fd 105
1add6781
BD
106 return IRQ_HANDLED;
107}
108
ae05c950 109static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 110{
19be09f5 111 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 112
ae05c950
CC
113 if (info->data->irq_handler)
114 info->data->irq_handler(info, S3C2410_INTP_ALM);
2f3478f6 115
1add6781
BD
116 return IRQ_HANDLED;
117}
118
119/* Update control registers */
2ec38a03 120static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 121{
19be09f5 122 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
123 unsigned int tmp;
124
19be09f5 125 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
1add6781 126
24e14554
CC
127 s3c_rtc_enable_clk(info);
128
19be09f5 129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 130
2ec38a03 131 if (enabled)
1add6781
BD
132 tmp |= S3C2410_RTCALM_ALMEN;
133
19be09f5 134 writeb(tmp, info->base + S3C2410_RTCALM);
2ec38a03 135
24e14554 136 s3c_rtc_disable_clk(info);
88cee8fd 137
1fb1c35f
JS
138 if (enabled)
139 s3c_rtc_enable_clk(info);
140 else
141 s3c_rtc_disable_clk(info);
142
2ec38a03 143 return 0;
1add6781
BD
144}
145
ae05c950 146/* Set RTC frequency */
19be09f5 147static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
1add6781 148{
5d2a5037
JC
149 if (!is_power_of_2(freq))
150 return -EINVAL;
151
19be09f5 152 spin_lock_irq(&info->pie_lock);
1add6781 153
ae05c950
CC
154 if (info->data->set_freq)
155 info->data->set_freq(info, freq);
25c1a246 156
19be09f5 157 spin_unlock_irq(&info->pie_lock);
773be7ee
BD
158
159 return 0;
1add6781
BD
160}
161
162/* Time read/write */
1add6781
BD
163static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
164{
19be09f5 165 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
166 unsigned int have_retried = 0;
167
24e14554 168 s3c_rtc_enable_clk(info);
df9e26d0 169
1add6781 170 retry_get_time:
19be09f5
CC
171 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
172 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
173 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
174 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
175 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
176 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
1add6781 177
48fc7f7e 178 /* the only way to work out whether the system was mid-update
1add6781
BD
179 * when we read it is to check the second counter, and if it
180 * is zero, then we re-try the entire read
181 */
182
183 if (rtc_tm->tm_sec == 0 && !have_retried) {
184 have_retried = 1;
185 goto retry_get_time;
186 }
187
fe20ba70
AB
188 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
189 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
190 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
191 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
192 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
193 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 194
24e14554
CC
195 s3c_rtc_disable_clk(info);
196
1add6781 197 rtc_tm->tm_year += 100;
4e8896cd 198
d4a48c2a 199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
4e8896cd
MH
200 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
201 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
202
1add6781
BD
203 rtc_tm->tm_mon -= 1;
204
5b3ffddd 205 return rtc_valid_tm(rtc_tm);
1add6781
BD
206}
207
208static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
209{
19be09f5 210 struct s3c_rtc *info = dev_get_drvdata(dev);
641741e0 211 int year = tm->tm_year - 100;
9a654518 212
d4a48c2a 213 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c 214 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD
215 tm->tm_hour, tm->tm_min, tm->tm_sec);
216
217 /* we get around y2k by simply not supporting it */
1add6781 218
641741e0 219 if (year < 0 || year >= 100) {
9a654518 220 dev_err(dev, "rtc only supports 100 years\n");
1add6781 221 return -EINVAL;
9a654518
BD
222 }
223
24e14554 224 s3c_rtc_enable_clk(info);
19be09f5
CC
225
226 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
227 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
228 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
229 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
230 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
231 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
232
24e14554 233 s3c_rtc_disable_clk(info);
1add6781
BD
234
235 return 0;
236}
237
238static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
239{
19be09f5 240 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
241 struct rtc_time *alm_tm = &alrm->time;
242 unsigned int alm_en;
243
24e14554 244 s3c_rtc_enable_clk(info);
df9e26d0 245
19be09f5
CC
246 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
247 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
248 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
249 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
250 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
251 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
1add6781 252
19be09f5 253 alm_en = readb(info->base + S3C2410_RTCALM);
1add6781 254
24e14554
CC
255 s3c_rtc_disable_clk(info);
256
a2db8dfc
DB
257 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
258
d4a48c2a 259 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 260 alm_en,
30ffc40c 261 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD
262 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
263
1add6781 264 /* decode the alarm enable field */
1add6781 265 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 266 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781
BD
267
268 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 269 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781
BD
270
271 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 272 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781
BD
273
274 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 275 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781
BD
276
277 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 278 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 279 alm_tm->tm_mon -= 1;
1add6781
BD
280 }
281
282 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 283 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781
BD
284
285 return 0;
286}
287
288static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
289{
19be09f5 290 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
291 struct rtc_time *tm = &alrm->time;
292 unsigned int alrm_en;
fb4ac3c1 293 int year = tm->tm_year - 100;
1add6781 294
d4a48c2a 295 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 296 alrm->enabled,
4e8896cd 297 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c 298 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 299
24e14554
CC
300 s3c_rtc_enable_clk(info);
301
19be09f5
CC
302 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
303 writeb(0x00, info->base + S3C2410_RTCALM);
1add6781
BD
304
305 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
306 alrm_en |= S3C2410_RTCALM_SECEN;
19be09f5 307 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
1add6781
BD
308 }
309
310 if (tm->tm_min < 60 && tm->tm_min >= 0) {
311 alrm_en |= S3C2410_RTCALM_MINEN;
19be09f5 312 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
1add6781
BD
313 }
314
315 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
316 alrm_en |= S3C2410_RTCALM_HOUREN;
19be09f5 317 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
1add6781
BD
318 }
319
fb4ac3c1
KK
320 if (year < 100 && year >= 0) {
321 alrm_en |= S3C2410_RTCALM_YEAREN;
322 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
323 }
324
325 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
326 alrm_en |= S3C2410_RTCALM_MONEN;
327 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
328 }
329
330 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
331 alrm_en |= S3C2410_RTCALM_DAYEN;
332 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
333 }
334
d4a48c2a 335 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
1add6781 336
19be09f5 337 writeb(alrm_en, info->base + S3C2410_RTCALM);
1add6781 338
24e14554 339 s3c_rtc_disable_clk(info);
1add6781 340
24e14554 341 s3c_rtc_setaie(dev, alrm->enabled);
19be09f5 342
1add6781
BD
343 return 0;
344}
345
1add6781
BD
346static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
347{
19be09f5 348 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 349
24e14554 350 s3c_rtc_enable_clk(info);
9f4123b7 351
ae05c950
CC
352 if (info->data->enable_tick)
353 info->data->enable_tick(info, seq);
354
24e14554 355 s3c_rtc_disable_clk(info);
ae05c950 356
1add6781
BD
357 return 0;
358}
359
ff8371ac 360static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD
361 .read_time = s3c_rtc_gettime,
362 .set_time = s3c_rtc_settime,
363 .read_alarm = s3c_rtc_getalarm,
364 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY
365 .proc = s3c_rtc_proc,
366 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD
367};
368
ae05c950 369static void s3c24xx_rtc_enable(struct s3c_rtc *info)
1add6781 370{
d67288da 371 unsigned int con, tmp;
1add6781 372
d67288da 373 con = readw(info->base + S3C2410_RTCCON);
ae05c950
CC
374 /* re-enable the device, and check it is ok */
375 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
376 dev_info(info->dev, "rtc disabled, re-enabling\n");
1add6781 377
ae05c950
CC
378 tmp = readw(info->base + S3C2410_RTCCON);
379 writew(tmp | S3C2410_RTCCON_RTCEN,
380 info->base + S3C2410_RTCCON);
381 }
1add6781 382
ae05c950
CC
383 if (con & S3C2410_RTCCON_CNTSEL) {
384 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
1add6781 385
ae05c950
CC
386 tmp = readw(info->base + S3C2410_RTCCON);
387 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
388 info->base + S3C2410_RTCCON);
389 }
1add6781 390
ae05c950
CC
391 if (con & S3C2410_RTCCON_CLKRST) {
392 dev_info(info->dev, "removing RTCCON_CLKRST\n");
1add6781 393
ae05c950
CC
394 tmp = readw(info->base + S3C2410_RTCCON);
395 writew(tmp & ~S3C2410_RTCCON_CLKRST,
396 info->base + S3C2410_RTCCON);
1add6781 397 }
ae05c950
CC
398}
399
400static void s3c24xx_rtc_disable(struct s3c_rtc *info)
401{
402 unsigned int con;
403
ae05c950
CC
404 con = readw(info->base + S3C2410_RTCCON);
405 con &= ~S3C2410_RTCCON_RTCEN;
406 writew(con, info->base + S3C2410_RTCCON);
407
408 con = readb(info->base + S3C2410_TICNT);
409 con &= ~S3C2410_TICNT_ENABLE;
410 writeb(con, info->base + S3C2410_TICNT);
ae05c950
CC
411}
412
413static void s3c6410_rtc_disable(struct s3c_rtc *info)
414{
415 unsigned int con;
416
ae05c950
CC
417 con = readw(info->base + S3C2410_RTCCON);
418 con &= ~S3C64XX_RTCCON_TICEN;
419 con &= ~S3C2410_RTCCON_RTCEN;
420 writew(con, info->base + S3C2410_RTCCON);
1add6781
BD
421}
422
19be09f5 423static int s3c_rtc_remove(struct platform_device *pdev)
1add6781 424{
19be09f5
CC
425 struct s3c_rtc *info = platform_get_drvdata(pdev);
426
427 s3c_rtc_setaie(info->dev, 0);
1add6781 428
7f23a936
JS
429 if (info->data->needs_src_clk)
430 clk_unprepare(info->rtc_src_clk);
19be09f5 431 clk_unprepare(info->rtc_clk);
e48add8c 432
1add6781
BD
433 return 0;
434}
435
d2524caa
HS
436static const struct of_device_id s3c_rtc_dt_match[];
437
ae05c950 438static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
d2524caa 439{
ae05c950 440 const struct of_device_id *match;
d67288da 441
ae05c950
CC
442 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
443 return (struct s3c_rtc_data *)match->data;
d2524caa
HS
444}
445
5a167f45 446static int s3c_rtc_probe(struct platform_device *pdev)
1add6781 447{
19be09f5 448 struct s3c_rtc *info = NULL;
e1df962e 449 struct rtc_time rtc_tm;
1add6781
BD
450 struct resource *res;
451 int ret;
452
19be09f5
CC
453 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
454 if (!info)
455 return -ENOMEM;
1add6781
BD
456
457 /* find the IRQs */
19be09f5
CC
458 info->irq_tick = platform_get_irq(pdev, 1);
459 if (info->irq_tick < 0) {
1add6781 460 dev_err(&pdev->dev, "no irq for rtc tick\n");
19be09f5 461 return info->irq_tick;
1add6781
BD
462 }
463
19be09f5 464 info->dev = &pdev->dev;
ae05c950
CC
465 info->data = s3c_rtc_get_data(pdev);
466 if (!info->data) {
467 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
468 return -EINVAL;
469 }
19be09f5
CC
470 spin_lock_init(&info->pie_lock);
471 spin_lock_init(&info->alarm_clk_lock);
472
473 platform_set_drvdata(pdev, info);
474
475 info->irq_alarm = platform_get_irq(pdev, 0);
476 if (info->irq_alarm < 0) {
1add6781 477 dev_err(&pdev->dev, "no irq for alarm\n");
19be09f5 478 return info->irq_alarm;
1add6781
BD
479 }
480
d4a48c2a 481 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
19be09f5 482 info->irq_tick, info->irq_alarm);
1add6781
BD
483
484 /* get the memory region */
1add6781 485 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
19be09f5
CC
486 info->base = devm_ioremap_resource(&pdev->dev, res);
487 if (IS_ERR(info->base))
488 return PTR_ERR(info->base);
1add6781 489
19be09f5
CC
490 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
491 if (IS_ERR(info->rtc_clk)) {
ae6e00b4
JMC
492 ret = PTR_ERR(info->rtc_clk);
493 if (ret != -EPROBE_DEFER)
494 dev_err(&pdev->dev, "failed to find rtc clock\n");
495 else
496 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
497 return ret;
e48add8c 498 }
19be09f5 499 clk_prepare_enable(info->rtc_clk);
e48add8c 500
eaf3a659
MS
501 if (info->data->needs_src_clk) {
502 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
503 if (IS_ERR(info->rtc_src_clk)) {
ae6e00b4
JMC
504 ret = PTR_ERR(info->rtc_src_clk);
505 if (ret != -EPROBE_DEFER)
506 dev_err(&pdev->dev,
507 "failed to find rtc source clock\n");
508 else
509 dev_dbg(&pdev->dev,
510 "probe deferred due to missing rtc src clk\n");
7f23a936 511 clk_disable_unprepare(info->rtc_clk);
ae6e00b4 512 return ret;
eaf3a659
MS
513 }
514 clk_prepare_enable(info->rtc_src_clk);
df9e26d0 515 }
df9e26d0 516
1add6781 517 /* check to see if everything is setup correctly */
ae05c950
CC
518 if (info->data->enable)
519 info->data->enable(info);
1add6781 520
d4a48c2a 521 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
19be09f5 522 readw(info->base + S3C2410_RTCCON));
1add6781 523
51b7616e
YK
524 device_init_wakeup(&pdev->dev, 1);
525
202fe4c2 526 /* Check RTC Time */
492da68c 527 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
202fe4c2
KK
528 rtc_tm.tm_year = 100;
529 rtc_tm.tm_mon = 0;
530 rtc_tm.tm_mday = 1;
531 rtc_tm.tm_hour = 0;
532 rtc_tm.tm_min = 0;
533 rtc_tm.tm_sec = 0;
534
535 s3c_rtc_settime(&pdev->dev, &rtc_tm);
536
537 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
538 }
539
1add6781 540 /* register RTC and exit */
19be09f5 541 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
1add6781 542 THIS_MODULE);
19be09f5 543 if (IS_ERR(info->rtc)) {
1add6781 544 dev_err(&pdev->dev, "cannot attach rtc\n");
19be09f5 545 ret = PTR_ERR(info->rtc);
1add6781
BD
546 goto err_nortc;
547 }
548
19be09f5
CC
549 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
550 0, "s3c2410-rtc alarm", info);
551 if (ret) {
552 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
553 goto err_nortc;
554 }
eaa6e4dd 555
19be09f5
CC
556 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
557 0, "s3c2410-rtc tick", info);
558 if (ret) {
559 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
560 goto err_nortc;
561 }
051fe54e 562
ae05c950
CC
563 if (info->data->select_tick_clk)
564 info->data->select_tick_clk(info);
62d17601 565
19be09f5 566 s3c_rtc_setfreq(info, 1);
62d17601 567
1add6781
BD
568 return 0;
569
570 err_nortc:
ae05c950
CC
571 if (info->data->disable)
572 info->data->disable(info);
24e14554
CC
573
574 if (info->data->needs_src_clk)
575 clk_disable_unprepare(info->rtc_src_clk);
19be09f5 576 clk_disable_unprepare(info->rtc_clk);
1add6781 577
1add6781
BD
578 return ret;
579}
580
32e445aa 581#ifdef CONFIG_PM_SLEEP
1add6781 582
32e445aa 583static int s3c_rtc_suspend(struct device *dev)
1add6781 584{
19be09f5 585 struct s3c_rtc *info = dev_get_drvdata(dev);
32e445aa 586
24e14554 587 s3c_rtc_enable_clk(info);
ae05c950 588
1add6781 589 /* save TICNT for anyone using periodic interrupts */
ae05c950
CC
590 if (info->data->save_tick_cnt)
591 info->data->save_tick_cnt(info);
592
593 if (info->data->disable)
594 info->data->disable(info);
f501ed52 595
19be09f5
CC
596 if (device_may_wakeup(dev) && !info->wake_en) {
597 if (enable_irq_wake(info->irq_alarm) == 0)
598 info->wake_en = true;
52cd4e5c 599 else
32e445aa 600 dev_err(dev, "enable_irq_wake failed\n");
52cd4e5c 601 }
ae05c950 602
1add6781
BD
603 return 0;
604}
605
32e445aa 606static int s3c_rtc_resume(struct device *dev)
1add6781 607{
19be09f5 608 struct s3c_rtc *info = dev_get_drvdata(dev);
9f4123b7 609
ae05c950
CC
610 if (info->data->enable)
611 info->data->enable(info);
612
613 if (info->data->restore_tick_cnt)
614 info->data->restore_tick_cnt(info);
f501ed52 615
24e14554
CC
616 s3c_rtc_disable_clk(info);
617
19be09f5
CC
618 if (device_may_wakeup(dev) && info->wake_en) {
619 disable_irq_wake(info->irq_alarm);
620 info->wake_en = false;
52cd4e5c 621 }
ae05c950 622
1add6781
BD
623 return 0;
624}
1add6781 625#endif
32e445aa
JH
626static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
627
ae05c950
CC
628static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
629{
ae05c950 630 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
ae05c950
CC
631}
632
633static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
634{
ae05c950
CC
635 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
636 writeb(mask, info->base + S3C2410_INTP);
ae05c950
CC
637}
638
639static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
640{
641 unsigned int tmp = 0;
642 int val;
643
644 tmp = readb(info->base + S3C2410_TICNT);
645 tmp &= S3C2410_TICNT_ENABLE;
646
647 val = (info->rtc->max_user_freq / freq) - 1;
648 tmp |= val;
649
650 writel(tmp, info->base + S3C2410_TICNT);
651}
652
653static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
654{
655 unsigned int tmp = 0;
656 int val;
657
658 tmp = readb(info->base + S3C2410_TICNT);
659 tmp &= S3C2410_TICNT_ENABLE;
660
661 val = (info->rtc->max_user_freq / freq) - 1;
662
663 tmp |= S3C2443_TICNT_PART(val);
664 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
665
666 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
667
668 writel(tmp, info->base + S3C2410_TICNT);
669}
670
671static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
672{
673 unsigned int tmp = 0;
674 int val;
675
676 tmp = readb(info->base + S3C2410_TICNT);
677 tmp &= S3C2410_TICNT_ENABLE;
678
679 val = (info->rtc->max_user_freq / freq) - 1;
680
681 tmp |= S3C2443_TICNT_PART(val);
682 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
683
684 writel(tmp, info->base + S3C2410_TICNT);
685}
686
687static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 int val;
690
691 val = (info->rtc->max_user_freq / freq) - 1;
692 writel(val, info->base + S3C2410_TICNT);
693}
694
695static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
696{
697 unsigned int ticnt;
698
699 ticnt = readb(info->base + S3C2410_TICNT);
700 ticnt &= S3C2410_TICNT_ENABLE;
701
702 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
703}
704
705static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
706{
707 unsigned int con;
708
709 con = readw(info->base + S3C2410_RTCCON);
710 con |= S3C2443_RTCCON_TICSEL;
711 writew(con, info->base + S3C2410_RTCCON);
712}
713
714static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
715{
716 unsigned int ticnt;
717
718 ticnt = readw(info->base + S3C2410_RTCCON);
719 ticnt &= S3C64XX_RTCCON_TICEN;
720
721 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
722}
723
724static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
725{
726 info->ticnt_save = readb(info->base + S3C2410_TICNT);
727}
728
729static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
730{
731 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
732}
733
734static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
735{
736 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
737 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
738 info->ticnt_save = readl(info->base + S3C2410_TICNT);
739}
740
741static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
742{
743 unsigned int con;
744
745 writel(info->ticnt_save, info->base + S3C2410_TICNT);
746 if (info->ticnt_en_save) {
747 con = readw(info->base + S3C2410_RTCCON);
748 writew(con | info->ticnt_en_save,
749 info->base + S3C2410_RTCCON);
750 }
751}
752
753static struct s3c_rtc_data const s3c2410_rtc_data = {
754 .max_user_freq = 128,
755 .irq_handler = s3c24xx_rtc_irq,
756 .set_freq = s3c2410_rtc_setfreq,
757 .enable_tick = s3c24xx_rtc_enable_tick,
758 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
759 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
760 .enable = s3c24xx_rtc_enable,
761 .disable = s3c24xx_rtc_disable,
762};
763
764static struct s3c_rtc_data const s3c2416_rtc_data = {
765 .max_user_freq = 32768,
766 .irq_handler = s3c24xx_rtc_irq,
767 .set_freq = s3c2416_rtc_setfreq,
768 .enable_tick = s3c24xx_rtc_enable_tick,
769 .select_tick_clk = s3c2416_rtc_select_tick_clk,
770 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
771 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
772 .enable = s3c24xx_rtc_enable,
773 .disable = s3c24xx_rtc_disable,
774};
775
776static struct s3c_rtc_data const s3c2443_rtc_data = {
777 .max_user_freq = 32768,
778 .irq_handler = s3c24xx_rtc_irq,
779 .set_freq = s3c2443_rtc_setfreq,
780 .enable_tick = s3c24xx_rtc_enable_tick,
781 .select_tick_clk = s3c2416_rtc_select_tick_clk,
782 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
783 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
784 .enable = s3c24xx_rtc_enable,
785 .disable = s3c24xx_rtc_disable,
786};
787
788static struct s3c_rtc_data const s3c6410_rtc_data = {
789 .max_user_freq = 32768,
8792f777 790 .needs_src_clk = true,
ae05c950
CC
791 .irq_handler = s3c6410_rtc_irq,
792 .set_freq = s3c6410_rtc_setfreq,
793 .enable_tick = s3c6410_rtc_enable_tick,
794 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
795 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
796 .enable = s3c24xx_rtc_enable,
797 .disable = s3c6410_rtc_disable,
c3cba928
TB
798};
799
39ce4084 800static const struct of_device_id s3c_rtc_dt_match[] = {
d2524caa 801 {
cd1e6f9e 802 .compatible = "samsung,s3c2410-rtc",
ae05c950 803 .data = (void *)&s3c2410_rtc_data,
25c1a246 804 }, {
cd1e6f9e 805 .compatible = "samsung,s3c2416-rtc",
ae05c950 806 .data = (void *)&s3c2416_rtc_data,
25c1a246 807 }, {
cd1e6f9e 808 .compatible = "samsung,s3c2443-rtc",
ae05c950 809 .data = (void *)&s3c2443_rtc_data,
d2524caa 810 }, {
cd1e6f9e 811 .compatible = "samsung,s3c6410-rtc",
ae05c950 812 .data = (void *)&s3c6410_rtc_data,
df9e26d0
CC
813 }, {
814 .compatible = "samsung,exynos3250-rtc",
a42e6eae 815 .data = (void *)&s3c6410_rtc_data,
d2524caa 816 },
ae05c950 817 { /* sentinel */ },
39ce4084
TA
818};
819MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
9f4123b7
MC
820
821static struct platform_driver s3c_rtc_driver = {
1add6781 822 .probe = s3c_rtc_probe,
5a167f45 823 .remove = s3c_rtc_remove,
1add6781 824 .driver = {
9f4123b7 825 .name = "s3c-rtc",
32e445aa 826 .pm = &s3c_rtc_pm_ops,
04a373fd 827 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
1add6781
BD
828 },
829};
0c4eae66 830module_platform_driver(s3c_rtc_driver);
1add6781
BD
831
832MODULE_DESCRIPTION("Samsung S3C RTC Driver");
833MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
834MODULE_LICENSE("GPL");
ad28a07b 835MODULE_ALIAS("platform:s3c2410-rtc");
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