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1da177e4 LT |
1 | /* cpwatchdog.c - driver implementation for hardware watchdog |
2 | * timers found on Sun Microsystems CP1400 and CP1500 boards. | |
3 | * | |
4 | * This device supports both the generic Linux watchdog | |
5 | * interface and Solaris-compatible ioctls as best it is | |
6 | * able. | |
7 | * | |
8 | * NOTE: CP1400 systems appear to have a defective intr_mask | |
9 | * register on the PLD, preventing the disabling of | |
10 | * timer interrupts. We use a timer to periodically | |
11 | * reset 'stopped' watchdogs on affected platforms. | |
12 | * | |
13 | * TODO: DevFS support (/dev/watchdogs/0 ... /dev/watchdogs/2) | |
14 | * | |
15 | * Copyright (c) 2000 Eric Brower (ebrower@usa.net) | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/fs.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/major.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/miscdevice.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/timer.h> | |
b66621fe | 29 | #include <linux/smp_lock.h> |
1da177e4 LT |
30 | #include <asm/irq.h> |
31 | #include <asm/ebus.h> | |
32 | #include <asm/oplib.h> | |
33 | #include <asm/uaccess.h> | |
34 | ||
35 | #include <asm/watchdog.h> | |
36 | ||
37 | #define WD_OBPNAME "watchdog" | |
38 | #define WD_BADMODEL "SUNW,501-5336" | |
39 | #define WD_BTIMEOUT (jiffies + (HZ * 1000)) | |
40 | #define WD_BLIMIT 0xFFFF | |
41 | ||
42 | #define WD0_DEVNAME "watchdog0" | |
43 | #define WD1_DEVNAME "watchdog1" | |
44 | #define WD2_DEVNAME "watchdog2" | |
45 | ||
46 | #define WD0_MINOR 212 | |
47 | #define WD1_MINOR 213 | |
48 | #define WD2_MINOR 214 | |
49 | ||
50 | ||
51 | /* Internal driver definitions | |
52 | */ | |
53 | #define WD0_ID 0 /* Watchdog0 */ | |
54 | #define WD1_ID 1 /* Watchdog1 */ | |
55 | #define WD2_ID 2 /* Watchdog2 */ | |
56 | #define WD_NUMDEVS 3 /* Device contains 3 timers */ | |
57 | ||
58 | #define WD_INTR_OFF 0 /* Interrupt disable value */ | |
59 | #define WD_INTR_ON 1 /* Interrupt enable value */ | |
60 | ||
61 | #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */ | |
62 | #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */ | |
63 | #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */ | |
64 | ||
65 | /* Register value definitions | |
66 | */ | |
67 | #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */ | |
68 | #define WD1_INTR_MASK 0x02 | |
69 | #define WD2_INTR_MASK 0x04 | |
70 | ||
71 | #define WD_S_RUNNING 0x01 /* Watchdog device status running */ | |
72 | #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */ | |
73 | ||
74 | /* Sun uses Altera PLD EPF8820ATC144-4 | |
75 | * providing three hardware watchdogs: | |
76 | * | |
77 | * 1) RIC - sends an interrupt when triggered | |
78 | * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU | |
79 | * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board | |
80 | * | |
81 | *** Timer register block definition (struct wd_timer_regblk) | |
82 | * | |
83 | * dcntr and limit registers (halfword access): | |
84 | * ------------------- | |
85 | * | 15 | ...| 1 | 0 | | |
86 | * ------------------- | |
87 | * |- counter val -| | |
88 | * ------------------- | |
89 | * dcntr - Current 16-bit downcounter value. | |
90 | * When downcounter reaches '0' watchdog expires. | |
91 | * Reading this register resets downcounter with 'limit' value. | |
92 | * limit - 16-bit countdown value in 1/10th second increments. | |
93 | * Writing this register begins countdown with input value. | |
94 | * Reading from this register does not affect counter. | |
95 | * NOTES: After watchdog reset, dcntr and limit contain '1' | |
96 | * | |
97 | * status register (byte access): | |
98 | * --------------------------- | |
99 | * | 7 | ... | 2 | 1 | 0 | | |
100 | * --------------+------------ | |
101 | * |- UNUSED -| EXP | RUN | | |
102 | * --------------------------- | |
103 | * status- Bit 0 - Watchdog is running | |
104 | * Bit 1 - Watchdog has expired | |
105 | * | |
106 | *** PLD register block definition (struct wd_pld_regblk) | |
107 | * | |
108 | * intr_mask register (byte access): | |
109 | * --------------------------------- | |
110 | * | 7 | ... | 3 | 2 | 1 | 0 | | |
111 | * +-------------+------------------ | |
112 | * |- UNUSED -| WD3 | WD2 | WD1 | | |
113 | * --------------------------------- | |
114 | * WD3 - 1 == Interrupt disabled for watchdog 3 | |
115 | * WD2 - 1 == Interrupt disabled for watchdog 2 | |
116 | * WD1 - 1 == Interrupt disabled for watchdog 1 | |
117 | * | |
118 | * pld_status register (byte access): | |
119 | * UNKNOWN, MAGICAL MYSTERY REGISTER | |
120 | * | |
121 | */ | |
122 | #define WD_TIMER_REGSZ 16 | |
123 | #define WD0_OFF 0 | |
124 | #define WD1_OFF (WD_TIMER_REGSZ * 1) | |
125 | #define WD2_OFF (WD_TIMER_REGSZ * 2) | |
126 | #define PLD_OFF (WD_TIMER_REGSZ * 3) | |
127 | ||
128 | #define WD_DCNTR 0x00 | |
129 | #define WD_LIMIT 0x04 | |
130 | #define WD_STATUS 0x08 | |
131 | ||
132 | #define PLD_IMASK (PLD_OFF + 0x00) | |
133 | #define PLD_STATUS (PLD_OFF + 0x04) | |
134 | ||
135 | /* Individual timer structure | |
136 | */ | |
137 | struct wd_timer { | |
138 | __u16 timeout; | |
139 | __u8 intr_mask; | |
140 | unsigned char runstatus; | |
141 | void __iomem *regs; | |
142 | }; | |
143 | ||
144 | /* Device structure | |
145 | */ | |
146 | struct wd_device { | |
147 | int irq; | |
148 | spinlock_t lock; | |
149 | unsigned char isbaddoggie; /* defective PLD */ | |
150 | unsigned char opt_enable; | |
151 | unsigned char opt_reboot; | |
152 | unsigned short opt_timeout; | |
153 | unsigned char initialized; | |
154 | struct wd_timer watchdog[WD_NUMDEVS]; | |
155 | void __iomem *regs; | |
156 | }; | |
157 | ||
158 | static struct wd_device wd_dev = { | |
159 | 0, SPIN_LOCK_UNLOCKED, 0, 0, 0, 0, | |
160 | }; | |
161 | ||
162 | static struct timer_list wd_timer; | |
163 | ||
164 | static int wd0_timeout = 0; | |
165 | static int wd1_timeout = 0; | |
166 | static int wd2_timeout = 0; | |
167 | ||
168 | #ifdef MODULE | |
169 | module_param (wd0_timeout, int, 0); | |
170 | MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs"); | |
171 | module_param (wd1_timeout, int, 0); | |
172 | MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs"); | |
173 | module_param (wd2_timeout, int, 0); | |
174 | MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs"); | |
175 | ||
176 | MODULE_AUTHOR | |
177 | ("Eric Brower <ebrower@usa.net>"); | |
178 | MODULE_DESCRIPTION | |
179 | ("Hardware watchdog driver for Sun Microsystems CP1400/1500"); | |
180 | MODULE_LICENSE("GPL"); | |
181 | MODULE_SUPPORTED_DEVICE | |
182 | ("watchdog"); | |
183 | #endif /* ifdef MODULE */ | |
184 | ||
185 | /* Forward declarations of internal methods | |
186 | */ | |
187 | #ifdef WD_DEBUG | |
188 | static void wd_dumpregs(void); | |
189 | #endif | |
190 | static irqreturn_t wd_interrupt(int irq, void *dev_id, struct pt_regs *regs); | |
191 | static void wd_toggleintr(struct wd_timer* pTimer, int enable); | |
192 | static void wd_pingtimer(struct wd_timer* pTimer); | |
193 | static void wd_starttimer(struct wd_timer* pTimer); | |
194 | static void wd_resetbrokentimer(struct wd_timer* pTimer); | |
195 | static void wd_stoptimer(struct wd_timer* pTimer); | |
196 | static void wd_brokentimer(unsigned long data); | |
197 | static int wd_getstatus(struct wd_timer* pTimer); | |
198 | ||
199 | /* PLD expects words to be written in LSB format, | |
200 | * so we must flip all words prior to writing them to regs | |
201 | */ | |
202 | static inline unsigned short flip_word(unsigned short word) | |
203 | { | |
204 | return ((word & 0xff) << 8) | ((word >> 8) & 0xff); | |
205 | } | |
206 | ||
207 | #define wd_writew(val, addr) (writew(flip_word(val), addr)) | |
208 | #define wd_readw(addr) (flip_word(readw(addr))) | |
209 | #define wd_writeb(val, addr) (writeb(val, addr)) | |
210 | #define wd_readb(addr) (readb(addr)) | |
211 | ||
212 | ||
213 | /* CP1400s seem to have broken PLD implementations-- | |
214 | * the interrupt_mask register cannot be written, so | |
215 | * no timer interrupts can be masked within the PLD. | |
216 | */ | |
217 | static inline int wd_isbroken(void) | |
218 | { | |
219 | /* we could test this by read/write/read/restore | |
220 | * on the interrupt mask register only if OBP | |
221 | * 'watchdog-enable?' == FALSE, but it seems | |
222 | * ubiquitous on CP1400s | |
223 | */ | |
224 | char val[32]; | |
225 | prom_getproperty(prom_root_node, "model", val, sizeof(val)); | |
226 | return((!strcmp(val, WD_BADMODEL)) ? 1 : 0); | |
227 | } | |
228 | ||
229 | /* Retrieve watchdog-enable? option from OBP | |
230 | * Returns 0 if false, 1 if true | |
231 | */ | |
232 | static inline int wd_opt_enable(void) | |
233 | { | |
234 | int opt_node; | |
235 | ||
236 | opt_node = prom_getchild(prom_root_node); | |
237 | opt_node = prom_searchsiblings(opt_node, "options"); | |
238 | return((-1 == prom_getint(opt_node, "watchdog-enable?")) ? 0 : 1); | |
239 | } | |
240 | ||
241 | /* Retrieve watchdog-reboot? option from OBP | |
242 | * Returns 0 if false, 1 if true | |
243 | */ | |
244 | static inline int wd_opt_reboot(void) | |
245 | { | |
246 | int opt_node; | |
247 | ||
248 | opt_node = prom_getchild(prom_root_node); | |
249 | opt_node = prom_searchsiblings(opt_node, "options"); | |
250 | return((-1 == prom_getint(opt_node, "watchdog-reboot?")) ? 0 : 1); | |
251 | } | |
252 | ||
253 | /* Retrieve watchdog-timeout option from OBP | |
254 | * Returns OBP value, or 0 if not located | |
255 | */ | |
256 | static inline int wd_opt_timeout(void) | |
257 | { | |
258 | int opt_node; | |
259 | char value[32]; | |
260 | char *p = value; | |
261 | ||
262 | opt_node = prom_getchild(prom_root_node); | |
263 | opt_node = prom_searchsiblings(opt_node, "options"); | |
264 | opt_node = prom_getproperty(opt_node, | |
265 | "watchdog-timeout", | |
266 | value, | |
267 | sizeof(value)); | |
268 | if(-1 != opt_node) { | |
269 | /* atoi implementation */ | |
270 | for(opt_node = 0; /* nop */; p++) { | |
271 | if(*p >= '0' && *p <= '9') { | |
272 | opt_node = (10*opt_node)+(*p-'0'); | |
273 | } | |
274 | else { | |
275 | break; | |
276 | } | |
277 | } | |
278 | } | |
279 | return((-1 == opt_node) ? (0) : (opt_node)); | |
280 | } | |
281 | ||
282 | static int wd_open(struct inode *inode, struct file *f) | |
283 | { | |
284 | switch(iminor(inode)) | |
285 | { | |
286 | case WD0_MINOR: | |
287 | f->private_data = &wd_dev.watchdog[WD0_ID]; | |
288 | break; | |
289 | case WD1_MINOR: | |
290 | f->private_data = &wd_dev.watchdog[WD1_ID]; | |
291 | break; | |
292 | case WD2_MINOR: | |
293 | f->private_data = &wd_dev.watchdog[WD2_ID]; | |
294 | break; | |
295 | default: | |
296 | return(-ENODEV); | |
297 | } | |
298 | ||
299 | /* Register IRQ on first open of device */ | |
300 | if(0 == wd_dev.initialized) | |
301 | { | |
302 | if (request_irq(wd_dev.irq, | |
303 | &wd_interrupt, | |
304 | SA_SHIRQ, | |
305 | WD_OBPNAME, | |
306 | (void *)wd_dev.regs)) { | |
307 | printk("%s: Cannot register IRQ %s\n", | |
308 | WD_OBPNAME, __irq_itoa(wd_dev.irq)); | |
309 | return(-EBUSY); | |
310 | } | |
311 | wd_dev.initialized = 1; | |
312 | } | |
313 | ||
314 | return(nonseekable_open(inode, f)); | |
315 | } | |
316 | ||
317 | static int wd_release(struct inode *inode, struct file *file) | |
318 | { | |
319 | return 0; | |
320 | } | |
321 | ||
322 | static int wd_ioctl(struct inode *inode, struct file *file, | |
323 | unsigned int cmd, unsigned long arg) | |
324 | { | |
325 | int setopt = 0; | |
326 | struct wd_timer* pTimer = (struct wd_timer*)file->private_data; | |
327 | void __user *argp = (void __user *)arg; | |
328 | struct watchdog_info info = { | |
329 | 0, | |
330 | 0, | |
331 | "Altera EPF8820ATC144-4" | |
332 | }; | |
333 | ||
334 | if(NULL == pTimer) { | |
335 | return(-EINVAL); | |
336 | } | |
337 | ||
338 | switch(cmd) | |
339 | { | |
340 | /* Generic Linux IOCTLs */ | |
341 | case WDIOC_GETSUPPORT: | |
342 | if(copy_to_user(argp, &info, sizeof(struct watchdog_info))) { | |
343 | return(-EFAULT); | |
344 | } | |
345 | break; | |
346 | case WDIOC_GETSTATUS: | |
347 | case WDIOC_GETBOOTSTATUS: | |
348 | if (put_user(0, (int __user *)argp)) | |
349 | return -EFAULT; | |
350 | break; | |
351 | case WDIOC_KEEPALIVE: | |
352 | wd_pingtimer(pTimer); | |
353 | break; | |
354 | case WDIOC_SETOPTIONS: | |
355 | if(copy_from_user(&setopt, argp, sizeof(unsigned int))) { | |
356 | return -EFAULT; | |
357 | } | |
358 | if(setopt & WDIOS_DISABLECARD) { | |
359 | if(wd_dev.opt_enable) { | |
360 | printk( | |
361 | "%s: cannot disable watchdog in ENABLED mode\n", | |
362 | WD_OBPNAME); | |
363 | return(-EINVAL); | |
364 | } | |
365 | wd_stoptimer(pTimer); | |
366 | } | |
367 | else if(setopt & WDIOS_ENABLECARD) { | |
368 | wd_starttimer(pTimer); | |
369 | } | |
370 | else { | |
371 | return(-EINVAL); | |
372 | } | |
373 | break; | |
374 | /* Solaris-compatible IOCTLs */ | |
375 | case WIOCGSTAT: | |
376 | setopt = wd_getstatus(pTimer); | |
377 | if(copy_to_user(argp, &setopt, sizeof(unsigned int))) { | |
378 | return(-EFAULT); | |
379 | } | |
380 | break; | |
381 | case WIOCSTART: | |
382 | wd_starttimer(pTimer); | |
383 | break; | |
384 | case WIOCSTOP: | |
385 | if(wd_dev.opt_enable) { | |
386 | printk("%s: cannot disable watchdog in ENABLED mode\n", | |
387 | WD_OBPNAME); | |
388 | return(-EINVAL); | |
389 | } | |
390 | wd_stoptimer(pTimer); | |
391 | break; | |
392 | default: | |
393 | return(-EINVAL); | |
394 | } | |
395 | return(0); | |
396 | } | |
397 | ||
b66621fe CH |
398 | static long wd_compat_ioctl(struct file *file, unsigned int cmd, |
399 | unsigned long arg) | |
400 | { | |
401 | int rval = -ENOIOCTLCMD; | |
402 | ||
403 | switch (cmd) { | |
404 | /* solaris ioctls are specific to this driver */ | |
405 | case WIOCSTART: | |
406 | case WIOCSTOP: | |
407 | case WIOCGSTAT: | |
408 | lock_kernel(); | |
409 | rval = wd_ioctl(file->f_dentry->d_inode, file, cmd, arg); | |
410 | lock_kernel(); | |
411 | break; | |
412 | /* everything else is handled by the generic compat layer */ | |
413 | default: | |
414 | break; | |
415 | } | |
416 | ||
417 | return rval; | |
418 | } | |
419 | ||
1da177e4 LT |
420 | static ssize_t wd_write(struct file *file, |
421 | const char __user *buf, | |
422 | size_t count, | |
423 | loff_t *ppos) | |
424 | { | |
425 | struct wd_timer* pTimer = (struct wd_timer*)file->private_data; | |
426 | ||
427 | if(NULL == pTimer) { | |
428 | return(-EINVAL); | |
429 | } | |
430 | ||
431 | if (count) { | |
432 | wd_pingtimer(pTimer); | |
433 | return 1; | |
434 | } | |
435 | return 0; | |
436 | } | |
437 | ||
438 | static ssize_t wd_read(struct file * file, char __user *buffer, | |
439 | size_t count, loff_t *ppos) | |
440 | { | |
441 | #ifdef WD_DEBUG | |
442 | wd_dumpregs(); | |
443 | return(0); | |
444 | #else | |
445 | return(-EINVAL); | |
446 | #endif /* ifdef WD_DEBUG */ | |
447 | } | |
448 | ||
449 | static irqreturn_t wd_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
450 | { | |
451 | /* Only WD0 will interrupt-- others are NMI and we won't | |
452 | * see them here.... | |
453 | */ | |
454 | spin_lock_irq(&wd_dev.lock); | |
455 | if((unsigned long)wd_dev.regs == (unsigned long)dev_id) | |
456 | { | |
457 | wd_stoptimer(&wd_dev.watchdog[WD0_ID]); | |
458 | wd_dev.watchdog[WD0_ID].runstatus |= WD_STAT_SVCD; | |
459 | } | |
460 | spin_unlock_irq(&wd_dev.lock); | |
461 | return IRQ_HANDLED; | |
462 | } | |
463 | ||
464 | static struct file_operations wd_fops = { | |
465 | .owner = THIS_MODULE, | |
466 | .ioctl = wd_ioctl, | |
b66621fe | 467 | .compat_ioctl = wd_compat_ioctl, |
1da177e4 LT |
468 | .open = wd_open, |
469 | .write = wd_write, | |
470 | .read = wd_read, | |
471 | .release = wd_release, | |
472 | }; | |
473 | ||
474 | static struct miscdevice wd0_miscdev = { WD0_MINOR, WD0_DEVNAME, &wd_fops }; | |
475 | static struct miscdevice wd1_miscdev = { WD1_MINOR, WD1_DEVNAME, &wd_fops }; | |
476 | static struct miscdevice wd2_miscdev = { WD2_MINOR, WD2_DEVNAME, &wd_fops }; | |
477 | ||
478 | #ifdef WD_DEBUG | |
479 | static void wd_dumpregs(void) | |
480 | { | |
481 | /* Reading from downcounters initiates watchdog countdown-- | |
482 | * Example is included below for illustration purposes. | |
483 | */ | |
484 | int i; | |
485 | printk("%s: dumping register values\n", WD_OBPNAME); | |
486 | for(i = WD0_ID; i < WD_NUMDEVS; ++i) { | |
487 | /* printk("\t%s%i: dcntr at 0x%lx: 0x%x\n", | |
488 | * WD_OBPNAME, | |
489 | * i, | |
490 | * (unsigned long)(&wd_dev.watchdog[i].regs->dcntr), | |
491 | * readw(&wd_dev.watchdog[i].regs->dcntr)); | |
492 | */ | |
493 | printk("\t%s%i: limit at 0x%lx: 0x%x\n", | |
494 | WD_OBPNAME, | |
495 | i, | |
496 | (unsigned long)(&wd_dev.watchdog[i].regs->limit), | |
497 | readw(&wd_dev.watchdog[i].regs->limit)); | |
498 | printk("\t%s%i: status at 0x%lx: 0x%x\n", | |
499 | WD_OBPNAME, | |
500 | i, | |
501 | (unsigned long)(&wd_dev.watchdog[i].regs->status), | |
502 | readb(&wd_dev.watchdog[i].regs->status)); | |
503 | printk("\t%s%i: driver status: 0x%x\n", | |
504 | WD_OBPNAME, | |
505 | i, | |
506 | wd_getstatus(&wd_dev.watchdog[i])); | |
507 | } | |
508 | printk("\tintr_mask at %p: 0x%x\n", | |
509 | wd_dev.regs + PLD_IMASK, | |
510 | readb(wd_dev.regs + PLD_IMASK)); | |
511 | printk("\tpld_status at %p: 0x%x\n", | |
512 | wd_dev.regs + PLD_STATUS, | |
513 | readb(wd_dev.regs + PLD_STATUS)); | |
514 | } | |
515 | #endif | |
516 | ||
517 | /* Enable or disable watchdog interrupts | |
518 | * Because of the CP1400 defect this should only be | |
519 | * called during initialzation or by wd_[start|stop]timer() | |
520 | * | |
521 | * pTimer - pointer to timer device, or NULL to indicate all timers | |
522 | * enable - non-zero to enable interrupts, zero to disable | |
523 | */ | |
524 | static void wd_toggleintr(struct wd_timer* pTimer, int enable) | |
525 | { | |
526 | unsigned char curregs = wd_readb(wd_dev.regs + PLD_IMASK); | |
527 | unsigned char setregs = | |
528 | (NULL == pTimer) ? | |
529 | (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) : | |
530 | (pTimer->intr_mask); | |
531 | ||
532 | (WD_INTR_ON == enable) ? | |
533 | (curregs &= ~setregs): | |
534 | (curregs |= setregs); | |
535 | ||
536 | wd_writeb(curregs, wd_dev.regs + PLD_IMASK); | |
537 | return; | |
538 | } | |
539 | ||
540 | /* Reset countdown timer with 'limit' value and continue countdown. | |
541 | * This will not start a stopped timer. | |
542 | * | |
543 | * pTimer - pointer to timer device | |
544 | */ | |
545 | static void wd_pingtimer(struct wd_timer* pTimer) | |
546 | { | |
547 | if (wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) { | |
548 | wd_readw(pTimer->regs + WD_DCNTR); | |
549 | } | |
550 | } | |
551 | ||
552 | /* Stop a running watchdog timer-- the timer actually keeps | |
553 | * running, but the interrupt is masked so that no action is | |
554 | * taken upon expiration. | |
555 | * | |
556 | * pTimer - pointer to timer device | |
557 | */ | |
558 | static void wd_stoptimer(struct wd_timer* pTimer) | |
559 | { | |
560 | if(wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) { | |
561 | wd_toggleintr(pTimer, WD_INTR_OFF); | |
562 | ||
563 | if(wd_dev.isbaddoggie) { | |
564 | pTimer->runstatus |= WD_STAT_BSTOP; | |
565 | wd_brokentimer((unsigned long)&wd_dev); | |
566 | } | |
567 | } | |
568 | } | |
569 | ||
570 | /* Start a watchdog timer with the specified limit value | |
571 | * If the watchdog is running, it will be restarted with | |
572 | * the provided limit value. | |
573 | * | |
574 | * This function will enable interrupts on the specified | |
575 | * watchdog. | |
576 | * | |
577 | * pTimer - pointer to timer device | |
578 | * limit - limit (countdown) value in 1/10th seconds | |
579 | */ | |
580 | static void wd_starttimer(struct wd_timer* pTimer) | |
581 | { | |
582 | if(wd_dev.isbaddoggie) { | |
583 | pTimer->runstatus &= ~WD_STAT_BSTOP; | |
584 | } | |
585 | pTimer->runstatus &= ~WD_STAT_SVCD; | |
586 | ||
587 | wd_writew(pTimer->timeout, pTimer->regs + WD_LIMIT); | |
588 | wd_toggleintr(pTimer, WD_INTR_ON); | |
589 | } | |
590 | ||
591 | /* Restarts timer with maximum limit value and | |
592 | * does not unset 'brokenstop' value. | |
593 | */ | |
594 | static void wd_resetbrokentimer(struct wd_timer* pTimer) | |
595 | { | |
596 | wd_toggleintr(pTimer, WD_INTR_ON); | |
597 | wd_writew(WD_BLIMIT, pTimer->regs + WD_LIMIT); | |
598 | } | |
599 | ||
600 | /* Timer device initialization helper. | |
601 | * Returns 0 on success, other on failure | |
602 | */ | |
603 | static int wd_inittimer(int whichdog) | |
604 | { | |
605 | struct miscdevice *whichmisc; | |
606 | void __iomem *whichregs; | |
607 | char whichident[8]; | |
608 | int whichmask; | |
609 | __u16 whichlimit; | |
610 | ||
611 | switch(whichdog) | |
612 | { | |
613 | case WD0_ID: | |
614 | whichmisc = &wd0_miscdev; | |
615 | strcpy(whichident, "RIC"); | |
616 | whichregs = wd_dev.regs + WD0_OFF; | |
617 | whichmask = WD0_INTR_MASK; | |
618 | whichlimit= (0 == wd0_timeout) ? | |
619 | (wd_dev.opt_timeout): | |
620 | (wd0_timeout); | |
621 | break; | |
622 | case WD1_ID: | |
623 | whichmisc = &wd1_miscdev; | |
624 | strcpy(whichident, "XIR"); | |
625 | whichregs = wd_dev.regs + WD1_OFF; | |
626 | whichmask = WD1_INTR_MASK; | |
627 | whichlimit= (0 == wd1_timeout) ? | |
628 | (wd_dev.opt_timeout): | |
629 | (wd1_timeout); | |
630 | break; | |
631 | case WD2_ID: | |
632 | whichmisc = &wd2_miscdev; | |
633 | strcpy(whichident, "POR"); | |
634 | whichregs = wd_dev.regs + WD2_OFF; | |
635 | whichmask = WD2_INTR_MASK; | |
636 | whichlimit= (0 == wd2_timeout) ? | |
637 | (wd_dev.opt_timeout): | |
638 | (wd2_timeout); | |
639 | break; | |
640 | default: | |
641 | printk("%s: %s: invalid watchdog id: %i\n", | |
642 | WD_OBPNAME, __FUNCTION__, whichdog); | |
643 | return(1); | |
644 | } | |
645 | if(0 != misc_register(whichmisc)) | |
646 | { | |
647 | return(1); | |
648 | } | |
649 | wd_dev.watchdog[whichdog].regs = whichregs; | |
650 | wd_dev.watchdog[whichdog].timeout = whichlimit; | |
651 | wd_dev.watchdog[whichdog].intr_mask = whichmask; | |
652 | wd_dev.watchdog[whichdog].runstatus &= ~WD_STAT_BSTOP; | |
653 | wd_dev.watchdog[whichdog].runstatus |= WD_STAT_INIT; | |
654 | ||
655 | printk("%s%i: %s hardware watchdog [%01i.%i sec] %s\n", | |
656 | WD_OBPNAME, | |
657 | whichdog, | |
658 | whichident, | |
659 | wd_dev.watchdog[whichdog].timeout / 10, | |
660 | wd_dev.watchdog[whichdog].timeout % 10, | |
661 | (0 != wd_dev.opt_enable) ? "in ENABLED mode" : ""); | |
662 | return(0); | |
663 | } | |
664 | ||
665 | /* Timer method called to reset stopped watchdogs-- | |
666 | * because of the PLD bug on CP1400, we cannot mask | |
667 | * interrupts within the PLD so me must continually | |
668 | * reset the timers ad infinitum. | |
669 | */ | |
670 | static void wd_brokentimer(unsigned long data) | |
671 | { | |
672 | struct wd_device* pDev = (struct wd_device*)data; | |
673 | int id, tripped = 0; | |
674 | ||
675 | /* kill a running timer instance, in case we | |
676 | * were called directly instead of by kernel timer | |
677 | */ | |
678 | if(timer_pending(&wd_timer)) { | |
679 | del_timer(&wd_timer); | |
680 | } | |
681 | ||
682 | for(id = WD0_ID; id < WD_NUMDEVS; ++id) { | |
683 | if(pDev->watchdog[id].runstatus & WD_STAT_BSTOP) { | |
684 | ++tripped; | |
685 | wd_resetbrokentimer(&pDev->watchdog[id]); | |
686 | } | |
687 | } | |
688 | ||
689 | if(tripped) { | |
690 | /* there is at least one timer brokenstopped-- reschedule */ | |
691 | init_timer(&wd_timer); | |
692 | wd_timer.expires = WD_BTIMEOUT; | |
693 | add_timer(&wd_timer); | |
694 | } | |
695 | } | |
696 | ||
697 | static int wd_getstatus(struct wd_timer* pTimer) | |
698 | { | |
699 | unsigned char stat = wd_readb(pTimer->regs + WD_STATUS); | |
700 | unsigned char intr = wd_readb(wd_dev.regs + PLD_IMASK); | |
701 | unsigned char ret = WD_STOPPED; | |
702 | ||
703 | /* determine STOPPED */ | |
704 | if(0 == stat ) { | |
705 | return(ret); | |
706 | } | |
707 | /* determine EXPIRED vs FREERUN vs RUNNING */ | |
708 | else if(WD_S_EXPIRED & stat) { | |
709 | ret = WD_EXPIRED; | |
710 | } | |
711 | else if(WD_S_RUNNING & stat) { | |
712 | if(intr & pTimer->intr_mask) { | |
713 | ret = WD_FREERUN; | |
714 | } | |
715 | else { | |
716 | /* Fudge WD_EXPIRED status for defective CP1400-- | |
717 | * IF timer is running | |
718 | * AND brokenstop is set | |
719 | * AND an interrupt has been serviced | |
720 | * we are WD_EXPIRED. | |
721 | * | |
722 | * IF timer is running | |
723 | * AND brokenstop is set | |
724 | * AND no interrupt has been serviced | |
725 | * we are WD_FREERUN. | |
726 | */ | |
727 | if(wd_dev.isbaddoggie && (pTimer->runstatus & WD_STAT_BSTOP)) { | |
728 | if(pTimer->runstatus & WD_STAT_SVCD) { | |
729 | ret = WD_EXPIRED; | |
730 | } | |
731 | else { | |
732 | /* we could as well pretend we are expired */ | |
733 | ret = WD_FREERUN; | |
734 | } | |
735 | } | |
736 | else { | |
737 | ret = WD_RUNNING; | |
738 | } | |
739 | } | |
740 | } | |
741 | ||
742 | /* determine SERVICED */ | |
743 | if(pTimer->runstatus & WD_STAT_SVCD) { | |
744 | ret |= WD_SERVICED; | |
745 | } | |
746 | ||
747 | return(ret); | |
748 | } | |
749 | ||
750 | static int __init wd_init(void) | |
751 | { | |
752 | int id; | |
753 | struct linux_ebus *ebus = NULL; | |
754 | struct linux_ebus_device *edev = NULL; | |
755 | ||
756 | for_each_ebus(ebus) { | |
757 | for_each_ebusdev(edev, ebus) { | |
758 | if (!strcmp(edev->prom_name, WD_OBPNAME)) | |
759 | goto ebus_done; | |
760 | } | |
761 | } | |
762 | ||
763 | ebus_done: | |
764 | if(!edev) { | |
765 | printk("%s: unable to locate device\n", WD_OBPNAME); | |
766 | return -ENODEV; | |
767 | } | |
768 | ||
769 | wd_dev.regs = | |
770 | ioremap(edev->resource[0].start, 4 * WD_TIMER_REGSZ); /* ? */ | |
771 | ||
772 | if(NULL == wd_dev.regs) { | |
773 | printk("%s: unable to map registers\n", WD_OBPNAME); | |
774 | return(-ENODEV); | |
775 | } | |
776 | ||
777 | /* initialize device structure from OBP parameters */ | |
778 | wd_dev.irq = edev->irqs[0]; | |
779 | wd_dev.opt_enable = wd_opt_enable(); | |
780 | wd_dev.opt_reboot = wd_opt_reboot(); | |
781 | wd_dev.opt_timeout = wd_opt_timeout(); | |
782 | wd_dev.isbaddoggie = wd_isbroken(); | |
783 | ||
784 | /* disable all interrupts unless watchdog-enabled? == true */ | |
785 | if(! wd_dev.opt_enable) { | |
786 | wd_toggleintr(NULL, WD_INTR_OFF); | |
787 | } | |
788 | ||
789 | /* register miscellaneous devices */ | |
790 | for(id = WD0_ID; id < WD_NUMDEVS; ++id) { | |
791 | if(0 != wd_inittimer(id)) { | |
792 | printk("%s%i: unable to initialize\n", WD_OBPNAME, id); | |
793 | } | |
794 | } | |
795 | ||
796 | /* warn about possible defective PLD */ | |
797 | if(wd_dev.isbaddoggie) { | |
798 | init_timer(&wd_timer); | |
799 | wd_timer.function = wd_brokentimer; | |
800 | wd_timer.data = (unsigned long)&wd_dev; | |
801 | wd_timer.expires = WD_BTIMEOUT; | |
802 | ||
803 | printk("%s: PLD defect workaround enabled for model %s\n", | |
804 | WD_OBPNAME, WD_BADMODEL); | |
805 | } | |
806 | return(0); | |
807 | } | |
808 | ||
809 | static void __exit wd_cleanup(void) | |
810 | { | |
811 | int id; | |
812 | ||
813 | /* if 'watchdog-enable?' == TRUE, timers are not stopped | |
814 | * when module is unloaded. All brokenstopped timers will | |
815 | * also now eventually trip. | |
816 | */ | |
817 | for(id = WD0_ID; id < WD_NUMDEVS; ++id) { | |
818 | if(WD_S_RUNNING == wd_readb(wd_dev.watchdog[id].regs + WD_STATUS)) { | |
819 | if(wd_dev.opt_enable) { | |
820 | printk(KERN_WARNING "%s%i: timer not stopped at release\n", | |
821 | WD_OBPNAME, id); | |
822 | } | |
823 | else { | |
824 | wd_stoptimer(&wd_dev.watchdog[id]); | |
825 | if(wd_dev.watchdog[id].runstatus & WD_STAT_BSTOP) { | |
826 | wd_resetbrokentimer(&wd_dev.watchdog[id]); | |
827 | printk(KERN_WARNING | |
828 | "%s%i: defect workaround disabled at release, "\ | |
829 | "timer expires in ~%01i sec\n", | |
830 | WD_OBPNAME, id, | |
831 | wd_readw(wd_dev.watchdog[id].regs + WD_LIMIT) / 10); | |
832 | } | |
833 | } | |
834 | } | |
835 | } | |
836 | ||
837 | if(wd_dev.isbaddoggie && timer_pending(&wd_timer)) { | |
838 | del_timer(&wd_timer); | |
839 | } | |
840 | if(0 != (wd_dev.watchdog[WD0_ID].runstatus & WD_STAT_INIT)) { | |
841 | misc_deregister(&wd0_miscdev); | |
842 | } | |
843 | if(0 != (wd_dev.watchdog[WD1_ID].runstatus & WD_STAT_INIT)) { | |
844 | misc_deregister(&wd1_miscdev); | |
845 | } | |
846 | if(0 != (wd_dev.watchdog[WD2_ID].runstatus & WD_STAT_INIT)) { | |
847 | misc_deregister(&wd2_miscdev); | |
848 | } | |
849 | if(0 != wd_dev.initialized) { | |
850 | free_irq(wd_dev.irq, (void *)wd_dev.regs); | |
851 | } | |
852 | iounmap(wd_dev.regs); | |
853 | } | |
854 | ||
855 | module_init(wd_init); | |
856 | module_exit(wd_cleanup); |