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[PATCH] libata: add dev->ap
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
83206a29
TH		 68static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
acf356b1 70static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
95de719a
AL		 79int atapi_dmadir = 0;
80module_param(atapi_dmadir, int, 0444);
81MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
1ad8e7f9 415void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
0b8efb0a 416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
a2a7a662 958 complete(waiting);
a2a7a662
TH		 959}
960
961/**
962 * ata_exec_internal - execute libata internal command
963 * @ap: Port to which the command is sent
964 * @dev: Device to which the command is sent
965 * @tf: Taskfile registers for the command and the result
d69cf37d 966 * @cdb: CDB for packet command
a2a7a662
TH		 967 * @dma_dir: Data tranfer direction of the command
968 * @buf: Data buffer of the command
969 * @buflen: Length of data buffer
970 *
971 * Executes libata internal command with timeout. @tf contains
972 * command on entry and result on return. Timeout and error
973 * conditions are reported via return value. No recovery action
974 * is taken after a command times out. It's caller's duty to
975 * clean up after timeout.
976 *
977 * LOCKING:
978 * None. Should be called with kernel context, might sleep.
979 */
980
1ad8e7f9
TH		 981unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
982 struct ata_taskfile *tf, const u8 *cdb,
983 int dma_dir, void *buf, unsigned int buflen)
a2a7a662
TH		 984{
985 u8 command = tf->command;
986 struct ata_queued_cmd *qc;
987 DECLARE_COMPLETION(wait);
988 unsigned long flags;
77853bf2 989 unsigned int err_mask;
a2a7a662
TH		 990
991 spin_lock_irqsave(&ap->host_set->lock, flags);
992
993 qc = ata_qc_new_init(ap, dev);
994 BUG_ON(qc == NULL);
995
996 qc->tf = *tf;
d69cf37d
TH		 997 if (cdb)
998 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 999 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH		 1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
77853bf2 1006 qc->private_data = &wait;
a2a7a662
TH		 1007 qc->complete_fn = ata_qc_complete_internal;
1008
8e0e694a 1009 ata_qc_issue(qc);
a2a7a662
TH		 1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1014 ata_port_flush_task(ap);
1015
a2a7a662
TH		 1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
77853bf2 1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1025 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
15869303
TH		 1034 /* finish up */
1035 spin_lock_irqsave(&ap->host_set->lock, flags);
1036
e61e0672 1037 *tf = qc->result_tf;
77853bf2
TH		 1038 err_mask = qc->err_mask;
1039
1040 ata_qc_free(qc);
1041
1f7dd3e9
TH		 1042 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1043 * Until those drivers are fixed, we detect the condition
1044 * here, fail the command with AC_ERR_SYSTEM and reenable the
1045 * port.
1046 *
1047 * Note that this doesn't change any behavior as internal
1048 * command failure results in disabling the device in the
1049 * higher layer for LLDDs without new reset/EH callbacks.
1050 *
1051 * Kill the following code as soon as those drivers are fixed.
1052 */
198e0fed 1053 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1054 err_mask |= AC_ERR_SYSTEM;
1055 ata_port_probe(ap);
1056 }
1057
15869303
TH		 1058 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1059
77853bf2 1060 return err_mask;
a2a7a662
TH		 1061}
1062
1bc4ccff
AC		 1063/**
1064 * ata_pio_need_iordy - check if iordy needed
1065 * @adev: ATA device
1066 *
1067 * Check if the current speed of the device requires IORDY. Used
1068 * by various controllers for chip configuration.
1069 */
1070
1071unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1072{
1073 int pio;
1074 int speed = adev->pio_mode - XFER_PIO_0;
1075
1076 if (speed < 2)
1077 return 0;
1078 if (speed > 2)
1079 return 1;
2e9edbf8 1080
1bc4ccff
AC		 1081 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1082
1083 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1084 pio = adev->id[ATA_ID_EIDE_PIO];
1085 /* Is the speed faster than the drive allows non IORDY ? */
1086 if (pio) {
1087 /* This is cycle times not frequency - watch the logic! */
1088 if (pio > 240) /* PIO2 is 240nS per cycle */
1089 return 1;
1090 return 0;
1091 }
1092 }
1093 return 0;
1094}
1095
1da177e4 1096/**
49016aca
TH		 1097 * ata_dev_read_id - Read ID data from the specified device
1098 * @ap: port on which target device resides
1099 * @dev: target device
1100 * @p_class: pointer to class of the target device (may be changed)
1101 * @post_reset: is this read ID post-reset?
fe635c7e 1102 * @id: buffer to read IDENTIFY data into
1da177e4 1103 *
49016aca
TH		 1104 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1105 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1106 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1107 * for pre-ATA4 drives.
1da177e4
LT		 1108 *
1109 * LOCKING:
49016aca
TH		 1110 * Kernel thread context (may sleep)
1111 *
1112 * RETURNS:
1113 * 0 on success, -errno otherwise.
1da177e4 1114 */
49016aca 1115static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
fe635c7e 1116 unsigned int *p_class, int post_reset, u16 *id)
1da177e4 1117{
49016aca 1118 unsigned int class = *p_class;
a0123703 1119 struct ata_taskfile tf;
49016aca
TH		 1120 unsigned int err_mask = 0;
1121 const char *reason;
1122 int rc;
1da177e4 1123
49016aca 1124 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1125
49016aca 1126 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1127
49016aca
TH		 1128 retry:
1129 ata_tf_init(ap, &tf, dev->devno);
a0123703 1130
49016aca
TH		 1131 switch (class) {
1132 case ATA_DEV_ATA:
a0123703 1133 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1134 break;
1135 case ATA_DEV_ATAPI:
a0123703 1136 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1137 break;
1138 default:
1139 rc = -ENODEV;
1140 reason = "unsupported class";
1141 goto err_out;
1da177e4
LT		 1142 }
1143
a0123703 1144 tf.protocol = ATA_PROT_PIO;
1da177e4 1145
d69cf37d 1146 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1147 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1148 if (err_mask) {
49016aca
TH		 1149 rc = -EIO;
1150 reason = "I/O error";
1da177e4
LT		 1151 goto err_out;
1152 }
1153
49016aca 1154 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1155
49016aca 1156 /* sanity check */
692785e7 1157 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1158 rc = -EINVAL;
1159 reason = "device reports illegal type";
1160 goto err_out;
1161 }
1162
1163 if (post_reset && class == ATA_DEV_ATA) {
1164 /*
1165 * The exact sequence expected by certain pre-ATA4 drives is:
1166 * SRST RESET
1167 * IDENTIFY
1168 * INITIALIZE DEVICE PARAMETERS
1169 * anything else..
1170 * Some drives were very specific about that exact sequence.
1171 */
1172 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1173 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1174 if (err_mask) {
1175 rc = -EIO;
1176 reason = "INIT_DEV_PARAMS failed";
1177 goto err_out;
1178 }
1179
1180 /* current CHS translation info (id[53-58]) might be
1181 * changed. reread the identify device info.
1182 */
1183 post_reset = 0;
1184 goto retry;
1185 }
1186 }
1187
1188 *p_class = class;
fe635c7e 1189
49016aca
TH		 1190 return 0;
1191
1192 err_out:
1193 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1194 ap->id, dev->devno, reason);
49016aca
TH		 1195 return rc;
1196}
1197
4b2f3ede
TH		 1198static inline u8 ata_dev_knobble(const struct ata_port *ap,
1199 struct ata_device *dev)
1200{
1201 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1202}
1203
49016aca 1204/**
ffeae418
TH		 1205 * ata_dev_configure - Configure the specified ATA/ATAPI device
1206 * @ap: Port on which target device resides
1207 * @dev: Target device to configure
4c2d721a 1208 * @print_info: Enable device info printout
ffeae418
TH		 1209 *
1210 * Configure @dev according to @dev->id. Generic and low-level
1211 * driver specific fixups are also applied.
49016aca
TH		 1212 *
1213 * LOCKING:
ffeae418
TH		 1214 * Kernel thread context (may sleep)
1215 *
1216 * RETURNS:
1217 * 0 on success, -errno otherwise
49016aca 1218 */
4c2d721a
TH		 1219static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1220 int print_info)
49016aca 1221{
1148c3a7 1222 const u16 *id = dev->id;
ff8854b2 1223 unsigned int xfer_mask;
49016aca
TH		 1224 int i, rc;
1225
e1211e3f 1226 if (!ata_dev_enabled(dev)) {
49016aca 1227 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1228 ap->id, dev->devno);
1229 return 0;
49016aca
TH		 1230 }
1231
ffeae418 1232 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1233
c39f5ebe
TH		 1234 /* print device capabilities */
1235 if (print_info)
1236 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1237 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1238 ap->id, dev->devno, id[49], id[82], id[83],
1239 id[84], id[85], id[86], id[87], id[88]);
1240
208a9933 1241 /* initialize to-be-configured parameters */
ea1dd4e1 1242 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1243 dev->max_sectors = 0;
1244 dev->cdb_len = 0;
1245 dev->n_sectors = 0;
1246 dev->cylinders = 0;
1247 dev->heads = 0;
1248 dev->sectors = 0;
1249
1da177e4
LT		 1250 /*
1251 * common ATA, ATAPI feature tests
1252 */
1253
ff8854b2 1254 /* find max transfer mode; for printk only */
1148c3a7 1255 xfer_mask = ata_id_xfermask(id);
1da177e4 1256
1148c3a7 1257 ata_dump_id(id);
1da177e4
LT		 1258
1259 /* ATA-specific feature tests */
1260 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1261 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1262
1148c3a7 1263 if (ata_id_has_lba(id)) {
4c2d721a 1264 const char *lba_desc;
8bf62ece 1265
4c2d721a
TH		 1266 lba_desc = "LBA";
1267 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1268 if (ata_id_has_lba48(id)) {
8bf62ece 1269 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1270 lba_desc = "LBA48";
1271 }
8bf62ece
AL		 1272
1273 /* print device info to dmesg */
4c2d721a
TH		 1274 if (print_info)
1275 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1276 "max %s, %Lu sectors: %s\n",
1277 ap->id, dev->devno,
1148c3a7 1278 ata_id_major_version(id),
ff8854b2 1279 ata_mode_string(xfer_mask),
4c2d721a
TH		 1280 (unsigned long long)dev->n_sectors,
1281 lba_desc);
ffeae418 1282 } else {
8bf62ece
AL		 1283 /* CHS */
1284
1285 /* Default translation */
1148c3a7
TH		 1286 dev->cylinders = id[1];
1287 dev->heads = id[3];
1288 dev->sectors = id[6];
8bf62ece 1289
1148c3a7 1290 if (ata_id_current_chs_valid(id)) {
8bf62ece 1291 /* Current CHS translation is valid. */
1148c3a7
TH		 1292 dev->cylinders = id[54];
1293 dev->heads = id[55];
1294 dev->sectors = id[56];
8bf62ece
AL		 1295 }
1296
1297 /* print device info to dmesg */
4c2d721a
TH		 1298 if (print_info)
1299 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1300 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1301 ap->id, dev->devno,
1148c3a7 1302 ata_id_major_version(id),
ff8854b2 1303 ata_mode_string(xfer_mask),
4c2d721a
TH		 1304 (unsigned long long)dev->n_sectors,
1305 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1306 }
1307
6e7846e9 1308 dev->cdb_len = 16;
1da177e4
LT		 1309 }
1310
1311 /* ATAPI-specific feature tests */
2c13b7ce 1312 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1313 rc = atapi_cdb_len(id);
1da177e4
LT		 1314 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1315 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1316 rc = -EINVAL;
1da177e4
LT		 1317 goto err_out_nosup;
1318 }
6e7846e9 1319 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1320
1321 /* print device info to dmesg */
4c2d721a
TH		 1322 if (print_info)
1323 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1324 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1325 }
1326
6e7846e9
TH		 1327 ap->host->max_cmd_len = 0;
1328 for (i = 0; i < ATA_MAX_DEVICES; i++)
1329 ap->host->max_cmd_len = max_t(unsigned int,
1330 ap->host->max_cmd_len,
1331 ap->device[i].cdb_len);
1332
4b2f3ede
TH		 1333 /* limit bridge transfers to udma5, 200 sectors */
1334 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1335 if (print_info)
1336 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1337 ap->id, dev->devno);
5a529139 1338 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1339 dev->max_sectors = ATA_MAX_SECTORS;
1340 }
1341
1342 if (ap->ops->dev_config)
1343 ap->ops->dev_config(ap, dev);
1344
1da177e4 1345 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1346 return 0;
1da177e4
LT		 1347
1348err_out_nosup:
1da177e4 1349 DPRINTK("EXIT, err\n");
ffeae418 1350 return rc;
1da177e4
LT		 1351}
1352
1353/**
1354 * ata_bus_probe - Reset and probe ATA bus
1355 * @ap: Bus to probe
1356 *
0cba632b
JG		 1357 * Master ATA bus probing function. Initiates a hardware-dependent
1358 * bus reset, then attempts to identify any devices found on
1359 * the bus.
1360 *
1da177e4 1361 * LOCKING:
0cba632b 1362 * PCI/etc. bus probe sem.
1da177e4
LT		 1363 *
1364 * RETURNS:
96072e69 1365 * Zero on success, negative errno otherwise.
1da177e4
LT		 1366 */
1367
1368static int ata_bus_probe(struct ata_port *ap)
1369{
28ca5c57 1370 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1371 int tries[ATA_MAX_DEVICES];
1372 int i, rc, down_xfermask;
e82cbdb9 1373 struct ata_device *dev;
1da177e4 1374
28ca5c57 1375 ata_port_probe(ap);
c19ba8af 1376
14d2bac1
TH		 1377 for (i = 0; i < ATA_MAX_DEVICES; i++)
1378 tries[i] = ATA_PROBE_MAX_TRIES;
1379
1380 retry:
1381 down_xfermask = 0;
1382
2044470c
TH		 1383 /* reset and determine device classes */
1384 for (i = 0; i < ATA_MAX_DEVICES; i++)
1385 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1386
2044470c 1387 if (ap->ops->probe_reset) {
c19ba8af 1388 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1389 if (rc) {
1390 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1391 return rc;
c19ba8af 1392 }
28ca5c57 1393 } else {
c19ba8af
TH		 1394 ap->ops->phy_reset(ap);
1395
f8c2c420
TH		 1396 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1397 if (!(ap->flags & ATA_FLAG_DISABLED))
28ca5c57 1398 classes[i] = ap->device[i].class;
f8c2c420
TH		 1399 ap->device[i].class = ATA_DEV_UNKNOWN;
1400 }
2044470c 1401
28ca5c57
TH		 1402 ata_port_probe(ap);
1403 }
1da177e4 1404
2044470c
TH		 1405 for (i = 0; i < ATA_MAX_DEVICES; i++)
1406 if (classes[i] == ATA_DEV_UNKNOWN)
1407 classes[i] = ATA_DEV_NONE;
1408
28ca5c57 1409 /* read IDENTIFY page and configure devices */
1da177e4 1410 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1411 dev = &ap->device[i];
28ca5c57 1412
ec573755
TH		 1413 if (tries[i])
1414 dev->class = classes[i];
ffeae418 1415
14d2bac1 1416 if (!ata_dev_enabled(dev))
ffeae418 1417 continue;
ffeae418 1418
fe635c7e 1419 rc = ata_dev_read_id(ap, dev, &dev->class, 1, dev->id);
14d2bac1
TH		 1420 if (rc)
1421 goto fail;
1422
1423 rc = ata_dev_configure(ap, dev, 1);
1424 if (rc)
1425 goto fail;
1da177e4
LT		 1426 }
1427
e82cbdb9 1428 /* configure transfer mode */
3adcebb2 1429 rc = ata_set_mode(ap, &dev);
51713d35
TH		 1430 if (rc) {
1431 down_xfermask = 1;
1432 goto fail;
e82cbdb9 1433 }
1da177e4 1434
e82cbdb9
TH		 1435 for (i = 0; i < ATA_MAX_DEVICES; i++)
1436 if (ata_dev_enabled(&ap->device[i]))
1437 return 0;
1da177e4 1438
e82cbdb9
TH		 1439 /* no device present, disable port */
1440 ata_port_disable(ap);
1da177e4 1441 ap->ops->port_disable(ap);
96072e69 1442 return -ENODEV;
14d2bac1
TH		 1443
1444 fail:
1445 switch (rc) {
1446 case -EINVAL:
1447 case -ENODEV:
1448 tries[dev->devno] = 0;
1449 break;
1450 case -EIO:
3c567b7d 1451 sata_down_spd_limit(ap);
14d2bac1
TH		 1452 /* fall through */
1453 default:
1454 tries[dev->devno]--;
1455 if (down_xfermask &&
1456 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1457 tries[dev->devno] = 0;
1458 }
1459
ec573755
TH		 1460 if (!tries[dev->devno]) {
1461 ata_down_xfermask_limit(ap, dev, 1);
1462 ata_dev_disable(ap, dev);
1463 }
1464
14d2bac1 1465 goto retry;
1da177e4
LT		 1466}
1467
1468/**
0cba632b
JG		 1469 * ata_port_probe - Mark port as enabled
1470 * @ap: Port for which we indicate enablement
1da177e4 1471 *
0cba632b
JG		 1472 * Modify @ap data structure such that the system
1473 * thinks that the entire port is enabled.
1474 *
1475 * LOCKING: host_set lock, or some other form of
1476 * serialization.
1da177e4
LT		 1477 */
1478
1479void ata_port_probe(struct ata_port *ap)
1480{
198e0fed 1481 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1482}
1483
3be680b7
TH		 1484/**
1485 * sata_print_link_status - Print SATA link status
1486 * @ap: SATA port to printk link status about
1487 *
1488 * This function prints link speed and status of a SATA link.
1489 *
1490 * LOCKING:
1491 * None.
1492 */
1493static void sata_print_link_status(struct ata_port *ap)
1494{
6d5f9732 1495 u32 sstatus, scontrol, tmp;
3be680b7 1496
81952c54 1497 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
3be680b7 1498 return;
81952c54 1499 sata_scr_read(ap, SCR_CONTROL, &scontrol);
3be680b7 1500
81952c54 1501 if (ata_port_online(ap)) {
3be680b7 1502 tmp = (sstatus >> 4) & 0xf;
6d5f9732
TH		 1503 printk(KERN_INFO
1504 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1505 ap->id, sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1506 } else {
6d5f9732
TH		 1507 printk(KERN_INFO
1508 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1509 ap->id, sstatus, scontrol);
3be680b7
TH		 1510 }
1511}
1512
1da177e4 1513/**
780a87f7
JG		 1514 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1515 * @ap: SATA port associated with target SATA PHY.
1da177e4 1516 *
780a87f7
JG		 1517 * This function issues commands to standard SATA Sxxx
1518 * PHY registers, to wake up the phy (and device), and
1519 * clear any reset condition.
1da177e4
LT		 1520 *
1521 * LOCKING:
0cba632b 1522 * PCI/etc. bus probe sem.
1da177e4
LT		 1523 *
1524 */
1525void __sata_phy_reset(struct ata_port *ap)
1526{
1527 u32 sstatus;
1528 unsigned long timeout = jiffies + (HZ * 5);
1529
1530 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e 1531 /* issue phy wake/reset */
81952c54 1532 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1533 /* Couldn't find anything in SATA I/II specs, but
1534 * AHCI-1.1 10.4.2 says at least 1 ms. */
1535 mdelay(1);
1da177e4 1536 }
81952c54
TH		 1537 /* phy wake/clear reset */
1538 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1da177e4
LT		 1539
1540 /* wait for phy to become ready, if necessary */
1541 do {
1542 msleep(200);
81952c54 1543 sata_scr_read(ap, SCR_STATUS, &sstatus);
1da177e4
LT		 1544 if ((sstatus & 0xf) != 1)
1545 break;
1546 } while (time_before(jiffies, timeout));
1547
3be680b7
TH		 1548 /* print link status */
1549 sata_print_link_status(ap);
656563e3 1550
3be680b7 1551 /* TODO: phy layer with polling, timeouts, etc. */
81952c54 1552 if (!ata_port_offline(ap))
1da177e4 1553 ata_port_probe(ap);
3be680b7 1554 else
1da177e4 1555 ata_port_disable(ap);
1da177e4 1556
198e0fed 1557 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1558 return;
1559
1560 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1561 ata_port_disable(ap);
1562 return;
1563 }
1564
1565 ap->cbl = ATA_CBL_SATA;
1566}
1567
1568/**
780a87f7
JG		 1569 * sata_phy_reset - Reset SATA bus.
1570 * @ap: SATA port associated with target SATA PHY.
1da177e4 1571 *
780a87f7
JG		 1572 * This function resets the SATA bus, and then probes
1573 * the bus for devices.
1da177e4
LT		 1574 *
1575 * LOCKING:
0cba632b 1576 * PCI/etc. bus probe sem.
1da177e4
LT		 1577 *
1578 */
1579void sata_phy_reset(struct ata_port *ap)
1580{
1581 __sata_phy_reset(ap);
198e0fed 1582 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1583 return;
1584 ata_bus_reset(ap);
1585}
1586
ebdfca6e
AC		 1587/**
1588 * ata_dev_pair - return other device on cable
1589 * @ap: port
1590 * @adev: device
1591 *
1592 * Obtain the other device on the same cable, or if none is
1593 * present NULL is returned
1594 */
2e9edbf8 1595
ebdfca6e
AC		 1596struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1597{
1598 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1599 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1600 return NULL;
1601 return pair;
1602}
1603
1da177e4 1604/**
780a87f7
JG		 1605 * ata_port_disable - Disable port.
1606 * @ap: Port to be disabled.
1da177e4 1607 *
780a87f7
JG		 1608 * Modify @ap data structure such that the system
1609 * thinks that the entire port is disabled, and should
1610 * never attempt to probe or communicate with devices
1611 * on this port.
1612 *
1613 * LOCKING: host_set lock, or some other form of
1614 * serialization.
1da177e4
LT		 1615 */
1616
1617void ata_port_disable(struct ata_port *ap)
1618{
1619 ap->device[0].class = ATA_DEV_NONE;
1620 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1621 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1622}
1623
1c3fae4d 1624/**
3c567b7d 1625 * sata_down_spd_limit - adjust SATA spd limit downward
1c3fae4d
TH		 1626 * @ap: Port to adjust SATA spd limit for
1627 *
1628 * Adjust SATA spd limit of @ap downward. Note that this
1629 * function only adjusts the limit. The change must be applied
3c567b7d 1630 * using sata_set_spd().
1c3fae4d
TH		 1631 *
1632 * LOCKING:
1633 * Inherited from caller.
1634 *
1635 * RETURNS:
1636 * 0 on success, negative errno on failure
1637 */
3c567b7d 1638int sata_down_spd_limit(struct ata_port *ap)
1c3fae4d 1639{
81952c54
TH		 1640 u32 sstatus, spd, mask;
1641 int rc, highbit;
1c3fae4d 1642
81952c54
TH		 1643 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1644 if (rc)
1645 return rc;
1c3fae4d
TH		 1646
1647 mask = ap->sata_spd_limit;
1648 if (mask <= 1)
1649 return -EINVAL;
1650 highbit = fls(mask) - 1;
1651 mask &= ~(1 << highbit);
1652
81952c54 1653 spd = (sstatus >> 4) & 0xf;
1c3fae4d
TH		 1654 if (spd <= 1)
1655 return -EINVAL;
1656 spd--;
1657 mask &= (1 << spd) - 1;
1658 if (!mask)
1659 return -EINVAL;
1660
1661 ap->sata_spd_limit = mask;
1662
1663 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1664 ap->id, sata_spd_string(fls(mask)));
1665
1666 return 0;
1667}
1668
3c567b7d 1669static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1c3fae4d
TH		 1670{
1671 u32 spd, limit;
1672
1673 if (ap->sata_spd_limit == UINT_MAX)
1674 limit = 0;
1675 else
1676 limit = fls(ap->sata_spd_limit);
1677
1678 spd = (*scontrol >> 4) & 0xf;
1679 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1680
1681 return spd != limit;
1682}
1683
1684/**
3c567b7d 1685 * sata_set_spd_needed - is SATA spd configuration needed
1c3fae4d
TH		 1686 * @ap: Port in question
1687 *
1688 * Test whether the spd limit in SControl matches
1689 * @ap->sata_spd_limit. This function is used to determine
1690 * whether hardreset is necessary to apply SATA spd
1691 * configuration.
1692 *
1693 * LOCKING:
1694 * Inherited from caller.
1695 *
1696 * RETURNS:
1697 * 1 if SATA spd configuration is needed, 0 otherwise.
1698 */
3c567b7d 1699int sata_set_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1700{
1701 u32 scontrol;
1702
81952c54 1703 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1c3fae4d
TH		 1704 return 0;
1705
3c567b7d 1706 return __sata_set_spd_needed(ap, &scontrol);
1c3fae4d
TH		 1707}
1708
1709/**
3c567b7d 1710 * sata_set_spd - set SATA spd according to spd limit
1c3fae4d
TH		 1711 * @ap: Port to set SATA spd for
1712 *
1713 * Set SATA spd of @ap according to sata_spd_limit.
1714 *
1715 * LOCKING:
1716 * Inherited from caller.
1717 *
1718 * RETURNS:
1719 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 1720 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 1721 */
3c567b7d 1722int sata_set_spd(struct ata_port *ap)
1c3fae4d
TH		 1723{
1724 u32 scontrol;
81952c54 1725 int rc;
1c3fae4d 1726
81952c54
TH		 1727 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1728 return rc;
1c3fae4d 1729
3c567b7d 1730 if (!__sata_set_spd_needed(ap, &scontrol))
1c3fae4d
TH		 1731 return 0;
1732
81952c54
TH		 1733 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1734 return rc;
1735
1c3fae4d
TH		 1736 return 1;
1737}
1738
452503f9
AC		 1739/*
1740 * This mode timing computation functionality is ported over from
1741 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1742 */
1743/*
1744 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1745 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1746 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1747 * is currently supported only by Maxtor drives.
452503f9
AC		 1748 */
1749
1750static const struct ata_timing ata_timing[] = {
1751
1752 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1753 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1754 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1755 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1756
1757 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1758 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1759 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1760
1761/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1762
452503f9
AC		 1763 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1764 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1765 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1766
452503f9
AC		 1767 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1768 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1769 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1770
1771/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1772 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1773 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1774
1775 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1776 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1777 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1778
1779/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1780
1781 { 0xFF }
1782};
1783
1784#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1785#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1786
1787static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1788{
1789 q->setup = EZ(t->setup * 1000, T);
1790 q->act8b = EZ(t->act8b * 1000, T);
1791 q->rec8b = EZ(t->rec8b * 1000, T);
1792 q->cyc8b = EZ(t->cyc8b * 1000, T);
1793 q->active = EZ(t->active * 1000, T);
1794 q->recover = EZ(t->recover * 1000, T);
1795 q->cycle = EZ(t->cycle * 1000, T);
1796 q->udma = EZ(t->udma * 1000, UT);
1797}
1798
1799void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1800 struct ata_timing *m, unsigned int what)
1801{
1802 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1803 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1804 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1805 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1806 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1807 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1808 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1809 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1810}
1811
1812static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1813{
1814 const struct ata_timing *t;
1815
1816 for (t = ata_timing; t->mode != speed; t++)
91190758 1817 if (t->mode == 0xFF)
452503f9 1818 return NULL;
2e9edbf8 1819 return t;
452503f9
AC		 1820}
1821
1822int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1823 struct ata_timing *t, int T, int UT)
1824{
1825 const struct ata_timing *s;
1826 struct ata_timing p;
1827
1828 /*
2e9edbf8 1829 * Find the mode.
75b1f2f8 1830 */
452503f9
AC		 1831
1832 if (!(s = ata_timing_find_mode(speed)))
1833 return -EINVAL;
1834
75b1f2f8
AL		 1835 memcpy(t, s, sizeof(*s));
1836
452503f9
AC		 1837 /*
1838 * If the drive is an EIDE drive, it can tell us it needs extended
1839 * PIO/MW_DMA cycle timing.
1840 */
1841
1842 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1843 memset(&p, 0, sizeof(p));
1844 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1845 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1846 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1847 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1848 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1849 }
1850 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1851 }
1852
1853 /*
1854 * Convert the timing to bus clock counts.
1855 */
1856
75b1f2f8 1857 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1858
1859 /*
c893a3ae
RD		 1860 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1861 * S.M.A.R.T * and some other commands. We have to ensure that the
1862 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1863 */
1864
1865 if (speed > XFER_PIO_4) {
1866 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1867 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1868 }
1869
1870 /*
c893a3ae 1871 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1872 */
1873
1874 if (t->act8b + t->rec8b < t->cyc8b) {
1875 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1876 t->rec8b = t->cyc8b - t->act8b;
1877 }
1878
1879 if (t->active + t->recover < t->cycle) {
1880 t->active += (t->cycle - (t->active + t->recover)) / 2;
1881 t->recover = t->cycle - t->active;
1882 }
1883
1884 return 0;
1885}
1886
cf176e1a
TH		 1887/**
1888 * ata_down_xfermask_limit - adjust dev xfer masks downward
1889 * @ap: Port associated with device @dev
1890 * @dev: Device to adjust xfer masks
1891 * @force_pio0: Force PIO0
1892 *
1893 * Adjust xfer masks of @dev downward. Note that this function
1894 * does not apply the change. Invoking ata_set_mode() afterwards
1895 * will apply the limit.
1896 *
1897 * LOCKING:
1898 * Inherited from caller.
1899 *
1900 * RETURNS:
1901 * 0 on success, negative errno on failure
1902 */
1ad8e7f9
TH		 1903int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1904 int force_pio0)
cf176e1a
TH		 1905{
1906 unsigned long xfer_mask;
1907 int highbit;
1908
1909 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1910 dev->udma_mask);
1911
1912 if (!xfer_mask)
1913 goto fail;
1914 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1915 if (xfer_mask & ATA_MASK_UDMA)
1916 xfer_mask &= ~ATA_MASK_MWDMA;
1917
1918 highbit = fls(xfer_mask) - 1;
1919 xfer_mask &= ~(1 << highbit);
1920 if (force_pio0)
1921 xfer_mask &= 1 << ATA_SHIFT_PIO;
1922 if (!xfer_mask)
1923 goto fail;
1924
1925 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1926 &dev->udma_mask);
1927
1928 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1929 ap->id, dev->devno, ata_mode_string(xfer_mask));
1930
1931 return 0;
1932
1933 fail:
1934 return -EINVAL;
1935}
1936
83206a29 1937static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1938{
83206a29
TH		 1939 unsigned int err_mask;
1940 int rc;
1da177e4 1941
e8384607 1942 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1943 if (dev->xfer_shift == ATA_SHIFT_PIO)
1944 dev->flags |= ATA_DFLAG_PIO;
1945
83206a29
TH		 1946 err_mask = ata_dev_set_xfermode(ap, dev);
1947 if (err_mask) {
1948 printk(KERN_ERR
1949 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1950 ap->id, err_mask);
1951 return -EIO;
1952 }
1da177e4 1953
83206a29 1954 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1955 if (rc)
83206a29 1956 return rc;
48a8a14f 1957
23e71c3d
TH		 1958 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1959 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1960
1961 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1962 ap->id, dev->devno,
1963 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1964 return 0;
1da177e4
LT		 1965}
1966
1da177e4
LT		 1967/**
1968 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1969 * @ap: port on which timings will be programmed
e82cbdb9 1970 * @r_failed_dev: out paramter for failed device
1da177e4 1971 *
e82cbdb9
TH		 1972 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1973 * ata_set_mode() fails, pointer to the failing device is
1974 * returned in @r_failed_dev.
780a87f7 1975 *
1da177e4 1976 * LOCKING:
0cba632b 1977 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1978 *
1979 * RETURNS:
1980 * 0 on success, negative errno otherwise
1da177e4 1981 */
1ad8e7f9 1982int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1983{
e8e0619f 1984 struct ata_device *dev;
e82cbdb9 1985 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1986
3adcebb2
TH		 1987 /* has private set_mode? */
1988 if (ap->ops->set_mode) {
1989 /* FIXME: make ->set_mode handle no device case and
1990 * return error code and failing device on failure.
1991 */
1992 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1993 if (ata_dev_enabled(&ap->device[i])) {
1994 ap->ops->set_mode(ap);
1995 break;
1996 }
1997 }
1998 return 0;
1999 }
2000
a6d5a51c
TH		 2001 /* step 1: calculate xfer_mask */
2002 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2003 unsigned int pio_mask, dma_mask;
a6d5a51c 2004
e8e0619f
TH		 2005 dev = &ap->device[i];
2006
e1211e3f 2007 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2008 continue;
2009
acf356b1 2010 ata_dev_xfermask(ap, dev);
1da177e4 2011
acf356b1
TH		 2012 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2013 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2014 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2015 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2016
4f65977d 2017 found = 1;
5444a6f4
AC		 2018 if (dev->dma_mode)
2019 used_dma = 1;
a6d5a51c 2020 }
4f65977d 2021 if (!found)
e82cbdb9 2022 goto out;
a6d5a51c
TH		 2023
2024 /* step 2: always set host PIO timings */
e8e0619f
TH		 2025 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2026 dev = &ap->device[i];
2027 if (!ata_dev_enabled(dev))
2028 continue;
2029
2030 if (!dev->pio_mode) {
2031 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2032 ap->id, dev->devno);
2033 rc = -EINVAL;
e82cbdb9 2034 goto out;
e8e0619f
TH		 2035 }
2036
2037 dev->xfer_mode = dev->pio_mode;
2038 dev->xfer_shift = ATA_SHIFT_PIO;
2039 if (ap->ops->set_piomode)
2040 ap->ops->set_piomode(ap, dev);
2041 }
1da177e4 2042
a6d5a51c 2043 /* step 3: set host DMA timings */
e8e0619f
TH		 2044 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2045 dev = &ap->device[i];
2046
2047 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2048 continue;
2049
2050 dev->xfer_mode = dev->dma_mode;
2051 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2052 if (ap->ops->set_dmamode)
2053 ap->ops->set_dmamode(ap, dev);
2054 }
1da177e4
LT		 2055
2056 /* step 4: update devices' xfer mode */
83206a29 2057 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2058 dev = &ap->device[i];
1da177e4 2059
e1211e3f 2060 if (!ata_dev_enabled(dev))
83206a29
TH		 2061 continue;
2062
5bbc53f4
TH		 2063 rc = ata_dev_set_mode(ap, dev);
2064 if (rc)
e82cbdb9 2065 goto out;
83206a29 2066 }
1da177e4 2067
e8e0619f
TH		 2068 /* Record simplex status. If we selected DMA then the other
2069 * host channels are not permitted to do so.
5444a6f4 2070 */
5444a6f4
AC		 2071 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2072 ap->host_set->simplex_claimed = 1;
2073
e8e0619f 2074 /* step5: chip specific finalisation */
1da177e4
LT		 2075 if (ap->ops->post_set_mode)
2076 ap->ops->post_set_mode(ap);
2077
e82cbdb9
TH		 2078 out:
2079 if (rc)
2080 *r_failed_dev = dev;
2081 return rc;
1da177e4
LT		 2082}
2083
1fdffbce
JG		 2084/**
2085 * ata_tf_to_host - issue ATA taskfile to host controller
2086 * @ap: port to which command is being issued
2087 * @tf: ATA taskfile register set
2088 *
2089 * Issues ATA taskfile register set to ATA host controller,
2090 * with proper synchronization with interrupt handler and
2091 * other threads.
2092 *
2093 * LOCKING:
2094 * spin_lock_irqsave(host_set lock)
2095 */
2096
2097static inline void ata_tf_to_host(struct ata_port *ap,
2098 const struct ata_taskfile *tf)
2099{
2100 ap->ops->tf_load(ap, tf);
2101 ap->ops->exec_command(ap, tf);
2102}
2103
1da177e4
LT		 2104/**
2105 * ata_busy_sleep - sleep until BSY clears, or timeout
2106 * @ap: port containing status register to be polled
2107 * @tmout_pat: impatience timeout
2108 * @tmout: overall timeout
2109 *
780a87f7
JG		 2110 * Sleep until ATA Status register bit BSY clears,
2111 * or a timeout occurs.
2112 *
2113 * LOCKING: None.
1da177e4
LT		 2114 */
2115
6f8b9958
TH		 2116unsigned int ata_busy_sleep (struct ata_port *ap,
2117 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2118{
2119 unsigned long timer_start, timeout;
2120 u8 status;
2121
2122 status = ata_busy_wait(ap, ATA_BUSY, 300);
2123 timer_start = jiffies;
2124 timeout = timer_start + tmout_pat;
2125 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2126 msleep(50);
2127 status = ata_busy_wait(ap, ATA_BUSY, 3);
2128 }
2129
2130 if (status & ATA_BUSY)
2131 printk(KERN_WARNING "ata%u is slow to respond, "
2132 "please be patient\n", ap->id);
2133
2134 timeout = timer_start + tmout;
2135 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2136 msleep(50);
2137 status = ata_chk_status(ap);
2138 }
2139
2140 if (status & ATA_BUSY) {
2141 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2142 ap->id, tmout / HZ);
2143 return 1;
2144 }
2145
2146 return 0;
2147}
2148
2149static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2150{
2151 struct ata_ioports *ioaddr = &ap->ioaddr;
2152 unsigned int dev0 = devmask & (1 << 0);
2153 unsigned int dev1 = devmask & (1 << 1);
2154 unsigned long timeout;
2155
2156 /* if device 0 was found in ata_devchk, wait for its
2157 * BSY bit to clear
2158 */
2159 if (dev0)
2160 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2161
2162 /* if device 1 was found in ata_devchk, wait for
2163 * register access, then wait for BSY to clear
2164 */
2165 timeout = jiffies + ATA_TMOUT_BOOT;
2166 while (dev1) {
2167 u8 nsect, lbal;
2168
2169 ap->ops->dev_select(ap, 1);
2170 if (ap->flags & ATA_FLAG_MMIO) {
2171 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2172 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2173 } else {
2174 nsect = inb(ioaddr->nsect_addr);
2175 lbal = inb(ioaddr->lbal_addr);
2176 }
2177 if ((nsect == 1) && (lbal == 1))
2178 break;
2179 if (time_after(jiffies, timeout)) {
2180 dev1 = 0;
2181 break;
2182 }
2183 msleep(50); /* give drive a breather */
2184 }
2185 if (dev1)
2186 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2187
2188 /* is all this really necessary? */
2189 ap->ops->dev_select(ap, 0);
2190 if (dev1)
2191 ap->ops->dev_select(ap, 1);
2192 if (dev0)
2193 ap->ops->dev_select(ap, 0);
2194}
2195
1da177e4
LT		 2196static unsigned int ata_bus_softreset(struct ata_port *ap,
2197 unsigned int devmask)
2198{
2199 struct ata_ioports *ioaddr = &ap->ioaddr;
2200
2201 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2202
2203 /* software reset. causes dev0 to be selected */
2204 if (ap->flags & ATA_FLAG_MMIO) {
2205 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2206 udelay(20); /* FIXME: flush */
2207 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2208 udelay(20); /* FIXME: flush */
2209 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2210 } else {
2211 outb(ap->ctl, ioaddr->ctl_addr);
2212 udelay(10);
2213 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2214 udelay(10);
2215 outb(ap->ctl, ioaddr->ctl_addr);
2216 }
2217
2218 /* spec mandates ">= 2ms" before checking status.
2219 * We wait 150ms, because that was the magic delay used for
2220 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2221 * between when the ATA command register is written, and then
2222 * status is checked. Because waiting for "a while" before
2223 * checking status is fine, post SRST, we perform this magic
2224 * delay here as well.
09c7ad79
AC		 2225 *
2226 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2227 */
2228 msleep(150);
2229
2e9edbf8 2230 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2231 * the bus shows 0xFF because the odd clown forgets the D7
2232 * pulldown resistor.
2233 */
987d2f05
TH		 2234 if (ata_check_status(ap) == 0xFF) {
2235 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
298a41ca 2236 return AC_ERR_OTHER;
987d2f05 2237 }
09c7ad79 2238
1da177e4
LT		 2239 ata_bus_post_reset(ap, devmask);
2240
2241 return 0;
2242}
2243
2244/**
2245 * ata_bus_reset - reset host port and associated ATA channel
2246 * @ap: port to reset
2247 *
2248 * This is typically the first time we actually start issuing
2249 * commands to the ATA channel. We wait for BSY to clear, then
2250 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2251 * result. Determine what devices, if any, are on the channel
2252 * by looking at the device 0/1 error register. Look at the signature
2253 * stored in each device's taskfile registers, to determine if
2254 * the device is ATA or ATAPI.
2255 *
2256 * LOCKING:
0cba632b
JG		 2257 * PCI/etc. bus probe sem.
2258 * Obtains host_set lock.
1da177e4
LT		 2259 *
2260 * SIDE EFFECTS:
198e0fed 2261 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2262 */
2263
2264void ata_bus_reset(struct ata_port *ap)
2265{
2266 struct ata_ioports *ioaddr = &ap->ioaddr;
2267 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2268 u8 err;
aec5c3c1 2269 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2270
2271 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2272
2273 /* determine if device 0/1 are present */
2274 if (ap->flags & ATA_FLAG_SATA_RESET)
2275 dev0 = 1;
2276 else {
2277 dev0 = ata_devchk(ap, 0);
2278 if (slave_possible)
2279 dev1 = ata_devchk(ap, 1);
2280 }
2281
2282 if (dev0)
2283 devmask |= (1 << 0);
2284 if (dev1)
2285 devmask |= (1 << 1);
2286
2287 /* select device 0 again */
2288 ap->ops->dev_select(ap, 0);
2289
2290 /* issue bus reset */
2291 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2292 if (ata_bus_softreset(ap, devmask))
2293 goto err_out;
1da177e4
LT		 2294
2295 /*
2296 * determine by signature whether we have ATA or ATAPI devices
2297 */
b4dc7623 2298 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2299 if ((slave_possible) && (err != 0x81))
b4dc7623 2300 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2301
2302 /* re-enable interrupts */
2303 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2304 ata_irq_on(ap);
2305
2306 /* is double-select really necessary? */
2307 if (ap->device[1].class != ATA_DEV_NONE)
2308 ap->ops->dev_select(ap, 1);
2309 if (ap->device[0].class != ATA_DEV_NONE)
2310 ap->ops->dev_select(ap, 0);
2311
2312 /* if no devices were detected, disable this port */
2313 if ((ap->device[0].class == ATA_DEV_NONE) &&
2314 (ap->device[1].class == ATA_DEV_NONE))
2315 goto err_out;
2316
2317 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2318 /* set up device control for ATA_FLAG_SATA_RESET */
2319 if (ap->flags & ATA_FLAG_MMIO)
2320 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2321 else
2322 outb(ap->ctl, ioaddr->ctl_addr);
2323 }
2324
2325 DPRINTK("EXIT\n");
2326 return;
2327
2328err_out:
2329 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2330 ap->ops->port_disable(ap);
2331
2332 DPRINTK("EXIT\n");
2333}
2334
7a7921e8
TH		 2335static int sata_phy_resume(struct ata_port *ap)
2336{
2337 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2338 u32 scontrol, sstatus;
81952c54
TH		 2339 int rc;
2340
2341 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2342 return rc;
7a7921e8 2343
852ee16a 2344 scontrol = (scontrol & 0x0f0) | 0x300;
81952c54
TH		 2345
2346 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2347 return rc;
7a7921e8
TH		 2348
2349 /* Wait for phy to become ready, if necessary. */
2350 do {
2351 msleep(200);
81952c54
TH		 2352 if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus)))
2353 return rc;
7a7921e8
TH		 2354 if ((sstatus & 0xf) != 1)
2355 return 0;
2356 } while (time_before(jiffies, timeout));
2357
81952c54 2358 return -EBUSY;
7a7921e8
TH		 2359}
2360
8a19ac89
TH		 2361/**
2362 * ata_std_probeinit - initialize probing
2363 * @ap: port to be probed
2364 *
2365 * @ap is about to be probed. Initialize it. This function is
2366 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2367 *
2368 * NOTE!!! Do not use this function as probeinit if a low level
2369 * driver implements only hardreset. Just pass NULL as probeinit
2370 * in that case. Using this function is probably okay but doing
2371 * so makes reset sequence different from the original
2372 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2373 */
17efc5f7 2374void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2375{
81952c54 2376 u32 scontrol;
1c3fae4d 2377
81952c54
TH		 2378 /* resume link */
2379 sata_phy_resume(ap);
1c3fae4d 2380
81952c54
TH		 2381 /* init sata_spd_limit to the current value */
2382 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
2383 int spd = (scontrol >> 4) & 0xf;
2384 ap->sata_spd_limit &= (1 << spd) - 1;
3a39746a 2385 }
81952c54
TH		 2386
2387 /* wait for device */
2388 if (ata_port_online(ap))
2389 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
8a19ac89
TH		 2390}
2391
c2bd5804
TH		 2392/**
2393 * ata_std_softreset - reset host port via ATA SRST
2394 * @ap: port to reset
c2bd5804
TH		 2395 * @classes: resulting classes of attached devices
2396 *
2397 * Reset host port using ATA SRST. This function is to be used
2398 * as standard callback for ata_drive_*_reset() functions.
2399 *
2400 * LOCKING:
2401 * Kernel thread context (may sleep)
2402 *
2403 * RETURNS:
2404 * 0 on success, -errno otherwise.
2405 */
2bf2cb26 2406int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
c2bd5804
TH		 2407{
2408 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2409 unsigned int devmask = 0, err_mask;
2410 u8 err;
2411
2412 DPRINTK("ENTER\n");
2413
81952c54 2414 if (ata_port_offline(ap)) {
3a39746a
TH		 2415 classes[0] = ATA_DEV_NONE;
2416 goto out;
2417 }
2418
c2bd5804
TH		 2419 /* determine if device 0/1 are present */
2420 if (ata_devchk(ap, 0))
2421 devmask |= (1 << 0);
2422 if (slave_possible && ata_devchk(ap, 1))
2423 devmask |= (1 << 1);
2424
c2bd5804
TH		 2425 /* select device 0 again */
2426 ap->ops->dev_select(ap, 0);
2427
2428 /* issue bus reset */
2429 DPRINTK("about to softreset, devmask=%x\n", devmask);
2430 err_mask = ata_bus_softreset(ap, devmask);
2431 if (err_mask) {
2bf2cb26
TH		 2432 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2433 ap->id, err_mask);
c2bd5804
TH		 2434 return -EIO;
2435 }
2436
2437 /* determine by signature whether we have ATA or ATAPI devices */
2438 classes[0] = ata_dev_try_classify(ap, 0, &err);
2439 if (slave_possible && err != 0x81)
2440 classes[1] = ata_dev_try_classify(ap, 1, &err);
2441
3a39746a 2442 out:
c2bd5804
TH		 2443 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2444 return 0;
2445}
2446
2447/**
2448 * sata_std_hardreset - reset host port via SATA phy reset
2449 * @ap: port to reset
c2bd5804
TH		 2450 * @class: resulting class of attached device
2451 *
2452 * SATA phy-reset host port using DET bits of SControl register.
2453 * This function is to be used as standard callback for
2454 * ata_drive_*_reset().
2455 *
2456 * LOCKING:
2457 * Kernel thread context (may sleep)
2458 *
2459 * RETURNS:
2460 * 0 on success, -errno otherwise.
2461 */
2bf2cb26 2462int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
c2bd5804 2463{
852ee16a 2464 u32 scontrol;
81952c54 2465 int rc;
852ee16a 2466
c2bd5804
TH		 2467 DPRINTK("ENTER\n");
2468
3c567b7d 2469 if (sata_set_spd_needed(ap)) {
1c3fae4d
TH		 2470 /* SATA spec says nothing about how to reconfigure
2471 * spd. To be on the safe side, turn off phy during
2472 * reconfiguration. This works for at least ICH7 AHCI
2473 * and Sil3124.
2474 */
81952c54
TH		 2475 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2476 return rc;
2477
1c3fae4d 2478 scontrol = (scontrol & 0x0f0) | 0x302;
81952c54
TH		 2479
2480 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2481 return rc;
1c3fae4d 2482
3c567b7d 2483 sata_set_spd(ap);
1c3fae4d
TH		 2484 }
2485
2486 /* issue phy wake/reset */
81952c54
TH		 2487 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2488 return rc;
2489
852ee16a 2490 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54
TH		 2491
2492 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2493 return rc;
c2bd5804 2494
1c3fae4d 2495 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2496 * 10.4.2 says at least 1 ms.
2497 */
2498 msleep(1);
2499
1c3fae4d 2500 /* bring phy back */
7a7921e8 2501 sata_phy_resume(ap);
c2bd5804 2502
c2bd5804 2503 /* TODO: phy layer with polling, timeouts, etc. */
81952c54 2504 if (ata_port_offline(ap)) {
c2bd5804
TH		 2505 *class = ATA_DEV_NONE;
2506 DPRINTK("EXIT, link offline\n");
2507 return 0;
2508 }
2509
2510 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
987d2f05
TH		 2511 printk(KERN_ERR
2512 "ata%u: COMRESET failed (device not ready)\n", ap->id);
c2bd5804
TH		 2513 return -EIO;
2514 }
2515
3a39746a
TH		 2516 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2517
c2bd5804
TH		 2518 *class = ata_dev_try_classify(ap, 0, NULL);
2519
2520 DPRINTK("EXIT, class=%u\n", *class);
2521 return 0;
2522}
2523
2524/**
2525 * ata_std_postreset - standard postreset callback
2526 * @ap: the target ata_port
2527 * @classes: classes of attached devices
2528 *
2529 * This function is invoked after a successful reset. Note that
2530 * the device might have been reset more than once using
2531 * different reset methods before postreset is invoked.
c2bd5804
TH		 2532 *
2533 * This function is to be used as standard callback for
2534 * ata_drive_*_reset().
2535 *
2536 * LOCKING:
2537 * Kernel thread context (may sleep)
2538 */
2539void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2540{
2541 DPRINTK("ENTER\n");
2542
c2bd5804 2543 /* print link status */
81952c54 2544 sata_print_link_status(ap);
c2bd5804 2545
3a39746a
TH		 2546 /* re-enable interrupts */
2547 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2548 ata_irq_on(ap);
c2bd5804
TH		 2549
2550 /* is double-select really necessary? */
2551 if (classes[0] != ATA_DEV_NONE)
2552 ap->ops->dev_select(ap, 1);
2553 if (classes[1] != ATA_DEV_NONE)
2554 ap->ops->dev_select(ap, 0);
2555
3a39746a
TH		 2556 /* bail out if no device is present */
2557 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2558 DPRINTK("EXIT, no device\n");
2559 return;
2560 }
2561
2562 /* set up device control */
2563 if (ap->ioaddr.ctl_addr) {
2564 if (ap->flags & ATA_FLAG_MMIO)
2565 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2566 else
2567 outb(ap->ctl, ap->ioaddr.ctl_addr);
2568 }
c2bd5804
TH		 2569
2570 DPRINTK("EXIT\n");
2571}
2572
2573/**
2574 * ata_std_probe_reset - standard probe reset method
2575 * @ap: prot to perform probe-reset
2576 * @classes: resulting classes of attached devices
2577 *
2578 * The stock off-the-shelf ->probe_reset method.
2579 *
2580 * LOCKING:
2581 * Kernel thread context (may sleep)
2582 *
2583 * RETURNS:
2584 * 0 on success, -errno otherwise.
2585 */
2586int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2587{
2588 ata_reset_fn_t hardreset;
2589
2590 hardreset = NULL;
81952c54 2591 if (sata_scr_valid(ap))
c2bd5804
TH		 2592 hardreset = sata_std_hardreset;
2593
8a19ac89 2594 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2595 ata_std_softreset, hardreset,
c2bd5804
TH		 2596 ata_std_postreset, classes);
2597}
2598
2bf2cb26 2599int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
96bd39ec 2600 unsigned int *classes)
a62c0fc5
TH		 2601{
2602 int i, rc;
2603
2604 for (i = 0; i < ATA_MAX_DEVICES; i++)
2605 classes[i] = ATA_DEV_UNKNOWN;
2606
2bf2cb26 2607 rc = reset(ap, classes);
a62c0fc5
TH		 2608 if (rc)
2609 return rc;
2610
2611 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2612 * is complete and convert all ATA_DEV_UNKNOWN to
2613 * ATA_DEV_NONE.
2614 */
2615 for (i = 0; i < ATA_MAX_DEVICES; i++)
2616 if (classes[i] != ATA_DEV_UNKNOWN)
2617 break;
2618
2619 if (i < ATA_MAX_DEVICES)
2620 for (i = 0; i < ATA_MAX_DEVICES; i++)
2621 if (classes[i] == ATA_DEV_UNKNOWN)
2622 classes[i] = ATA_DEV_NONE;
2623
9974e7cc 2624 return 0;
a62c0fc5
TH		 2625}
2626
2627/**
2628 * ata_drive_probe_reset - Perform probe reset with given methods
2629 * @ap: port to reset
7944ea95 2630 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2631 * @softreset: softreset method (can be NULL)
2632 * @hardreset: hardreset method (can be NULL)
2633 * @postreset: postreset method (can be NULL)
2634 * @classes: resulting classes of attached devices
2635 *
2636 * Reset the specified port and classify attached devices using
2637 * given methods. This function prefers softreset but tries all
2638 * possible reset sequences to reset and classify devices. This
2639 * function is intended to be used for constructing ->probe_reset
2640 * callback by low level drivers.
2641 *
2642 * Reset methods should follow the following rules.
2643 *
2644 * - Return 0 on sucess, -errno on failure.
2645 * - If classification is supported, fill classes[] with
2646 * recognized class codes.
2647 * - If classification is not supported, leave classes[] alone.
a62c0fc5
TH		 2648 *
2649 * LOCKING:
2650 * Kernel thread context (may sleep)
2651 *
2652 * RETURNS:
2653 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2654 * if classification fails, and any error code from reset
2655 * methods.
2656 */
7944ea95 2657int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2658 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2659 ata_postreset_fn_t postreset, unsigned int *classes)
2660{
2661 int rc = -EINVAL;
2662
7944ea95
TH		 2663 if (probeinit)
2664 probeinit(ap);
2665
3c567b7d 2666 if (softreset && !sata_set_spd_needed(ap)) {
96bd39ec 2667 rc = ata_do_reset(ap, softreset, classes);
9974e7cc
TH		 2668 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2669 goto done;
edbabd86
TH		 2670 printk(KERN_INFO "ata%u: softreset failed, will try "
2671 "hardreset in 5 secs\n", ap->id);
2672 ssleep(5);
a62c0fc5
TH		 2673 }
2674
2675 if (!hardreset)
9974e7cc 2676 goto done;
a62c0fc5 2677
90dac02c 2678 while (1) {
96bd39ec 2679 rc = ata_do_reset(ap, hardreset, classes);
90dac02c
TH		 2680 if (rc == 0) {
2681 if (classes[0] != ATA_DEV_UNKNOWN)
2682 goto done;
2683 break;
2684 }
2685
3c567b7d 2686 if (sata_down_spd_limit(ap))
90dac02c 2687 goto done;
edbabd86
TH		 2688
2689 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2690 "in 5 secs\n", ap->id);
2691 ssleep(5);
90dac02c 2692 }
a62c0fc5 2693
edbabd86
TH		 2694 if (softreset) {
2695 printk(KERN_INFO "ata%u: hardreset succeeded without "
2696 "classification, will retry softreset in 5 secs\n",
2697 ap->id);
2698 ssleep(5);
2699
96bd39ec 2700 rc = ata_do_reset(ap, softreset, classes);
edbabd86 2701 }
a62c0fc5 2702
9974e7cc 2703 done:
96bd39ec
TH		 2704 if (rc == 0) {
2705 if (postreset)
2706 postreset(ap, classes);
2707 if (classes[0] == ATA_DEV_UNKNOWN)
2708 rc = -ENODEV;
2709 }
a62c0fc5
TH		 2710 return rc;
2711}
2712
623a3128
TH		 2713/**
2714 * ata_dev_same_device - Determine whether new ID matches configured device
2715 * @ap: port on which the device to compare against resides
2716 * @dev: device to compare against
2717 * @new_class: class of the new device
2718 * @new_id: IDENTIFY page of the new device
2719 *
2720 * Compare @new_class and @new_id against @dev and determine
2721 * whether @dev is the device indicated by @new_class and
2722 * @new_id.
2723 *
2724 * LOCKING:
2725 * None.
2726 *
2727 * RETURNS:
2728 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2729 */
2730static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2731 unsigned int new_class, const u16 *new_id)
2732{
2733 const u16 *old_id = dev->id;
2734 unsigned char model[2][41], serial[2][21];
2735 u64 new_n_sectors;
2736
2737 if (dev->class != new_class) {
2738 printk(KERN_INFO
2739 "ata%u: dev %u class mismatch %d != %d\n",
2740 ap->id, dev->devno, dev->class, new_class);
2741 return 0;
2742 }
2743
2744 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2745 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2746 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2747 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2748 new_n_sectors = ata_id_n_sectors(new_id);
2749
2750 if (strcmp(model[0], model[1])) {
2751 printk(KERN_INFO
2752 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2753 ap->id, dev->devno, model[0], model[1]);
2754 return 0;
2755 }
2756
2757 if (strcmp(serial[0], serial[1])) {
2758 printk(KERN_INFO
2759 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2760 ap->id, dev->devno, serial[0], serial[1]);
2761 return 0;
2762 }
2763
2764 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2765 printk(KERN_INFO
2766 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2767 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2768 (unsigned long long)new_n_sectors);
2769 return 0;
2770 }
2771
2772 return 1;
2773}
2774
2775/**
2776 * ata_dev_revalidate - Revalidate ATA device
2777 * @ap: port on which the device to revalidate resides
2778 * @dev: device to revalidate
2779 * @post_reset: is this revalidation after reset?
2780 *
2781 * Re-read IDENTIFY page and make sure @dev is still attached to
2782 * the port.
2783 *
2784 * LOCKING:
2785 * Kernel thread context (may sleep)
2786 *
2787 * RETURNS:
2788 * 0 on success, negative errno otherwise
2789 */
2790int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2791 int post_reset)
2792{
5eb45c02 2793 unsigned int class = dev->class;
fe635c7e 2794 u16 *id = (void *)ap->sector_buf;
623a3128
TH		 2795 int rc;
2796
5eb45c02
TH		 2797 if (!ata_dev_enabled(dev)) {
2798 rc = -ENODEV;
2799 goto fail;
2800 }
623a3128 2801
fe635c7e
TH		 2802 /* read ID data */
2803 rc = ata_dev_read_id(ap, dev, &class, post_reset, id);
623a3128
TH		 2804 if (rc)
2805 goto fail;
2806
2807 /* is the device still there? */
2808 if (!ata_dev_same_device(ap, dev, class, id)) {
2809 rc = -ENODEV;
2810 goto fail;
2811 }
2812
fe635c7e 2813 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
623a3128
TH		 2814
2815 /* configure device according to the new ID */
5eb45c02
TH		 2816 rc = ata_dev_configure(ap, dev, 0);
2817 if (rc == 0)
2818 return 0;
623a3128
TH		 2819
2820 fail:
2821 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2822 ap->id, dev->devno, rc);
623a3128
TH		 2823 return rc;
2824}
2825
98ac62de 2826static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2827 "WDC AC11000H", NULL,
2828 "WDC AC22100H", NULL,
2829 "WDC AC32500H", NULL,
2830 "WDC AC33100H", NULL,
2831 "WDC AC31600H", NULL,
2832 "WDC AC32100H", "24.09P07",
2833 "WDC AC23200L", "21.10N21",
2834 "Compaq CRD-8241B", NULL,
2835 "CRD-8400B", NULL,
2836 "CRD-8480B", NULL,
2837 "CRD-8482B", NULL,
2838 "CRD-84", NULL,
2839 "SanDisk SDP3B", NULL,
2840 "SanDisk SDP3B-64", NULL,
2841 "SANYO CD-ROM CRD", NULL,
2842 "HITACHI CDR-8", NULL,
2e9edbf8 2843 "HITACHI CDR-8335", NULL,
f4b15fef 2844 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2845 "Toshiba CD-ROM XM-6202B", NULL,
2846 "TOSHIBA CD-ROM XM-1702BC", NULL,
2847 "CD-532E-A", NULL,
2848 "E-IDE CD-ROM CR-840", NULL,
2849 "CD-ROM Drive/F5A", NULL,
2850 "WPI CDD-820", NULL,
f4b15fef 2851 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2852 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2853 "SanDisk SDP3B-64", NULL,
2854 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2855 "_NEC DV5800A", NULL,
2856 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2857};
2e9edbf8 2858
f4b15fef
AC		 2859static int ata_strim(char *s, size_t len)
2860{
2861 len = strnlen(s, len);
2862
2863 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2864 while ((len > 0) && (s[len - 1] == ' ')) {
2865 len--;
2866 s[len] = 0;
2867 }
2868 return len;
2869}
1da177e4 2870
057ace5e 2871static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2872{
f4b15fef
AC		 2873 unsigned char model_num[40];
2874 unsigned char model_rev[16];
2875 unsigned int nlen, rlen;
1da177e4
LT		 2876 int i;
2877
f4b15fef
AC		 2878 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2879 sizeof(model_num));
2880 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2881 sizeof(model_rev));
2882 nlen = ata_strim(model_num, sizeof(model_num));
2883 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2884
f4b15fef
AC		 2885 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2886 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2887 if (ata_dma_blacklist[i+1] == NULL)
2888 return 1;
2889 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2890 return 1;
2891 }
2892 }
1da177e4
LT		 2893 return 0;
2894}
2895
a6d5a51c
TH		 2896/**
2897 * ata_dev_xfermask - Compute supported xfermask of the given device
2898 * @ap: Port on which the device to compute xfermask for resides
2899 * @dev: Device to compute xfermask for
2900 *
acf356b1
TH		 2901 * Compute supported xfermask of @dev and store it in
2902 * dev->*_mask. This function is responsible for applying all
2903 * known limits including host controller limits, device
2904 * blacklist, etc...
a6d5a51c 2905 *
600511e8
TH		 2906 * FIXME: The current implementation limits all transfer modes to
2907 * the fastest of the lowested device on the port. This is not
05c8e0ac 2908 * required on most controllers.
600511e8 2909 *
a6d5a51c
TH		 2910 * LOCKING:
2911 * None.
a6d5a51c 2912 */
acf356b1 2913static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2914{
5444a6f4 2915 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2916 unsigned long xfer_mask;
2917 int i;
1da177e4 2918
565083e1
TH		 2919 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2920 ap->mwdma_mask, ap->udma_mask);
2921
2922 /* Apply cable rule here. Don't apply it early because when
2923 * we handle hot plug the cable type can itself change.
2924 */
2925 if (ap->cbl == ATA_CBL_PATA40)
2926 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2927
5444a6f4 2928 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2929 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2930 struct ata_device *d = &ap->device[i];
565083e1
TH		 2931
2932 if (ata_dev_absent(d))
2933 continue;
2934
2935 if (ata_dev_disabled(d)) {
2936 /* to avoid violating device selection timing */
2937 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2938 UINT_MAX, UINT_MAX);
a6d5a51c 2939 continue;
565083e1
TH		 2940 }
2941
2942 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2943 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2944 xfer_mask &= ata_id_xfermask(d->id);
2945 if (ata_dma_blacklisted(d))
2946 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2947 }
2948
a6d5a51c
TH		 2949 if (ata_dma_blacklisted(dev))
2950 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2951 "disabling DMA\n", ap->id, dev->devno);
2952
5444a6f4
AC		 2953 if (hs->flags & ATA_HOST_SIMPLEX) {
2954 if (hs->simplex_claimed)
2955 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2956 }
565083e1 2957
5444a6f4
AC		 2958 if (ap->ops->mode_filter)
2959 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2960
565083e1
TH		 2961 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2962 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2963}
2964
1da177e4
LT		 2965/**
2966 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2967 * @ap: Port associated with device @dev
2968 * @dev: Device to which command will be sent
2969 *
780a87f7
JG		 2970 * Issue SET FEATURES - XFER MODE command to device @dev
2971 * on port @ap.
2972 *
1da177e4 2973 * LOCKING:
0cba632b 2974 * PCI/etc. bus probe sem.
83206a29
TH		 2975 *
2976 * RETURNS:
2977 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2978 */
2979
83206a29
TH		 2980static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2981 struct ata_device *dev)
1da177e4 2982{
a0123703 2983 struct ata_taskfile tf;
83206a29 2984 unsigned int err_mask;
1da177e4
LT		 2985
2986 /* set up set-features taskfile */
2987 DPRINTK("set features - xfer mode\n");
2988
a0123703
TH		 2989 ata_tf_init(ap, &tf, dev->devno);
2990 tf.command = ATA_CMD_SET_FEATURES;
2991 tf.feature = SETFEATURES_XFER;
2992 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2993 tf.protocol = ATA_PROT_NODATA;
2994 tf.nsect = dev->xfer_mode;
1da177e4 2995
d69cf37d 2996 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 2997
83206a29
TH		 2998 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2999 return err_mask;
1da177e4
LT		 3000}
3001
8bf62ece
AL		 3002/**
3003 * ata_dev_init_params - Issue INIT DEV PARAMS command
3004 * @ap: Port associated with device @dev
3005 * @dev: Device to which command will be sent
3006 *
3007 * LOCKING:
6aff8f1f
TH		 3008 * Kernel thread context (may sleep)
3009 *
3010 * RETURNS:
3011 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3012 */
3013
6aff8f1f 3014static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3015 struct ata_device *dev,
3016 u16 heads,
3017 u16 sectors)
8bf62ece 3018{
a0123703 3019 struct ata_taskfile tf;
6aff8f1f 3020 unsigned int err_mask;
8bf62ece
AL		 3021
3022 /* Number of sectors per track 1-255. Number of heads 1-16 */
3023 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3024 return AC_ERR_INVALID;
8bf62ece
AL		 3025
3026 /* set up init dev params taskfile */
3027 DPRINTK("init dev params \n");
3028
a0123703
TH		 3029 ata_tf_init(ap, &tf, dev->devno);
3030 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3031 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3032 tf.protocol = ATA_PROT_NODATA;
3033 tf.nsect = sectors;
3034 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3035
d69cf37d 3036 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3037
6aff8f1f
TH		 3038 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3039 return err_mask;
8bf62ece
AL		 3040}
3041
1da177e4 3042/**
0cba632b
JG		 3043 * ata_sg_clean - Unmap DMA memory associated with command
3044 * @qc: Command containing DMA memory to be released
3045 *
3046 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3047 *
3048 * LOCKING:
0cba632b 3049 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3050 */
3051
3052static void ata_sg_clean(struct ata_queued_cmd *qc)
3053{
3054 struct ata_port *ap = qc->ap;
cedc9a47 3055 struct scatterlist *sg = qc->__sg;
1da177e4 3056 int dir = qc->dma_dir;
cedc9a47 3057 void *pad_buf = NULL;
1da177e4 3058
a4631474
TH		 3059 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3060 WARN_ON(sg == NULL);
1da177e4
LT		 3061
3062 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3063 WARN_ON(qc->n_elem > 1);
1da177e4 3064
2c13b7ce 3065 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3066
cedc9a47
JG		 3067 /* if we padded the buffer out to 32-bit bound, and data
3068 * xfer direction is from-device, we must copy from the
3069 * pad buffer back into the supplied buffer
3070 */
3071 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3072 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3073
3074 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3075 if (qc->n_elem)
2f1f610b 3076 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3077 /* restore last sg */
3078 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3079 if (pad_buf) {
3080 struct scatterlist *psg = &qc->pad_sgent;
3081 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3082 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3083 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3084 }
3085 } else {
2e242fa9 3086 if (qc->n_elem)
2f1f610b 3087 dma_unmap_single(ap->dev,
e1410f2d
JG		 3088 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3089 dir);
cedc9a47
JG		 3090 /* restore sg */
3091 sg->length += qc->pad_len;
3092 if (pad_buf)
3093 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3094 pad_buf, qc->pad_len);
3095 }
1da177e4
LT		 3096
3097 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3098 qc->__sg = NULL;
1da177e4
LT		 3099}
3100
3101/**
3102 * ata_fill_sg - Fill PCI IDE PRD table
3103 * @qc: Metadata associated with taskfile to be transferred
3104 *
780a87f7
JG		 3105 * Fill PCI IDE PRD (scatter-gather) table with segments
3106 * associated with the current disk command.
3107 *
1da177e4 3108 * LOCKING:
780a87f7 3109 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3110 *
3111 */
3112static void ata_fill_sg(struct ata_queued_cmd *qc)
3113{
1da177e4 3114 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3115 struct scatterlist *sg;
3116 unsigned int idx;
1da177e4 3117
a4631474 3118 WARN_ON(qc->__sg == NULL);
f131883e 3119 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3120
3121 idx = 0;
cedc9a47 3122 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3123 u32 addr, offset;
3124 u32 sg_len, len;
3125
3126 /* determine if physical DMA addr spans 64K boundary.
3127 * Note h/w doesn't support 64-bit, so we unconditionally
3128 * truncate dma_addr_t to u32.
3129 */
3130 addr = (u32) sg_dma_address(sg);
3131 sg_len = sg_dma_len(sg);
3132
3133 while (sg_len) {
3134 offset = addr & 0xffff;
3135 len = sg_len;
3136 if ((offset + sg_len) > 0x10000)
3137 len = 0x10000 - offset;
3138
3139 ap->prd[idx].addr = cpu_to_le32(addr);
3140 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3141 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3142
3143 idx++;
3144 sg_len -= len;
3145 addr += len;
3146 }
3147 }
3148
3149 if (idx)
3150 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3151}
3152/**
3153 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3154 * @qc: Metadata associated with taskfile to check
3155 *
780a87f7
JG		 3156 * Allow low-level driver to filter ATA PACKET commands, returning
3157 * a status indicating whether or not it is OK to use DMA for the
3158 * supplied PACKET command.
3159 *
1da177e4 3160 * LOCKING:
0cba632b
JG		 3161 * spin_lock_irqsave(host_set lock)
3162 *
1da177e4
LT		 3163 * RETURNS: 0 when ATAPI DMA can be used
3164 * nonzero otherwise
3165 */
3166int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3167{
3168 struct ata_port *ap = qc->ap;
3169 int rc = 0; /* Assume ATAPI DMA is OK by default */
3170
3171 if (ap->ops->check_atapi_dma)
3172 rc = ap->ops->check_atapi_dma(qc);
3173
3174 return rc;
3175}
3176/**
3177 * ata_qc_prep - Prepare taskfile for submission
3178 * @qc: Metadata associated with taskfile to be prepared
3179 *
780a87f7
JG		 3180 * Prepare ATA taskfile for submission.
3181 *
1da177e4
LT		 3182 * LOCKING:
3183 * spin_lock_irqsave(host_set lock)
3184 */
3185void ata_qc_prep(struct ata_queued_cmd *qc)
3186{
3187 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3188 return;
3189
3190 ata_fill_sg(qc);
3191}
3192
e46834cd
BK		 3193void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3194
0cba632b
JG		 3195/**
3196 * ata_sg_init_one - Associate command with memory buffer
3197 * @qc: Command to be associated
3198 * @buf: Memory buffer
3199 * @buflen: Length of memory buffer, in bytes.
3200 *
3201 * Initialize the data-related elements of queued_cmd @qc
3202 * to point to a single memory buffer, @buf of byte length @buflen.
3203 *
3204 * LOCKING:
3205 * spin_lock_irqsave(host_set lock)
3206 */
3207
1da177e4
LT		 3208void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3209{
3210 struct scatterlist *sg;
3211
3212 qc->flags |= ATA_QCFLAG_SINGLE;
3213
3214 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3215 qc->__sg = &qc->sgent;
1da177e4 3216 qc->n_elem = 1;
cedc9a47 3217 qc->orig_n_elem = 1;
1da177e4
LT		 3218 qc->buf_virt = buf;
3219
cedc9a47 3220 sg = qc->__sg;
f0612bbc 3221 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3222}
3223
0cba632b
JG		 3224/**
3225 * ata_sg_init - Associate command with scatter-gather table.
3226 * @qc: Command to be associated
3227 * @sg: Scatter-gather table.
3228 * @n_elem: Number of elements in s/g table.
3229 *
3230 * Initialize the data-related elements of queued_cmd @qc
3231 * to point to a scatter-gather table @sg, containing @n_elem
3232 * elements.
3233 *
3234 * LOCKING:
3235 * spin_lock_irqsave(host_set lock)
3236 */
3237
1da177e4
LT		 3238void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3239 unsigned int n_elem)
3240{
3241 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3242 qc->__sg = sg;
1da177e4 3243 qc->n_elem = n_elem;
cedc9a47 3244 qc->orig_n_elem = n_elem;
1da177e4
LT		 3245}
3246
3247/**
0cba632b
JG		 3248 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3249 * @qc: Command with memory buffer to be mapped.
3250 *
3251 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3252 *
3253 * LOCKING:
3254 * spin_lock_irqsave(host_set lock)
3255 *
3256 * RETURNS:
0cba632b 3257 * Zero on success, negative on error.
1da177e4
LT		 3258 */
3259
3260static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3261{
3262 struct ata_port *ap = qc->ap;
3263 int dir = qc->dma_dir;
cedc9a47 3264 struct scatterlist *sg = qc->__sg;
1da177e4 3265 dma_addr_t dma_address;
2e242fa9 3266 int trim_sg = 0;
1da177e4 3267
cedc9a47
JG		 3268 /* we must lengthen transfers to end on a 32-bit boundary */
3269 qc->pad_len = sg->length & 3;
3270 if (qc->pad_len) {
3271 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3272 struct scatterlist *psg = &qc->pad_sgent;
3273
a4631474 3274 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3275
3276 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3277
3278 if (qc->tf.flags & ATA_TFLAG_WRITE)
3279 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3280 qc->pad_len);
3281
3282 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3283 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3284 /* trim sg */
3285 sg->length -= qc->pad_len;
2e242fa9
TH		 3286 if (sg->length == 0)
3287 trim_sg = 1;
cedc9a47
JG		 3288
3289 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3290 sg->length, qc->pad_len);
3291 }
3292
2e242fa9
TH		 3293 if (trim_sg) {
3294 qc->n_elem--;
e1410f2d
JG		 3295 goto skip_map;
3296 }
3297
2f1f610b 3298 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3299 sg->length, dir);
537a95d9
TH		 3300 if (dma_mapping_error(dma_address)) {
3301 /* restore sg */
3302 sg->length += qc->pad_len;
1da177e4 3303 return -1;
537a95d9 3304 }
1da177e4
LT		 3305
3306 sg_dma_address(sg) = dma_address;
32529e01 3307 sg_dma_len(sg) = sg->length;
1da177e4 3308
2e242fa9 3309skip_map:
1da177e4
LT		 3310 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3311 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3312
3313 return 0;
3314}
3315
3316/**
0cba632b
JG		 3317 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3318 * @qc: Command with scatter-gather table to be mapped.
3319 *
3320 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3321 *
3322 * LOCKING:
3323 * spin_lock_irqsave(host_set lock)
3324 *
3325 * RETURNS:
0cba632b 3326 * Zero on success, negative on error.
1da177e4
LT		 3327 *
3328 */
3329
3330static int ata_sg_setup(struct ata_queued_cmd *qc)
3331{
3332 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3333 struct scatterlist *sg = qc->__sg;
3334 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3335 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3336
3337 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3338 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3339
cedc9a47
JG		 3340 /* we must lengthen transfers to end on a 32-bit boundary */
3341 qc->pad_len = lsg->length & 3;
3342 if (qc->pad_len) {
3343 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3344 struct scatterlist *psg = &qc->pad_sgent;
3345 unsigned int offset;
3346
a4631474 3347 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3348
3349 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3350
3351 /*
3352 * psg->page/offset are used to copy to-be-written
3353 * data in this function or read data in ata_sg_clean.
3354 */
3355 offset = lsg->offset + lsg->length - qc->pad_len;
3356 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3357 psg->offset = offset_in_page(offset);
3358
3359 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3360 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3361 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3362 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3363 }
3364
3365 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3366 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3367 /* trim last sg */
3368 lsg->length -= qc->pad_len;
e1410f2d
JG		 3369 if (lsg->length == 0)
3370 trim_sg = 1;
cedc9a47
JG		 3371
3372 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3373 qc->n_elem - 1, lsg->length, qc->pad_len);
3374 }
3375
e1410f2d
JG		 3376 pre_n_elem = qc->n_elem;
3377 if (trim_sg && pre_n_elem)
3378 pre_n_elem--;
3379
3380 if (!pre_n_elem) {
3381 n_elem = 0;
3382 goto skip_map;
3383 }
3384
1da177e4 3385 dir = qc->dma_dir;
2f1f610b 3386 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3387 if (n_elem < 1) {
3388 /* restore last sg */
3389 lsg->length += qc->pad_len;
1da177e4 3390 return -1;
537a95d9 3391 }
1da177e4
LT		 3392
3393 DPRINTK("%d sg elements mapped\n", n_elem);
3394
e1410f2d 3395skip_map:
1da177e4
LT		 3396 qc->n_elem = n_elem;
3397
3398 return 0;
3399}
3400
40e8c82c
TH		 3401/**
3402 * ata_poll_qc_complete - turn irq back on and finish qc
3403 * @qc: Command to complete
8e8b77dd 3404 * @err_mask: ATA status register content
40e8c82c
TH		 3405 *
3406 * LOCKING:
3407 * None. (grabs host lock)
3408 */
3409
a22e2eb0 3410void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3411{
3412 struct ata_port *ap = qc->ap;
b8f6153e 3413 unsigned long flags;
40e8c82c 3414
b8f6153e 3415 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3416 ap->flags &= ~ATA_FLAG_NOINTR;
3417 ata_irq_on(ap);
a22e2eb0 3418 ata_qc_complete(qc);
b8f6153e 3419 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3420}
3421
1da177e4 3422/**
c893a3ae 3423 * ata_pio_poll - poll using PIO, depending on current state
c91af2c8 3424 * @qc: qc in progress
1da177e4
LT		 3425 *
3426 * LOCKING:
0cba632b 3427 * None. (executing in kernel thread context)
1da177e4
LT		 3428 *
3429 * RETURNS:
6f0ef4fa 3430 * timeout value to use
1da177e4 3431 */
c91af2c8 3432static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
1da177e4 3433{
c91af2c8 3434 struct ata_port *ap = qc->ap;
1da177e4 3435 u8 status;
14be71f4
AL		 3436 unsigned int poll_state = HSM_ST_UNKNOWN;
3437 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4
AL		 3438
3439 switch (ap->hsm_task_state) {
3440 case HSM_ST:
3441 case HSM_ST_POLL:
3442 poll_state = HSM_ST_POLL;
3443 reg_state = HSM_ST;
1da177e4 3444 break;
14be71f4
AL		 3445 case HSM_ST_LAST:
3446 case HSM_ST_LAST_POLL:
3447 poll_state = HSM_ST_LAST_POLL;
3448 reg_state = HSM_ST_LAST;
1da177e4
LT		 3449 break;
3450 default:
3451 BUG();
3452 break;
3453 }
3454
3455 status = ata_chk_status(ap);
3456 if (status & ATA_BUSY) {
3457 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3458 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3459 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3460 return 0;
3461 }
14be71f4 3462 ap->hsm_task_state = poll_state;
1da177e4
LT		 3463 return ATA_SHORT_PAUSE;
3464 }
3465
14be71f4 3466 ap->hsm_task_state = reg_state;
1da177e4
LT		 3467 return 0;
3468}
3469
3470/**
6f0ef4fa 3471 * ata_pio_complete - check if drive is busy or idle
c91af2c8 3472 * @qc: qc to complete
1da177e4
LT		 3473 *
3474 * LOCKING:
0cba632b 3475 * None. (executing in kernel thread context)
7fb6ec28
JG		 3476 *
3477 * RETURNS:
3478 * Non-zero if qc completed, zero otherwise.
1da177e4 3479 */
c91af2c8 3480static int ata_pio_complete(struct ata_queued_cmd *qc)
1da177e4 3481{
c91af2c8 3482 struct ata_port *ap = qc->ap;
1da177e4
LT		 3483 u8 drv_stat;
3484
3485 /*
31433ea3
AC		 3486 * This is purely heuristic. This is a fast path. Sometimes when
3487 * we enter, BSY will be cleared in a chk-status or two. If not,
3488 * the drive is probably seeking or something. Snooze for a couple
3489 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3490 * HSM_ST_POLL state.
1da177e4 3491 */
fe79e683
AL		 3492 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3493 if (drv_stat & ATA_BUSY) {
1da177e4 3494 msleep(2);
fe79e683
AL		 3495 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3496 if (drv_stat & ATA_BUSY) {
14be71f4 3497 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3498 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3499 return 0;
1da177e4
LT		 3500 }
3501 }
3502
3503 drv_stat = ata_wait_idle(ap);
3504 if (!ata_ok(drv_stat)) {
1c848984 3505 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3506 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3507 return 0;
1da177e4
LT		 3508 }
3509
14be71f4 3510 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3511
a4631474 3512 WARN_ON(qc->err_mask);
a22e2eb0 3513 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3514
3515 /* another command may start at this point */
3516
3517 return 1;
1da177e4
LT		 3518}
3519
0baab86b
EF		 3520
3521/**
c893a3ae 3522 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3523 * @buf: Buffer to swap
3524 * @buf_words: Number of 16-bit words in buffer.
3525 *
3526 * Swap halves of 16-bit words if needed to convert from
3527 * little-endian byte order to native cpu byte order, or
3528 * vice-versa.
3529 *
3530 * LOCKING:
6f0ef4fa 3531 * Inherited from caller.
0baab86b 3532 */
1da177e4
LT		 3533void swap_buf_le16(u16 *buf, unsigned int buf_words)
3534{
3535#ifdef __BIG_ENDIAN
3536 unsigned int i;
3537
3538 for (i = 0; i < buf_words; i++)
3539 buf[i] = le16_to_cpu(buf[i]);
3540#endif /* __BIG_ENDIAN */
3541}
3542
6ae4cfb5
AL		 3543/**
3544 * ata_mmio_data_xfer - Transfer data by MMIO
3545 * @ap: port to read/write
3546 * @buf: data buffer
3547 * @buflen: buffer length
344babaa 3548 * @write_data: read/write
6ae4cfb5
AL		 3549 *
3550 * Transfer data from/to the device data register by MMIO.
3551 *
3552 * LOCKING:
3553 * Inherited from caller.
6ae4cfb5
AL		 3554 */
3555
1da177e4
LT		 3556static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3557 unsigned int buflen, int write_data)
3558{
3559 unsigned int i;
3560 unsigned int words = buflen >> 1;
3561 u16 *buf16 = (u16 *) buf;
3562 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3563
6ae4cfb5 3564 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3565 if (write_data) {
3566 for (i = 0; i < words; i++)
3567 writew(le16_to_cpu(buf16[i]), mmio);
3568 } else {
3569 for (i = 0; i < words; i++)
3570 buf16[i] = cpu_to_le16(readw(mmio));
3571 }
6ae4cfb5
AL		 3572
3573 /* Transfer trailing 1 byte, if any. */
3574 if (unlikely(buflen & 0x01)) {
3575 u16 align_buf[1] = { 0 };
3576 unsigned char *trailing_buf = buf + buflen - 1;
3577
3578 if (write_data) {
3579 memcpy(align_buf, trailing_buf, 1);
3580 writew(le16_to_cpu(align_buf[0]), mmio);
3581 } else {
3582 align_buf[0] = cpu_to_le16(readw(mmio));
3583 memcpy(trailing_buf, align_buf, 1);
3584 }
3585 }
1da177e4
LT		 3586}
3587
6ae4cfb5
AL		 3588/**
3589 * ata_pio_data_xfer - Transfer data by PIO
3590 * @ap: port to read/write
3591 * @buf: data buffer
3592 * @buflen: buffer length
344babaa 3593 * @write_data: read/write
6ae4cfb5
AL		 3594 *
3595 * Transfer data from/to the device data register by PIO.
3596 *
3597 * LOCKING:
3598 * Inherited from caller.
6ae4cfb5
AL		 3599 */
3600
1da177e4
LT		 3601static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3602 unsigned int buflen, int write_data)
3603{
6ae4cfb5 3604 unsigned int words = buflen >> 1;
1da177e4 3605
6ae4cfb5 3606 /* Transfer multiple of 2 bytes */
1da177e4 3607 if (write_data)
6ae4cfb5 3608 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3609 else
6ae4cfb5
AL		 3610 insw(ap->ioaddr.data_addr, buf, words);
3611
3612 /* Transfer trailing 1 byte, if any. */
3613 if (unlikely(buflen & 0x01)) {
3614 u16 align_buf[1] = { 0 };
3615 unsigned char *trailing_buf = buf + buflen - 1;
3616
3617 if (write_data) {
3618 memcpy(align_buf, trailing_buf, 1);
3619 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3620 } else {
3621 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3622 memcpy(trailing_buf, align_buf, 1);
3623 }
3624 }
1da177e4
LT		 3625}
3626
6ae4cfb5
AL		 3627/**
3628 * ata_data_xfer - Transfer data from/to the data register.
3629 * @ap: port to read/write
3630 * @buf: data buffer
3631 * @buflen: buffer length
3632 * @do_write: read/write
3633 *
3634 * Transfer data from/to the device data register.
3635 *
3636 * LOCKING:
3637 * Inherited from caller.
6ae4cfb5
AL		 3638 */
3639
1da177e4
LT		 3640static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3641 unsigned int buflen, int do_write)
3642{
a1bd9e68
AC		 3643 /* Make the crap hardware pay the costs not the good stuff */
3644 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3645 unsigned long flags;
3646 local_irq_save(flags);
3647 if (ap->flags & ATA_FLAG_MMIO)
3648 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3649 else
3650 ata_pio_data_xfer(ap, buf, buflen, do_write);
3651 local_irq_restore(flags);
3652 } else {
3653 if (ap->flags & ATA_FLAG_MMIO)
3654 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3655 else
3656 ata_pio_data_xfer(ap, buf, buflen, do_write);
3657 }
1da177e4
LT		 3658}
3659
6ae4cfb5
AL		 3660/**
3661 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3662 * @qc: Command on going
3663 *
3664 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3665 *
3666 * LOCKING:
3667 * Inherited from caller.
3668 */
3669
1da177e4
LT		 3670static void ata_pio_sector(struct ata_queued_cmd *qc)
3671{
3672 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3673 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3674 struct ata_port *ap = qc->ap;
3675 struct page *page;
3676 unsigned int offset;
3677 unsigned char *buf;
3678
3679 if (qc->cursect == (qc->nsect - 1))
14be71f4 3680 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3681
3682 page = sg[qc->cursg].page;
3683 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3684
3685 /* get the current page and offset */
3686 page = nth_page(page, (offset >> PAGE_SHIFT));
3687 offset %= PAGE_SIZE;
3688
3689 buf = kmap(page) + offset;
3690
3691 qc->cursect++;
3692 qc->cursg_ofs++;
3693
32529e01 3694 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3695 qc->cursg++;
3696 qc->cursg_ofs = 0;
3697 }
3698
3699 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3700
3701 /* do the actual data transfer */
3702 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3703 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3704
3705 kunmap(page);
3706}
3707
6ae4cfb5
AL		 3708/**
3709 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3710 * @qc: Command on going
3711 * @bytes: number of bytes
3712 *
3713 * Transfer Transfer data from/to the ATAPI device.
3714 *
3715 * LOCKING:
3716 * Inherited from caller.
3717 *
3718 */
3719
1da177e4
LT		 3720static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3721{
3722 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3723 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3724 struct ata_port *ap = qc->ap;
3725 struct page *page;
3726 unsigned char *buf;
3727 unsigned int offset, count;
3728
563a6e1f 3729 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3730 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3731
3732next_sg:
563a6e1f 3733 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3734 /*
563a6e1f
AL		 3735 * The end of qc->sg is reached and the device expects
3736 * more data to transfer. In order not to overrun qc->sg
3737 * and fulfill length specified in the byte count register,
3738 * - for read case, discard trailing data from the device
3739 * - for write case, padding zero data to the device
3740 */
3741 u16 pad_buf[1] = { 0 };
3742 unsigned int words = bytes >> 1;
3743 unsigned int i;
3744
3745 if (words) /* warning if bytes > 1 */
7fb6ec28 3746 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3747 ap->id, bytes);
3748
3749 for (i = 0; i < words; i++)
3750 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3751
14be71f4 3752 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3753 return;
3754 }
3755
cedc9a47 3756 sg = &qc->__sg[qc->cursg];
1da177e4 3757
1da177e4
LT		 3758 page = sg->page;
3759 offset = sg->offset + qc->cursg_ofs;
3760
3761 /* get the current page and offset */
3762 page = nth_page(page, (offset >> PAGE_SHIFT));
3763 offset %= PAGE_SIZE;
3764
6952df03 3765 /* don't overrun current sg */
32529e01 3766 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3767
3768 /* don't cross page boundaries */
3769 count = min(count, (unsigned int)PAGE_SIZE - offset);
3770
3771 buf = kmap(page) + offset;
3772
3773 bytes -= count;
3774 qc->curbytes += count;
3775 qc->cursg_ofs += count;
3776
32529e01 3777 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3778 qc->cursg++;
3779 qc->cursg_ofs = 0;
3780 }
3781
3782 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3783
3784 /* do the actual data transfer */
3785 ata_data_xfer(ap, buf, count, do_write);
3786
3787 kunmap(page);
3788
563a6e1f 3789 if (bytes)
1da177e4 3790 goto next_sg;
1da177e4
LT		 3791}
3792
6ae4cfb5
AL		 3793/**
3794 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3795 * @qc: Command on going
3796 *
3797 * Transfer Transfer data from/to the ATAPI device.
3798 *
3799 * LOCKING:
3800 * Inherited from caller.
6ae4cfb5
AL		 3801 */
3802
1da177e4
LT		 3803static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3804{
3805 struct ata_port *ap = qc->ap;
3806 struct ata_device *dev = qc->dev;
3807 unsigned int ireason, bc_lo, bc_hi, bytes;
3808 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3809
3810 ap->ops->tf_read(ap, &qc->tf);
3811 ireason = qc->tf.nsect;
3812 bc_lo = qc->tf.lbam;
3813 bc_hi = qc->tf.lbah;
3814 bytes = (bc_hi << 8) | bc_lo;
3815
3816 /* shall be cleared to zero, indicating xfer of data */
3817 if (ireason & (1 << 0))
3818 goto err_out;
3819
3820 /* make sure transfer direction matches expected */
3821 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3822 if (do_write != i_write)
3823 goto err_out;
3824
3825 __atapi_pio_bytes(qc, bytes);
3826
3827 return;
3828
3829err_out:
3830 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3831 ap->id, dev->devno);
11a56d24 3832 qc->err_mask |= AC_ERR_HSM;
14be71f4 3833 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3834}
3835
3836/**
6f0ef4fa 3837 * ata_pio_block - start PIO on a block
c91af2c8 3838 * @qc: qc to transfer block for
1da177e4
LT		 3839 *
3840 * LOCKING:
0cba632b 3841 * None. (executing in kernel thread context)
1da177e4 3842 */
c91af2c8 3843static void ata_pio_block(struct ata_queued_cmd *qc)
1da177e4 3844{
c91af2c8 3845 struct ata_port *ap = qc->ap;
1da177e4
LT		 3846 u8 status;
3847
3848 /*
6f0ef4fa 3849 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3850 * Sometimes when we enter, BSY will be cleared in
3851 * a chk-status or two. If not, the drive is probably seeking
3852 * or something. Snooze for a couple msecs, then
3853 * chk-status again. If still busy, fall back to
14be71f4 3854 * HSM_ST_POLL state.
1da177e4
LT		 3855 */
3856 status = ata_busy_wait(ap, ATA_BUSY, 5);
3857 if (status & ATA_BUSY) {
3858 msleep(2);
3859 status = ata_busy_wait(ap, ATA_BUSY, 10);
3860 if (status & ATA_BUSY) {
14be71f4 3861 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3862 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3863 return;
3864 }
3865 }
3866
fe79e683
AL		 3867 /* check error */
3868 if (status & (ATA_ERR | ATA_DF)) {
3869 qc->err_mask |= AC_ERR_DEV;
3870 ap->hsm_task_state = HSM_ST_ERR;
3871 return;
3872 }
3873
3874 /* transfer data if any */
1da177e4 3875 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3876 /* DRQ=0 means no more data to transfer */
1da177e4 3877 if ((status & ATA_DRQ) == 0) {
14be71f4 3878 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3879 return;
3880 }
3881
3882 atapi_pio_bytes(qc);
3883 } else {
3884 /* handle BSY=0, DRQ=0 as error */
3885 if ((status & ATA_DRQ) == 0) {
11a56d24 3886 qc->err_mask |= AC_ERR_HSM;
14be71f4 3887 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3888 return;
3889 }
3890
3891 ata_pio_sector(qc);
3892 }
3893}
3894
c91af2c8 3895static void ata_pio_error(struct ata_queued_cmd *qc)
1da177e4 3896{
c91af2c8 3897 struct ata_port *ap = qc->ap;
1da177e4 3898
0565c26d 3899 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3900 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3901 ap->id, qc->dev->devno);
0565c26d 3902
2e9edbf8 3903 /* make sure qc->err_mask is available to
1c848984
AL		 3904 * know what's wrong and recover
3905 */
a4631474 3906 WARN_ON(qc->err_mask == 0);
1c848984 3907
14be71f4 3908 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3909
a22e2eb0 3910 ata_poll_qc_complete(qc);
1da177e4
LT		 3911}
3912
3913static void ata_pio_task(void *_data)
3914{
c91af2c8
TH		 3915 struct ata_queued_cmd *qc = _data;
3916 struct ata_port *ap = qc->ap;
7fb6ec28
JG		 3917 unsigned long timeout;
3918 int qc_completed;
3919
3920fsm_start:
3921 timeout = 0;
3922 qc_completed = 0;
1da177e4 3923
14be71f4
AL		 3924 switch (ap->hsm_task_state) {
3925 case HSM_ST_IDLE:
1da177e4
LT		 3926 return;
3927
14be71f4 3928 case HSM_ST:
c91af2c8 3929 ata_pio_block(qc);
1da177e4
LT		 3930 break;
3931
14be71f4 3932 case HSM_ST_LAST:
c91af2c8 3933 qc_completed = ata_pio_complete(qc);
1da177e4
LT		 3934 break;
3935
14be71f4
AL		 3936 case HSM_ST_POLL:
3937 case HSM_ST_LAST_POLL:
c91af2c8 3938 timeout = ata_pio_poll(qc);
1da177e4
LT		 3939 break;
3940
14be71f4
AL		 3941 case HSM_ST_TMOUT:
3942 case HSM_ST_ERR:
c91af2c8 3943 ata_pio_error(qc);
1da177e4
LT		 3944 return;
3945 }
3946
3947 if (timeout)
c91af2c8 3948 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
7fb6ec28
JG		 3949 else if (!qc_completed)
3950 goto fsm_start;
1da177e4
LT		 3951}
3952
8061f5f0
TH		 3953/**
3954 * atapi_packet_task - Write CDB bytes to hardware
c91af2c8 3955 * @_data: qc in progress
8061f5f0
TH		 3956 *
3957 * When device has indicated its readiness to accept
3958 * a CDB, this function is called. Send the CDB.
3959 * If DMA is to be performed, exit immediately.
3960 * Otherwise, we are in polling mode, so poll
3961 * status under operation succeeds or fails.
3962 *
3963 * LOCKING:
3964 * Kernel thread context (may sleep)
3965 */
8061f5f0
TH		 3966static void atapi_packet_task(void *_data)
3967{
c91af2c8
TH		 3968 struct ata_queued_cmd *qc = _data;
3969 struct ata_port *ap = qc->ap;
8061f5f0
TH		 3970 u8 status;
3971
8061f5f0
TH		 3972 /* sleep-wait for BSY to clear */
3973 DPRINTK("busy wait\n");
3974 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3975 qc->err_mask |= AC_ERR_TIMEOUT;
3976 goto err_out;
3977 }
3978
3979 /* make sure DRQ is set */
3980 status = ata_chk_status(ap);
3981 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3982 qc->err_mask |= AC_ERR_HSM;
3983 goto err_out;
3984 }
3985
3986 /* send SCSI cdb */
3987 DPRINTK("send cdb\n");
3988 WARN_ON(qc->dev->cdb_len < 12);
3989
3990 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3991 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3992 unsigned long flags;
3993
3994 /* Once we're done issuing command and kicking bmdma,
3995 * irq handler takes over. To not lose irq, we need
3996 * to clear NOINTR flag before sending cdb, but
3997 * interrupt handler shouldn't be invoked before we're
3998 * finished. Hence, the following locking.
3999 */
4000 spin_lock_irqsave(&ap->host_set->lock, flags);
4001 ap->flags &= ~ATA_FLAG_NOINTR;
4002 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4003 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4004 ap->ops->bmdma_start(qc); /* initiate bmdma */
4005 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4006 } else {
4007 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4008
4009 /* PIO commands are handled by polling */
4010 ap->hsm_task_state = HSM_ST;
c91af2c8 4011 ata_port_queue_task(ap, ata_pio_task, qc, 0);
8061f5f0
TH		 4012 }
4013
4014 return;
4015
4016err_out:
4017 ata_poll_qc_complete(qc);
4018}
4019
1da177e4
LT		 4020/**
4021 * ata_qc_new - Request an available ATA command, for queueing
4022 * @ap: Port associated with device @dev
4023 * @dev: Device from whom we request an available command structure
4024 *
4025 * LOCKING:
0cba632b 4026 * None.
1da177e4
LT		 4027 */
4028
4029static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4030{
4031 struct ata_queued_cmd *qc = NULL;
4032 unsigned int i;
4033
4034 for (i = 0; i < ATA_MAX_QUEUE; i++)
4035 if (!test_and_set_bit(i, &ap->qactive)) {
4036 qc = ata_qc_from_tag(ap, i);
4037 break;
4038 }
4039
4040 if (qc)
4041 qc->tag = i;
4042
4043 return qc;
4044}
4045
4046/**
4047 * ata_qc_new_init - Request an available ATA command, and initialize it
4048 * @ap: Port associated with device @dev
4049 * @dev: Device from whom we request an available command structure
4050 *
4051 * LOCKING:
0cba632b 4052 * None.
1da177e4
LT		 4053 */
4054
4055struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4056 struct ata_device *dev)
4057{
4058 struct ata_queued_cmd *qc;
4059
4060 qc = ata_qc_new(ap);
4061 if (qc) {
1da177e4
LT		 4062 qc->scsicmd = NULL;
4063 qc->ap = ap;
4064 qc->dev = dev;
1da177e4 4065
2c13b7ce 4066 ata_qc_reinit(qc);
1da177e4
LT		 4067 }
4068
4069 return qc;
4070}
4071
1da177e4
LT		 4072/**
4073 * ata_qc_free - free unused ata_queued_cmd
4074 * @qc: Command to complete
4075 *
4076 * Designed to free unused ata_queued_cmd object
4077 * in case something prevents using it.
4078 *
4079 * LOCKING:
0cba632b 4080 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4081 */
4082void ata_qc_free(struct ata_queued_cmd *qc)
4083{
4ba946e9
TH		 4084 struct ata_port *ap = qc->ap;
4085 unsigned int tag;
4086
a4631474 4087 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4088
4ba946e9
TH		 4089 qc->flags = 0;
4090 tag = qc->tag;
4091 if (likely(ata_tag_valid(tag))) {
4ba946e9
TH		 4092 qc->tag = ATA_TAG_POISON;
4093 clear_bit(tag, &ap->qactive);
4094 }
1da177e4
LT		 4095}
4096
76014427 4097void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4098{
a4631474
TH		 4099 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4100 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4101
4102 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4103 ata_sg_clean(qc);
4104
7401abf2
TH		 4105 /* command should be marked inactive atomically with qc completion */
4106 qc->ap->active_tag = ATA_TAG_POISON;
4107
3f3791d3
AL		 4108 /* atapi: mark qc as inactive to prevent the interrupt handler
4109 * from completing the command twice later, before the error handler
4110 * is called. (when rc != 0 and atapi request sense is needed)
4111 */
4112 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4113
1da177e4 4114 /* call completion callback */
77853bf2 4115 qc->complete_fn(qc);
1da177e4
LT		 4116}
4117
4118static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4119{
4120 struct ata_port *ap = qc->ap;
4121
4122 switch (qc->tf.protocol) {
4123 case ATA_PROT_DMA:
4124 case ATA_PROT_ATAPI_DMA:
4125 return 1;
4126
4127 case ATA_PROT_ATAPI:
4128 case ATA_PROT_PIO:
1da177e4
LT		 4129 if (ap->flags & ATA_FLAG_PIO_DMA)
4130 return 1;
4131
4132 /* fall through */
4133
4134 default:
4135 return 0;
4136 }
4137
4138 /* never reached */
4139}
4140
4141/**
4142 * ata_qc_issue - issue taskfile to device
4143 * @qc: command to issue to device
4144 *
4145 * Prepare an ATA command to submission to device.
4146 * This includes mapping the data into a DMA-able
4147 * area, filling in the S/G table, and finally
4148 * writing the taskfile to hardware, starting the command.
4149 *
4150 * LOCKING:
4151 * spin_lock_irqsave(host_set lock)
1da177e4 4152 */
8e0e694a 4153void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4154{
4155 struct ata_port *ap = qc->ap;
4156
e4a70e76
TH		 4157 qc->ap->active_tag = qc->tag;
4158 qc->flags |= ATA_QCFLAG_ACTIVE;
4159
1da177e4
LT		 4160 if (ata_should_dma_map(qc)) {
4161 if (qc->flags & ATA_QCFLAG_SG) {
4162 if (ata_sg_setup(qc))
8e436af9 4163 goto sg_err;
1da177e4
LT		 4164 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4165 if (ata_sg_setup_one(qc))
8e436af9 4166 goto sg_err;
1da177e4
LT		 4167 }
4168 } else {
4169 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4170 }
4171
4172 ap->ops->qc_prep(qc);
4173
8e0e694a
TH		 4174 qc->err_mask |= ap->ops->qc_issue(qc);
4175 if (unlikely(qc->err_mask))
4176 goto err;
4177 return;
1da177e4 4178
8e436af9
TH		 4179sg_err:
4180 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4181 qc->err_mask |= AC_ERR_SYSTEM;
4182err:
4183 ata_qc_complete(qc);
1da177e4
LT		 4184}
4185
4186/**
4187 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4188 * @qc: command to issue to device
4189 *
4190 * Using various libata functions and hooks, this function
4191 * starts an ATA command. ATA commands are grouped into
4192 * classes called "protocols", and issuing each type of protocol
4193 * is slightly different.
4194 *
0baab86b
EF		 4195 * May be used as the qc_issue() entry in ata_port_operations.
4196 *
1da177e4
LT		 4197 * LOCKING:
4198 * spin_lock_irqsave(host_set lock)
4199 *
4200 * RETURNS:
9a3d9eb0 4201 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4202 */
4203
9a3d9eb0 4204unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4205{
4206 struct ata_port *ap = qc->ap;
4207
4208 ata_dev_select(ap, qc->dev->devno, 1, 0);
4209
4210 switch (qc->tf.protocol) {
4211 case ATA_PROT_NODATA:
e5338254 4212 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4213 break;
4214
4215 case ATA_PROT_DMA:
4216 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4217 ap->ops->bmdma_setup(qc); /* set up bmdma */
4218 ap->ops->bmdma_start(qc); /* initiate bmdma */
4219 break;
4220
4221 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4222 ata_qc_set_polling(qc);
e5338254 4223 ata_tf_to_host(ap, &qc->tf);
14be71f4 4224 ap->hsm_task_state = HSM_ST;
c91af2c8 4225 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4226 break;
4227
4228 case ATA_PROT_ATAPI:
4229 ata_qc_set_polling(qc);
e5338254 4230 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4231 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4232 break;
4233
4234 case ATA_PROT_ATAPI_NODATA:
c1389503 4235 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4236 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4237 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4238 break;
4239
4240 case ATA_PROT_ATAPI_DMA:
c1389503 4241 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4242 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4243 ap->ops->bmdma_setup(qc); /* set up bmdma */
c91af2c8 4244 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4245 break;
4246
4247 default:
4248 WARN_ON(1);
9a3d9eb0 4249 return AC_ERR_SYSTEM;
1da177e4
LT		 4250 }
4251
4252 return 0;
4253}
4254
1da177e4
LT		 4255/**
4256 * ata_host_intr - Handle host interrupt for given (port, task)
4257 * @ap: Port on which interrupt arrived (possibly...)
4258 * @qc: Taskfile currently active in engine
4259 *
4260 * Handle host interrupt for given queued command. Currently,
4261 * only DMA interrupts are handled. All other commands are
4262 * handled via polling with interrupts disabled (nIEN bit).
4263 *
4264 * LOCKING:
4265 * spin_lock_irqsave(host_set lock)
4266 *
4267 * RETURNS:
4268 * One if interrupt was handled, zero if not (shared irq).
4269 */
4270
4271inline unsigned int ata_host_intr (struct ata_port *ap,
4272 struct ata_queued_cmd *qc)
4273{
4274 u8 status, host_stat;
4275
4276 switch (qc->tf.protocol) {
4277
4278 case ATA_PROT_DMA:
4279 case ATA_PROT_ATAPI_DMA:
4280 case ATA_PROT_ATAPI:
4281 /* check status of DMA engine */
4282 host_stat = ap->ops->bmdma_status(ap);
4283 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4284
4285 /* if it's not our irq... */
4286 if (!(host_stat & ATA_DMA_INTR))
4287 goto idle_irq;
4288
4289 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4290 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4291
4292 /* fall through */
4293
4294 case ATA_PROT_ATAPI_NODATA:
4295 case ATA_PROT_NODATA:
4296 /* check altstatus */
4297 status = ata_altstatus(ap);
4298 if (status & ATA_BUSY)
4299 goto idle_irq;
4300
4301 /* check main status, clearing INTRQ */
4302 status = ata_chk_status(ap);
4303 if (unlikely(status & ATA_BUSY))
4304 goto idle_irq;
4305 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4306 ap->id, qc->tf.protocol, status);
4307
4308 /* ack bmdma irq events */
4309 ap->ops->irq_clear(ap);
4310
4311 /* complete taskfile transaction */
a22e2eb0
AL		 4312 qc->err_mask |= ac_err_mask(status);
4313 ata_qc_complete(qc);
1da177e4
LT		 4314 break;
4315
4316 default:
4317 goto idle_irq;
4318 }
4319
4320 return 1; /* irq handled */
4321
4322idle_irq:
4323 ap->stats.idle_irq++;
4324
4325#ifdef ATA_IRQ_TRAP
4326 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4327 ata_irq_ack(ap, 0); /* debug trap */
4328 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4329 return 1;
1da177e4
LT		 4330 }
4331#endif
4332 return 0; /* irq not handled */
4333}
4334
4335/**
4336 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4337 * @irq: irq line (unused)
4338 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4339 * @regs: unused
4340 *
0cba632b
JG		 4341 * Default interrupt handler for PCI IDE devices. Calls
4342 * ata_host_intr() for each port that is not disabled.
4343 *
1da177e4 4344 * LOCKING:
0cba632b 4345 * Obtains host_set lock during operation.
1da177e4
LT		 4346 *
4347 * RETURNS:
0cba632b 4348 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4349 */
4350
4351irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4352{
4353 struct ata_host_set *host_set = dev_instance;
4354 unsigned int i;
4355 unsigned int handled = 0;
4356 unsigned long flags;
4357
4358 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4359 spin_lock_irqsave(&host_set->lock, flags);
4360
4361 for (i = 0; i < host_set->n_ports; i++) {
4362 struct ata_port *ap;
4363
4364 ap = host_set->ports[i];
c1389503 4365 if (ap &&
198e0fed 4366 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4367 struct ata_queued_cmd *qc;
4368
4369 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4370 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4371 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4372 handled |= ata_host_intr(ap, qc);
4373 }
4374 }
4375
4376 spin_unlock_irqrestore(&host_set->lock, flags);
4377
4378 return IRQ_RETVAL(handled);
4379}
4380
34bf2170
TH		 4381/**
4382 * sata_scr_valid - test whether SCRs are accessible
4383 * @ap: ATA port to test SCR accessibility for
4384 *
4385 * Test whether SCRs are accessible for @ap.
4386 *
4387 * LOCKING:
4388 * None.
4389 *
4390 * RETURNS:
4391 * 1 if SCRs are accessible, 0 otherwise.
4392 */
4393int sata_scr_valid(struct ata_port *ap)
4394{
4395 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4396}
4397
4398/**
4399 * sata_scr_read - read SCR register of the specified port
4400 * @ap: ATA port to read SCR for
4401 * @reg: SCR to read
4402 * @val: Place to store read value
4403 *
4404 * Read SCR register @reg of @ap into *@val. This function is
4405 * guaranteed to succeed if the cable type of the port is SATA
4406 * and the port implements ->scr_read.
4407 *
4408 * LOCKING:
4409 * None.
4410 *
4411 * RETURNS:
4412 * 0 on success, negative errno on failure.
4413 */
4414int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4415{
4416 if (sata_scr_valid(ap)) {
4417 *val = ap->ops->scr_read(ap, reg);
4418 return 0;
4419 }
4420 return -EOPNOTSUPP;
4421}
4422
4423/**
4424 * sata_scr_write - write SCR register of the specified port
4425 * @ap: ATA port to write SCR for
4426 * @reg: SCR to write
4427 * @val: value to write
4428 *
4429 * Write @val to SCR register @reg of @ap. This function is
4430 * guaranteed to succeed if the cable type of the port is SATA
4431 * and the port implements ->scr_read.
4432 *
4433 * LOCKING:
4434 * None.
4435 *
4436 * RETURNS:
4437 * 0 on success, negative errno on failure.
4438 */
4439int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4440{
4441 if (sata_scr_valid(ap)) {
4442 ap->ops->scr_write(ap, reg, val);
4443 return 0;
4444 }
4445 return -EOPNOTSUPP;
4446}
4447
4448/**
4449 * sata_scr_write_flush - write SCR register of the specified port and flush
4450 * @ap: ATA port to write SCR for
4451 * @reg: SCR to write
4452 * @val: value to write
4453 *
4454 * This function is identical to sata_scr_write() except that this
4455 * function performs flush after writing to the register.
4456 *
4457 * LOCKING:
4458 * None.
4459 *
4460 * RETURNS:
4461 * 0 on success, negative errno on failure.
4462 */
4463int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4464{
4465 if (sata_scr_valid(ap)) {
4466 ap->ops->scr_write(ap, reg, val);
4467 ap->ops->scr_read(ap, reg);
4468 return 0;
4469 }
4470 return -EOPNOTSUPP;
4471}
4472
4473/**
4474 * ata_port_online - test whether the given port is online
4475 * @ap: ATA port to test
4476 *
4477 * Test whether @ap is online. Note that this function returns 0
4478 * if online status of @ap cannot be obtained, so
4479 * ata_port_online(ap) != !ata_port_offline(ap).
4480 *
4481 * LOCKING:
4482 * None.
4483 *
4484 * RETURNS:
4485 * 1 if the port online status is available and online.
4486 */
4487int ata_port_online(struct ata_port *ap)
4488{
4489 u32 sstatus;
4490
4491 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4492 return 1;
4493 return 0;
4494}
4495
4496/**
4497 * ata_port_offline - test whether the given port is offline
4498 * @ap: ATA port to test
4499 *
4500 * Test whether @ap is offline. Note that this function returns
4501 * 0 if offline status of @ap cannot be obtained, so
4502 * ata_port_online(ap) != !ata_port_offline(ap).
4503 *
4504 * LOCKING:
4505 * None.
4506 *
4507 * RETURNS:
4508 * 1 if the port offline status is available and offline.
4509 */
4510int ata_port_offline(struct ata_port *ap)
4511{
4512 u32 sstatus;
4513
4514 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4515 return 1;
4516 return 0;
4517}
0baab86b 4518
9b847548
JA		 4519/*
4520 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4521 * without filling any other registers
4522 */
4523static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4524 u8 cmd)
4525{
4526 struct ata_taskfile tf;
4527 int err;
4528
4529 ata_tf_init(ap, &tf, dev->devno);
4530
4531 tf.command = cmd;
4532 tf.flags |= ATA_TFLAG_DEVICE;
4533 tf.protocol = ATA_PROT_NODATA;
4534
d69cf37d 4535 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
9b847548
JA		 4536 if (err)
4537 printk(KERN_ERR "%s: ata command failed: %d\n",
4538 __FUNCTION__, err);
4539
4540 return err;
4541}
4542
4543static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4544{
4545 u8 cmd;
4546
4547 if (!ata_try_flush_cache(dev))
4548 return 0;
4549
4550 if (ata_id_has_flush_ext(dev->id))
4551 cmd = ATA_CMD_FLUSH_EXT;
4552 else
4553 cmd = ATA_CMD_FLUSH;
4554
4555 return ata_do_simple_cmd(ap, dev, cmd);
4556}
4557
4558static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4559{
4560 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4561}
4562
4563static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4564{
4565 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4566}
4567
4568/**
4569 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4570 * @ap: port the device is connected to
4571 * @dev: the device to resume
9b847548
JA		 4572 *
4573 * Kick the drive back into action, by sending it an idle immediate
4574 * command and making sure its transfer mode matches between drive
4575 * and host.
4576 *
4577 */
4578int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4579{
4580 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4581 struct ata_device *failed_dev;
9b847548 4582 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4583 while (ata_set_mode(ap, &failed_dev))
4584 ata_dev_disable(ap, failed_dev);
9b847548 4585 }
e1211e3f 4586 if (!ata_dev_enabled(dev))
9b847548
JA		 4587 return 0;
4588 if (dev->class == ATA_DEV_ATA)
4589 ata_start_drive(ap, dev);
4590
4591 return 0;
4592}
4593
4594/**
4595 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4596 * @ap: port the device is connected to
4597 * @dev: the device to suspend
9b847548
JA		 4598 *
4599 * Flush the cache on the drive, if appropriate, then issue a
4600 * standbynow command.
9b847548 4601 */
082776e4 4602int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4603{
e1211e3f 4604 if (!ata_dev_enabled(dev))
9b847548
JA		 4605 return 0;
4606 if (dev->class == ATA_DEV_ATA)
4607 ata_flush_cache(ap, dev);
4608
082776e4
NC		 4609 if (state.event != PM_EVENT_FREEZE)
4610 ata_standby_drive(ap, dev);
9b847548
JA		 4611 ap->flags |= ATA_FLAG_SUSPENDED;
4612 return 0;
4613}
4614
c893a3ae
RD		 4615/**
4616 * ata_port_start - Set port up for dma.
4617 * @ap: Port to initialize
4618 *
4619 * Called just after data structures for each port are
4620 * initialized. Allocates space for PRD table.
4621 *
4622 * May be used as the port_start() entry in ata_port_operations.
4623 *
4624 * LOCKING:
4625 * Inherited from caller.
4626 */
4627
1da177e4
LT		 4628int ata_port_start (struct ata_port *ap)
4629{
2f1f610b 4630 struct device *dev = ap->dev;
6037d6bb 4631 int rc;
1da177e4
LT		 4632
4633 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4634 if (!ap->prd)
4635 return -ENOMEM;
4636
6037d6bb
JG		 4637 rc = ata_pad_alloc(ap, dev);
4638 if (rc) {
cedc9a47 4639 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4640 return rc;
cedc9a47
JG		 4641 }
4642
1da177e4
LT		 4643 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4644
4645 return 0;
4646}
4647
0baab86b
EF		 4648
4649/**
4650 * ata_port_stop - Undo ata_port_start()
4651 * @ap: Port to shut down
4652 *
4653 * Frees the PRD table.
4654 *
4655 * May be used as the port_stop() entry in ata_port_operations.
4656 *
4657 * LOCKING:
6f0ef4fa 4658 * Inherited from caller.
0baab86b
EF		 4659 */
4660
1da177e4
LT		 4661void ata_port_stop (struct ata_port *ap)
4662{
2f1f610b 4663 struct device *dev = ap->dev;
1da177e4
LT		 4664
4665 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4666 ata_pad_free(ap, dev);
1da177e4
LT		 4667}
4668
aa8f0dc6
JG		 4669void ata_host_stop (struct ata_host_set *host_set)
4670{
4671 if (host_set->mmio_base)
4672 iounmap(host_set->mmio_base);
4673}
4674
4675
1da177e4
LT		 4676/**
4677 * ata_host_remove - Unregister SCSI host structure with upper layers
4678 * @ap: Port to unregister
4679 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4680 *
4681 * LOCKING:
6f0ef4fa 4682 * Inherited from caller.
1da177e4
LT		 4683 */
4684
4685static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4686{
4687 struct Scsi_Host *sh = ap->host;
4688
4689 DPRINTK("ENTER\n");
4690
4691 if (do_unregister)
4692 scsi_remove_host(sh);
4693
4694 ap->ops->port_stop(ap);
4695}
4696
4697/**
4698 * ata_host_init - Initialize an ata_port structure
4699 * @ap: Structure to initialize
4700 * @host: associated SCSI mid-layer structure
4701 * @host_set: Collection of hosts to which @ap belongs
4702 * @ent: Probe information provided by low-level driver
4703 * @port_no: Port number associated with this ata_port
4704 *
0cba632b
JG		 4705 * Initialize a new ata_port structure, and its associated
4706 * scsi_host.
4707 *
1da177e4 4708 * LOCKING:
0cba632b 4709 * Inherited from caller.
1da177e4
LT		 4710 */
4711
4712static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4713 struct ata_host_set *host_set,
057ace5e 4714 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4715{
4716 unsigned int i;
4717
4718 host->max_id = 16;
4719 host->max_lun = 1;
4720 host->max_channel = 1;
4721 host->unique_id = ata_unique_id++;
4722 host->max_cmd_len = 12;
12413197 4723
198e0fed 4724 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4725 ap->id = host->unique_id;
4726 ap->host = host;
4727 ap->ctl = ATA_DEVCTL_OBS;
4728 ap->host_set = host_set;
2f1f610b 4729 ap->dev = ent->dev;
1da177e4
LT		 4730 ap->port_no = port_no;
4731 ap->hard_port_no =
4732 ent->legacy_mode ? ent->hard_port_no : port_no;
4733 ap->pio_mask = ent->pio_mask;
4734 ap->mwdma_mask = ent->mwdma_mask;
4735 ap->udma_mask = ent->udma_mask;
4736 ap->flags |= ent->host_flags;
4737 ap->ops = ent->port_ops;
1c3fae4d 4738 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4739 ap->active_tag = ATA_TAG_POISON;
4740 ap->last_ctl = 0xFF;
4741
86e45b6b 4742 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4743 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4744
838df628
TH		 4745 /* set cable type */
4746 ap->cbl = ATA_CBL_NONE;
4747 if (ap->flags & ATA_FLAG_SATA)
4748 ap->cbl = ATA_CBL_SATA;
4749
acf356b1
TH		 4750 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4751 struct ata_device *dev = &ap->device[i];
38d87234 4752 dev->ap = ap;
acf356b1
TH		 4753 dev->devno = i;
4754 dev->pio_mask = UINT_MAX;
4755 dev->mwdma_mask = UINT_MAX;
4756 dev->udma_mask = UINT_MAX;
4757 }
1da177e4
LT		 4758
4759#ifdef ATA_IRQ_TRAP
4760 ap->stats.unhandled_irq = 1;
4761 ap->stats.idle_irq = 1;
4762#endif
4763
4764 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4765}
4766
4767/**
4768 * ata_host_add - Attach low-level ATA driver to system
4769 * @ent: Information provided by low-level driver
4770 * @host_set: Collections of ports to which we add
4771 * @port_no: Port number associated with this host
4772 *
0cba632b
JG		 4773 * Attach low-level ATA driver to system.
4774 *
1da177e4 4775 * LOCKING:
0cba632b 4776 * PCI/etc. bus probe sem.
1da177e4
LT		 4777 *
4778 * RETURNS:
0cba632b 4779 * New ata_port on success, for NULL on error.
1da177e4
LT		 4780 */
4781
057ace5e 4782static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4783 struct ata_host_set *host_set,
4784 unsigned int port_no)
4785{
4786 struct Scsi_Host *host;
4787 struct ata_port *ap;
4788 int rc;
4789
4790 DPRINTK("ENTER\n");
aec5c3c1
TH		 4791
4792 if (!ent->port_ops->probe_reset &&
4793 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4794 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4795 port_no);
4796 return NULL;
4797 }
4798
1da177e4
LT		 4799 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4800 if (!host)
4801 return NULL;
4802
30afc84c
TH		 4803 host->transportt = &ata_scsi_transport_template;
4804
35bb94b1 4805 ap = ata_shost_to_port(host);
1da177e4
LT		 4806
4807 ata_host_init(ap, host, host_set, ent, port_no);
4808
4809 rc = ap->ops->port_start(ap);
4810 if (rc)
4811 goto err_out;
4812
4813 return ap;
4814
4815err_out:
4816 scsi_host_put(host);
4817 return NULL;
4818}
4819
4820/**
0cba632b
JG		 4821 * ata_device_add - Register hardware device with ATA and SCSI layers
4822 * @ent: Probe information describing hardware device to be registered
4823 *
4824 * This function processes the information provided in the probe
4825 * information struct @ent, allocates the necessary ATA and SCSI
4826 * host information structures, initializes them, and registers
4827 * everything with requisite kernel subsystems.
4828 *
4829 * This function requests irqs, probes the ATA bus, and probes
4830 * the SCSI bus.
1da177e4
LT		 4831 *
4832 * LOCKING:
0cba632b 4833 * PCI/etc. bus probe sem.
1da177e4
LT		 4834 *
4835 * RETURNS:
0cba632b 4836 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4837 */
4838
057ace5e 4839int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4840{
4841 unsigned int count = 0, i;
4842 struct device *dev = ent->dev;
4843 struct ata_host_set *host_set;
4844
4845 DPRINTK("ENTER\n");
4846 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4847 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4848 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4849 if (!host_set)
4850 return 0;
1da177e4
LT		 4851 spin_lock_init(&host_set->lock);
4852
4853 host_set->dev = dev;
4854 host_set->n_ports = ent->n_ports;
4855 host_set->irq = ent->irq;
4856 host_set->mmio_base = ent->mmio_base;
4857 host_set->private_data = ent->private_data;
4858 host_set->ops = ent->port_ops;
5444a6f4 4859 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4860
4861 /* register each port bound to this device */
4862 for (i = 0; i < ent->n_ports; i++) {
4863 struct ata_port *ap;
4864 unsigned long xfer_mode_mask;
4865
4866 ap = ata_host_add(ent, host_set, i);
4867 if (!ap)
4868 goto err_out;
4869
4870 host_set->ports[i] = ap;
4871 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4872 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4873 (ap->pio_mask << ATA_SHIFT_PIO);
4874
4875 /* print per-port info to dmesg */
4876 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4877 "bmdma 0x%lX irq %lu\n",
4878 ap->id,
4879 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4880 ata_mode_string(xfer_mode_mask),
4881 ap->ioaddr.cmd_addr,
4882 ap->ioaddr.ctl_addr,
4883 ap->ioaddr.bmdma_addr,
4884 ent->irq);
4885
4886 ata_chk_status(ap);
4887 host_set->ops->irq_clear(ap);
4888 count++;
4889 }
4890
57f3bda8
RD		 4891 if (!count)
4892 goto err_free_ret;
1da177e4
LT		 4893
4894 /* obtain irq, that is shared between channels */
4895 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4896 DRV_NAME, host_set))
4897 goto err_out;
4898
4899 /* perform each probe synchronously */
4900 DPRINTK("probe begin\n");
4901 for (i = 0; i < count; i++) {
4902 struct ata_port *ap;
4903 int rc;
4904
4905 ap = host_set->ports[i];
4906
c893a3ae 4907 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4908 rc = ata_bus_probe(ap);
c893a3ae 4909 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4910
4911 if (rc) {
4912 /* FIXME: do something useful here?
4913 * Current libata behavior will
4914 * tear down everything when
4915 * the module is removed
4916 * or the h/w is unplugged.
4917 */
4918 }
4919
4920 rc = scsi_add_host(ap->host, dev);
4921 if (rc) {
4922 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4923 ap->id);
4924 /* FIXME: do something useful here */
4925 /* FIXME: handle unconditional calls to
4926 * scsi_scan_host and ata_host_remove, below,
4927 * at the very least
4928 */
4929 }
4930 }
4931
4932 /* probes are done, now scan each port's disk(s) */
c893a3ae 4933 DPRINTK("host probe begin\n");
1da177e4
LT		 4934 for (i = 0; i < count; i++) {
4935 struct ata_port *ap = host_set->ports[i];
4936
644dd0cc 4937 ata_scsi_scan_host(ap);
1da177e4
LT		 4938 }
4939
4940 dev_set_drvdata(dev, host_set);
4941
4942 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4943 return ent->n_ports; /* success */
4944
4945err_out:
4946 for (i = 0; i < count; i++) {
4947 ata_host_remove(host_set->ports[i], 1);
4948 scsi_host_put(host_set->ports[i]->host);
4949 }
57f3bda8 4950err_free_ret:
1da177e4
LT		 4951 kfree(host_set);
4952 VPRINTK("EXIT, returning 0\n");
4953 return 0;
4954}
4955
17b14451
AC		 4956/**
4957 * ata_host_set_remove - PCI layer callback for device removal
4958 * @host_set: ATA host set that was removed
4959 *
2e9edbf8 4960 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4961 * objects.
4962 *
4963 * LOCKING:
4964 * Inherited from calling layer (may sleep).
4965 */
4966
17b14451
AC		 4967void ata_host_set_remove(struct ata_host_set *host_set)
4968{
4969 struct ata_port *ap;
4970 unsigned int i;
4971
4972 for (i = 0; i < host_set->n_ports; i++) {
4973 ap = host_set->ports[i];
4974 scsi_remove_host(ap->host);
4975 }
4976
4977 free_irq(host_set->irq, host_set);
4978
4979 for (i = 0; i < host_set->n_ports; i++) {
4980 ap = host_set->ports[i];
4981
4982 ata_scsi_release(ap->host);
4983
4984 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4985 struct ata_ioports *ioaddr = &ap->ioaddr;
4986
4987 if (ioaddr->cmd_addr == 0x1f0)
4988 release_region(0x1f0, 8);
4989 else if (ioaddr->cmd_addr == 0x170)
4990 release_region(0x170, 8);
4991 }
4992
4993 scsi_host_put(ap->host);
4994 }
4995
4996 if (host_set->ops->host_stop)
4997 host_set->ops->host_stop(host_set);
4998
4999 kfree(host_set);
5000}
5001
1da177e4
LT		 5002/**
5003 * ata_scsi_release - SCSI layer callback hook for host unload
5004 * @host: libata host to be unloaded
5005 *
5006 * Performs all duties necessary to shut down a libata port...
5007 * Kill port kthread, disable port, and release resources.
5008 *
5009 * LOCKING:
5010 * Inherited from SCSI layer.
5011 *
5012 * RETURNS:
5013 * One.
5014 */
5015
5016int ata_scsi_release(struct Scsi_Host *host)
5017{
35bb94b1 5018 struct ata_port *ap = ata_shost_to_port(host);
1da177e4
LT		 5019
5020 DPRINTK("ENTER\n");
5021
5022 ap->ops->port_disable(ap);
5023 ata_host_remove(ap, 0);
5024
5025 DPRINTK("EXIT\n");
5026 return 1;
5027}
5028
5029/**
5030 * ata_std_ports - initialize ioaddr with standard port offsets.
5031 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 5032 *
5033 * Utility function which initializes data_addr, error_addr,
5034 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5035 * device_addr, status_addr, and command_addr to standard offsets
5036 * relative to cmd_addr.
5037 *
5038 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5039 */
0baab86b 5040
1da177e4
LT		 5041void ata_std_ports(struct ata_ioports *ioaddr)
5042{
5043 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5044 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5045 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5046 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5047 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5048 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5049 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5050 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5051 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5052 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5053}
5054
0baab86b 5055
374b1873
JG		 5056#ifdef CONFIG_PCI
5057
5058void ata_pci_host_stop (struct ata_host_set *host_set)
5059{
5060 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5061
5062 pci_iounmap(pdev, host_set->mmio_base);
5063}
5064
1da177e4
LT		 5065/**
5066 * ata_pci_remove_one - PCI layer callback for device removal
5067 * @pdev: PCI device that was removed
5068 *
5069 * PCI layer indicates to libata via this hook that
6f0ef4fa 5070 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5071 * Handle this by unregistering all objects associated
5072 * with this PCI device. Free those objects. Then finally
5073 * release PCI resources and disable device.
5074 *
5075 * LOCKING:
5076 * Inherited from PCI layer (may sleep).
5077 */
5078
5079void ata_pci_remove_one (struct pci_dev *pdev)
5080{
5081 struct device *dev = pci_dev_to_dev(pdev);
5082 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5083
17b14451 5084 ata_host_set_remove(host_set);
1da177e4
LT		 5085 pci_release_regions(pdev);
5086 pci_disable_device(pdev);
5087 dev_set_drvdata(dev, NULL);
5088}
5089
5090/* move to PCI subsystem */
057ace5e 5091int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5092{
5093 unsigned long tmp = 0;
5094
5095 switch (bits->width) {
5096 case 1: {
5097 u8 tmp8 = 0;
5098 pci_read_config_byte(pdev, bits->reg, &tmp8);
5099 tmp = tmp8;
5100 break;
5101 }
5102 case 2: {
5103 u16 tmp16 = 0;
5104 pci_read_config_word(pdev, bits->reg, &tmp16);
5105 tmp = tmp16;
5106 break;
5107 }
5108 case 4: {
5109 u32 tmp32 = 0;
5110 pci_read_config_dword(pdev, bits->reg, &tmp32);
5111 tmp = tmp32;
5112 break;
5113 }
5114
5115 default:
5116 return -EINVAL;
5117 }
5118
5119 tmp &= bits->mask;
5120
5121 return (tmp == bits->val) ? 1 : 0;
5122}
9b847548
JA		 5123
5124int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5125{
5126 pci_save_state(pdev);
5127 pci_disable_device(pdev);
5128 pci_set_power_state(pdev, PCI_D3hot);
5129 return 0;
5130}
5131
5132int ata_pci_device_resume(struct pci_dev *pdev)
5133{
5134 pci_set_power_state(pdev, PCI_D0);
5135 pci_restore_state(pdev);
5136 pci_enable_device(pdev);
5137 pci_set_master(pdev);
5138 return 0;
5139}
1da177e4
LT		 5140#endif /* CONFIG_PCI */
5141
5142
1da177e4
LT		 5143static int __init ata_init(void)
5144{
5145 ata_wq = create_workqueue("ata");
5146 if (!ata_wq)
5147 return -ENOMEM;
5148
5149 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5150 return 0;
5151}
5152
5153static void __exit ata_exit(void)
5154{
5155 destroy_workqueue(ata_wq);
5156}
5157
5158module_init(ata_init);
5159module_exit(ata_exit);
5160
67846b30
JG		 5161static unsigned long ratelimit_time;
5162static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5163
5164int ata_ratelimit(void)
5165{
5166 int rc;
5167 unsigned long flags;
5168
5169 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5170
5171 if (time_after(jiffies, ratelimit_time)) {
5172 rc = 1;
5173 ratelimit_time = jiffies + (HZ/5);
5174 } else
5175 rc = 0;
5176
5177 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5178
5179 return rc;
5180}
5181
c22daff4
TH		 5182/**
5183 * ata_wait_register - wait until register value changes
5184 * @reg: IO-mapped register
5185 * @mask: Mask to apply to read register value
5186 * @val: Wait condition
5187 * @interval_msec: polling interval in milliseconds
5188 * @timeout_msec: timeout in milliseconds
5189 *
5190 * Waiting for some bits of register to change is a common
5191 * operation for ATA controllers. This function reads 32bit LE
5192 * IO-mapped register @reg and tests for the following condition.
5193 *
5194 * (*@reg & mask) != val
5195 *
5196 * If the condition is met, it returns; otherwise, the process is
5197 * repeated after @interval_msec until timeout.
5198 *
5199 * LOCKING:
5200 * Kernel thread context (may sleep)
5201 *
5202 * RETURNS:
5203 * The final register value.
5204 */
5205u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5206 unsigned long interval_msec,
5207 unsigned long timeout_msec)
5208{
5209 unsigned long timeout;
5210 u32 tmp;
5211
5212 tmp = ioread32(reg);
5213
5214 /* Calculate timeout _after_ the first read to make sure
5215 * preceding writes reach the controller before starting to
5216 * eat away the timeout.
5217 */
5218 timeout = jiffies + (timeout_msec * HZ) / 1000;
5219
5220 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5221 msleep(interval_msec);
5222 tmp = ioread32(reg);
5223 }
5224
5225 return tmp;
5226}
5227
1da177e4
LT		 5228/*
5229 * libata is essentially a library of internal helper functions for
5230 * low-level ATA host controller drivers. As such, the API/ABI is
5231 * likely to change as new drivers are added and updated.
5232 * Do not depend on ABI/API stability.
5233 */
5234
5235EXPORT_SYMBOL_GPL(ata_std_bios_param);
5236EXPORT_SYMBOL_GPL(ata_std_ports);
5237EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5238EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5239EXPORT_SYMBOL_GPL(ata_sg_init);
5240EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5241EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4 5242EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 5243EXPORT_SYMBOL_GPL(ata_tf_load);
5244EXPORT_SYMBOL_GPL(ata_tf_read);
5245EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5246EXPORT_SYMBOL_GPL(ata_std_dev_select);
5247EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5248EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5249EXPORT_SYMBOL_GPL(ata_check_status);
5250EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5251EXPORT_SYMBOL_GPL(ata_exec_command);
5252EXPORT_SYMBOL_GPL(ata_port_start);
5253EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5254EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5255EXPORT_SYMBOL_GPL(ata_interrupt);
5256EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5257EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5258EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5259EXPORT_SYMBOL_GPL(ata_bmdma_start);
5260EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5261EXPORT_SYMBOL_GPL(ata_bmdma_status);
5262EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5263EXPORT_SYMBOL_GPL(ata_port_probe);
3c567b7d 5264EXPORT_SYMBOL_GPL(sata_set_spd);
1da177e4
LT		 5265EXPORT_SYMBOL_GPL(sata_phy_reset);
5266EXPORT_SYMBOL_GPL(__sata_phy_reset);
5267EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5268EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5269EXPORT_SYMBOL_GPL(ata_std_softreset);
5270EXPORT_SYMBOL_GPL(sata_std_hardreset);
5271EXPORT_SYMBOL_GPL(ata_std_postreset);
5272EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5273EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5274EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5275EXPORT_SYMBOL_GPL(ata_dev_classify);
5276EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5277EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5278EXPORT_SYMBOL_GPL(ata_ratelimit);
c22daff4 5279EXPORT_SYMBOL_GPL(ata_wait_register);
6f8b9958 5280EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5281EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5282EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5283EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4
LT		 5284EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5285EXPORT_SYMBOL_GPL(ata_scsi_release);
5286EXPORT_SYMBOL_GPL(ata_host_intr);
34bf2170
TH		 5287EXPORT_SYMBOL_GPL(sata_scr_valid);
5288EXPORT_SYMBOL_GPL(sata_scr_read);
5289EXPORT_SYMBOL_GPL(sata_scr_write);
5290EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5291EXPORT_SYMBOL_GPL(ata_port_online);
5292EXPORT_SYMBOL_GPL(ata_port_offline);
6a62a04d
TH		 5293EXPORT_SYMBOL_GPL(ata_id_string);
5294EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 5295EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5296
1bc4ccff 5297EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5298EXPORT_SYMBOL_GPL(ata_timing_compute);
5299EXPORT_SYMBOL_GPL(ata_timing_merge);
5300
1da177e4
LT		 5301#ifdef CONFIG_PCI
5302EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5303EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5304EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5305EXPORT_SYMBOL_GPL(ata_pci_init_one);
5306EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5307EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5308EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5309EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5310EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5311#endif /* CONFIG_PCI */
9b847548
JA		 5312
5313EXPORT_SYMBOL_GPL(ata_device_suspend);
5314EXPORT_SYMBOL_GPL(ata_device_resume);
5315EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5316EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636 5317
ece1d636
TH		 5318EXPORT_SYMBOL_GPL(ata_eng_timeout);
5319EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5320EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
Linux kernel - Deliverables
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