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libata: fix EH locking
[deliverable/linux.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4
LT		 1/*
2 libata-core.c - helper library for ATA
3
4 Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 Copyright 2003-2004 Jeff Garzik
6
7 The contents of this file are subject to the Open
8 Software License version 1.1 that can be found at
9 http://www.opensource.org/licenses/osl-1.1.txt and is included herein
10 by reference.
11
12 Alternatively, the contents of this file may be used under the terms
13 of the GNU General Public License version 2 (the "GPL") as distributed
14 in the kernel source COPYING file, in which case the provisions of
15 the GPL are applicable instead of the above. If you wish to allow
16 the use of your version of this file only under the terms of the
17 GPL and not to allow others to use your version of this file under
18 the OSL, indicate your decision by deleting the provisions above and
19 replace them with the notice and other provisions required by the GPL.
20 If you do not delete the provisions above, a recipient may use your
21 version of this file under either the OSL or the GPL.
22
23 */
24
25#include <linux/config.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/list.h>
31#include <linux/mm.h>
32#include <linux/highmem.h>
33#include <linux/spinlock.h>
34#include <linux/blkdev.h>
35#include <linux/delay.h>
36#include <linux/timer.h>
37#include <linux/interrupt.h>
38#include <linux/completion.h>
39#include <linux/suspend.h>
40#include <linux/workqueue.h>
41#include <scsi/scsi.h>
42#include "scsi.h"
43#include "scsi_priv.h"
44#include <scsi/scsi_host.h>
45#include <linux/libata.h>
46#include <asm/io.h>
47#include <asm/semaphore.h>
48#include <asm/byteorder.h>
49
50#include "libata.h"
51
52static unsigned int ata_busy_sleep (struct ata_port *ap,
53 unsigned long tmout_pat,
54 unsigned long tmout);
55static void ata_set_mode(struct ata_port *ap);
56static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
57static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift);
58static int fgb(u32 bitmap);
59static int ata_choose_xfer_mode(struct ata_port *ap,
60 u8 *xfer_mode_out,
61 unsigned int *xfer_shift_out);
62static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat);
63static void __ata_qc_complete(struct ata_queued_cmd *qc);
64
65static unsigned int ata_unique_id = 1;
66static struct workqueue_struct *ata_wq;
67
68MODULE_AUTHOR("Jeff Garzik");
69MODULE_DESCRIPTION("Library module for ATA devices");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72
73/**
74 * ata_tf_load - send taskfile registers to host controller
75 * @ap: Port to which output is sent
76 * @tf: ATA taskfile register set
77 *
78 * Outputs ATA taskfile to standard ATA host controller.
79 *
80 * LOCKING:
81 * Inherited from caller.
82 */
83
84static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
85{
86 struct ata_ioports *ioaddr = &ap->ioaddr;
87 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
88
89 if (tf->ctl != ap->last_ctl) {
90 outb(tf->ctl, ioaddr->ctl_addr);
91 ap->last_ctl = tf->ctl;
92 ata_wait_idle(ap);
93 }
94
95 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
96 outb(tf->hob_feature, ioaddr->feature_addr);
97 outb(tf->hob_nsect, ioaddr->nsect_addr);
98 outb(tf->hob_lbal, ioaddr->lbal_addr);
99 outb(tf->hob_lbam, ioaddr->lbam_addr);
100 outb(tf->hob_lbah, ioaddr->lbah_addr);
101 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
102 tf->hob_feature,
103 tf->hob_nsect,
104 tf->hob_lbal,
105 tf->hob_lbam,
106 tf->hob_lbah);
107 }
108
109 if (is_addr) {
110 outb(tf->feature, ioaddr->feature_addr);
111 outb(tf->nsect, ioaddr->nsect_addr);
112 outb(tf->lbal, ioaddr->lbal_addr);
113 outb(tf->lbam, ioaddr->lbam_addr);
114 outb(tf->lbah, ioaddr->lbah_addr);
115 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
116 tf->feature,
117 tf->nsect,
118 tf->lbal,
119 tf->lbam,
120 tf->lbah);
121 }
122
123 if (tf->flags & ATA_TFLAG_DEVICE) {
124 outb(tf->device, ioaddr->device_addr);
125 VPRINTK("device 0x%X\n", tf->device);
126 }
127
128 ata_wait_idle(ap);
129}
130
131/**
132 * ata_tf_load_mmio - send taskfile registers to host controller
133 * @ap: Port to which output is sent
134 * @tf: ATA taskfile register set
135 *
136 * Outputs ATA taskfile to standard ATA host controller using MMIO.
137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
142static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
143{
144 struct ata_ioports *ioaddr = &ap->ioaddr;
145 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
146
147 if (tf->ctl != ap->last_ctl) {
148 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
149 ap->last_ctl = tf->ctl;
150 ata_wait_idle(ap);
151 }
152
153 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
154 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
155 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
156 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
157 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
158 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
159 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
160 tf->hob_feature,
161 tf->hob_nsect,
162 tf->hob_lbal,
163 tf->hob_lbam,
164 tf->hob_lbah);
165 }
166
167 if (is_addr) {
168 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
169 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
170 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
171 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
172 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
173 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
174 tf->feature,
175 tf->nsect,
176 tf->lbal,
177 tf->lbam,
178 tf->lbah);
179 }
180
181 if (tf->flags & ATA_TFLAG_DEVICE) {
182 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
183 VPRINTK("device 0x%X\n", tf->device);
184 }
185
186 ata_wait_idle(ap);
187}
188
0baab86b
EF		 189
190/**
191 * ata_tf_load - send taskfile registers to host controller
192 * @ap: Port to which output is sent
193 * @tf: ATA taskfile register set
194 *
195 * Outputs ATA taskfile to standard ATA host controller using MMIO
196 * or PIO as indicated by the ATA_FLAG_MMIO flag.
197 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
198 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
199 * hob_lbal, hob_lbam, and hob_lbah.
200 *
201 * This function waits for idle (!BUSY and !DRQ) after writing
202 * registers. If the control register has a new value, this
203 * function also waits for idle after writing control and before
204 * writing the remaining registers.
205 *
206 * May be used as the tf_load() entry in ata_port_operations.
207 *
208 * LOCKING:
209 * Inherited from caller.
210 */
1da177e4
LT		 211void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
212{
213 if (ap->flags & ATA_FLAG_MMIO)
214 ata_tf_load_mmio(ap, tf);
215 else
216 ata_tf_load_pio(ap, tf);
217}
218
219/**
0baab86b 220 * ata_exec_command_pio - issue ATA command to host controller
1da177e4
LT		 221 * @ap: port to which command is being issued
222 * @tf: ATA taskfile register set
223 *
0baab86b 224 * Issues PIO write to ATA command register, with proper
1da177e4
LT		 225 * synchronization with interrupt handler / other threads.
226 *
227 * LOCKING:
228 * spin_lock_irqsave(host_set lock)
229 */
230
231static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
232{
233 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
234
235 outb(tf->command, ap->ioaddr.command_addr);
236 ata_pause(ap);
237}
238
239
240/**
241 * ata_exec_command_mmio - issue ATA command to host controller
242 * @ap: port to which command is being issued
243 * @tf: ATA taskfile register set
244 *
245 * Issues MMIO write to ATA command register, with proper
246 * synchronization with interrupt handler / other threads.
247 *
248 * LOCKING:
249 * spin_lock_irqsave(host_set lock)
250 */
251
252static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
253{
254 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
255
256 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
257 ata_pause(ap);
258}
259
0baab86b
EF		 260
261/**
262 * ata_exec_command - issue ATA command to host controller
263 * @ap: port to which command is being issued
264 * @tf: ATA taskfile register set
265 *
266 * Issues PIO/MMIO write to ATA command register, with proper
267 * synchronization with interrupt handler / other threads.
268 *
269 * LOCKING:
270 * spin_lock_irqsave(host_set lock)
271 */
1da177e4
LT		 272void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf)
273{
274 if (ap->flags & ATA_FLAG_MMIO)
275 ata_exec_command_mmio(ap, tf);
276 else
277 ata_exec_command_pio(ap, tf);
278}
279
280/**
281 * ata_exec - issue ATA command to host controller
282 * @ap: port to which command is being issued
283 * @tf: ATA taskfile register set
284 *
285 * Issues PIO/MMIO write to ATA command register, with proper
286 * synchronization with interrupt handler / other threads.
287 *
288 * LOCKING:
289 * Obtains host_set lock.
290 */
291
292static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf)
293{
294 unsigned long flags;
295
296 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
297 spin_lock_irqsave(&ap->host_set->lock, flags);
298 ap->ops->exec_command(ap, tf);
299 spin_unlock_irqrestore(&ap->host_set->lock, flags);
300}
301
302/**
303 * ata_tf_to_host - issue ATA taskfile to host controller
304 * @ap: port to which command is being issued
305 * @tf: ATA taskfile register set
306 *
307 * Issues ATA taskfile register set to ATA host controller,
308 * with proper synchronization with interrupt handler and
309 * other threads.
310 *
311 * LOCKING:
312 * Obtains host_set lock.
313 */
314
315static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf)
316{
317 ap->ops->tf_load(ap, tf);
318
319 ata_exec(ap, tf);
320}
321
322/**
323 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
324 * @ap: port to which command is being issued
325 * @tf: ATA taskfile register set
326 *
327 * Issues ATA taskfile register set to ATA host controller,
328 * with proper synchronization with interrupt handler and
329 * other threads.
330 *
331 * LOCKING:
332 * spin_lock_irqsave(host_set lock)
333 */
334
335void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf)
336{
337 ap->ops->tf_load(ap, tf);
338 ap->ops->exec_command(ap, tf);
339}
340
341/**
0baab86b 342 * ata_tf_read_pio - input device's ATA taskfile shadow registers
1da177e4
LT		 343 * @ap: Port from which input is read
344 * @tf: ATA taskfile register set for storing input
345 *
346 * Reads ATA taskfile registers for currently-selected device
347 * into @tf.
348 *
349 * LOCKING:
350 * Inherited from caller.
351 */
352
353static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
354{
355 struct ata_ioports *ioaddr = &ap->ioaddr;
356
357 tf->nsect = inb(ioaddr->nsect_addr);
358 tf->lbal = inb(ioaddr->lbal_addr);
359 tf->lbam = inb(ioaddr->lbam_addr);
360 tf->lbah = inb(ioaddr->lbah_addr);
361 tf->device = inb(ioaddr->device_addr);
362
363 if (tf->flags & ATA_TFLAG_LBA48) {
364 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
365 tf->hob_feature = inb(ioaddr->error_addr);
366 tf->hob_nsect = inb(ioaddr->nsect_addr);
367 tf->hob_lbal = inb(ioaddr->lbal_addr);
368 tf->hob_lbam = inb(ioaddr->lbam_addr);
369 tf->hob_lbah = inb(ioaddr->lbah_addr);
370 }
371}
372
373/**
374 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
375 * @ap: Port from which input is read
376 * @tf: ATA taskfile register set for storing input
377 *
378 * Reads ATA taskfile registers for currently-selected device
379 * into @tf via MMIO.
380 *
381 * LOCKING:
382 * Inherited from caller.
383 */
384
385static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
386{
387 struct ata_ioports *ioaddr = &ap->ioaddr;
388
389 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
390 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
391 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
392 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
393 tf->device = readb((void __iomem *)ioaddr->device_addr);
394
395 if (tf->flags & ATA_TFLAG_LBA48) {
396 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
397 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
398 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
399 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
400 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
401 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
402 }
403}
404
0baab86b
EF		 405
406/**
407 * ata_tf_read - input device's ATA taskfile shadow registers
408 * @ap: Port from which input is read
409 * @tf: ATA taskfile register set for storing input
410 *
411 * Reads ATA taskfile registers for currently-selected device
412 * into @tf.
413 *
414 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
415 * is set, also reads the hob registers.
416 *
417 * May be used as the tf_read() entry in ata_port_operations.
418 *
419 * LOCKING:
420 * Inherited from caller.
421 */
1da177e4
LT		 422void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
423{
424 if (ap->flags & ATA_FLAG_MMIO)
425 ata_tf_read_mmio(ap, tf);
426 else
427 ata_tf_read_pio(ap, tf);
428}
429
430/**
431 * ata_check_status_pio - Read device status reg & clear interrupt
432 * @ap: port where the device is
433 *
434 * Reads ATA taskfile status register for currently-selected device
0baab86b 435 * and return its value. This also clears pending interrupts
1da177e4
LT		 436 * from this device
437 *
438 * LOCKING:
439 * Inherited from caller.
440 */
441static u8 ata_check_status_pio(struct ata_port *ap)
442{
443 return inb(ap->ioaddr.status_addr);
444}
445
446/**
447 * ata_check_status_mmio - Read device status reg & clear interrupt
448 * @ap: port where the device is
449 *
450 * Reads ATA taskfile status register for currently-selected device
0baab86b 451 * via MMIO and return its value. This also clears pending interrupts
1da177e4
LT		 452 * from this device
453 *
454 * LOCKING:
455 * Inherited from caller.
456 */
457static u8 ata_check_status_mmio(struct ata_port *ap)
458{
459 return readb((void __iomem *) ap->ioaddr.status_addr);
460}
461
0baab86b
EF		 462
463/**
464 * ata_check_status - Read device status reg & clear interrupt
465 * @ap: port where the device is
466 *
467 * Reads ATA taskfile status register for currently-selected device
468 * and return its value. This also clears pending interrupts
469 * from this device
470 *
471 * May be used as the check_status() entry in ata_port_operations.
472 *
473 * LOCKING:
474 * Inherited from caller.
475 */
1da177e4
LT		 476u8 ata_check_status(struct ata_port *ap)
477{
478 if (ap->flags & ATA_FLAG_MMIO)
479 return ata_check_status_mmio(ap);
480 return ata_check_status_pio(ap);
481}
482
0baab86b
EF		 483
484/**
485 * ata_altstatus - Read device alternate status reg
486 * @ap: port where the device is
487 *
488 * Reads ATA taskfile alternate status register for
489 * currently-selected device and return its value.
490 *
491 * Note: may NOT be used as the check_altstatus() entry in
492 * ata_port_operations.
493 *
494 * LOCKING:
495 * Inherited from caller.
496 */
1da177e4
LT		 497u8 ata_altstatus(struct ata_port *ap)
498{
499 if (ap->ops->check_altstatus)
500 return ap->ops->check_altstatus(ap);
501
502 if (ap->flags & ATA_FLAG_MMIO)
503 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
504 return inb(ap->ioaddr.altstatus_addr);
505}
506
0baab86b
EF		 507
508/**
509 * ata_chk_err - Read device error reg
510 * @ap: port where the device is
511 *
512 * Reads ATA taskfile error register for
513 * currently-selected device and return its value.
514 *
515 * Note: may NOT be used as the check_err() entry in
516 * ata_port_operations.
517 *
518 * LOCKING:
519 * Inherited from caller.
520 */
1da177e4
LT		 521u8 ata_chk_err(struct ata_port *ap)
522{
523 if (ap->ops->check_err)
524 return ap->ops->check_err(ap);
525
526 if (ap->flags & ATA_FLAG_MMIO) {
527 return readb((void __iomem *) ap->ioaddr.error_addr);
528 }
529 return inb(ap->ioaddr.error_addr);
530}
531
532/**
533 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
534 * @tf: Taskfile to convert
535 * @fis: Buffer into which data will output
536 * @pmp: Port multiplier port
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
544
545void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp)
546{
547 fis[0] = 0x27; /* Register - Host to Device FIS */
548 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
549 bit 7 indicates Command FIS */
550 fis[2] = tf->command;
551 fis[3] = tf->feature;
552
553 fis[4] = tf->lbal;
554 fis[5] = tf->lbam;
555 fis[6] = tf->lbah;
556 fis[7] = tf->device;
557
558 fis[8] = tf->hob_lbal;
559 fis[9] = tf->hob_lbam;
560 fis[10] = tf->hob_lbah;
561 fis[11] = tf->hob_feature;
562
563 fis[12] = tf->nsect;
564 fis[13] = tf->hob_nsect;
565 fis[14] = 0;
566 fis[15] = tf->ctl;
567
568 fis[16] = 0;
569 fis[17] = 0;
570 fis[18] = 0;
571 fis[19] = 0;
572}
573
574/**
575 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
576 * @fis: Buffer from which data will be input
577 * @tf: Taskfile to output
578 *
579 * Converts a standard ATA taskfile to a Serial ATA
580 * FIS structure (Register - Host to Device).
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
586void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf)
587{
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602}
603
604/**
605 * ata_prot_to_cmd - determine which read/write opcodes to use
606 * @protocol: ATA_PROT_xxx taskfile protocol
607 * @lba48: true is lba48 is present
608 *
609 * Given necessary input, determine which read/write commands
610 * to use to transfer data.
611 *
612 * LOCKING:
613 * None.
614 */
615static int ata_prot_to_cmd(int protocol, int lba48)
616{
617 int rcmd = 0, wcmd = 0;
618
619 switch (protocol) {
620 case ATA_PROT_PIO:
621 if (lba48) {
622 rcmd = ATA_CMD_PIO_READ_EXT;
623 wcmd = ATA_CMD_PIO_WRITE_EXT;
624 } else {
625 rcmd = ATA_CMD_PIO_READ;
626 wcmd = ATA_CMD_PIO_WRITE;
627 }
628 break;
629
630 case ATA_PROT_DMA:
631 if (lba48) {
632 rcmd = ATA_CMD_READ_EXT;
633 wcmd = ATA_CMD_WRITE_EXT;
634 } else {
635 rcmd = ATA_CMD_READ;
636 wcmd = ATA_CMD_WRITE;
637 }
638 break;
639
640 default:
641 return -1;
642 }
643
644 return rcmd | (wcmd << 8);
645}
646
647/**
648 * ata_dev_set_protocol - set taskfile protocol and r/w commands
649 * @dev: device to examine and configure
650 *
651 * Examine the device configuration, after we have
652 * read the identify-device page and configured the
653 * data transfer mode. Set internal state related to
654 * the ATA taskfile protocol (pio, pio mult, dma, etc.)
655 * and calculate the proper read/write commands to use.
656 *
657 * LOCKING:
658 * caller.
659 */
660static void ata_dev_set_protocol(struct ata_device *dev)
661{
662 int pio = (dev->flags & ATA_DFLAG_PIO);
663 int lba48 = (dev->flags & ATA_DFLAG_LBA48);
664 int proto, cmd;
665
666 if (pio)
667 proto = dev->xfer_protocol = ATA_PROT_PIO;
668 else
669 proto = dev->xfer_protocol = ATA_PROT_DMA;
670
671 cmd = ata_prot_to_cmd(proto, lba48);
672 if (cmd < 0)
673 BUG();
674
675 dev->read_cmd = cmd & 0xff;
676 dev->write_cmd = (cmd >> 8) & 0xff;
677}
678
679static const char * xfer_mode_str[] = {
680 "UDMA/16",
681 "UDMA/25",
682 "UDMA/33",
683 "UDMA/44",
684 "UDMA/66",
685 "UDMA/100",
686 "UDMA/133",
687 "UDMA7",
688 "MWDMA0",
689 "MWDMA1",
690 "MWDMA2",
691 "PIO0",
692 "PIO1",
693 "PIO2",
694 "PIO3",
695 "PIO4",
696};
697
698/**
699 * ata_udma_string - convert UDMA bit offset to string
700 * @mask: mask of bits supported; only highest bit counts.
701 *
702 * Determine string which represents the highest speed
703 * (highest bit in @udma_mask).
704 *
705 * LOCKING:
706 * None.
707 *
708 * RETURNS:
709 * Constant C string representing highest speed listed in
710 * @udma_mask, or the constant C string "<n/a>".
711 */
712
713static const char *ata_mode_string(unsigned int mask)
714{
715 int i;
716
717 for (i = 7; i >= 0; i--)
718 if (mask & (1 << i))
719 goto out;
720 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
721 if (mask & (1 << i))
722 goto out;
723 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
724 if (mask & (1 << i))
725 goto out;
726
727 return "<n/a>";
728
729out:
730 return xfer_mode_str[i];
731}
732
733/**
734 * ata_pio_devchk - PATA device presence detection
735 * @ap: ATA channel to examine
736 * @device: Device to examine (starting at zero)
737 *
738 * This technique was originally described in
739 * Hale Landis's ATADRVR (www.ata-atapi.com), and
740 * later found its way into the ATA/ATAPI spec.
741 *
742 * Write a pattern to the ATA shadow registers,
743 * and if a device is present, it will respond by
744 * correctly storing and echoing back the
745 * ATA shadow register contents.
746 *
747 * LOCKING:
748 * caller.
749 */
750
751static unsigned int ata_pio_devchk(struct ata_port *ap,
752 unsigned int device)
753{
754 struct ata_ioports *ioaddr = &ap->ioaddr;
755 u8 nsect, lbal;
756
757 ap->ops->dev_select(ap, device);
758
759 outb(0x55, ioaddr->nsect_addr);
760 outb(0xaa, ioaddr->lbal_addr);
761
762 outb(0xaa, ioaddr->nsect_addr);
763 outb(0x55, ioaddr->lbal_addr);
764
765 outb(0x55, ioaddr->nsect_addr);
766 outb(0xaa, ioaddr->lbal_addr);
767
768 nsect = inb(ioaddr->nsect_addr);
769 lbal = inb(ioaddr->lbal_addr);
770
771 if ((nsect == 0x55) && (lbal == 0xaa))
772 return 1; /* we found a device */
773
774 return 0; /* nothing found */
775}
776
777/**
778 * ata_mmio_devchk - PATA device presence detection
779 * @ap: ATA channel to examine
780 * @device: Device to examine (starting at zero)
781 *
782 * This technique was originally described in
783 * Hale Landis's ATADRVR (www.ata-atapi.com), and
784 * later found its way into the ATA/ATAPI spec.
785 *
786 * Write a pattern to the ATA shadow registers,
787 * and if a device is present, it will respond by
788 * correctly storing and echoing back the
789 * ATA shadow register contents.
790 *
791 * LOCKING:
792 * caller.
793 */
794
795static unsigned int ata_mmio_devchk(struct ata_port *ap,
796 unsigned int device)
797{
798 struct ata_ioports *ioaddr = &ap->ioaddr;
799 u8 nsect, lbal;
800
801 ap->ops->dev_select(ap, device);
802
803 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
804 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
805
806 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
807 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
808
809 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
810 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
811
812 nsect = readb((void __iomem *) ioaddr->nsect_addr);
813 lbal = readb((void __iomem *) ioaddr->lbal_addr);
814
815 if ((nsect == 0x55) && (lbal == 0xaa))
816 return 1; /* we found a device */
817
818 return 0; /* nothing found */
819}
820
821/**
822 * ata_devchk - PATA device presence detection
823 * @ap: ATA channel to examine
824 * @device: Device to examine (starting at zero)
825 *
826 * Dispatch ATA device presence detection, depending
827 * on whether we are using PIO or MMIO to talk to the
828 * ATA shadow registers.
829 *
830 * LOCKING:
831 * caller.
832 */
833
834static unsigned int ata_devchk(struct ata_port *ap,
835 unsigned int device)
836{
837 if (ap->flags & ATA_FLAG_MMIO)
838 return ata_mmio_devchk(ap, device);
839 return ata_pio_devchk(ap, device);
840}
841
842/**
843 * ata_dev_classify - determine device type based on ATA-spec signature
844 * @tf: ATA taskfile register set for device to be identified
845 *
846 * Determine from taskfile register contents whether a device is
847 * ATA or ATAPI, as per "Signature and persistence" section
848 * of ATA/PI spec (volume 1, sect 5.14).
849 *
850 * LOCKING:
851 * None.
852 *
853 * RETURNS:
854 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
855 * the event of failure.
856 */
857
858unsigned int ata_dev_classify(struct ata_taskfile *tf)
859{
860 /* Apple's open source Darwin code hints that some devices only
861 * put a proper signature into the LBA mid/high registers,
862 * So, we only check those. It's sufficient for uniqueness.
863 */
864
865 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
866 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
867 DPRINTK("found ATA device by sig\n");
868 return ATA_DEV_ATA;
869 }
870
871 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
872 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
873 DPRINTK("found ATAPI device by sig\n");
874 return ATA_DEV_ATAPI;
875 }
876
877 DPRINTK("unknown device\n");
878 return ATA_DEV_UNKNOWN;
879}
880
881/**
882 * ata_dev_try_classify - Parse returned ATA device signature
883 * @ap: ATA channel to examine
884 * @device: Device to examine (starting at zero)
885 *
886 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
887 * an ATA/ATAPI-defined set of values is placed in the ATA
888 * shadow registers, indicating the results of device detection
889 * and diagnostics.
890 *
891 * Select the ATA device, and read the values from the ATA shadow
892 * registers. Then parse according to the Error register value,
893 * and the spec-defined values examined by ata_dev_classify().
894 *
895 * LOCKING:
896 * caller.
897 */
898
899static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
900{
901 struct ata_device *dev = &ap->device[device];
902 struct ata_taskfile tf;
903 unsigned int class;
904 u8 err;
905
906 ap->ops->dev_select(ap, device);
907
908 memset(&tf, 0, sizeof(tf));
909
910 err = ata_chk_err(ap);
911 ap->ops->tf_read(ap, &tf);
912
913 dev->class = ATA_DEV_NONE;
914
915 /* see if device passed diags */
916 if (err == 1)
917 /* do nothing */ ;
918 else if ((device == 0) && (err == 0x81))
919 /* do nothing */ ;
920 else
921 return err;
922
923 /* determine if device if ATA or ATAPI */
924 class = ata_dev_classify(&tf);
925 if (class == ATA_DEV_UNKNOWN)
926 return err;
927 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
928 return err;
929
930 dev->class = class;
931
932 return err;
933}
934
935/**
936 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
937 * @id: IDENTIFY DEVICE results we will examine
938 * @s: string into which data is output
939 * @ofs: offset into identify device page
940 * @len: length of string to return. must be an even number.
941 *
942 * The strings in the IDENTIFY DEVICE page are broken up into
943 * 16-bit chunks. Run through the string, and output each
944 * 8-bit chunk linearly, regardless of platform.
945 *
946 * LOCKING:
947 * caller.
948 */
949
950void ata_dev_id_string(u16 *id, unsigned char *s,
951 unsigned int ofs, unsigned int len)
952{
953 unsigned int c;
954
955 while (len > 0) {
956 c = id[ofs] >> 8;
957 *s = c;
958 s++;
959
960 c = id[ofs] & 0xff;
961 *s = c;
962 s++;
963
964 ofs++;
965 len -= 2;
966 }
967}
968
0baab86b
EF		 969
970/**
971 * ata_noop_dev_select - Select device 0/1 on ATA bus
972 * @ap: ATA channel to manipulate
973 * @device: ATA device (numbered from zero) to select
974 *
975 * This function performs no actual function.
976 *
977 * May be used as the dev_select() entry in ata_port_operations.
978 *
979 * LOCKING:
980 * caller.
981 */
1da177e4
LT		 982void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
983{
984}
985
0baab86b 986
1da177e4
LT		 987/**
988 * ata_std_dev_select - Select device 0/1 on ATA bus
989 * @ap: ATA channel to manipulate
990 * @device: ATA device (numbered from zero) to select
991 *
992 * Use the method defined in the ATA specification to
993 * make either device 0, or device 1, active on the
0baab86b
EF		 994 * ATA channel. Works with both PIO and MMIO.
995 *
996 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 997 *
998 * LOCKING:
999 * caller.
1000 */
1001
1002void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1003{
1004 u8 tmp;
1005
1006 if (device == 0)
1007 tmp = ATA_DEVICE_OBS;
1008 else
1009 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1010
1011 if (ap->flags & ATA_FLAG_MMIO) {
1012 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1013 } else {
1014 outb(tmp, ap->ioaddr.device_addr);
1015 }
1016 ata_pause(ap); /* needed; also flushes, for mmio */
1017}
1018
1019/**
1020 * ata_dev_select - Select device 0/1 on ATA bus
1021 * @ap: ATA channel to manipulate
1022 * @device: ATA device (numbered from zero) to select
1023 * @wait: non-zero to wait for Status register BSY bit to clear
1024 * @can_sleep: non-zero if context allows sleeping
1025 *
1026 * Use the method defined in the ATA specification to
1027 * make either device 0, or device 1, active on the
1028 * ATA channel.
1029 *
1030 * This is a high-level version of ata_std_dev_select(),
1031 * which additionally provides the services of inserting
1032 * the proper pauses and status polling, where needed.
1033 *
1034 * LOCKING:
1035 * caller.
1036 */
1037
1038void ata_dev_select(struct ata_port *ap, unsigned int device,
1039 unsigned int wait, unsigned int can_sleep)
1040{
1041 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1042 ap->id, device, wait);
1043
1044 if (wait)
1045 ata_wait_idle(ap);
1046
1047 ap->ops->dev_select(ap, device);
1048
1049 if (wait) {
1050 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1051 msleep(150);
1052 ata_wait_idle(ap);
1053 }
1054}
1055
1056/**
1057 * ata_dump_id - IDENTIFY DEVICE info debugging output
1058 * @dev: Device whose IDENTIFY DEVICE page we will dump
1059 *
1060 * Dump selected 16-bit words from a detected device's
1061 * IDENTIFY PAGE page.
1062 *
1063 * LOCKING:
1064 * caller.
1065 */
1066
1067static inline void ata_dump_id(struct ata_device *dev)
1068{
1069 DPRINTK("49==0x%04x "
1070 "53==0x%04x "
1071 "63==0x%04x "
1072 "64==0x%04x "
1073 "75==0x%04x \n",
1074 dev->id[49],
1075 dev->id[53],
1076 dev->id[63],
1077 dev->id[64],
1078 dev->id[75]);
1079 DPRINTK("80==0x%04x "
1080 "81==0x%04x "
1081 "82==0x%04x "
1082 "83==0x%04x "
1083 "84==0x%04x \n",
1084 dev->id[80],
1085 dev->id[81],
1086 dev->id[82],
1087 dev->id[83],
1088 dev->id[84]);
1089 DPRINTK("88==0x%04x "
1090 "93==0x%04x\n",
1091 dev->id[88],
1092 dev->id[93]);
1093}
1094
1095/**
1096 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1097 * @ap: port on which device we wish to probe resides
1098 * @device: device bus address, starting at zero
1099 *
1100 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1101 * command, and read back the 512-byte device information page.
1102 * The device information page is fed to us via the standard
1103 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1104 * using standard PIO-IN paths)
1105 *
1106 * After reading the device information page, we use several
1107 * bits of information from it to initialize data structures
1108 * that will be used during the lifetime of the ata_device.
1109 * Other data from the info page is used to disqualify certain
1110 * older ATA devices we do not wish to support.
1111 *
1112 * LOCKING:
1113 * Inherited from caller. Some functions called by this function
1114 * obtain the host_set lock.
1115 */
1116
1117static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1118{
1119 struct ata_device *dev = &ap->device[device];
1120 unsigned int i;
1121 u16 tmp;
1122 unsigned long xfer_modes;
1123 u8 status;
1124 unsigned int using_edd;
1125 DECLARE_COMPLETION(wait);
1126 struct ata_queued_cmd *qc;
1127 unsigned long flags;
1128 int rc;
1129
1130 if (!ata_dev_present(dev)) {
1131 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1132 ap->id, device);
1133 return;
1134 }
1135
1136 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1137 using_edd = 0;
1138 else
1139 using_edd = 1;
1140
1141 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1142
1143 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1144 dev->class == ATA_DEV_NONE);
1145
1146 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1147
1148 qc = ata_qc_new_init(ap, dev);
1149 BUG_ON(qc == NULL);
1150
1151 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1152 qc->dma_dir = DMA_FROM_DEVICE;
1153 qc->tf.protocol = ATA_PROT_PIO;
1154 qc->nsect = 1;
1155
1156retry:
1157 if (dev->class == ATA_DEV_ATA) {
1158 qc->tf.command = ATA_CMD_ID_ATA;
1159 DPRINTK("do ATA identify\n");
1160 } else {
1161 qc->tf.command = ATA_CMD_ID_ATAPI;
1162 DPRINTK("do ATAPI identify\n");
1163 }
1164
1165 qc->waiting = &wait;
1166 qc->complete_fn = ata_qc_complete_noop;
1167
1168 spin_lock_irqsave(&ap->host_set->lock, flags);
1169 rc = ata_qc_issue(qc);
1170 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1171
1172 if (rc)
1173 goto err_out;
1174 else
1175 wait_for_completion(&wait);
1176
1177 status = ata_chk_status(ap);
1178 if (status & ATA_ERR) {
1179 /*
1180 * arg! EDD works for all test cases, but seems to return
1181 * the ATA signature for some ATAPI devices. Until the
1182 * reason for this is found and fixed, we fix up the mess
1183 * here. If IDENTIFY DEVICE returns command aborted
1184 * (as ATAPI devices do), then we issue an
1185 * IDENTIFY PACKET DEVICE.
1186 *
1187 * ATA software reset (SRST, the default) does not appear
1188 * to have this problem.
1189 */
1190 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1191 u8 err = ata_chk_err(ap);
1192 if (err & ATA_ABORTED) {
1193 dev->class = ATA_DEV_ATAPI;
1194 qc->cursg = 0;
1195 qc->cursg_ofs = 0;
1196 qc->cursect = 0;
1197 qc->nsect = 1;
1198 goto retry;
1199 }
1200 }
1201 goto err_out;
1202 }
1203
1204 swap_buf_le16(dev->id, ATA_ID_WORDS);
1205
1206 /* print device capabilities */
1207 printk(KERN_DEBUG "ata%u: dev %u cfg "
1208 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1209 ap->id, device, dev->id[49],
1210 dev->id[82], dev->id[83], dev->id[84],
1211 dev->id[85], dev->id[86], dev->id[87],
1212 dev->id[88]);
1213
1214 /*
1215 * common ATA, ATAPI feature tests
1216 */
1217
1218 /* we require LBA and DMA support (bits 8 & 9 of word 49) */
1219 if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) {
1220 printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id);
1221 goto err_out_nosup;
1222 }
1223
1224 /* quick-n-dirty find max transfer mode; for printk only */
1225 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1226 if (!xfer_modes)
1227 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1228 if (!xfer_modes) {
1229 xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3);
1230 xfer_modes |= (0x7 << ATA_SHIFT_PIO);
1231 }
1232
1233 ata_dump_id(dev);
1234
1235 /* ATA-specific feature tests */
1236 if (dev->class == ATA_DEV_ATA) {
1237 if (!ata_id_is_ata(dev->id)) /* sanity check */
1238 goto err_out_nosup;
1239
1240 tmp = dev->id[ATA_ID_MAJOR_VER];
1241 for (i = 14; i >= 1; i--)
1242 if (tmp & (1 << i))
1243 break;
1244
1245 /* we require at least ATA-3 */
1246 if (i < 3) {
1247 printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id);
1248 goto err_out_nosup;
1249 }
1250
1251 if (ata_id_has_lba48(dev->id)) {
1252 dev->flags |= ATA_DFLAG_LBA48;
1253 dev->n_sectors = ata_id_u64(dev->id, 100);
1254 } else {
1255 dev->n_sectors = ata_id_u32(dev->id, 60);
1256 }
1257
1258 ap->host->max_cmd_len = 16;
1259
1260 /* print device info to dmesg */
1261 printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n",
1262 ap->id, device,
1263 ata_mode_string(xfer_modes),
1264 (unsigned long long)dev->n_sectors,
1265 dev->flags & ATA_DFLAG_LBA48 ? " lba48" : "");
1266 }
1267
1268 /* ATAPI-specific feature tests */
1269 else {
1270 if (ata_id_is_ata(dev->id)) /* sanity check */
1271 goto err_out_nosup;
1272
1273 rc = atapi_cdb_len(dev->id);
1274 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1275 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1276 goto err_out_nosup;
1277 }
1278 ap->cdb_len = (unsigned int) rc;
1279 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1280
1281 /* print device info to dmesg */
1282 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1283 ap->id, device,
1284 ata_mode_string(xfer_modes));
1285 }
1286
1287 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1288 return;
1289
1290err_out_nosup:
1291 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1292 ap->id, device);
1293err_out:
1294 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1295 DPRINTK("EXIT, err\n");
1296}
1297
6f2f3812
BC		 1298
1299static inline u8 ata_dev_knobble(struct ata_port *ap)
1300{
1301 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1302}
1303
1304/**
1305 * ata_dev_config - Run device specific handlers and check for
1306 * SATA->PATA bridges
8a60a071 1307 * @ap: Bus
6f2f3812
BC		 1308 * @i: Device
1309 *
1310 * LOCKING:
1311 */
8a60a071 1312
6f2f3812
BC		 1313void ata_dev_config(struct ata_port *ap, unsigned int i)
1314{
1315 /* limit bridge transfers to udma5, 200 sectors */
1316 if (ata_dev_knobble(ap)) {
1317 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1318 ap->id, ap->device->devno);
1319 ap->udma_mask &= ATA_UDMA5;
1320 ap->host->max_sectors = ATA_MAX_SECTORS;
1321 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1322 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1323 }
1324
1325 if (ap->ops->dev_config)
1326 ap->ops->dev_config(ap, &ap->device[i]);
1327}
1328
1da177e4
LT		 1329/**
1330 * ata_bus_probe - Reset and probe ATA bus
1331 * @ap: Bus to probe
1332 *
0cba632b
JG		 1333 * Master ATA bus probing function. Initiates a hardware-dependent
1334 * bus reset, then attempts to identify any devices found on
1335 * the bus.
1336 *
1da177e4 1337 * LOCKING:
0cba632b 1338 * PCI/etc. bus probe sem.
1da177e4
LT		 1339 *
1340 * RETURNS:
1341 * Zero on success, non-zero on error.
1342 */
1343
1344static int ata_bus_probe(struct ata_port *ap)
1345{
1346 unsigned int i, found = 0;
1347
1348 ap->ops->phy_reset(ap);
1349 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1350 goto err_out;
1351
1352 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1353 ata_dev_identify(ap, i);
1354 if (ata_dev_present(&ap->device[i])) {
1355 found = 1;
6f2f3812 1356 ata_dev_config(ap,i);
1da177e4
LT		 1357 }
1358 }
1359
1360 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1361 goto err_out_disable;
1362
1363 ata_set_mode(ap);
1364 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1365 goto err_out_disable;
1366
1367 return 0;
1368
1369err_out_disable:
1370 ap->ops->port_disable(ap);
1371err_out:
1372 return -1;
1373}
1374
1375/**
0cba632b
JG		 1376 * ata_port_probe - Mark port as enabled
1377 * @ap: Port for which we indicate enablement
1da177e4 1378 *
0cba632b
JG		 1379 * Modify @ap data structure such that the system
1380 * thinks that the entire port is enabled.
1381 *
1382 * LOCKING: host_set lock, or some other form of
1383 * serialization.
1da177e4
LT		 1384 */
1385
1386void ata_port_probe(struct ata_port *ap)
1387{
1388 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1389}
1390
1391/**
780a87f7
JG		 1392 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1393 * @ap: SATA port associated with target SATA PHY.
1da177e4 1394 *
780a87f7
JG		 1395 * This function issues commands to standard SATA Sxxx
1396 * PHY registers, to wake up the phy (and device), and
1397 * clear any reset condition.
1da177e4
LT		 1398 *
1399 * LOCKING:
0cba632b 1400 * PCI/etc. bus probe sem.
1da177e4
LT		 1401 *
1402 */
1403void __sata_phy_reset(struct ata_port *ap)
1404{
1405 u32 sstatus;
1406 unsigned long timeout = jiffies + (HZ * 5);
1407
1408 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1409 /* issue phy wake/reset */
1410 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1411 /* Couldn't find anything in SATA I/II specs, but
1412 * AHCI-1.1 10.4.2 says at least 1 ms. */
1413 mdelay(1);
1da177e4 1414 }
cdcca89e 1415 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1416
1417 /* wait for phy to become ready, if necessary */
1418 do {
1419 msleep(200);
1420 sstatus = scr_read(ap, SCR_STATUS);
1421 if ((sstatus & 0xf) != 1)
1422 break;
1423 } while (time_before(jiffies, timeout));
1424
1425 /* TODO: phy layer with polling, timeouts, etc. */
1426 if (sata_dev_present(ap))
1427 ata_port_probe(ap);
1428 else {
1429 sstatus = scr_read(ap, SCR_STATUS);
1430 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1431 ap->id, sstatus);
1432 ata_port_disable(ap);
1433 }
1434
1435 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1436 return;
1437
1438 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1439 ata_port_disable(ap);
1440 return;
1441 }
1442
1443 ap->cbl = ATA_CBL_SATA;
1444}
1445
1446/**
780a87f7
JG		 1447 * sata_phy_reset - Reset SATA bus.
1448 * @ap: SATA port associated with target SATA PHY.
1da177e4 1449 *
780a87f7
JG		 1450 * This function resets the SATA bus, and then probes
1451 * the bus for devices.
1da177e4
LT		 1452 *
1453 * LOCKING:
0cba632b 1454 * PCI/etc. bus probe sem.
1da177e4
LT		 1455 *
1456 */
1457void sata_phy_reset(struct ata_port *ap)
1458{
1459 __sata_phy_reset(ap);
1460 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1461 return;
1462 ata_bus_reset(ap);
1463}
1464
1465/**
780a87f7
JG		 1466 * ata_port_disable - Disable port.
1467 * @ap: Port to be disabled.
1da177e4 1468 *
780a87f7
JG		 1469 * Modify @ap data structure such that the system
1470 * thinks that the entire port is disabled, and should
1471 * never attempt to probe or communicate with devices
1472 * on this port.
1473 *
1474 * LOCKING: host_set lock, or some other form of
1475 * serialization.
1da177e4
LT		 1476 */
1477
1478void ata_port_disable(struct ata_port *ap)
1479{
1480 ap->device[0].class = ATA_DEV_NONE;
1481 ap->device[1].class = ATA_DEV_NONE;
1482 ap->flags |= ATA_FLAG_PORT_DISABLED;
1483}
1484
1485static struct {
1486 unsigned int shift;
1487 u8 base;
1488} xfer_mode_classes[] = {
1489 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1490 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1491 { ATA_SHIFT_PIO, XFER_PIO_0 },
1492};
1493
1494static inline u8 base_from_shift(unsigned int shift)
1495{
1496 int i;
1497
1498 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1499 if (xfer_mode_classes[i].shift == shift)
1500 return xfer_mode_classes[i].base;
1501
1502 return 0xff;
1503}
1504
1505static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1506{
1507 int ofs, idx;
1508 u8 base;
1509
1510 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1511 return;
1512
1513 if (dev->xfer_shift == ATA_SHIFT_PIO)
1514 dev->flags |= ATA_DFLAG_PIO;
1515
1516 ata_dev_set_xfermode(ap, dev);
1517
1518 base = base_from_shift(dev->xfer_shift);
1519 ofs = dev->xfer_mode - base;
1520 idx = ofs + dev->xfer_shift;
1521 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1522
1523 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1524 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1525
1526 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1527 ap->id, dev->devno, xfer_mode_str[idx]);
1528}
1529
1530static int ata_host_set_pio(struct ata_port *ap)
1531{
1532 unsigned int mask;
1533 int x, i;
1534 u8 base, xfer_mode;
1535
1536 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1537 x = fgb(mask);
1538 if (x < 0) {
1539 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1540 return -1;
1541 }
1542
1543 base = base_from_shift(ATA_SHIFT_PIO);
1544 xfer_mode = base + x;
1545
1546 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1547 (int)base, (int)xfer_mode, mask, x);
1548
1549 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1550 struct ata_device *dev = &ap->device[i];
1551 if (ata_dev_present(dev)) {
1552 dev->pio_mode = xfer_mode;
1553 dev->xfer_mode = xfer_mode;
1554 dev->xfer_shift = ATA_SHIFT_PIO;
1555 if (ap->ops->set_piomode)
1556 ap->ops->set_piomode(ap, dev);
1557 }
1558 }
1559
1560 return 0;
1561}
1562
1563static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1564 unsigned int xfer_shift)
1565{
1566 int i;
1567
1568 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1569 struct ata_device *dev = &ap->device[i];
1570 if (ata_dev_present(dev)) {
1571 dev->dma_mode = xfer_mode;
1572 dev->xfer_mode = xfer_mode;
1573 dev->xfer_shift = xfer_shift;
1574 if (ap->ops->set_dmamode)
1575 ap->ops->set_dmamode(ap, dev);
1576 }
1577 }
1578}
1579
1580/**
1581 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1582 * @ap: port on which timings will be programmed
1583 *
780a87f7
JG		 1584 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1585 *
1da177e4 1586 * LOCKING:
0cba632b 1587 * PCI/etc. bus probe sem.
1da177e4
LT		 1588 *
1589 */
1590static void ata_set_mode(struct ata_port *ap)
1591{
1592 unsigned int i, xfer_shift;
1593 u8 xfer_mode;
1594 int rc;
1595
1596 /* step 1: always set host PIO timings */
1597 rc = ata_host_set_pio(ap);
1598 if (rc)
1599 goto err_out;
1600
1601 /* step 2: choose the best data xfer mode */
1602 xfer_mode = xfer_shift = 0;
1603 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1604 if (rc)
1605 goto err_out;
1606
1607 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1608 if (xfer_shift != ATA_SHIFT_PIO)
1609 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1610
1611 /* step 4: update devices' xfer mode */
1612 ata_dev_set_mode(ap, &ap->device[0]);
1613 ata_dev_set_mode(ap, &ap->device[1]);
1614
1615 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1616 return;
1617
1618 if (ap->ops->post_set_mode)
1619 ap->ops->post_set_mode(ap);
1620
1621 for (i = 0; i < 2; i++) {
1622 struct ata_device *dev = &ap->device[i];
1623 ata_dev_set_protocol(dev);
1624 }
1625
1626 return;
1627
1628err_out:
1629 ata_port_disable(ap);
1630}
1631
1632/**
1633 * ata_busy_sleep - sleep until BSY clears, or timeout
1634 * @ap: port containing status register to be polled
1635 * @tmout_pat: impatience timeout
1636 * @tmout: overall timeout
1637 *
780a87f7
JG		 1638 * Sleep until ATA Status register bit BSY clears,
1639 * or a timeout occurs.
1640 *
1641 * LOCKING: None.
1da177e4
LT		 1642 *
1643 */
1644
1645static unsigned int ata_busy_sleep (struct ata_port *ap,
1646 unsigned long tmout_pat,
1647 unsigned long tmout)
1648{
1649 unsigned long timer_start, timeout;
1650 u8 status;
1651
1652 status = ata_busy_wait(ap, ATA_BUSY, 300);
1653 timer_start = jiffies;
1654 timeout = timer_start + tmout_pat;
1655 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1656 msleep(50);
1657 status = ata_busy_wait(ap, ATA_BUSY, 3);
1658 }
1659
1660 if (status & ATA_BUSY)
1661 printk(KERN_WARNING "ata%u is slow to respond, "
1662 "please be patient\n", ap->id);
1663
1664 timeout = timer_start + tmout;
1665 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1666 msleep(50);
1667 status = ata_chk_status(ap);
1668 }
1669
1670 if (status & ATA_BUSY) {
1671 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1672 ap->id, tmout / HZ);
1673 return 1;
1674 }
1675
1676 return 0;
1677}
1678
1679static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1680{
1681 struct ata_ioports *ioaddr = &ap->ioaddr;
1682 unsigned int dev0 = devmask & (1 << 0);
1683 unsigned int dev1 = devmask & (1 << 1);
1684 unsigned long timeout;
1685
1686 /* if device 0 was found in ata_devchk, wait for its
1687 * BSY bit to clear
1688 */
1689 if (dev0)
1690 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1691
1692 /* if device 1 was found in ata_devchk, wait for
1693 * register access, then wait for BSY to clear
1694 */
1695 timeout = jiffies + ATA_TMOUT_BOOT;
1696 while (dev1) {
1697 u8 nsect, lbal;
1698
1699 ap->ops->dev_select(ap, 1);
1700 if (ap->flags & ATA_FLAG_MMIO) {
1701 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1702 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1703 } else {
1704 nsect = inb(ioaddr->nsect_addr);
1705 lbal = inb(ioaddr->lbal_addr);
1706 }
1707 if ((nsect == 1) && (lbal == 1))
1708 break;
1709 if (time_after(jiffies, timeout)) {
1710 dev1 = 0;
1711 break;
1712 }
1713 msleep(50); /* give drive a breather */
1714 }
1715 if (dev1)
1716 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1717
1718 /* is all this really necessary? */
1719 ap->ops->dev_select(ap, 0);
1720 if (dev1)
1721 ap->ops->dev_select(ap, 1);
1722 if (dev0)
1723 ap->ops->dev_select(ap, 0);
1724}
1725
1726/**
0cba632b
JG		 1727 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1728 * @ap: Port to reset and probe
1729 *
1730 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1731 * probe the bus. Not often used these days.
1da177e4
LT		 1732 *
1733 * LOCKING:
0cba632b 1734 * PCI/etc. bus probe sem.
1da177e4
LT		 1735 *
1736 */
1737
1738static unsigned int ata_bus_edd(struct ata_port *ap)
1739{
1740 struct ata_taskfile tf;
1741
1742 /* set up execute-device-diag (bus reset) taskfile */
1743 /* also, take interrupts to a known state (disabled) */
1744 DPRINTK("execute-device-diag\n");
1745 ata_tf_init(ap, &tf, 0);
1746 tf.ctl |= ATA_NIEN;
1747 tf.command = ATA_CMD_EDD;
1748 tf.protocol = ATA_PROT_NODATA;
1749
1750 /* do bus reset */
1751 ata_tf_to_host(ap, &tf);
1752
1753 /* spec says at least 2ms. but who knows with those
1754 * crazy ATAPI devices...
1755 */
1756 msleep(150);
1757
1758 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1759}
1760
1761static unsigned int ata_bus_softreset(struct ata_port *ap,
1762 unsigned int devmask)
1763{
1764 struct ata_ioports *ioaddr = &ap->ioaddr;
1765
1766 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1767
1768 /* software reset. causes dev0 to be selected */
1769 if (ap->flags & ATA_FLAG_MMIO) {
1770 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1771 udelay(20); /* FIXME: flush */
1772 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1773 udelay(20); /* FIXME: flush */
1774 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1775 } else {
1776 outb(ap->ctl, ioaddr->ctl_addr);
1777 udelay(10);
1778 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1779 udelay(10);
1780 outb(ap->ctl, ioaddr->ctl_addr);
1781 }
1782
1783 /* spec mandates ">= 2ms" before checking status.
1784 * We wait 150ms, because that was the magic delay used for
1785 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1786 * between when the ATA command register is written, and then
1787 * status is checked. Because waiting for "a while" before
1788 * checking status is fine, post SRST, we perform this magic
1789 * delay here as well.
1790 */
1791 msleep(150);
1792
1793 ata_bus_post_reset(ap, devmask);
1794
1795 return 0;
1796}
1797
1798/**
1799 * ata_bus_reset - reset host port and associated ATA channel
1800 * @ap: port to reset
1801 *
1802 * This is typically the first time we actually start issuing
1803 * commands to the ATA channel. We wait for BSY to clear, then
1804 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1805 * result. Determine what devices, if any, are on the channel
1806 * by looking at the device 0/1 error register. Look at the signature
1807 * stored in each device's taskfile registers, to determine if
1808 * the device is ATA or ATAPI.
1809 *
1810 * LOCKING:
0cba632b
JG		 1811 * PCI/etc. bus probe sem.
1812 * Obtains host_set lock.
1da177e4
LT		 1813 *
1814 * SIDE EFFECTS:
1815 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1816 */
1817
1818void ata_bus_reset(struct ata_port *ap)
1819{
1820 struct ata_ioports *ioaddr = &ap->ioaddr;
1821 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1822 u8 err;
1823 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1824
1825 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1826
1827 /* determine if device 0/1 are present */
1828 if (ap->flags & ATA_FLAG_SATA_RESET)
1829 dev0 = 1;
1830 else {
1831 dev0 = ata_devchk(ap, 0);
1832 if (slave_possible)
1833 dev1 = ata_devchk(ap, 1);
1834 }
1835
1836 if (dev0)
1837 devmask |= (1 << 0);
1838 if (dev1)
1839 devmask |= (1 << 1);
1840
1841 /* select device 0 again */
1842 ap->ops->dev_select(ap, 0);
1843
1844 /* issue bus reset */
1845 if (ap->flags & ATA_FLAG_SRST)
1846 rc = ata_bus_softreset(ap, devmask);
1847 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1848 /* set up device control */
1849 if (ap->flags & ATA_FLAG_MMIO)
1850 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1851 else
1852 outb(ap->ctl, ioaddr->ctl_addr);
1853 rc = ata_bus_edd(ap);
1854 }
1855
1856 if (rc)
1857 goto err_out;
1858
1859 /*
1860 * determine by signature whether we have ATA or ATAPI devices
1861 */
1862 err = ata_dev_try_classify(ap, 0);
1863 if ((slave_possible) && (err != 0x81))
1864 ata_dev_try_classify(ap, 1);
1865
1866 /* re-enable interrupts */
1867 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1868 ata_irq_on(ap);
1869
1870 /* is double-select really necessary? */
1871 if (ap->device[1].class != ATA_DEV_NONE)
1872 ap->ops->dev_select(ap, 1);
1873 if (ap->device[0].class != ATA_DEV_NONE)
1874 ap->ops->dev_select(ap, 0);
1875
1876 /* if no devices were detected, disable this port */
1877 if ((ap->device[0].class == ATA_DEV_NONE) &&
1878 (ap->device[1].class == ATA_DEV_NONE))
1879 goto err_out;
1880
1881 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1882 /* set up device control for ATA_FLAG_SATA_RESET */
1883 if (ap->flags & ATA_FLAG_MMIO)
1884 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1885 else
1886 outb(ap->ctl, ioaddr->ctl_addr);
1887 }
1888
1889 DPRINTK("EXIT\n");
1890 return;
1891
1892err_out:
1893 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1894 ap->ops->port_disable(ap);
1895
1896 DPRINTK("EXIT\n");
1897}
1898
1899static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev)
1900{
1901 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
1902 ap->id, dev->devno);
1903}
1904
1905static const char * ata_dma_blacklist [] = {
1906 "WDC AC11000H",
1907 "WDC AC22100H",
1908 "WDC AC32500H",
1909 "WDC AC33100H",
1910 "WDC AC31600H",
1911 "WDC AC32100H",
1912 "WDC AC23200L",
1913 "Compaq CRD-8241B",
1914 "CRD-8400B",
1915 "CRD-8480B",
1916 "CRD-8482B",
1917 "CRD-84",
1918 "SanDisk SDP3B",
1919 "SanDisk SDP3B-64",
1920 "SANYO CD-ROM CRD",
1921 "HITACHI CDR-8",
1922 "HITACHI CDR-8335",
1923 "HITACHI CDR-8435",
1924 "Toshiba CD-ROM XM-6202B",
e922256a 1925 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 1926 "CD-532E-A",
1927 "E-IDE CD-ROM CR-840",
1928 "CD-ROM Drive/F5A",
1929 "WPI CDD-820",
1930 "SAMSUNG CD-ROM SC-148C",
1931 "SAMSUNG CD-ROM SC",
1932 "SanDisk SDP3B-64",
1da177e4
LT		 1933 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
1934 "_NEC DV5800A",
1935};
1936
1937static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev)
1938{
1939 unsigned char model_num[40];
1940 char *s;
1941 unsigned int len;
1942 int i;
1943
1944 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
1945 sizeof(model_num));
1946 s = &model_num[0];
1947 len = strnlen(s, sizeof(model_num));
1948
1949 /* ATAPI specifies that empty space is blank-filled; remove blanks */
1950 while ((len > 0) && (s[len - 1] == ' ')) {
1951 len--;
1952 s[len] = 0;
1953 }
1954
1955 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
1956 if (!strncmp(ata_dma_blacklist[i], s, len))
1957 return 1;
1958
1959 return 0;
1960}
1961
1962static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift)
1963{
1964 struct ata_device *master, *slave;
1965 unsigned int mask;
1966
1967 master = &ap->device[0];
1968 slave = &ap->device[1];
1969
1970 assert (ata_dev_present(master) || ata_dev_present(slave));
1971
1972 if (shift == ATA_SHIFT_UDMA) {
1973 mask = ap->udma_mask;
1974 if (ata_dev_present(master)) {
1975 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
1976 if (ata_dma_blacklisted(ap, master)) {
1977 mask = 0;
1978 ata_pr_blacklisted(ap, master);
1979 }
1980 }
1981 if (ata_dev_present(slave)) {
1982 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
1983 if (ata_dma_blacklisted(ap, slave)) {
1984 mask = 0;
1985 ata_pr_blacklisted(ap, slave);
1986 }
1987 }
1988 }
1989 else if (shift == ATA_SHIFT_MWDMA) {
1990 mask = ap->mwdma_mask;
1991 if (ata_dev_present(master)) {
1992 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
1993 if (ata_dma_blacklisted(ap, master)) {
1994 mask = 0;
1995 ata_pr_blacklisted(ap, master);
1996 }
1997 }
1998 if (ata_dev_present(slave)) {
1999 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2000 if (ata_dma_blacklisted(ap, slave)) {
2001 mask = 0;
2002 ata_pr_blacklisted(ap, slave);
2003 }
2004 }
2005 }
2006 else if (shift == ATA_SHIFT_PIO) {
2007 mask = ap->pio_mask;
2008 if (ata_dev_present(master)) {
2009 /* spec doesn't return explicit support for
2010 * PIO0-2, so we fake it
2011 */
2012 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2013 tmp_mode <<= 3;
2014 tmp_mode |= 0x7;
2015 mask &= tmp_mode;
2016 }
2017 if (ata_dev_present(slave)) {
2018 /* spec doesn't return explicit support for
2019 * PIO0-2, so we fake it
2020 */
2021 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2022 tmp_mode <<= 3;
2023 tmp_mode |= 0x7;
2024 mask &= tmp_mode;
2025 }
2026 }
2027 else {
2028 mask = 0xffffffff; /* shut up compiler warning */
2029 BUG();
2030 }
2031
2032 return mask;
2033}
2034
2035/* find greatest bit */
2036static int fgb(u32 bitmap)
2037{
2038 unsigned int i;
2039 int x = -1;
2040
2041 for (i = 0; i < 32; i++)
2042 if (bitmap & (1 << i))
2043 x = i;
2044
2045 return x;
2046}
2047
2048/**
2049 * ata_choose_xfer_mode - attempt to find best transfer mode
2050 * @ap: Port for which an xfer mode will be selected
2051 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2052 * @xfer_shift_out: (output) bit shift that selects this mode
2053 *
0cba632b
JG		 2054 * Based on host and device capabilities, determine the
2055 * maximum transfer mode that is amenable to all.
2056 *
1da177e4 2057 * LOCKING:
0cba632b 2058 * PCI/etc. bus probe sem.
1da177e4
LT		 2059 *
2060 * RETURNS:
2061 * Zero on success, negative on error.
2062 */
2063
2064static int ata_choose_xfer_mode(struct ata_port *ap,
2065 u8 *xfer_mode_out,
2066 unsigned int *xfer_shift_out)
2067{
2068 unsigned int mask, shift;
2069 int x, i;
2070
2071 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2072 shift = xfer_mode_classes[i].shift;
2073 mask = ata_get_mode_mask(ap, shift);
2074
2075 x = fgb(mask);
2076 if (x >= 0) {
2077 *xfer_mode_out = xfer_mode_classes[i].base + x;
2078 *xfer_shift_out = shift;
2079 return 0;
2080 }
2081 }
2082
2083 return -1;
2084}
2085
2086/**
2087 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2088 * @ap: Port associated with device @dev
2089 * @dev: Device to which command will be sent
2090 *
780a87f7
JG		 2091 * Issue SET FEATURES - XFER MODE command to device @dev
2092 * on port @ap.
2093 *
1da177e4 2094 * LOCKING:
0cba632b 2095 * PCI/etc. bus probe sem.
1da177e4
LT		 2096 */
2097
2098static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2099{
2100 DECLARE_COMPLETION(wait);
2101 struct ata_queued_cmd *qc;
2102 int rc;
2103 unsigned long flags;
2104
2105 /* set up set-features taskfile */
2106 DPRINTK("set features - xfer mode\n");
2107
2108 qc = ata_qc_new_init(ap, dev);
2109 BUG_ON(qc == NULL);
2110
2111 qc->tf.command = ATA_CMD_SET_FEATURES;
2112 qc->tf.feature = SETFEATURES_XFER;
2113 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2114 qc->tf.protocol = ATA_PROT_NODATA;
2115 qc->tf.nsect = dev->xfer_mode;
2116
2117 qc->waiting = &wait;
2118 qc->complete_fn = ata_qc_complete_noop;
2119
2120 spin_lock_irqsave(&ap->host_set->lock, flags);
2121 rc = ata_qc_issue(qc);
2122 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2123
2124 if (rc)
2125 ata_port_disable(ap);
2126 else
2127 wait_for_completion(&wait);
2128
2129 DPRINTK("EXIT\n");
2130}
2131
2132/**
0cba632b
JG		 2133 * ata_sg_clean - Unmap DMA memory associated with command
2134 * @qc: Command containing DMA memory to be released
2135 *
2136 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2137 *
2138 * LOCKING:
0cba632b 2139 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2140 */
2141
2142static void ata_sg_clean(struct ata_queued_cmd *qc)
2143{
2144 struct ata_port *ap = qc->ap;
2145 struct scatterlist *sg = qc->sg;
2146 int dir = qc->dma_dir;
2147
2148 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2149 assert(sg != NULL);
2150
2151 if (qc->flags & ATA_QCFLAG_SINGLE)
2152 assert(qc->n_elem == 1);
2153
2154 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2155
2156 if (qc->flags & ATA_QCFLAG_SG)
2157 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2158 else
2159 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2160 sg_dma_len(&sg[0]), dir);
2161
2162 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2163 qc->sg = NULL;
2164}
2165
2166/**
2167 * ata_fill_sg - Fill PCI IDE PRD table
2168 * @qc: Metadata associated with taskfile to be transferred
2169 *
780a87f7
JG		 2170 * Fill PCI IDE PRD (scatter-gather) table with segments
2171 * associated with the current disk command.
2172 *
1da177e4 2173 * LOCKING:
780a87f7 2174 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2175 *
2176 */
2177static void ata_fill_sg(struct ata_queued_cmd *qc)
2178{
2179 struct scatterlist *sg = qc->sg;
2180 struct ata_port *ap = qc->ap;
2181 unsigned int idx, nelem;
2182
2183 assert(sg != NULL);
2184 assert(qc->n_elem > 0);
2185
2186 idx = 0;
2187 for (nelem = qc->n_elem; nelem; nelem--,sg++) {
2188 u32 addr, offset;
2189 u32 sg_len, len;
2190
2191 /* determine if physical DMA addr spans 64K boundary.
2192 * Note h/w doesn't support 64-bit, so we unconditionally
2193 * truncate dma_addr_t to u32.
2194 */
2195 addr = (u32) sg_dma_address(sg);
2196 sg_len = sg_dma_len(sg);
2197
2198 while (sg_len) {
2199 offset = addr & 0xffff;
2200 len = sg_len;
2201 if ((offset + sg_len) > 0x10000)
2202 len = 0x10000 - offset;
2203
2204 ap->prd[idx].addr = cpu_to_le32(addr);
2205 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2206 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2207
2208 idx++;
2209 sg_len -= len;
2210 addr += len;
2211 }
2212 }
2213
2214 if (idx)
2215 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2216}
2217/**
2218 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2219 * @qc: Metadata associated with taskfile to check
2220 *
780a87f7
JG		 2221 * Allow low-level driver to filter ATA PACKET commands, returning
2222 * a status indicating whether or not it is OK to use DMA for the
2223 * supplied PACKET command.
2224 *
1da177e4 2225 * LOCKING:
0cba632b
JG		 2226 * spin_lock_irqsave(host_set lock)
2227 *
1da177e4
LT		 2228 * RETURNS: 0 when ATAPI DMA can be used
2229 * nonzero otherwise
2230 */
2231int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2232{
2233 struct ata_port *ap = qc->ap;
2234 int rc = 0; /* Assume ATAPI DMA is OK by default */
2235
2236 if (ap->ops->check_atapi_dma)
2237 rc = ap->ops->check_atapi_dma(qc);
2238
2239 return rc;
2240}
2241/**
2242 * ata_qc_prep - Prepare taskfile for submission
2243 * @qc: Metadata associated with taskfile to be prepared
2244 *
780a87f7
JG		 2245 * Prepare ATA taskfile for submission.
2246 *
1da177e4
LT		 2247 * LOCKING:
2248 * spin_lock_irqsave(host_set lock)
2249 */
2250void ata_qc_prep(struct ata_queued_cmd *qc)
2251{
2252 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2253 return;
2254
2255 ata_fill_sg(qc);
2256}
2257
0cba632b
JG		 2258/**
2259 * ata_sg_init_one - Associate command with memory buffer
2260 * @qc: Command to be associated
2261 * @buf: Memory buffer
2262 * @buflen: Length of memory buffer, in bytes.
2263 *
2264 * Initialize the data-related elements of queued_cmd @qc
2265 * to point to a single memory buffer, @buf of byte length @buflen.
2266 *
2267 * LOCKING:
2268 * spin_lock_irqsave(host_set lock)
2269 */
2270
1da177e4
LT		 2271void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2272{
2273 struct scatterlist *sg;
2274
2275 qc->flags |= ATA_QCFLAG_SINGLE;
2276
2277 memset(&qc->sgent, 0, sizeof(qc->sgent));
2278 qc->sg = &qc->sgent;
2279 qc->n_elem = 1;
2280 qc->buf_virt = buf;
2281
2282 sg = qc->sg;
2283 sg->page = virt_to_page(buf);
2284 sg->offset = (unsigned long) buf & ~PAGE_MASK;
32529e01 2285 sg->length = buflen;
1da177e4
LT		 2286}
2287
0cba632b
JG		 2288/**
2289 * ata_sg_init - Associate command with scatter-gather table.
2290 * @qc: Command to be associated
2291 * @sg: Scatter-gather table.
2292 * @n_elem: Number of elements in s/g table.
2293 *
2294 * Initialize the data-related elements of queued_cmd @qc
2295 * to point to a scatter-gather table @sg, containing @n_elem
2296 * elements.
2297 *
2298 * LOCKING:
2299 * spin_lock_irqsave(host_set lock)
2300 */
2301
1da177e4
LT		 2302void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2303 unsigned int n_elem)
2304{
2305 qc->flags |= ATA_QCFLAG_SG;
2306 qc->sg = sg;
2307 qc->n_elem = n_elem;
2308}
2309
2310/**
0cba632b
JG		 2311 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2312 * @qc: Command with memory buffer to be mapped.
2313 *
2314 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2315 *
2316 * LOCKING:
2317 * spin_lock_irqsave(host_set lock)
2318 *
2319 * RETURNS:
0cba632b 2320 * Zero on success, negative on error.
1da177e4
LT		 2321 */
2322
2323static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2324{
2325 struct ata_port *ap = qc->ap;
2326 int dir = qc->dma_dir;
2327 struct scatterlist *sg = qc->sg;
2328 dma_addr_t dma_address;
2329
2330 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2331 sg->length, dir);
1da177e4
LT		 2332 if (dma_mapping_error(dma_address))
2333 return -1;
2334
2335 sg_dma_address(sg) = dma_address;
32529e01 2336 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2337
2338 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2339 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2340
2341 return 0;
2342}
2343
2344/**
0cba632b
JG		 2345 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2346 * @qc: Command with scatter-gather table to be mapped.
2347 *
2348 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2349 *
2350 * LOCKING:
2351 * spin_lock_irqsave(host_set lock)
2352 *
2353 * RETURNS:
0cba632b 2354 * Zero on success, negative on error.
1da177e4
LT		 2355 *
2356 */
2357
2358static int ata_sg_setup(struct ata_queued_cmd *qc)
2359{
2360 struct ata_port *ap = qc->ap;
2361 struct scatterlist *sg = qc->sg;
2362 int n_elem, dir;
2363
2364 VPRINTK("ENTER, ata%u\n", ap->id);
2365 assert(qc->flags & ATA_QCFLAG_SG);
2366
2367 dir = qc->dma_dir;
2368 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2369 if (n_elem < 1)
2370 return -1;
2371
2372 DPRINTK("%d sg elements mapped\n", n_elem);
2373
2374 qc->n_elem = n_elem;
2375
2376 return 0;
2377}
2378
40e8c82c
TH		 2379/**
2380 * ata_poll_qc_complete - turn irq back on and finish qc
2381 * @qc: Command to complete
2382 * @drv_stat: ATA status register content
2383 *
2384 * LOCKING:
2385 * None. (grabs host lock)
2386 */
2387
2388void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2389{
2390 struct ata_port *ap = qc->ap;
b8f6153e 2391 unsigned long flags;
40e8c82c 2392
b8f6153e 2393 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2394 ap->flags &= ~ATA_FLAG_NOINTR;
2395 ata_irq_on(ap);
2396 ata_qc_complete(qc, drv_stat);
b8f6153e 2397 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2398}
2399
1da177e4
LT		 2400/**
2401 * ata_pio_poll -
2402 * @ap:
2403 *
2404 * LOCKING:
0cba632b 2405 * None. (executing in kernel thread context)
1da177e4
LT		 2406 *
2407 * RETURNS:
2408 *
2409 */
2410
2411static unsigned long ata_pio_poll(struct ata_port *ap)
2412{
2413 u8 status;
2414 unsigned int poll_state = PIO_ST_UNKNOWN;
2415 unsigned int reg_state = PIO_ST_UNKNOWN;
2416 const unsigned int tmout_state = PIO_ST_TMOUT;
2417
2418 switch (ap->pio_task_state) {
2419 case PIO_ST:
2420 case PIO_ST_POLL:
2421 poll_state = PIO_ST_POLL;
2422 reg_state = PIO_ST;
2423 break;
2424 case PIO_ST_LAST:
2425 case PIO_ST_LAST_POLL:
2426 poll_state = PIO_ST_LAST_POLL;
2427 reg_state = PIO_ST_LAST;
2428 break;
2429 default:
2430 BUG();
2431 break;
2432 }
2433
2434 status = ata_chk_status(ap);
2435 if (status & ATA_BUSY) {
2436 if (time_after(jiffies, ap->pio_task_timeout)) {
2437 ap->pio_task_state = tmout_state;
2438 return 0;
2439 }
2440 ap->pio_task_state = poll_state;
2441 return ATA_SHORT_PAUSE;
2442 }
2443
2444 ap->pio_task_state = reg_state;
2445 return 0;
2446}
2447
2448/**
2449 * ata_pio_complete -
2450 * @ap:
2451 *
2452 * LOCKING:
0cba632b 2453 * None. (executing in kernel thread context)
1da177e4
LT		 2454 */
2455
2456static void ata_pio_complete (struct ata_port *ap)
2457{
2458 struct ata_queued_cmd *qc;
2459 u8 drv_stat;
2460
2461 /*
2462 * This is purely hueristic. This is a fast path.
2463 * Sometimes when we enter, BSY will be cleared in
2464 * a chk-status or two. If not, the drive is probably seeking
2465 * or something. Snooze for a couple msecs, then
2466 * chk-status again. If still busy, fall back to
2467 * PIO_ST_POLL state.
2468 */
2469 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2470 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2471 msleep(2);
2472 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2473 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2474 ap->pio_task_state = PIO_ST_LAST_POLL;
2475 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2476 return;
2477 }
2478 }
2479
2480 drv_stat = ata_wait_idle(ap);
2481 if (!ata_ok(drv_stat)) {
2482 ap->pio_task_state = PIO_ST_ERR;
2483 return;
2484 }
2485
2486 qc = ata_qc_from_tag(ap, ap->active_tag);
2487 assert(qc != NULL);
2488
2489 ap->pio_task_state = PIO_ST_IDLE;
2490
40e8c82c 2491 ata_poll_qc_complete(qc, drv_stat);
1da177e4
LT		 2492}
2493
0baab86b
EF		 2494
2495/**
2496 * swap_buf_le16 -
2497 * @buf: Buffer to swap
2498 * @buf_words: Number of 16-bit words in buffer.
2499 *
2500 * Swap halves of 16-bit words if needed to convert from
2501 * little-endian byte order to native cpu byte order, or
2502 * vice-versa.
2503 *
2504 * LOCKING:
2505 */
1da177e4
LT		 2506void swap_buf_le16(u16 *buf, unsigned int buf_words)
2507{
2508#ifdef __BIG_ENDIAN
2509 unsigned int i;
2510
2511 for (i = 0; i < buf_words; i++)
2512 buf[i] = le16_to_cpu(buf[i]);
2513#endif /* __BIG_ENDIAN */
2514}
2515
6ae4cfb5
AL		 2516/**
2517 * ata_mmio_data_xfer - Transfer data by MMIO
2518 * @ap: port to read/write
2519 * @buf: data buffer
2520 * @buflen: buffer length
2521 * @do_write: read/write
2522 *
2523 * Transfer data from/to the device data register by MMIO.
2524 *
2525 * LOCKING:
2526 * Inherited from caller.
2527 *
2528 */
2529
1da177e4
LT		 2530static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2531 unsigned int buflen, int write_data)
2532{
2533 unsigned int i;
2534 unsigned int words = buflen >> 1;
2535 u16 *buf16 = (u16 *) buf;
2536 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2537
6ae4cfb5 2538 /* Transfer multiple of 2 bytes */
1da177e4
LT		 2539 if (write_data) {
2540 for (i = 0; i < words; i++)
2541 writew(le16_to_cpu(buf16[i]), mmio);
2542 } else {
2543 for (i = 0; i < words; i++)
2544 buf16[i] = cpu_to_le16(readw(mmio));
2545 }
6ae4cfb5
AL		 2546
2547 /* Transfer trailing 1 byte, if any. */
2548 if (unlikely(buflen & 0x01)) {
2549 u16 align_buf[1] = { 0 };
2550 unsigned char *trailing_buf = buf + buflen - 1;
2551
2552 if (write_data) {
2553 memcpy(align_buf, trailing_buf, 1);
2554 writew(le16_to_cpu(align_buf[0]), mmio);
2555 } else {
2556 align_buf[0] = cpu_to_le16(readw(mmio));
2557 memcpy(trailing_buf, align_buf, 1);
2558 }
2559 }
1da177e4
LT		 2560}
2561
6ae4cfb5
AL		 2562/**
2563 * ata_pio_data_xfer - Transfer data by PIO
2564 * @ap: port to read/write
2565 * @buf: data buffer
2566 * @buflen: buffer length
2567 * @do_write: read/write
2568 *
2569 * Transfer data from/to the device data register by PIO.
2570 *
2571 * LOCKING:
2572 * Inherited from caller.
2573 *
2574 */
2575
1da177e4
LT		 2576static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2577 unsigned int buflen, int write_data)
2578{
6ae4cfb5 2579 unsigned int words = buflen >> 1;
1da177e4 2580
6ae4cfb5 2581 /* Transfer multiple of 2 bytes */
1da177e4 2582 if (write_data)
6ae4cfb5 2583 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 2584 else
6ae4cfb5
AL		 2585 insw(ap->ioaddr.data_addr, buf, words);
2586
2587 /* Transfer trailing 1 byte, if any. */
2588 if (unlikely(buflen & 0x01)) {
2589 u16 align_buf[1] = { 0 };
2590 unsigned char *trailing_buf = buf + buflen - 1;
2591
2592 if (write_data) {
2593 memcpy(align_buf, trailing_buf, 1);
2594 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2595 } else {
2596 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2597 memcpy(trailing_buf, align_buf, 1);
2598 }
2599 }
1da177e4
LT		 2600}
2601
6ae4cfb5
AL		 2602/**
2603 * ata_data_xfer - Transfer data from/to the data register.
2604 * @ap: port to read/write
2605 * @buf: data buffer
2606 * @buflen: buffer length
2607 * @do_write: read/write
2608 *
2609 * Transfer data from/to the device data register.
2610 *
2611 * LOCKING:
2612 * Inherited from caller.
2613 *
2614 */
2615
1da177e4
LT		 2616static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2617 unsigned int buflen, int do_write)
2618{
2619 if (ap->flags & ATA_FLAG_MMIO)
2620 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2621 else
2622 ata_pio_data_xfer(ap, buf, buflen, do_write);
2623}
2624
6ae4cfb5
AL		 2625/**
2626 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2627 * @qc: Command on going
2628 *
2629 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2630 *
2631 * LOCKING:
2632 * Inherited from caller.
2633 */
2634
1da177e4
LT		 2635static void ata_pio_sector(struct ata_queued_cmd *qc)
2636{
2637 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2638 struct scatterlist *sg = qc->sg;
2639 struct ata_port *ap = qc->ap;
2640 struct page *page;
2641 unsigned int offset;
2642 unsigned char *buf;
2643
2644 if (qc->cursect == (qc->nsect - 1))
2645 ap->pio_task_state = PIO_ST_LAST;
2646
2647 page = sg[qc->cursg].page;
2648 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
2649
2650 /* get the current page and offset */
2651 page = nth_page(page, (offset >> PAGE_SHIFT));
2652 offset %= PAGE_SIZE;
2653
2654 buf = kmap(page) + offset;
2655
2656 qc->cursect++;
2657 qc->cursg_ofs++;
2658
32529e01 2659 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 2660 qc->cursg++;
2661 qc->cursg_ofs = 0;
2662 }
2663
2664 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2665
2666 /* do the actual data transfer */
2667 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2668 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
2669
2670 kunmap(page);
2671}
2672
6ae4cfb5
AL		 2673/**
2674 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2675 * @qc: Command on going
2676 * @bytes: number of bytes
2677 *
2678 * Transfer Transfer data from/to the ATAPI device.
2679 *
2680 * LOCKING:
2681 * Inherited from caller.
2682 *
2683 */
2684
1da177e4
LT		 2685static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2686{
2687 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2688 struct scatterlist *sg = qc->sg;
2689 struct ata_port *ap = qc->ap;
2690 struct page *page;
2691 unsigned char *buf;
2692 unsigned int offset, count;
2693
563a6e1f 2694 if (qc->curbytes + bytes >= qc->nbytes)
1da177e4
LT		 2695 ap->pio_task_state = PIO_ST_LAST;
2696
2697next_sg:
563a6e1f
AL		 2698 if (unlikely(qc->cursg >= qc->n_elem)) {
2699 /*
2700 * The end of qc->sg is reached and the device expects
2701 * more data to transfer. In order not to overrun qc->sg
2702 * and fulfill length specified in the byte count register,
2703 * - for read case, discard trailing data from the device
2704 * - for write case, padding zero data to the device
2705 */
2706 u16 pad_buf[1] = { 0 };
2707 unsigned int words = bytes >> 1;
2708 unsigned int i;
2709
2710 if (words) /* warning if bytes > 1 */
2711 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
2712 ap->id, bytes);
2713
2714 for (i = 0; i < words; i++)
2715 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2716
2717 ap->pio_task_state = PIO_ST_LAST;
2718 return;
2719 }
2720
1da177e4
LT		 2721 sg = &qc->sg[qc->cursg];
2722
1da177e4
LT		 2723 page = sg->page;
2724 offset = sg->offset + qc->cursg_ofs;
2725
2726 /* get the current page and offset */
2727 page = nth_page(page, (offset >> PAGE_SHIFT));
2728 offset %= PAGE_SIZE;
2729
6952df03 2730 /* don't overrun current sg */
32529e01 2731 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 2732
2733 /* don't cross page boundaries */
2734 count = min(count, (unsigned int)PAGE_SIZE - offset);
2735
2736 buf = kmap(page) + offset;
2737
2738 bytes -= count;
2739 qc->curbytes += count;
2740 qc->cursg_ofs += count;
2741
32529e01 2742 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 2743 qc->cursg++;
2744 qc->cursg_ofs = 0;
2745 }
2746
2747 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2748
2749 /* do the actual data transfer */
2750 ata_data_xfer(ap, buf, count, do_write);
2751
2752 kunmap(page);
2753
563a6e1f 2754 if (bytes)
1da177e4 2755 goto next_sg;
1da177e4
LT		 2756}
2757
6ae4cfb5
AL		 2758/**
2759 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
2760 * @qc: Command on going
2761 *
2762 * Transfer Transfer data from/to the ATAPI device.
2763 *
2764 * LOCKING:
2765 * Inherited from caller.
2766 *
2767 */
2768
1da177e4
LT		 2769static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2770{
2771 struct ata_port *ap = qc->ap;
2772 struct ata_device *dev = qc->dev;
2773 unsigned int ireason, bc_lo, bc_hi, bytes;
2774 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
2775
2776 ap->ops->tf_read(ap, &qc->tf);
2777 ireason = qc->tf.nsect;
2778 bc_lo = qc->tf.lbam;
2779 bc_hi = qc->tf.lbah;
2780 bytes = (bc_hi << 8) | bc_lo;
2781
2782 /* shall be cleared to zero, indicating xfer of data */
2783 if (ireason & (1 << 0))
2784 goto err_out;
2785
2786 /* make sure transfer direction matches expected */
2787 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
2788 if (do_write != i_write)
2789 goto err_out;
2790
2791 __atapi_pio_bytes(qc, bytes);
2792
2793 return;
2794
2795err_out:
2796 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
2797 ap->id, dev->devno);
2798 ap->pio_task_state = PIO_ST_ERR;
2799}
2800
2801/**
2802 * ata_pio_sector -
2803 * @ap:
2804 *
2805 * LOCKING:
0cba632b 2806 * None. (executing in kernel thread context)
1da177e4
LT		 2807 */
2808
2809static void ata_pio_block(struct ata_port *ap)
2810{
2811 struct ata_queued_cmd *qc;
2812 u8 status;
2813
2814 /*
2815 * This is purely hueristic. This is a fast path.
2816 * Sometimes when we enter, BSY will be cleared in
2817 * a chk-status or two. If not, the drive is probably seeking
2818 * or something. Snooze for a couple msecs, then
2819 * chk-status again. If still busy, fall back to
2820 * PIO_ST_POLL state.
2821 */
2822 status = ata_busy_wait(ap, ATA_BUSY, 5);
2823 if (status & ATA_BUSY) {
2824 msleep(2);
2825 status = ata_busy_wait(ap, ATA_BUSY, 10);
2826 if (status & ATA_BUSY) {
2827 ap->pio_task_state = PIO_ST_POLL;
2828 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2829 return;
2830 }
2831 }
2832
2833 qc = ata_qc_from_tag(ap, ap->active_tag);
2834 assert(qc != NULL);
2835
2836 if (is_atapi_taskfile(&qc->tf)) {
2837 /* no more data to transfer or unsupported ATAPI command */
2838 if ((status & ATA_DRQ) == 0) {
2839 ap->pio_task_state = PIO_ST_IDLE;
2840
40e8c82c 2841 ata_poll_qc_complete(qc, status);
1da177e4
LT		 2842 return;
2843 }
2844
2845 atapi_pio_bytes(qc);
2846 } else {
2847 /* handle BSY=0, DRQ=0 as error */
2848 if ((status & ATA_DRQ) == 0) {
2849 ap->pio_task_state = PIO_ST_ERR;
2850 return;
2851 }
2852
2853 ata_pio_sector(qc);
2854 }
2855}
2856
2857static void ata_pio_error(struct ata_port *ap)
2858{
2859 struct ata_queued_cmd *qc;
2860 u8 drv_stat;
2861
2862 qc = ata_qc_from_tag(ap, ap->active_tag);
2863 assert(qc != NULL);
2864
2865 drv_stat = ata_chk_status(ap);
2866 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
2867 ap->id, drv_stat);
2868
2869 ap->pio_task_state = PIO_ST_IDLE;
2870
40e8c82c 2871 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
1da177e4
LT		 2872}
2873
2874static void ata_pio_task(void *_data)
2875{
2876 struct ata_port *ap = _data;
2877 unsigned long timeout = 0;
2878
2879 switch (ap->pio_task_state) {
2880 case PIO_ST_IDLE:
2881 return;
2882
2883 case PIO_ST:
2884 ata_pio_block(ap);
2885 break;
2886
2887 case PIO_ST_LAST:
2888 ata_pio_complete(ap);
2889 break;
2890
2891 case PIO_ST_POLL:
2892 case PIO_ST_LAST_POLL:
2893 timeout = ata_pio_poll(ap);
2894 break;
2895
2896 case PIO_ST_TMOUT:
2897 case PIO_ST_ERR:
2898 ata_pio_error(ap);
2899 return;
2900 }
2901
2902 if (timeout)
2903 queue_delayed_work(ata_wq, &ap->pio_task,
2904 timeout);
2905 else
2906 queue_work(ata_wq, &ap->pio_task);
2907}
2908
2909static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2910 struct scsi_cmnd *cmd)
2911{
2912 DECLARE_COMPLETION(wait);
2913 struct ata_queued_cmd *qc;
2914 unsigned long flags;
2915 int rc;
2916
2917 DPRINTK("ATAPI request sense\n");
2918
2919 qc = ata_qc_new_init(ap, dev);
2920 BUG_ON(qc == NULL);
2921
2922 /* FIXME: is this needed? */
2923 memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
2924
2925 ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer));
2926 qc->dma_dir = DMA_FROM_DEVICE;
2927
21b1ed74 2928 memset(&qc->cdb, 0, ap->cdb_len);
1da177e4
LT		 2929 qc->cdb[0] = REQUEST_SENSE;
2930 qc->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2931
2932 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2933 qc->tf.command = ATA_CMD_PACKET;
2934
2935 qc->tf.protocol = ATA_PROT_ATAPI;
2936 qc->tf.lbam = (8 * 1024) & 0xff;
2937 qc->tf.lbah = (8 * 1024) >> 8;
2938 qc->nbytes = SCSI_SENSE_BUFFERSIZE;
2939
2940 qc->waiting = &wait;
2941 qc->complete_fn = ata_qc_complete_noop;
2942
2943 spin_lock_irqsave(&ap->host_set->lock, flags);
2944 rc = ata_qc_issue(qc);
2945 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2946
2947 if (rc)
2948 ata_port_disable(ap);
2949 else
2950 wait_for_completion(&wait);
2951
2952 DPRINTK("EXIT\n");
2953}
2954
2955/**
2956 * ata_qc_timeout - Handle timeout of queued command
2957 * @qc: Command that timed out
2958 *
2959 * Some part of the kernel (currently, only the SCSI layer)
2960 * has noticed that the active command on port @ap has not
2961 * completed after a specified length of time. Handle this
2962 * condition by disabling DMA (if necessary) and completing
2963 * transactions, with error if necessary.
2964 *
2965 * This also handles the case of the "lost interrupt", where
2966 * for some reason (possibly hardware bug, possibly driver bug)
2967 * an interrupt was not delivered to the driver, even though the
2968 * transaction completed successfully.
2969 *
2970 * LOCKING:
0cba632b 2971 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 2972 */
2973
2974static void ata_qc_timeout(struct ata_queued_cmd *qc)
2975{
2976 struct ata_port *ap = qc->ap;
b8f6153e 2977 struct ata_host_set *host_set = ap->host_set;
1da177e4
LT		 2978 struct ata_device *dev = qc->dev;
2979 u8 host_stat = 0, drv_stat;
b8f6153e 2980 unsigned long flags;
1da177e4
LT		 2981
2982 DPRINTK("ENTER\n");
2983
2984 /* FIXME: doesn't this conflict with timeout handling? */
2985 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
2986 struct scsi_cmnd *cmd = qc->scsicmd;
2987
3111b0d1 2988 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
1da177e4
LT		 2989
2990 /* finish completing original command */
b8f6153e 2991 spin_lock_irqsave(&host_set->lock, flags);
1da177e4 2992 __ata_qc_complete(qc);
b8f6153e 2993 spin_unlock_irqrestore(&host_set->lock, flags);
1da177e4
LT		 2994
2995 atapi_request_sense(ap, dev, cmd);
2996
2997 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
2998 scsi_finish_command(cmd);
2999
3000 goto out;
3001 }
3002 }
3003
b8f6153e
JG		 3004 spin_lock_irqsave(&host_set->lock, flags);
3005
1da177e4
LT		 3006 /* hack alert! We cannot use the supplied completion
3007 * function from inside the ->eh_strategy_handler() thread.
3008 * libata is the only user of ->eh_strategy_handler() in
3009 * any kernel, so the default scsi_done() assumes it is
3010 * not being called from the SCSI EH.
3011 */
3012 qc->scsidone = scsi_finish_command;
3013
3014 switch (qc->tf.protocol) {
3015
3016 case ATA_PROT_DMA:
3017 case ATA_PROT_ATAPI_DMA:
3018 host_stat = ap->ops->bmdma_status(ap);
3019
3020 /* before we do anything else, clear DMA-Start bit */
3021 ap->ops->bmdma_stop(ap);
3022
3023 /* fall through */
3024
3025 default:
3026 ata_altstatus(ap);
3027 drv_stat = ata_chk_status(ap);
3028
3029 /* ack bmdma irq events */
3030 ap->ops->irq_clear(ap);
3031
3032 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3033 ap->id, qc->tf.command, drv_stat, host_stat);
3034
3035 /* complete taskfile transaction */
3036 ata_qc_complete(qc, drv_stat);
3037 break;
3038 }
b8f6153e
JG		 3039
3040 spin_unlock_irqrestore(&host_set->lock, flags);
3041
1da177e4
LT		 3042out:
3043 DPRINTK("EXIT\n");
3044}
3045
3046/**
3047 * ata_eng_timeout - Handle timeout of queued command
3048 * @ap: Port on which timed-out command is active
3049 *
3050 * Some part of the kernel (currently, only the SCSI layer)
3051 * has noticed that the active command on port @ap has not
3052 * completed after a specified length of time. Handle this
3053 * condition by disabling DMA (if necessary) and completing
3054 * transactions, with error if necessary.
3055 *
3056 * This also handles the case of the "lost interrupt", where
3057 * for some reason (possibly hardware bug, possibly driver bug)
3058 * an interrupt was not delivered to the driver, even though the
3059 * transaction completed successfully.
3060 *
3061 * LOCKING:
3062 * Inherited from SCSI layer (none, can sleep)
3063 */
3064
3065void ata_eng_timeout(struct ata_port *ap)
3066{
3067 struct ata_queued_cmd *qc;
3068
3069 DPRINTK("ENTER\n");
3070
3071 qc = ata_qc_from_tag(ap, ap->active_tag);
3072 if (!qc) {
3073 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3074 ap->id);
3075 goto out;
3076 }
3077
3078 ata_qc_timeout(qc);
3079
3080out:
3081 DPRINTK("EXIT\n");
3082}
3083
3084/**
3085 * ata_qc_new - Request an available ATA command, for queueing
3086 * @ap: Port associated with device @dev
3087 * @dev: Device from whom we request an available command structure
3088 *
3089 * LOCKING:
0cba632b 3090 * None.
1da177e4
LT		 3091 */
3092
3093static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3094{
3095 struct ata_queued_cmd *qc = NULL;
3096 unsigned int i;
3097
3098 for (i = 0; i < ATA_MAX_QUEUE; i++)
3099 if (!test_and_set_bit(i, &ap->qactive)) {
3100 qc = ata_qc_from_tag(ap, i);
3101 break;
3102 }
3103
3104 if (qc)
3105 qc->tag = i;
3106
3107 return qc;
3108}
3109
3110/**
3111 * ata_qc_new_init - Request an available ATA command, and initialize it
3112 * @ap: Port associated with device @dev
3113 * @dev: Device from whom we request an available command structure
3114 *
3115 * LOCKING:
0cba632b 3116 * None.
1da177e4
LT		 3117 */
3118
3119struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3120 struct ata_device *dev)
3121{
3122 struct ata_queued_cmd *qc;
3123
3124 qc = ata_qc_new(ap);
3125 if (qc) {
3126 qc->sg = NULL;
3127 qc->flags = 0;
3128 qc->scsicmd = NULL;
3129 qc->ap = ap;
3130 qc->dev = dev;
3131 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3132 qc->nsect = 0;
3133 qc->nbytes = qc->curbytes = 0;
3134
3135 ata_tf_init(ap, &qc->tf, dev->devno);
3136
3137 if (dev->flags & ATA_DFLAG_LBA48)
3138 qc->tf.flags |= ATA_TFLAG_LBA48;
3139 }
3140
3141 return qc;
3142}
3143
3144static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3145{
3146 return 0;
3147}
3148
3149static void __ata_qc_complete(struct ata_queued_cmd *qc)
3150{
3151 struct ata_port *ap = qc->ap;
3152 unsigned int tag, do_clear = 0;
3153
3154 qc->flags = 0;
3155 tag = qc->tag;
3156 if (likely(ata_tag_valid(tag))) {
3157 if (tag == ap->active_tag)
3158 ap->active_tag = ATA_TAG_POISON;
3159 qc->tag = ATA_TAG_POISON;
3160 do_clear = 1;
3161 }
3162
3163 if (qc->waiting) {
3164 struct completion *waiting = qc->waiting;
3165 qc->waiting = NULL;
3166 complete(waiting);
3167 }
3168
3169 if (likely(do_clear))
3170 clear_bit(tag, &ap->qactive);
3171}
3172
3173/**
3174 * ata_qc_free - free unused ata_queued_cmd
3175 * @qc: Command to complete
3176 *
3177 * Designed to free unused ata_queued_cmd object
3178 * in case something prevents using it.
3179 *
3180 * LOCKING:
0cba632b 3181 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3182 *
3183 */
3184void ata_qc_free(struct ata_queued_cmd *qc)
3185{
3186 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3187 assert(qc->waiting == NULL); /* nothing should be waiting */
3188
3189 __ata_qc_complete(qc);
3190}
3191
3192/**
3193 * ata_qc_complete - Complete an active ATA command
3194 * @qc: Command to complete
0cba632b
JG		 3195 * @drv_stat: ATA Status register contents
3196 *
3197 * Indicate to the mid and upper layers that an ATA
3198 * command has completed, with either an ok or not-ok status.
1da177e4
LT		 3199 *
3200 * LOCKING:
0cba632b 3201 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3202 *
3203 */
3204
3205void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3206{
3207 int rc;
3208
3209 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3210 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3211
3212 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3213 ata_sg_clean(qc);
3214
3f3791d3
AL		 3215 /* atapi: mark qc as inactive to prevent the interrupt handler
3216 * from completing the command twice later, before the error handler
3217 * is called. (when rc != 0 and atapi request sense is needed)
3218 */
3219 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3220
1da177e4
LT		 3221 /* call completion callback */
3222 rc = qc->complete_fn(qc, drv_stat);
3223
3224 /* if callback indicates not to complete command (non-zero),
3225 * return immediately
3226 */
3227 if (rc != 0)
3228 return;
3229
3230 __ata_qc_complete(qc);
3231
3232 VPRINTK("EXIT\n");
3233}
3234
3235static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3236{
3237 struct ata_port *ap = qc->ap;
3238
3239 switch (qc->tf.protocol) {
3240 case ATA_PROT_DMA:
3241 case ATA_PROT_ATAPI_DMA:
3242 return 1;
3243
3244 case ATA_PROT_ATAPI:
3245 case ATA_PROT_PIO:
3246 case ATA_PROT_PIO_MULT:
3247 if (ap->flags & ATA_FLAG_PIO_DMA)
3248 return 1;
3249
3250 /* fall through */
3251
3252 default:
3253 return 0;
3254 }
3255
3256 /* never reached */
3257}
3258
3259/**
3260 * ata_qc_issue - issue taskfile to device
3261 * @qc: command to issue to device
3262 *
3263 * Prepare an ATA command to submission to device.
3264 * This includes mapping the data into a DMA-able
3265 * area, filling in the S/G table, and finally
3266 * writing the taskfile to hardware, starting the command.
3267 *
3268 * LOCKING:
3269 * spin_lock_irqsave(host_set lock)
3270 *
3271 * RETURNS:
3272 * Zero on success, negative on error.
3273 */
3274
3275int ata_qc_issue(struct ata_queued_cmd *qc)
3276{
3277 struct ata_port *ap = qc->ap;
3278
3279 if (ata_should_dma_map(qc)) {
3280 if (qc->flags & ATA_QCFLAG_SG) {
3281 if (ata_sg_setup(qc))
3282 goto err_out;
3283 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3284 if (ata_sg_setup_one(qc))
3285 goto err_out;
3286 }
3287 } else {
3288 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3289 }
3290
3291 ap->ops->qc_prep(qc);
3292
3293 qc->ap->active_tag = qc->tag;
3294 qc->flags |= ATA_QCFLAG_ACTIVE;
3295
3296 return ap->ops->qc_issue(qc);
3297
3298err_out:
3299 return -1;
3300}
3301
0baab86b 3302
1da177e4
LT		 3303/**
3304 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3305 * @qc: command to issue to device
3306 *
3307 * Using various libata functions and hooks, this function
3308 * starts an ATA command. ATA commands are grouped into
3309 * classes called "protocols", and issuing each type of protocol
3310 * is slightly different.
3311 *
0baab86b
EF		 3312 * May be used as the qc_issue() entry in ata_port_operations.
3313 *
1da177e4
LT		 3314 * LOCKING:
3315 * spin_lock_irqsave(host_set lock)
3316 *
3317 * RETURNS:
3318 * Zero on success, negative on error.
3319 */
3320
3321int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3322{
3323 struct ata_port *ap = qc->ap;
3324
3325 ata_dev_select(ap, qc->dev->devno, 1, 0);
3326
3327 switch (qc->tf.protocol) {
3328 case ATA_PROT_NODATA:
3329 ata_tf_to_host_nolock(ap, &qc->tf);
3330 break;
3331
3332 case ATA_PROT_DMA:
3333 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3334 ap->ops->bmdma_setup(qc); /* set up bmdma */
3335 ap->ops->bmdma_start(qc); /* initiate bmdma */
3336 break;
3337
3338 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3339 ata_qc_set_polling(qc);
3340 ata_tf_to_host_nolock(ap, &qc->tf);
3341 ap->pio_task_state = PIO_ST;
3342 queue_work(ata_wq, &ap->pio_task);
3343 break;
3344
3345 case ATA_PROT_ATAPI:
3346 ata_qc_set_polling(qc);
3347 ata_tf_to_host_nolock(ap, &qc->tf);
3348 queue_work(ata_wq, &ap->packet_task);
3349 break;
3350
3351 case ATA_PROT_ATAPI_NODATA:
c1389503 3352 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3353 ata_tf_to_host_nolock(ap, &qc->tf);
3354 queue_work(ata_wq, &ap->packet_task);
3355 break;
3356
3357 case ATA_PROT_ATAPI_DMA:
c1389503 3358 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3359 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3360 ap->ops->bmdma_setup(qc); /* set up bmdma */
3361 queue_work(ata_wq, &ap->packet_task);
3362 break;
3363
3364 default:
3365 WARN_ON(1);
3366 return -1;
3367 }
3368
3369 return 0;
3370}
3371
3372/**
0baab86b 3373 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3374 * @qc: Info associated with this ATA transaction.
3375 *
3376 * LOCKING:
3377 * spin_lock_irqsave(host_set lock)
3378 */
3379
3380static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3381{
3382 struct ata_port *ap = qc->ap;
3383 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3384 u8 dmactl;
3385 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3386
3387 /* load PRD table addr. */
3388 mb(); /* make sure PRD table writes are visible to controller */
3389 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3390
3391 /* specify data direction, triple-check start bit is clear */
3392 dmactl = readb(mmio + ATA_DMA_CMD);
3393 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3394 if (!rw)
3395 dmactl |= ATA_DMA_WR;
3396 writeb(dmactl, mmio + ATA_DMA_CMD);
3397
3398 /* issue r/w command */
3399 ap->ops->exec_command(ap, &qc->tf);
3400}
3401
3402/**
3403 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3404 * @qc: Info associated with this ATA transaction.
3405 *
3406 * LOCKING:
3407 * spin_lock_irqsave(host_set lock)
3408 */
3409
3410static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3411{
3412 struct ata_port *ap = qc->ap;
3413 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3414 u8 dmactl;
3415
3416 /* start host DMA transaction */
3417 dmactl = readb(mmio + ATA_DMA_CMD);
3418 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3419
3420 /* Strictly, one may wish to issue a readb() here, to
3421 * flush the mmio write. However, control also passes
3422 * to the hardware at this point, and it will interrupt
3423 * us when we are to resume control. So, in effect,
3424 * we don't care when the mmio write flushes.
3425 * Further, a read of the DMA status register _immediately_
3426 * following the write may not be what certain flaky hardware
3427 * is expected, so I think it is best to not add a readb()
3428 * without first all the MMIO ATA cards/mobos.
3429 * Or maybe I'm just being paranoid.
3430 */
3431}
3432
3433/**
3434 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3435 * @qc: Info associated with this ATA transaction.
3436 *
3437 * LOCKING:
3438 * spin_lock_irqsave(host_set lock)
3439 */
3440
3441static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3442{
3443 struct ata_port *ap = qc->ap;
3444 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3445 u8 dmactl;
3446
3447 /* load PRD table addr. */
3448 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3449
3450 /* specify data direction, triple-check start bit is clear */
3451 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3452 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3453 if (!rw)
3454 dmactl |= ATA_DMA_WR;
3455 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3456
3457 /* issue r/w command */
3458 ap->ops->exec_command(ap, &qc->tf);
3459}
3460
3461/**
3462 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3463 * @qc: Info associated with this ATA transaction.
3464 *
3465 * LOCKING:
3466 * spin_lock_irqsave(host_set lock)
3467 */
3468
3469static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3470{
3471 struct ata_port *ap = qc->ap;
3472 u8 dmactl;
3473
3474 /* start host DMA transaction */
3475 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3476 outb(dmactl | ATA_DMA_START,
3477 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3478}
3479
0baab86b
EF		 3480
3481/**
3482 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3483 * @qc: Info associated with this ATA transaction.
3484 *
3485 * Writes the ATA_DMA_START flag to the DMA command register.
3486 *
3487 * May be used as the bmdma_start() entry in ata_port_operations.
3488 *
3489 * LOCKING:
3490 * spin_lock_irqsave(host_set lock)
3491 */
1da177e4
LT		 3492void ata_bmdma_start(struct ata_queued_cmd *qc)
3493{
3494 if (qc->ap->flags & ATA_FLAG_MMIO)
3495 ata_bmdma_start_mmio(qc);
3496 else
3497 ata_bmdma_start_pio(qc);
3498}
3499
0baab86b
EF		 3500
3501/**
3502 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3503 * @qc: Info associated with this ATA transaction.
3504 *
3505 * Writes address of PRD table to device's PRD Table Address
3506 * register, sets the DMA control register, and calls
3507 * ops->exec_command() to start the transfer.
3508 *
3509 * May be used as the bmdma_setup() entry in ata_port_operations.
3510 *
3511 * LOCKING:
3512 * spin_lock_irqsave(host_set lock)
3513 */
1da177e4
LT		 3514void ata_bmdma_setup(struct ata_queued_cmd *qc)
3515{
3516 if (qc->ap->flags & ATA_FLAG_MMIO)
3517 ata_bmdma_setup_mmio(qc);
3518 else
3519 ata_bmdma_setup_pio(qc);
3520}
3521
0baab86b
EF		 3522
3523/**
3524 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3525 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3526 *
3527 * Clear interrupt and error flags in DMA status register.
3528 *
3529 * May be used as the irq_clear() entry in ata_port_operations.
3530 *
3531 * LOCKING:
3532 * spin_lock_irqsave(host_set lock)
3533 */
3534
1da177e4
LT		 3535void ata_bmdma_irq_clear(struct ata_port *ap)
3536{
3537 if (ap->flags & ATA_FLAG_MMIO) {
3538 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3539 writeb(readb(mmio), mmio);
3540 } else {
3541 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3542 outb(inb(addr), addr);
3543 }
3544
3545}
3546
0baab86b
EF		 3547
3548/**
3549 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 3550 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3551 *
3552 * Read and return BMDMA status register.
3553 *
3554 * May be used as the bmdma_status() entry in ata_port_operations.
3555 *
3556 * LOCKING:
3557 * spin_lock_irqsave(host_set lock)
3558 */
3559
1da177e4
LT		 3560u8 ata_bmdma_status(struct ata_port *ap)
3561{
3562 u8 host_stat;
3563 if (ap->flags & ATA_FLAG_MMIO) {
3564 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3565 host_stat = readb(mmio + ATA_DMA_STATUS);
3566 } else
3567 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3568 return host_stat;
3569}
3570
0baab86b
EF		 3571
3572/**
3573 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
decc6d0b 3574 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3575 *
3576 * Clears the ATA_DMA_START flag in the dma control register
3577 *
3578 * May be used as the bmdma_stop() entry in ata_port_operations.
3579 *
3580 * LOCKING:
3581 * spin_lock_irqsave(host_set lock)
3582 */
3583
1da177e4
LT		 3584void ata_bmdma_stop(struct ata_port *ap)
3585{
3586 if (ap->flags & ATA_FLAG_MMIO) {
3587 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3588
3589 /* clear start/stop bit */
3590 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3591 mmio + ATA_DMA_CMD);
3592 } else {
3593 /* clear start/stop bit */
3594 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3595 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3596 }
3597
3598 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3599 ata_altstatus(ap); /* dummy read */
3600}
3601
3602/**
3603 * ata_host_intr - Handle host interrupt for given (port, task)
3604 * @ap: Port on which interrupt arrived (possibly...)
3605 * @qc: Taskfile currently active in engine
3606 *
3607 * Handle host interrupt for given queued command. Currently,
3608 * only DMA interrupts are handled. All other commands are
3609 * handled via polling with interrupts disabled (nIEN bit).
3610 *
3611 * LOCKING:
3612 * spin_lock_irqsave(host_set lock)
3613 *
3614 * RETURNS:
3615 * One if interrupt was handled, zero if not (shared irq).
3616 */
3617
3618inline unsigned int ata_host_intr (struct ata_port *ap,
3619 struct ata_queued_cmd *qc)
3620{
3621 u8 status, host_stat;
3622
3623 switch (qc->tf.protocol) {
3624
3625 case ATA_PROT_DMA:
3626 case ATA_PROT_ATAPI_DMA:
3627 case ATA_PROT_ATAPI:
3628 /* check status of DMA engine */
3629 host_stat = ap->ops->bmdma_status(ap);
3630 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3631
3632 /* if it's not our irq... */
3633 if (!(host_stat & ATA_DMA_INTR))
3634 goto idle_irq;
3635
3636 /* before we do anything else, clear DMA-Start bit */
3637 ap->ops->bmdma_stop(ap);
3638
3639 /* fall through */
3640
3641 case ATA_PROT_ATAPI_NODATA:
3642 case ATA_PROT_NODATA:
3643 /* check altstatus */
3644 status = ata_altstatus(ap);
3645 if (status & ATA_BUSY)
3646 goto idle_irq;
3647
3648 /* check main status, clearing INTRQ */
3649 status = ata_chk_status(ap);
3650 if (unlikely(status & ATA_BUSY))
3651 goto idle_irq;
3652 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3653 ap->id, qc->tf.protocol, status);
3654
3655 /* ack bmdma irq events */
3656 ap->ops->irq_clear(ap);
3657
3658 /* complete taskfile transaction */
3659 ata_qc_complete(qc, status);
3660 break;
3661
3662 default:
3663 goto idle_irq;
3664 }
3665
3666 return 1; /* irq handled */
3667
3668idle_irq:
3669 ap->stats.idle_irq++;
3670
3671#ifdef ATA_IRQ_TRAP
3672 if ((ap->stats.idle_irq % 1000) == 0) {
3673 handled = 1;
3674 ata_irq_ack(ap, 0); /* debug trap */
3675 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3676 }
3677#endif
3678 return 0; /* irq not handled */
3679}
3680
3681/**
3682 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 3683 * @irq: irq line (unused)
3684 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 3685 * @regs: unused
3686 *
0cba632b
JG		 3687 * Default interrupt handler for PCI IDE devices. Calls
3688 * ata_host_intr() for each port that is not disabled.
3689 *
1da177e4 3690 * LOCKING:
0cba632b 3691 * Obtains host_set lock during operation.
1da177e4
LT		 3692 *
3693 * RETURNS:
0cba632b 3694 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 3695 *
3696 */
3697
3698irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3699{
3700 struct ata_host_set *host_set = dev_instance;
3701 unsigned int i;
3702 unsigned int handled = 0;
3703 unsigned long flags;
3704
3705 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
3706 spin_lock_irqsave(&host_set->lock, flags);
3707
3708 for (i = 0; i < host_set->n_ports; i++) {
3709 struct ata_port *ap;
3710
3711 ap = host_set->ports[i];
c1389503
TH		 3712 if (ap &&
3713 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 3714 struct ata_queued_cmd *qc;
3715
3716 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 3717 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
3718 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 3719 handled |= ata_host_intr(ap, qc);
3720 }
3721 }
3722
3723 spin_unlock_irqrestore(&host_set->lock, flags);
3724
3725 return IRQ_RETVAL(handled);
3726}
3727
3728/**
3729 * atapi_packet_task - Write CDB bytes to hardware
3730 * @_data: Port to which ATAPI device is attached.
3731 *
3732 * When device has indicated its readiness to accept
3733 * a CDB, this function is called. Send the CDB.
3734 * If DMA is to be performed, exit immediately.
3735 * Otherwise, we are in polling mode, so poll
3736 * status under operation succeeds or fails.
3737 *
3738 * LOCKING:
3739 * Kernel thread context (may sleep)
3740 */
3741
3742static void atapi_packet_task(void *_data)
3743{
3744 struct ata_port *ap = _data;
3745 struct ata_queued_cmd *qc;
3746 u8 status;
3747
3748 qc = ata_qc_from_tag(ap, ap->active_tag);
3749 assert(qc != NULL);
3750 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3751
3752 /* sleep-wait for BSY to clear */
3753 DPRINTK("busy wait\n");
3754 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
3755 goto err_out;
3756
3757 /* make sure DRQ is set */
3758 status = ata_chk_status(ap);
3759 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
3760 goto err_out;
3761
3762 /* send SCSI cdb */
3763 DPRINTK("send cdb\n");
3764 assert(ap->cdb_len >= 12);
1da177e4 3765
c1389503
TH		 3766 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3767 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3768 unsigned long flags;
1da177e4 3769
c1389503
TH		 3770 /* Once we're done issuing command and kicking bmdma,
3771 * irq handler takes over. To not lose irq, we need
3772 * to clear NOINTR flag before sending cdb, but
3773 * interrupt handler shouldn't be invoked before we're
3774 * finished. Hence, the following locking.
3775 */
3776 spin_lock_irqsave(&ap->host_set->lock, flags);
3777 ap->flags &= ~ATA_FLAG_NOINTR;
3778 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3779 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3780 ap->ops->bmdma_start(qc); /* initiate bmdma */
3781 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3782 } else {
3783 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
1da177e4 3784
c1389503 3785 /* PIO commands are handled by polling */
1da177e4
LT		 3786 ap->pio_task_state = PIO_ST;
3787 queue_work(ata_wq, &ap->pio_task);
3788 }
3789
3790 return;
3791
3792err_out:
40e8c82c 3793 ata_poll_qc_complete(qc, ATA_ERR);
1da177e4
LT		 3794}
3795
0baab86b
EF		 3796
3797/**
3798 * ata_port_start - Set port up for dma.
3799 * @ap: Port to initialize
3800 *
3801 * Called just after data structures for each port are
3802 * initialized. Allocates space for PRD table.
3803 *
3804 * May be used as the port_start() entry in ata_port_operations.
3805 *
3806 * LOCKING:
3807 */
3808
1da177e4
LT		 3809int ata_port_start (struct ata_port *ap)
3810{
3811 struct device *dev = ap->host_set->dev;
3812
3813 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
3814 if (!ap->prd)
3815 return -ENOMEM;
3816
3817 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
3818
3819 return 0;
3820}
3821
0baab86b
EF		 3822
3823/**
3824 * ata_port_stop - Undo ata_port_start()
3825 * @ap: Port to shut down
3826 *
3827 * Frees the PRD table.
3828 *
3829 * May be used as the port_stop() entry in ata_port_operations.
3830 *
3831 * LOCKING:
3832 */
3833
1da177e4
LT		 3834void ata_port_stop (struct ata_port *ap)
3835{
3836 struct device *dev = ap->host_set->dev;
3837
3838 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
3839}
3840
aa8f0dc6
JG		 3841void ata_host_stop (struct ata_host_set *host_set)
3842{
3843 if (host_set->mmio_base)
3844 iounmap(host_set->mmio_base);
3845}
3846
3847
1da177e4
LT		 3848/**
3849 * ata_host_remove - Unregister SCSI host structure with upper layers
3850 * @ap: Port to unregister
3851 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
3852 *
3853 * LOCKING:
3854 */
3855
3856static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
3857{
3858 struct Scsi_Host *sh = ap->host;
3859
3860 DPRINTK("ENTER\n");
3861
3862 if (do_unregister)
3863 scsi_remove_host(sh);
3864
3865 ap->ops->port_stop(ap);
3866}
3867
3868/**
3869 * ata_host_init - Initialize an ata_port structure
3870 * @ap: Structure to initialize
3871 * @host: associated SCSI mid-layer structure
3872 * @host_set: Collection of hosts to which @ap belongs
3873 * @ent: Probe information provided by low-level driver
3874 * @port_no: Port number associated with this ata_port
3875 *
0cba632b
JG		 3876 * Initialize a new ata_port structure, and its associated
3877 * scsi_host.
3878 *
1da177e4 3879 * LOCKING:
0cba632b 3880 * Inherited from caller.
1da177e4
LT		 3881 *
3882 */
3883
3884static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
3885 struct ata_host_set *host_set,
3886 struct ata_probe_ent *ent, unsigned int port_no)
3887{
3888 unsigned int i;
3889
3890 host->max_id = 16;
3891 host->max_lun = 1;
3892 host->max_channel = 1;
3893 host->unique_id = ata_unique_id++;
3894 host->max_cmd_len = 12;
12413197 3895
1da177e4
LT		 3896 scsi_assign_lock(host, &host_set->lock);
3897
3898 ap->flags = ATA_FLAG_PORT_DISABLED;
3899 ap->id = host->unique_id;
3900 ap->host = host;
3901 ap->ctl = ATA_DEVCTL_OBS;
3902 ap->host_set = host_set;
3903 ap->port_no = port_no;
3904 ap->hard_port_no =
3905 ent->legacy_mode ? ent->hard_port_no : port_no;
3906 ap->pio_mask = ent->pio_mask;
3907 ap->mwdma_mask = ent->mwdma_mask;
3908 ap->udma_mask = ent->udma_mask;
3909 ap->flags |= ent->host_flags;
3910 ap->ops = ent->port_ops;
3911 ap->cbl = ATA_CBL_NONE;
3912 ap->active_tag = ATA_TAG_POISON;
3913 ap->last_ctl = 0xFF;
3914
3915 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
3916 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
3917
3918 for (i = 0; i < ATA_MAX_DEVICES; i++)
3919 ap->device[i].devno = i;
3920
3921#ifdef ATA_IRQ_TRAP
3922 ap->stats.unhandled_irq = 1;
3923 ap->stats.idle_irq = 1;
3924#endif
3925
3926 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
3927}
3928
3929/**
3930 * ata_host_add - Attach low-level ATA driver to system
3931 * @ent: Information provided by low-level driver
3932 * @host_set: Collections of ports to which we add
3933 * @port_no: Port number associated with this host
3934 *
0cba632b
JG		 3935 * Attach low-level ATA driver to system.
3936 *
1da177e4 3937 * LOCKING:
0cba632b 3938 * PCI/etc. bus probe sem.
1da177e4
LT		 3939 *
3940 * RETURNS:
0cba632b 3941 * New ata_port on success, for NULL on error.
1da177e4
LT		 3942 *
3943 */
3944
3945static struct ata_port * ata_host_add(struct ata_probe_ent *ent,
3946 struct ata_host_set *host_set,
3947 unsigned int port_no)
3948{
3949 struct Scsi_Host *host;
3950 struct ata_port *ap;
3951 int rc;
3952
3953 DPRINTK("ENTER\n");
3954 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
3955 if (!host)
3956 return NULL;
3957
3958 ap = (struct ata_port *) &host->hostdata[0];
3959
3960 ata_host_init(ap, host, host_set, ent, port_no);
3961
3962 rc = ap->ops->port_start(ap);
3963 if (rc)
3964 goto err_out;
3965
3966 return ap;
3967
3968err_out:
3969 scsi_host_put(host);
3970 return NULL;
3971}
3972
3973/**
0cba632b
JG		 3974 * ata_device_add - Register hardware device with ATA and SCSI layers
3975 * @ent: Probe information describing hardware device to be registered
3976 *
3977 * This function processes the information provided in the probe
3978 * information struct @ent, allocates the necessary ATA and SCSI
3979 * host information structures, initializes them, and registers
3980 * everything with requisite kernel subsystems.
3981 *
3982 * This function requests irqs, probes the ATA bus, and probes
3983 * the SCSI bus.
1da177e4
LT		 3984 *
3985 * LOCKING:
0cba632b 3986 * PCI/etc. bus probe sem.
1da177e4
LT		 3987 *
3988 * RETURNS:
0cba632b 3989 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 3990 *
3991 */
3992
3993int ata_device_add(struct ata_probe_ent *ent)
3994{
3995 unsigned int count = 0, i;
3996 struct device *dev = ent->dev;
3997 struct ata_host_set *host_set;
3998
3999 DPRINTK("ENTER\n");
4000 /* alloc a container for our list of ATA ports (buses) */
4001 host_set = kmalloc(sizeof(struct ata_host_set) +
4002 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4003 if (!host_set)
4004 return 0;
4005 memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *)));
4006 spin_lock_init(&host_set->lock);
4007
4008 host_set->dev = dev;
4009 host_set->n_ports = ent->n_ports;
4010 host_set->irq = ent->irq;
4011 host_set->mmio_base = ent->mmio_base;
4012 host_set->private_data = ent->private_data;
4013 host_set->ops = ent->port_ops;
4014
4015 /* register each port bound to this device */
4016 for (i = 0; i < ent->n_ports; i++) {
4017 struct ata_port *ap;
4018 unsigned long xfer_mode_mask;
4019
4020 ap = ata_host_add(ent, host_set, i);
4021 if (!ap)
4022 goto err_out;
4023
4024 host_set->ports[i] = ap;
4025 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4026 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4027 (ap->pio_mask << ATA_SHIFT_PIO);
4028
4029 /* print per-port info to dmesg */
4030 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4031 "bmdma 0x%lX irq %lu\n",
4032 ap->id,
4033 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4034 ata_mode_string(xfer_mode_mask),
4035 ap->ioaddr.cmd_addr,
4036 ap->ioaddr.ctl_addr,
4037 ap->ioaddr.bmdma_addr,
4038 ent->irq);
4039
4040 ata_chk_status(ap);
4041 host_set->ops->irq_clear(ap);
4042 count++;
4043 }
4044
4045 if (!count) {
4046 kfree(host_set);
4047 return 0;
4048 }
4049
4050 /* obtain irq, that is shared between channels */
4051 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4052 DRV_NAME, host_set))
4053 goto err_out;
4054
4055 /* perform each probe synchronously */
4056 DPRINTK("probe begin\n");
4057 for (i = 0; i < count; i++) {
4058 struct ata_port *ap;
4059 int rc;
4060
4061 ap = host_set->ports[i];
4062
4063 DPRINTK("ata%u: probe begin\n", ap->id);
4064 rc = ata_bus_probe(ap);
4065 DPRINTK("ata%u: probe end\n", ap->id);
4066
4067 if (rc) {
4068 /* FIXME: do something useful here?
4069 * Current libata behavior will
4070 * tear down everything when
4071 * the module is removed
4072 * or the h/w is unplugged.
4073 */
4074 }
4075
4076 rc = scsi_add_host(ap->host, dev);
4077 if (rc) {
4078 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4079 ap->id);
4080 /* FIXME: do something useful here */
4081 /* FIXME: handle unconditional calls to
4082 * scsi_scan_host and ata_host_remove, below,
4083 * at the very least
4084 */
4085 }
4086 }
4087
4088 /* probes are done, now scan each port's disk(s) */
4089 DPRINTK("probe begin\n");
4090 for (i = 0; i < count; i++) {
4091 struct ata_port *ap = host_set->ports[i];
4092
4093 scsi_scan_host(ap->host);
4094 }
4095
4096 dev_set_drvdata(dev, host_set);
4097
4098 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4099 return ent->n_ports; /* success */
4100
4101err_out:
4102 for (i = 0; i < count; i++) {
4103 ata_host_remove(host_set->ports[i], 1);
4104 scsi_host_put(host_set->ports[i]->host);
4105 }
4106 kfree(host_set);
4107 VPRINTK("EXIT, returning 0\n");
4108 return 0;
4109}
4110
4111/**
4112 * ata_scsi_release - SCSI layer callback hook for host unload
4113 * @host: libata host to be unloaded
4114 *
4115 * Performs all duties necessary to shut down a libata port...
4116 * Kill port kthread, disable port, and release resources.
4117 *
4118 * LOCKING:
4119 * Inherited from SCSI layer.
4120 *
4121 * RETURNS:
4122 * One.
4123 */
4124
4125int ata_scsi_release(struct Scsi_Host *host)
4126{
4127 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4128
4129 DPRINTK("ENTER\n");
4130
4131 ap->ops->port_disable(ap);
4132 ata_host_remove(ap, 0);
4133
4134 DPRINTK("EXIT\n");
4135 return 1;
4136}
4137
4138/**
4139 * ata_std_ports - initialize ioaddr with standard port offsets.
4140 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4141 *
4142 * Utility function which initializes data_addr, error_addr,
4143 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4144 * device_addr, status_addr, and command_addr to standard offsets
4145 * relative to cmd_addr.
4146 *
4147 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4148 */
0baab86b 4149
1da177e4
LT		 4150void ata_std_ports(struct ata_ioports *ioaddr)
4151{
4152 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4153 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4154 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4155 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4156 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4157 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4158 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4159 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4160 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4161 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4162}
4163
4164static struct ata_probe_ent *
4165ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port)
4166{
4167 struct ata_probe_ent *probe_ent;
4168
4169 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
4170 if (!probe_ent) {
4171 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4172 kobject_name(&(dev->kobj)));
4173 return NULL;
4174 }
4175
4176 memset(probe_ent, 0, sizeof(*probe_ent));
4177
4178 INIT_LIST_HEAD(&probe_ent->node);
4179 probe_ent->dev = dev;
4180
4181 probe_ent->sht = port->sht;
4182 probe_ent->host_flags = port->host_flags;
4183 probe_ent->pio_mask = port->pio_mask;
4184 probe_ent->mwdma_mask = port->mwdma_mask;
4185 probe_ent->udma_mask = port->udma_mask;
4186 probe_ent->port_ops = port->port_ops;
4187
4188 return probe_ent;
4189}
4190
0baab86b
EF		 4191
4192
4193/**
4194 * ata_pci_init_native_mode - Initialize native-mode driver
4195 * @pdev: pci device to be initialized
4196 * @port: array[2] of pointers to port info structures.
4197 *
4198 * Utility function which allocates and initializes an
4199 * ata_probe_ent structure for a standard dual-port
4200 * PIO-based IDE controller. The returned ata_probe_ent
4201 * structure can be passed to ata_device_add(). The returned
4202 * ata_probe_ent structure should then be freed with kfree().
4203 */
4204
1da177e4
LT		 4205#ifdef CONFIG_PCI
4206struct ata_probe_ent *
4207ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port)
4208{
4209 struct ata_probe_ent *probe_ent =
4210 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4211 if (!probe_ent)
4212 return NULL;
4213
4214 probe_ent->n_ports = 2;
4215 probe_ent->irq = pdev->irq;
4216 probe_ent->irq_flags = SA_SHIRQ;
4217
4218 probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
4219 probe_ent->port[0].altstatus_addr =
4220 probe_ent->port[0].ctl_addr =
4221 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4222 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4223
4224 probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
4225 probe_ent->port[1].altstatus_addr =
4226 probe_ent->port[1].ctl_addr =
4227 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4228 probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4229
4230 ata_std_ports(&probe_ent->port[0]);
4231 ata_std_ports(&probe_ent->port[1]);
4232
4233 return probe_ent;
4234}
4235
4236static struct ata_probe_ent *
4237ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port,
4238 struct ata_probe_ent **ppe2)
4239{
4240 struct ata_probe_ent *probe_ent, *probe_ent2;
4241
4242 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4243 if (!probe_ent)
4244 return NULL;
4245 probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]);
4246 if (!probe_ent2) {
4247 kfree(probe_ent);
4248 return NULL;
4249 }
4250
4251 probe_ent->n_ports = 1;
4252 probe_ent->irq = 14;
4253
4254 probe_ent->hard_port_no = 0;
4255 probe_ent->legacy_mode = 1;
4256
4257 probe_ent2->n_ports = 1;
4258 probe_ent2->irq = 15;
4259
4260 probe_ent2->hard_port_no = 1;
4261 probe_ent2->legacy_mode = 1;
4262
4263 probe_ent->port[0].cmd_addr = 0x1f0;
4264 probe_ent->port[0].altstatus_addr =
4265 probe_ent->port[0].ctl_addr = 0x3f6;
4266 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
4267
4268 probe_ent2->port[0].cmd_addr = 0x170;
4269 probe_ent2->port[0].altstatus_addr =
4270 probe_ent2->port[0].ctl_addr = 0x376;
4271 probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
4272
4273 ata_std_ports(&probe_ent->port[0]);
4274 ata_std_ports(&probe_ent2->port[0]);
4275
4276 *ppe2 = probe_ent2;
4277 return probe_ent;
4278}
4279
4280/**
4281 * ata_pci_init_one - Initialize/register PCI IDE host controller
4282 * @pdev: Controller to be initialized
4283 * @port_info: Information from low-level host driver
4284 * @n_ports: Number of ports attached to host controller
4285 *
0baab86b
EF		 4286 * This is a helper function which can be called from a driver's
4287 * xxx_init_one() probe function if the hardware uses traditional
4288 * IDE taskfile registers.
4289 *
4290 * This function calls pci_enable_device(), reserves its register
4291 * regions, sets the dma mask, enables bus master mode, and calls
4292 * ata_device_add()
4293 *
1da177e4
LT		 4294 * LOCKING:
4295 * Inherited from PCI layer (may sleep).
4296 *
4297 * RETURNS:
0cba632b 4298 * Zero on success, negative on errno-based value on error.
1da177e4
LT		 4299 *
4300 */
4301
4302int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4303 unsigned int n_ports)
4304{
4305 struct ata_probe_ent *probe_ent, *probe_ent2 = NULL;
4306 struct ata_port_info *port[2];
4307 u8 tmp8, mask;
4308 unsigned int legacy_mode = 0;
4309 int disable_dev_on_err = 1;
4310 int rc;
4311
4312 DPRINTK("ENTER\n");
4313
4314 port[0] = port_info[0];
4315 if (n_ports > 1)
4316 port[1] = port_info[1];
4317 else
4318 port[1] = port[0];
4319
4320 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4321 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4322 /* TODO: support transitioning to native mode? */
4323 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4324 mask = (1 << 2) | (1 << 0);
4325 if ((tmp8 & mask) != mask)
4326 legacy_mode = (1 << 3);
4327 }
4328
4329 /* FIXME... */
4330 if ((!legacy_mode) && (n_ports > 1)) {
4331 printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n");
4332 return -EINVAL;
4333 }
4334
4335 rc = pci_enable_device(pdev);
4336 if (rc)
4337 return rc;
4338
4339 rc = pci_request_regions(pdev, DRV_NAME);
4340 if (rc) {
4341 disable_dev_on_err = 0;
4342 goto err_out;
4343 }
4344
4345 if (legacy_mode) {
4346 if (!request_region(0x1f0, 8, "libata")) {
4347 struct resource *conflict, res;
4348 res.start = 0x1f0;
4349 res.end = 0x1f0 + 8 - 1;
4350 conflict = ____request_resource(&ioport_resource, &res);
4351 if (!strcmp(conflict->name, "libata"))
4352 legacy_mode |= (1 << 0);
4353 else {
4354 disable_dev_on_err = 0;
4355 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4356 }
4357 } else
4358 legacy_mode |= (1 << 0);
4359
4360 if (!request_region(0x170, 8, "libata")) {
4361 struct resource *conflict, res;
4362 res.start = 0x170;
4363 res.end = 0x170 + 8 - 1;
4364 conflict = ____request_resource(&ioport_resource, &res);
4365 if (!strcmp(conflict->name, "libata"))
4366 legacy_mode |= (1 << 1);
4367 else {
4368 disable_dev_on_err = 0;
4369 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4370 }
4371 } else
4372 legacy_mode |= (1 << 1);
4373 }
4374
4375 /* we have legacy mode, but all ports are unavailable */
4376 if (legacy_mode == (1 << 3)) {
4377 rc = -EBUSY;
4378 goto err_out_regions;
4379 }
4380
4381 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4382 if (rc)
4383 goto err_out_regions;
4384 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4385 if (rc)
4386 goto err_out_regions;
4387
4388 if (legacy_mode) {
4389 probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2);
4390 } else
4391 probe_ent = ata_pci_init_native_mode(pdev, port);
4392 if (!probe_ent) {
4393 rc = -ENOMEM;
4394 goto err_out_regions;
4395 }
4396
4397 pci_set_master(pdev);
4398
4399 /* FIXME: check ata_device_add return */
4400 if (legacy_mode) {
4401 if (legacy_mode & (1 << 0))
4402 ata_device_add(probe_ent);
4403 if (legacy_mode & (1 << 1))
4404 ata_device_add(probe_ent2);
4405 } else
4406 ata_device_add(probe_ent);
4407
4408 kfree(probe_ent);
4409 kfree(probe_ent2);
4410
4411 return 0;
4412
4413err_out_regions:
4414 if (legacy_mode & (1 << 0))
4415 release_region(0x1f0, 8);
4416 if (legacy_mode & (1 << 1))
4417 release_region(0x170, 8);
4418 pci_release_regions(pdev);
4419err_out:
4420 if (disable_dev_on_err)
4421 pci_disable_device(pdev);
4422 return rc;
4423}
4424
4425/**
4426 * ata_pci_remove_one - PCI layer callback for device removal
4427 * @pdev: PCI device that was removed
4428 *
4429 * PCI layer indicates to libata via this hook that
4430 * hot-unplug or module unload event has occured.
4431 * Handle this by unregistering all objects associated
4432 * with this PCI device. Free those objects. Then finally
4433 * release PCI resources and disable device.
4434 *
4435 * LOCKING:
4436 * Inherited from PCI layer (may sleep).
4437 */
4438
4439void ata_pci_remove_one (struct pci_dev *pdev)
4440{
4441 struct device *dev = pci_dev_to_dev(pdev);
4442 struct ata_host_set *host_set = dev_get_drvdata(dev);
4443 struct ata_port *ap;
4444 unsigned int i;
4445
4446 for (i = 0; i < host_set->n_ports; i++) {
4447 ap = host_set->ports[i];
4448
4449 scsi_remove_host(ap->host);
4450 }
4451
4452 free_irq(host_set->irq, host_set);
1da177e4
LT		 4453
4454 for (i = 0; i < host_set->n_ports; i++) {
4455 ap = host_set->ports[i];
4456
4457 ata_scsi_release(ap->host);
4458
4459 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4460 struct ata_ioports *ioaddr = &ap->ioaddr;
4461
4462 if (ioaddr->cmd_addr == 0x1f0)
4463 release_region(0x1f0, 8);
4464 else if (ioaddr->cmd_addr == 0x170)
4465 release_region(0x170, 8);
4466 }
4467
4468 scsi_host_put(ap->host);
4469 }
4470
aa8f0dc6
JG		 4471 if (host_set->ops->host_stop)
4472 host_set->ops->host_stop(host_set);
4473
1da177e4
LT		 4474 kfree(host_set);
4475
4476 pci_release_regions(pdev);
4477 pci_disable_device(pdev);
4478 dev_set_drvdata(dev, NULL);
4479}
4480
4481/* move to PCI subsystem */
4482int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits)
4483{
4484 unsigned long tmp = 0;
4485
4486 switch (bits->width) {
4487 case 1: {
4488 u8 tmp8 = 0;
4489 pci_read_config_byte(pdev, bits->reg, &tmp8);
4490 tmp = tmp8;
4491 break;
4492 }
4493 case 2: {
4494 u16 tmp16 = 0;
4495 pci_read_config_word(pdev, bits->reg, &tmp16);
4496 tmp = tmp16;
4497 break;
4498 }
4499 case 4: {
4500 u32 tmp32 = 0;
4501 pci_read_config_dword(pdev, bits->reg, &tmp32);
4502 tmp = tmp32;
4503 break;
4504 }
4505
4506 default:
4507 return -EINVAL;
4508 }
4509
4510 tmp &= bits->mask;
4511
4512 return (tmp == bits->val) ? 1 : 0;
4513}
4514#endif /* CONFIG_PCI */
4515
4516
1da177e4
LT		 4517static int __init ata_init(void)
4518{
4519 ata_wq = create_workqueue("ata");
4520 if (!ata_wq)
4521 return -ENOMEM;
4522
4523 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4524 return 0;
4525}
4526
4527static void __exit ata_exit(void)
4528{
4529 destroy_workqueue(ata_wq);
4530}
4531
4532module_init(ata_init);
4533module_exit(ata_exit);
4534
4535/*
4536 * libata is essentially a library of internal helper functions for
4537 * low-level ATA host controller drivers. As such, the API/ABI is
4538 * likely to change as new drivers are added and updated.
4539 * Do not depend on ABI/API stability.
4540 */
4541
4542EXPORT_SYMBOL_GPL(ata_std_bios_param);
4543EXPORT_SYMBOL_GPL(ata_std_ports);
4544EXPORT_SYMBOL_GPL(ata_device_add);
4545EXPORT_SYMBOL_GPL(ata_sg_init);
4546EXPORT_SYMBOL_GPL(ata_sg_init_one);
4547EXPORT_SYMBOL_GPL(ata_qc_complete);
4548EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4549EXPORT_SYMBOL_GPL(ata_eng_timeout);
4550EXPORT_SYMBOL_GPL(ata_tf_load);
4551EXPORT_SYMBOL_GPL(ata_tf_read);
4552EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4553EXPORT_SYMBOL_GPL(ata_std_dev_select);
4554EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4555EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4556EXPORT_SYMBOL_GPL(ata_check_status);
4557EXPORT_SYMBOL_GPL(ata_altstatus);
4558EXPORT_SYMBOL_GPL(ata_chk_err);
4559EXPORT_SYMBOL_GPL(ata_exec_command);
4560EXPORT_SYMBOL_GPL(ata_port_start);
4561EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4562EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4563EXPORT_SYMBOL_GPL(ata_interrupt);
4564EXPORT_SYMBOL_GPL(ata_qc_prep);
4565EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4566EXPORT_SYMBOL_GPL(ata_bmdma_start);
4567EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4568EXPORT_SYMBOL_GPL(ata_bmdma_status);
4569EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4570EXPORT_SYMBOL_GPL(ata_port_probe);
4571EXPORT_SYMBOL_GPL(sata_phy_reset);
4572EXPORT_SYMBOL_GPL(__sata_phy_reset);
4573EXPORT_SYMBOL_GPL(ata_bus_reset);
4574EXPORT_SYMBOL_GPL(ata_port_disable);
4575EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4576EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4577EXPORT_SYMBOL_GPL(ata_scsi_error);
4578EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4579EXPORT_SYMBOL_GPL(ata_scsi_release);
4580EXPORT_SYMBOL_GPL(ata_host_intr);
4581EXPORT_SYMBOL_GPL(ata_dev_classify);
4582EXPORT_SYMBOL_GPL(ata_dev_id_string);
6f2f3812 4583EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4
LT		 4584EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4585
4586#ifdef CONFIG_PCI
4587EXPORT_SYMBOL_GPL(pci_test_config_bits);
4588EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4589EXPORT_SYMBOL_GPL(ata_pci_init_one);
4590EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4591#endif /* CONFIG_PCI */
Linux kernel - Deliverables
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