Commit | Line | Data |
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1e6c9c28 | 1 | /* |
c2f5ccfb | 2 | * linux/drivers/char/atmel_serial.c |
1e6c9c28 | 3 | * |
7192f92c | 4 | * Driver for Atmel AT91 / AT32 Serial ports |
1e6c9c28 AV |
5 | * Copyright (C) 2003 Rick Bronson |
6 | * | |
7 | * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. | |
8 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
9 | * | |
a6670615 CC |
10 | * DMA support added by Chip Coldwell. |
11 | * | |
1e6c9c28 AV |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
1e6c9c28 AV |
27 | #include <linux/module.h> |
28 | #include <linux/tty.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/serial.h> | |
afefc415 | 33 | #include <linux/clk.h> |
1e6c9c28 AV |
34 | #include <linux/console.h> |
35 | #include <linux/sysrq.h> | |
36 | #include <linux/tty_flip.h> | |
afefc415 | 37 | #include <linux/platform_device.h> |
a6670615 | 38 | #include <linux/dma-mapping.h> |
93a3ddc2 | 39 | #include <linux/atmel_pdc.h> |
fa3218d8 | 40 | #include <linux/atmel_serial.h> |
e8faff73 | 41 | #include <linux/uaccess.h> |
1e6c9c28 AV |
42 | |
43 | #include <asm/io.h> | |
44 | ||
afefc415 | 45 | #include <asm/mach/serial_at91.h> |
a09e64fb | 46 | #include <mach/board.h> |
93a3ddc2 | 47 | |
acca9b83 | 48 | #ifdef CONFIG_ARM |
a09e64fb RK |
49 | #include <mach/cpu.h> |
50 | #include <mach/gpio.h> | |
acca9b83 | 51 | #endif |
1e6c9c28 | 52 | |
a6670615 CC |
53 | #define PDC_BUFFER_SIZE 512 |
54 | /* Revisit: We should calculate this based on the actual port settings */ | |
55 | #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ | |
56 | ||
749c4e60 | 57 | #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
1e6c9c28 AV |
58 | #define SUPPORT_SYSRQ |
59 | #endif | |
60 | ||
61 | #include <linux/serial_core.h> | |
62 | ||
e8faff73 CS |
63 | static void atmel_start_rx(struct uart_port *port); |
64 | static void atmel_stop_rx(struct uart_port *port); | |
65 | ||
749c4e60 | 66 | #ifdef CONFIG_SERIAL_ATMEL_TTYAT |
1e6c9c28 AV |
67 | |
68 | /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we | |
69 | * should coexist with the 8250 driver, such as if we have an external 16C550 | |
70 | * UART. */ | |
7192f92c | 71 | #define SERIAL_ATMEL_MAJOR 204 |
1e6c9c28 | 72 | #define MINOR_START 154 |
7192f92c | 73 | #define ATMEL_DEVICENAME "ttyAT" |
1e6c9c28 AV |
74 | |
75 | #else | |
76 | ||
77 | /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port | |
78 | * name, but it is legally reserved for the 8250 driver. */ | |
7192f92c | 79 | #define SERIAL_ATMEL_MAJOR TTY_MAJOR |
1e6c9c28 | 80 | #define MINOR_START 64 |
7192f92c | 81 | #define ATMEL_DEVICENAME "ttyS" |
1e6c9c28 AV |
82 | |
83 | #endif | |
84 | ||
7192f92c | 85 | #define ATMEL_ISR_PASS_LIMIT 256 |
1e6c9c28 | 86 | |
b843aa21 | 87 | /* UART registers. CR is write-only, hence no GET macro */ |
544fc728 HS |
88 | #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) |
89 | #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) | |
90 | #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) | |
91 | #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) | |
92 | #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) | |
93 | #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) | |
94 | #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) | |
95 | #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) | |
96 | #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) | |
97 | #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) | |
98 | #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) | |
99 | #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) | |
e8faff73 | 100 | #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR) |
544fc728 | 101 | |
1e6c9c28 | 102 | /* PDC registers */ |
544fc728 HS |
103 | #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) |
104 | #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) | |
105 | ||
106 | #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) | |
107 | #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) | |
108 | #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) | |
109 | #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) | |
110 | #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) | |
111 | ||
112 | #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) | |
113 | #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) | |
39d4c922 | 114 | #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR) |
1e6c9c28 | 115 | |
71f2e2b8 HS |
116 | static int (*atmel_open_hook)(struct uart_port *); |
117 | static void (*atmel_close_hook)(struct uart_port *); | |
1e6c9c28 | 118 | |
a6670615 CC |
119 | struct atmel_dma_buffer { |
120 | unsigned char *buf; | |
121 | dma_addr_t dma_addr; | |
122 | unsigned int dma_size; | |
123 | unsigned int ofs; | |
124 | }; | |
125 | ||
1ecc26bd RB |
126 | struct atmel_uart_char { |
127 | u16 status; | |
128 | u16 ch; | |
129 | }; | |
130 | ||
131 | #define ATMEL_SERIAL_RINGSIZE 1024 | |
132 | ||
afefc415 AV |
133 | /* |
134 | * We wrap our port structure around the generic uart_port. | |
135 | */ | |
7192f92c | 136 | struct atmel_uart_port { |
afefc415 AV |
137 | struct uart_port uart; /* uart */ |
138 | struct clk *clk; /* uart clock */ | |
f05596db AS |
139 | int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */ |
140 | u32 backup_imr; /* IMR saved during suspend */ | |
9e6077bd | 141 | int break_active; /* break being received */ |
1ecc26bd | 142 | |
a6670615 CC |
143 | short use_dma_rx; /* enable PDC receiver */ |
144 | short pdc_rx_idx; /* current PDC RX buffer */ | |
145 | struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */ | |
146 | ||
147 | short use_dma_tx; /* enable PDC transmitter */ | |
148 | struct atmel_dma_buffer pdc_tx; /* PDC transmitter */ | |
149 | ||
1ecc26bd RB |
150 | struct tasklet_struct tasklet; |
151 | unsigned int irq_status; | |
152 | unsigned int irq_status_prev; | |
153 | ||
154 | struct circ_buf rx_ring; | |
e8faff73 CS |
155 | |
156 | struct serial_rs485 rs485; /* rs485 settings */ | |
157 | unsigned int tx_done_mask; | |
afefc415 AV |
158 | }; |
159 | ||
7192f92c | 160 | static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; |
afefc415 | 161 | |
1e6c9c28 | 162 | #ifdef SUPPORT_SYSRQ |
7192f92c | 163 | static struct console atmel_console; |
1e6c9c28 AV |
164 | #endif |
165 | ||
c811ab8c HS |
166 | static inline struct atmel_uart_port * |
167 | to_atmel_uart_port(struct uart_port *uart) | |
168 | { | |
169 | return container_of(uart, struct atmel_uart_port, uart); | |
170 | } | |
171 | ||
a6670615 CC |
172 | #ifdef CONFIG_SERIAL_ATMEL_PDC |
173 | static bool atmel_use_dma_rx(struct uart_port *port) | |
174 | { | |
c811ab8c | 175 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
176 | |
177 | return atmel_port->use_dma_rx; | |
178 | } | |
179 | ||
180 | static bool atmel_use_dma_tx(struct uart_port *port) | |
181 | { | |
c811ab8c | 182 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
183 | |
184 | return atmel_port->use_dma_tx; | |
185 | } | |
186 | #else | |
187 | static bool atmel_use_dma_rx(struct uart_port *port) | |
188 | { | |
189 | return false; | |
190 | } | |
191 | ||
192 | static bool atmel_use_dma_tx(struct uart_port *port) | |
193 | { | |
194 | return false; | |
195 | } | |
196 | #endif | |
197 | ||
e8faff73 CS |
198 | /* Enable or disable the rs485 support */ |
199 | void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) | |
200 | { | |
201 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | |
202 | unsigned int mode; | |
203 | ||
204 | spin_lock(&port->lock); | |
205 | ||
206 | /* Disable interrupts */ | |
207 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
208 | ||
209 | mode = UART_GET_MR(port); | |
210 | ||
211 | /* Resetting serial mode to RS232 (0x0) */ | |
212 | mode &= ~ATMEL_US_USMODE; | |
213 | ||
214 | atmel_port->rs485 = *rs485conf; | |
215 | ||
216 | if (rs485conf->flags & SER_RS485_ENABLED) { | |
217 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
218 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | |
219 | UART_PUT_TTGR(port, rs485conf->delay_rts_before_send); | |
220 | mode |= ATMEL_US_USMODE_RS485; | |
221 | } else { | |
222 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
223 | if (atmel_use_dma_tx(port)) | |
224 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | | |
225 | ATMEL_US_TXBUFE; | |
226 | else | |
227 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | |
228 | } | |
229 | UART_PUT_MR(port, mode); | |
230 | ||
231 | /* Enable interrupts */ | |
232 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
233 | ||
234 | spin_unlock(&port->lock); | |
235 | ||
236 | } | |
237 | ||
1e6c9c28 AV |
238 | /* |
239 | * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. | |
240 | */ | |
7192f92c | 241 | static u_int atmel_tx_empty(struct uart_port *port) |
1e6c9c28 | 242 | { |
7192f92c | 243 | return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0; |
1e6c9c28 AV |
244 | } |
245 | ||
246 | /* | |
247 | * Set state of the modem control output lines | |
248 | */ | |
7192f92c | 249 | static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) |
1e6c9c28 AV |
250 | { |
251 | unsigned int control = 0; | |
afefc415 | 252 | unsigned int mode; |
e8faff73 | 253 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 254 | |
c2f5ccfb | 255 | #ifdef CONFIG_ARCH_AT91RM9200 |
79da7a61 | 256 | if (cpu_is_at91rm9200()) { |
afefc415 | 257 | /* |
b843aa21 RB |
258 | * AT91RM9200 Errata #39: RTS0 is not internally connected |
259 | * to PA21. We need to drive the pin manually. | |
afefc415 | 260 | */ |
72729910 | 261 | if (port->mapbase == AT91RM9200_BASE_US0) { |
afefc415 | 262 | if (mctrl & TIOCM_RTS) |
20e65276 | 263 | at91_set_gpio_value(AT91_PIN_PA21, 0); |
afefc415 | 264 | else |
20e65276 | 265 | at91_set_gpio_value(AT91_PIN_PA21, 1); |
afefc415 | 266 | } |
1e6c9c28 | 267 | } |
acca9b83 | 268 | #endif |
1e6c9c28 AV |
269 | |
270 | if (mctrl & TIOCM_RTS) | |
7192f92c | 271 | control |= ATMEL_US_RTSEN; |
1e6c9c28 | 272 | else |
7192f92c | 273 | control |= ATMEL_US_RTSDIS; |
1e6c9c28 AV |
274 | |
275 | if (mctrl & TIOCM_DTR) | |
7192f92c | 276 | control |= ATMEL_US_DTREN; |
1e6c9c28 | 277 | else |
7192f92c | 278 | control |= ATMEL_US_DTRDIS; |
1e6c9c28 | 279 | |
afefc415 AV |
280 | UART_PUT_CR(port, control); |
281 | ||
282 | /* Local loopback mode? */ | |
7192f92c | 283 | mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE; |
afefc415 | 284 | if (mctrl & TIOCM_LOOP) |
7192f92c | 285 | mode |= ATMEL_US_CHMODE_LOC_LOOP; |
afefc415 | 286 | else |
7192f92c | 287 | mode |= ATMEL_US_CHMODE_NORMAL; |
e8faff73 CS |
288 | |
289 | /* Resetting serial mode to RS232 (0x0) */ | |
290 | mode &= ~ATMEL_US_USMODE; | |
291 | ||
292 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
293 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
294 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | |
295 | mode |= ATMEL_US_USMODE_RS485; | |
296 | } else { | |
297 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
298 | } | |
afefc415 | 299 | UART_PUT_MR(port, mode); |
1e6c9c28 AV |
300 | } |
301 | ||
302 | /* | |
303 | * Get state of the modem control input lines | |
304 | */ | |
7192f92c | 305 | static u_int atmel_get_mctrl(struct uart_port *port) |
1e6c9c28 AV |
306 | { |
307 | unsigned int status, ret = 0; | |
308 | ||
309 | status = UART_GET_CSR(port); | |
310 | ||
311 | /* | |
312 | * The control signals are active low. | |
313 | */ | |
7192f92c | 314 | if (!(status & ATMEL_US_DCD)) |
1e6c9c28 | 315 | ret |= TIOCM_CD; |
7192f92c | 316 | if (!(status & ATMEL_US_CTS)) |
1e6c9c28 | 317 | ret |= TIOCM_CTS; |
7192f92c | 318 | if (!(status & ATMEL_US_DSR)) |
1e6c9c28 | 319 | ret |= TIOCM_DSR; |
7192f92c | 320 | if (!(status & ATMEL_US_RI)) |
1e6c9c28 AV |
321 | ret |= TIOCM_RI; |
322 | ||
323 | return ret; | |
324 | } | |
325 | ||
326 | /* | |
327 | * Stop transmitting. | |
328 | */ | |
7192f92c | 329 | static void atmel_stop_tx(struct uart_port *port) |
1e6c9c28 | 330 | { |
e8faff73 CS |
331 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
332 | ||
a6670615 CC |
333 | if (atmel_use_dma_tx(port)) { |
334 | /* disable PDC transmit */ | |
335 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
e8faff73 CS |
336 | } |
337 | /* Disable interrupts */ | |
338 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
339 | ||
340 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | |
341 | atmel_start_rx(port); | |
1e6c9c28 AV |
342 | } |
343 | ||
344 | /* | |
345 | * Start transmitting. | |
346 | */ | |
7192f92c | 347 | static void atmel_start_tx(struct uart_port *port) |
1e6c9c28 | 348 | { |
e8faff73 CS |
349 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
350 | ||
a6670615 CC |
351 | if (atmel_use_dma_tx(port)) { |
352 | if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) | |
353 | /* The transmitter is already running. Yes, we | |
354 | really need this.*/ | |
355 | return; | |
356 | ||
e8faff73 CS |
357 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) |
358 | atmel_stop_rx(port); | |
359 | ||
a6670615 CC |
360 | /* re-enable PDC transmit */ |
361 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | |
e8faff73 CS |
362 | } |
363 | /* Enable interrupts */ | |
364 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
365 | } | |
366 | ||
367 | /* | |
368 | * start receiving - port is in process of being opened. | |
369 | */ | |
370 | static void atmel_start_rx(struct uart_port *port) | |
371 | { | |
372 | UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */ | |
373 | ||
374 | if (atmel_use_dma_rx(port)) { | |
375 | /* enable PDC controller */ | |
376 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | | |
377 | port->read_status_mask); | |
378 | UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); | |
379 | } else { | |
380 | UART_PUT_IER(port, ATMEL_US_RXRDY); | |
381 | } | |
1e6c9c28 AV |
382 | } |
383 | ||
384 | /* | |
385 | * Stop receiving - port is in process of being closed. | |
386 | */ | |
7192f92c | 387 | static void atmel_stop_rx(struct uart_port *port) |
1e6c9c28 | 388 | { |
a6670615 CC |
389 | if (atmel_use_dma_rx(port)) { |
390 | /* disable PDC receive */ | |
391 | UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); | |
e8faff73 CS |
392 | UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT | |
393 | port->read_status_mask); | |
394 | } else { | |
a6670615 | 395 | UART_PUT_IDR(port, ATMEL_US_RXRDY); |
e8faff73 | 396 | } |
1e6c9c28 AV |
397 | } |
398 | ||
399 | /* | |
400 | * Enable modem status interrupts | |
401 | */ | |
7192f92c | 402 | static void atmel_enable_ms(struct uart_port *port) |
1e6c9c28 | 403 | { |
b843aa21 RB |
404 | UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC |
405 | | ATMEL_US_DCDIC | ATMEL_US_CTSIC); | |
1e6c9c28 AV |
406 | } |
407 | ||
408 | /* | |
409 | * Control the transmission of a break signal | |
410 | */ | |
7192f92c | 411 | static void atmel_break_ctl(struct uart_port *port, int break_state) |
1e6c9c28 AV |
412 | { |
413 | if (break_state != 0) | |
7192f92c | 414 | UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */ |
1e6c9c28 | 415 | else |
7192f92c | 416 | UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */ |
1e6c9c28 AV |
417 | } |
418 | ||
1ecc26bd RB |
419 | /* |
420 | * Stores the incoming character in the ring buffer | |
421 | */ | |
422 | static void | |
423 | atmel_buffer_rx_char(struct uart_port *port, unsigned int status, | |
424 | unsigned int ch) | |
425 | { | |
c811ab8c | 426 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
427 | struct circ_buf *ring = &atmel_port->rx_ring; |
428 | struct atmel_uart_char *c; | |
429 | ||
430 | if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE)) | |
431 | /* Buffer overflow, ignore char */ | |
432 | return; | |
433 | ||
434 | c = &((struct atmel_uart_char *)ring->buf)[ring->head]; | |
435 | c->status = status; | |
436 | c->ch = ch; | |
437 | ||
438 | /* Make sure the character is stored before we update head. */ | |
439 | smp_wmb(); | |
440 | ||
441 | ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1); | |
442 | } | |
443 | ||
a6670615 CC |
444 | /* |
445 | * Deal with parity, framing and overrun errors. | |
446 | */ | |
447 | static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) | |
448 | { | |
449 | /* clear error */ | |
450 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
451 | ||
452 | if (status & ATMEL_US_RXBRK) { | |
453 | /* ignore side-effect */ | |
454 | status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); | |
455 | port->icount.brk++; | |
456 | } | |
457 | if (status & ATMEL_US_PARE) | |
458 | port->icount.parity++; | |
459 | if (status & ATMEL_US_FRAME) | |
460 | port->icount.frame++; | |
461 | if (status & ATMEL_US_OVRE) | |
462 | port->icount.overrun++; | |
463 | } | |
464 | ||
1e6c9c28 AV |
465 | /* |
466 | * Characters received (called from interrupt handler) | |
467 | */ | |
7d12e780 | 468 | static void atmel_rx_chars(struct uart_port *port) |
1e6c9c28 | 469 | { |
c811ab8c | 470 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 471 | unsigned int status, ch; |
1e6c9c28 | 472 | |
afefc415 | 473 | status = UART_GET_CSR(port); |
7192f92c | 474 | while (status & ATMEL_US_RXRDY) { |
1e6c9c28 AV |
475 | ch = UART_GET_CHAR(port); |
476 | ||
1e6c9c28 AV |
477 | /* |
478 | * note that the error handling code is | |
479 | * out of the main execution path | |
480 | */ | |
9e6077bd HS |
481 | if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME |
482 | | ATMEL_US_OVRE | ATMEL_US_RXBRK) | |
483 | || atmel_port->break_active)) { | |
1ecc26bd | 484 | |
b843aa21 RB |
485 | /* clear error */ |
486 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
1ecc26bd | 487 | |
9e6077bd HS |
488 | if (status & ATMEL_US_RXBRK |
489 | && !atmel_port->break_active) { | |
9e6077bd HS |
490 | atmel_port->break_active = 1; |
491 | UART_PUT_IER(port, ATMEL_US_RXBRK); | |
9e6077bd HS |
492 | } else { |
493 | /* | |
494 | * This is either the end-of-break | |
495 | * condition or we've received at | |
496 | * least one character without RXBRK | |
497 | * being set. In both cases, the next | |
498 | * RXBRK will indicate start-of-break. | |
499 | */ | |
500 | UART_PUT_IDR(port, ATMEL_US_RXBRK); | |
501 | status &= ~ATMEL_US_RXBRK; | |
502 | atmel_port->break_active = 0; | |
afefc415 | 503 | } |
1e6c9c28 AV |
504 | } |
505 | ||
1ecc26bd | 506 | atmel_buffer_rx_char(port, status, ch); |
afefc415 | 507 | status = UART_GET_CSR(port); |
1e6c9c28 AV |
508 | } |
509 | ||
1ecc26bd | 510 | tasklet_schedule(&atmel_port->tasklet); |
1e6c9c28 AV |
511 | } |
512 | ||
513 | /* | |
1ecc26bd RB |
514 | * Transmit characters (called from tasklet with TXRDY interrupt |
515 | * disabled) | |
1e6c9c28 | 516 | */ |
7192f92c | 517 | static void atmel_tx_chars(struct uart_port *port) |
1e6c9c28 | 518 | { |
ebd2c8f6 | 519 | struct circ_buf *xmit = &port->state->xmit; |
e8faff73 | 520 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 521 | |
e8faff73 | 522 | if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
1e6c9c28 AV |
523 | UART_PUT_CHAR(port, port->x_char); |
524 | port->icount.tx++; | |
525 | port->x_char = 0; | |
1e6c9c28 | 526 | } |
1ecc26bd | 527 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
1e6c9c28 | 528 | return; |
1e6c9c28 | 529 | |
e8faff73 | 530 | while (UART_GET_CSR(port) & atmel_port->tx_done_mask) { |
1e6c9c28 AV |
531 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); |
532 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
533 | port->icount.tx++; | |
534 | if (uart_circ_empty(xmit)) | |
535 | break; | |
536 | } | |
537 | ||
538 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
539 | uart_write_wakeup(port); | |
540 | ||
1ecc26bd | 541 | if (!uart_circ_empty(xmit)) |
e8faff73 CS |
542 | /* Enable interrupts */ |
543 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
1e6c9c28 AV |
544 | } |
545 | ||
b843aa21 RB |
546 | /* |
547 | * receive interrupt handler. | |
548 | */ | |
549 | static void | |
550 | atmel_handle_receive(struct uart_port *port, unsigned int pending) | |
551 | { | |
c811ab8c | 552 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
b843aa21 | 553 | |
a6670615 CC |
554 | if (atmel_use_dma_rx(port)) { |
555 | /* | |
556 | * PDC receive. Just schedule the tasklet and let it | |
557 | * figure out the details. | |
558 | * | |
559 | * TODO: We're not handling error flags correctly at | |
560 | * the moment. | |
561 | */ | |
562 | if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) { | |
563 | UART_PUT_IDR(port, (ATMEL_US_ENDRX | |
564 | | ATMEL_US_TIMEOUT)); | |
565 | tasklet_schedule(&atmel_port->tasklet); | |
566 | } | |
567 | ||
568 | if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | | |
569 | ATMEL_US_FRAME | ATMEL_US_PARE)) | |
570 | atmel_pdc_rxerr(port, pending); | |
571 | } | |
572 | ||
b843aa21 RB |
573 | /* Interrupt receive */ |
574 | if (pending & ATMEL_US_RXRDY) | |
575 | atmel_rx_chars(port); | |
576 | else if (pending & ATMEL_US_RXBRK) { | |
577 | /* | |
578 | * End of break detected. If it came along with a | |
579 | * character, atmel_rx_chars will handle it. | |
580 | */ | |
581 | UART_PUT_CR(port, ATMEL_US_RSTSTA); | |
582 | UART_PUT_IDR(port, ATMEL_US_RXBRK); | |
583 | atmel_port->break_active = 0; | |
584 | } | |
585 | } | |
586 | ||
587 | /* | |
1ecc26bd | 588 | * transmit interrupt handler. (Transmit is IRQF_NODELAY safe) |
b843aa21 RB |
589 | */ |
590 | static void | |
591 | atmel_handle_transmit(struct uart_port *port, unsigned int pending) | |
592 | { | |
c811ab8c | 593 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 594 | |
e8faff73 CS |
595 | if (pending & atmel_port->tx_done_mask) { |
596 | /* Either PDC or interrupt transmission */ | |
597 | UART_PUT_IDR(port, atmel_port->tx_done_mask); | |
598 | tasklet_schedule(&atmel_port->tasklet); | |
1ecc26bd | 599 | } |
b843aa21 RB |
600 | } |
601 | ||
602 | /* | |
603 | * status flags interrupt handler. | |
604 | */ | |
605 | static void | |
606 | atmel_handle_status(struct uart_port *port, unsigned int pending, | |
607 | unsigned int status) | |
608 | { | |
c811ab8c | 609 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd | 610 | |
b843aa21 | 611 | if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC |
1ecc26bd RB |
612 | | ATMEL_US_CTSIC)) { |
613 | atmel_port->irq_status = status; | |
614 | tasklet_schedule(&atmel_port->tasklet); | |
615 | } | |
b843aa21 RB |
616 | } |
617 | ||
1e6c9c28 AV |
618 | /* |
619 | * Interrupt handler | |
620 | */ | |
7d12e780 | 621 | static irqreturn_t atmel_interrupt(int irq, void *dev_id) |
1e6c9c28 AV |
622 | { |
623 | struct uart_port *port = dev_id; | |
624 | unsigned int status, pending, pass_counter = 0; | |
625 | ||
a6670615 CC |
626 | do { |
627 | status = UART_GET_CSR(port); | |
628 | pending = status & UART_GET_IMR(port); | |
629 | if (!pending) | |
630 | break; | |
631 | ||
b843aa21 RB |
632 | atmel_handle_receive(port, pending); |
633 | atmel_handle_status(port, pending, status); | |
634 | atmel_handle_transmit(port, pending); | |
a6670615 | 635 | } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); |
afefc415 | 636 | |
0400b697 | 637 | return pass_counter ? IRQ_HANDLED : IRQ_NONE; |
a6670615 | 638 | } |
1e6c9c28 | 639 | |
a6670615 CC |
640 | /* |
641 | * Called from tasklet with ENDTX and TXBUFE interrupts disabled. | |
642 | */ | |
643 | static void atmel_tx_dma(struct uart_port *port) | |
644 | { | |
c811ab8c | 645 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 646 | struct circ_buf *xmit = &port->state->xmit; |
a6670615 CC |
647 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; |
648 | int count; | |
649 | ||
ba0657ff MT |
650 | /* nothing left to transmit? */ |
651 | if (UART_GET_TCR(port)) | |
652 | return; | |
653 | ||
a6670615 CC |
654 | xmit->tail += pdc->ofs; |
655 | xmit->tail &= UART_XMIT_SIZE - 1; | |
656 | ||
657 | port->icount.tx += pdc->ofs; | |
658 | pdc->ofs = 0; | |
659 | ||
ba0657ff | 660 | /* more to transmit - setup next transfer */ |
a6670615 | 661 | |
ba0657ff MT |
662 | /* disable PDC transmit */ |
663 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
664 | ||
1f14081d | 665 | if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) { |
a6670615 CC |
666 | dma_sync_single_for_device(port->dev, |
667 | pdc->dma_addr, | |
668 | pdc->dma_size, | |
669 | DMA_TO_DEVICE); | |
670 | ||
671 | count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); | |
672 | pdc->ofs = count; | |
673 | ||
674 | UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); | |
675 | UART_PUT_TCR(port, count); | |
e8faff73 | 676 | /* re-enable PDC transmit */ |
a6670615 | 677 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); |
e8faff73 CS |
678 | /* Enable interrupts */ |
679 | UART_PUT_IER(port, atmel_port->tx_done_mask); | |
680 | } else { | |
681 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
682 | /* DMA done, stop TX, start RX for RS485 */ | |
683 | atmel_start_rx(port); | |
684 | } | |
1e6c9c28 | 685 | } |
a6670615 CC |
686 | |
687 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
688 | uart_write_wakeup(port); | |
1e6c9c28 AV |
689 | } |
690 | ||
1ecc26bd RB |
691 | static void atmel_rx_from_ring(struct uart_port *port) |
692 | { | |
c811ab8c | 693 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
694 | struct circ_buf *ring = &atmel_port->rx_ring; |
695 | unsigned int flg; | |
696 | unsigned int status; | |
697 | ||
698 | while (ring->head != ring->tail) { | |
699 | struct atmel_uart_char c; | |
700 | ||
701 | /* Make sure c is loaded after head. */ | |
702 | smp_rmb(); | |
703 | ||
704 | c = ((struct atmel_uart_char *)ring->buf)[ring->tail]; | |
705 | ||
706 | ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1); | |
707 | ||
708 | port->icount.rx++; | |
709 | status = c.status; | |
710 | flg = TTY_NORMAL; | |
711 | ||
712 | /* | |
713 | * note that the error handling code is | |
714 | * out of the main execution path | |
715 | */ | |
716 | if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | |
717 | | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { | |
718 | if (status & ATMEL_US_RXBRK) { | |
719 | /* ignore side-effect */ | |
720 | status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); | |
721 | ||
722 | port->icount.brk++; | |
723 | if (uart_handle_break(port)) | |
724 | continue; | |
725 | } | |
726 | if (status & ATMEL_US_PARE) | |
727 | port->icount.parity++; | |
728 | if (status & ATMEL_US_FRAME) | |
729 | port->icount.frame++; | |
730 | if (status & ATMEL_US_OVRE) | |
731 | port->icount.overrun++; | |
732 | ||
733 | status &= port->read_status_mask; | |
734 | ||
735 | if (status & ATMEL_US_RXBRK) | |
736 | flg = TTY_BREAK; | |
737 | else if (status & ATMEL_US_PARE) | |
738 | flg = TTY_PARITY; | |
739 | else if (status & ATMEL_US_FRAME) | |
740 | flg = TTY_FRAME; | |
741 | } | |
742 | ||
743 | ||
744 | if (uart_handle_sysrq_char(port, c.ch)) | |
745 | continue; | |
746 | ||
747 | uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg); | |
748 | } | |
749 | ||
750 | /* | |
751 | * Drop the lock here since it might end up calling | |
752 | * uart_start(), which takes the lock. | |
753 | */ | |
754 | spin_unlock(&port->lock); | |
ebd2c8f6 | 755 | tty_flip_buffer_push(port->state->port.tty); |
1ecc26bd RB |
756 | spin_lock(&port->lock); |
757 | } | |
758 | ||
a6670615 CC |
759 | static void atmel_rx_from_dma(struct uart_port *port) |
760 | { | |
c811ab8c | 761 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 762 | struct tty_struct *tty = port->state->port.tty; |
a6670615 CC |
763 | struct atmel_dma_buffer *pdc; |
764 | int rx_idx = atmel_port->pdc_rx_idx; | |
765 | unsigned int head; | |
766 | unsigned int tail; | |
767 | unsigned int count; | |
768 | ||
769 | do { | |
770 | /* Reset the UART timeout early so that we don't miss one */ | |
771 | UART_PUT_CR(port, ATMEL_US_STTTO); | |
772 | ||
773 | pdc = &atmel_port->pdc_rx[rx_idx]; | |
774 | head = UART_GET_RPR(port) - pdc->dma_addr; | |
775 | tail = pdc->ofs; | |
776 | ||
777 | /* If the PDC has switched buffers, RPR won't contain | |
778 | * any address within the current buffer. Since head | |
779 | * is unsigned, we just need a one-way comparison to | |
780 | * find out. | |
781 | * | |
782 | * In this case, we just need to consume the entire | |
783 | * buffer and resubmit it for DMA. This will clear the | |
784 | * ENDRX bit as well, so that we can safely re-enable | |
785 | * all interrupts below. | |
786 | */ | |
787 | head = min(head, pdc->dma_size); | |
788 | ||
789 | if (likely(head != tail)) { | |
790 | dma_sync_single_for_cpu(port->dev, pdc->dma_addr, | |
791 | pdc->dma_size, DMA_FROM_DEVICE); | |
792 | ||
793 | /* | |
794 | * head will only wrap around when we recycle | |
795 | * the DMA buffer, and when that happens, we | |
796 | * explicitly set tail to 0. So head will | |
797 | * always be greater than tail. | |
798 | */ | |
799 | count = head - tail; | |
800 | ||
801 | tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count); | |
802 | ||
803 | dma_sync_single_for_device(port->dev, pdc->dma_addr, | |
804 | pdc->dma_size, DMA_FROM_DEVICE); | |
805 | ||
806 | port->icount.rx += count; | |
807 | pdc->ofs = head; | |
808 | } | |
809 | ||
810 | /* | |
811 | * If the current buffer is full, we need to check if | |
812 | * the next one contains any additional data. | |
813 | */ | |
814 | if (head >= pdc->dma_size) { | |
815 | pdc->ofs = 0; | |
816 | UART_PUT_RNPR(port, pdc->dma_addr); | |
817 | UART_PUT_RNCR(port, pdc->dma_size); | |
818 | ||
819 | rx_idx = !rx_idx; | |
820 | atmel_port->pdc_rx_idx = rx_idx; | |
821 | } | |
822 | } while (head >= pdc->dma_size); | |
823 | ||
824 | /* | |
825 | * Drop the lock here since it might end up calling | |
826 | * uart_start(), which takes the lock. | |
827 | */ | |
828 | spin_unlock(&port->lock); | |
829 | tty_flip_buffer_push(tty); | |
830 | spin_lock(&port->lock); | |
831 | ||
832 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); | |
833 | } | |
834 | ||
1ecc26bd RB |
835 | /* |
836 | * tasklet handling tty stuff outside the interrupt handler. | |
837 | */ | |
838 | static void atmel_tasklet_func(unsigned long data) | |
839 | { | |
840 | struct uart_port *port = (struct uart_port *)data; | |
c811ab8c | 841 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1ecc26bd RB |
842 | unsigned int status; |
843 | unsigned int status_change; | |
844 | ||
845 | /* The interrupt handler does not take the lock */ | |
846 | spin_lock(&port->lock); | |
847 | ||
a6670615 CC |
848 | if (atmel_use_dma_tx(port)) |
849 | atmel_tx_dma(port); | |
850 | else | |
851 | atmel_tx_chars(port); | |
1ecc26bd RB |
852 | |
853 | status = atmel_port->irq_status; | |
854 | status_change = status ^ atmel_port->irq_status_prev; | |
855 | ||
856 | if (status_change & (ATMEL_US_RI | ATMEL_US_DSR | |
857 | | ATMEL_US_DCD | ATMEL_US_CTS)) { | |
858 | /* TODO: All reads to CSR will clear these interrupts! */ | |
859 | if (status_change & ATMEL_US_RI) | |
860 | port->icount.rng++; | |
861 | if (status_change & ATMEL_US_DSR) | |
862 | port->icount.dsr++; | |
863 | if (status_change & ATMEL_US_DCD) | |
864 | uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); | |
865 | if (status_change & ATMEL_US_CTS) | |
866 | uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); | |
867 | ||
bdc04e31 | 868 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
1ecc26bd RB |
869 | |
870 | atmel_port->irq_status_prev = status; | |
871 | } | |
872 | ||
a6670615 CC |
873 | if (atmel_use_dma_rx(port)) |
874 | atmel_rx_from_dma(port); | |
875 | else | |
876 | atmel_rx_from_ring(port); | |
1ecc26bd RB |
877 | |
878 | spin_unlock(&port->lock); | |
879 | } | |
880 | ||
1e6c9c28 AV |
881 | /* |
882 | * Perform initialization and enable port for reception | |
883 | */ | |
7192f92c | 884 | static int atmel_startup(struct uart_port *port) |
1e6c9c28 | 885 | { |
c811ab8c | 886 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
ebd2c8f6 | 887 | struct tty_struct *tty = port->state->port.tty; |
1e6c9c28 AV |
888 | int retval; |
889 | ||
890 | /* | |
891 | * Ensure that no interrupts are enabled otherwise when | |
892 | * request_irq() is called we could get stuck trying to | |
893 | * handle an unexpected interrupt | |
894 | */ | |
895 | UART_PUT_IDR(port, -1); | |
896 | ||
897 | /* | |
898 | * Allocate the IRQ | |
899 | */ | |
b843aa21 | 900 | retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, |
ae161068 | 901 | tty ? tty->name : "atmel_serial", port); |
1e6c9c28 | 902 | if (retval) { |
7192f92c | 903 | printk("atmel_serial: atmel_startup - Can't get irq\n"); |
1e6c9c28 AV |
904 | return retval; |
905 | } | |
906 | ||
a6670615 CC |
907 | /* |
908 | * Initialize DMA (if necessary) | |
909 | */ | |
910 | if (atmel_use_dma_rx(port)) { | |
911 | int i; | |
912 | ||
913 | for (i = 0; i < 2; i++) { | |
914 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; | |
915 | ||
916 | pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL); | |
917 | if (pdc->buf == NULL) { | |
918 | if (i != 0) { | |
919 | dma_unmap_single(port->dev, | |
920 | atmel_port->pdc_rx[0].dma_addr, | |
921 | PDC_BUFFER_SIZE, | |
922 | DMA_FROM_DEVICE); | |
923 | kfree(atmel_port->pdc_rx[0].buf); | |
924 | } | |
925 | free_irq(port->irq, port); | |
926 | return -ENOMEM; | |
927 | } | |
928 | pdc->dma_addr = dma_map_single(port->dev, | |
929 | pdc->buf, | |
930 | PDC_BUFFER_SIZE, | |
931 | DMA_FROM_DEVICE); | |
932 | pdc->dma_size = PDC_BUFFER_SIZE; | |
933 | pdc->ofs = 0; | |
934 | } | |
935 | ||
936 | atmel_port->pdc_rx_idx = 0; | |
937 | ||
938 | UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr); | |
939 | UART_PUT_RCR(port, PDC_BUFFER_SIZE); | |
940 | ||
941 | UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr); | |
942 | UART_PUT_RNCR(port, PDC_BUFFER_SIZE); | |
943 | } | |
944 | if (atmel_use_dma_tx(port)) { | |
945 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | |
ebd2c8f6 | 946 | struct circ_buf *xmit = &port->state->xmit; |
a6670615 CC |
947 | |
948 | pdc->buf = xmit->buf; | |
949 | pdc->dma_addr = dma_map_single(port->dev, | |
950 | pdc->buf, | |
951 | UART_XMIT_SIZE, | |
952 | DMA_TO_DEVICE); | |
953 | pdc->dma_size = UART_XMIT_SIZE; | |
954 | pdc->ofs = 0; | |
955 | } | |
956 | ||
1e6c9c28 AV |
957 | /* |
958 | * If there is a specific "open" function (to register | |
959 | * control line interrupts) | |
960 | */ | |
71f2e2b8 HS |
961 | if (atmel_open_hook) { |
962 | retval = atmel_open_hook(port); | |
1e6c9c28 AV |
963 | if (retval) { |
964 | free_irq(port->irq, port); | |
965 | return retval; | |
966 | } | |
967 | } | |
968 | ||
27c0c8e5 AN |
969 | /* Save current CSR for comparison in atmel_tasklet_func() */ |
970 | atmel_port->irq_status_prev = UART_GET_CSR(port); | |
971 | atmel_port->irq_status = atmel_port->irq_status_prev; | |
972 | ||
1e6c9c28 AV |
973 | /* |
974 | * Finally, enable the serial port | |
975 | */ | |
7192f92c | 976 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
b843aa21 RB |
977 | /* enable xmit & rcvr */ |
978 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
afefc415 | 979 | |
a6670615 CC |
980 | if (atmel_use_dma_rx(port)) { |
981 | /* set UART timeout */ | |
982 | UART_PUT_RTOR(port, PDC_RX_TIMEOUT); | |
983 | UART_PUT_CR(port, ATMEL_US_STTTO); | |
984 | ||
985 | UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); | |
986 | /* enable PDC controller */ | |
987 | UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); | |
988 | } else { | |
989 | /* enable receive only */ | |
990 | UART_PUT_IER(port, ATMEL_US_RXRDY); | |
991 | } | |
afefc415 | 992 | |
1e6c9c28 AV |
993 | return 0; |
994 | } | |
995 | ||
996 | /* | |
997 | * Disable the port | |
998 | */ | |
7192f92c | 999 | static void atmel_shutdown(struct uart_port *port) |
1e6c9c28 | 1000 | { |
c811ab8c | 1001 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
a6670615 CC |
1002 | /* |
1003 | * Ensure everything is stopped. | |
1004 | */ | |
1005 | atmel_stop_rx(port); | |
1006 | atmel_stop_tx(port); | |
1007 | ||
1008 | /* | |
1009 | * Shut-down the DMA. | |
1010 | */ | |
1011 | if (atmel_use_dma_rx(port)) { | |
1012 | int i; | |
1013 | ||
1014 | for (i = 0; i < 2; i++) { | |
1015 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; | |
1016 | ||
1017 | dma_unmap_single(port->dev, | |
1018 | pdc->dma_addr, | |
1019 | pdc->dma_size, | |
1020 | DMA_FROM_DEVICE); | |
1021 | kfree(pdc->buf); | |
1022 | } | |
1023 | } | |
1024 | if (atmel_use_dma_tx(port)) { | |
1025 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | |
1026 | ||
1027 | dma_unmap_single(port->dev, | |
1028 | pdc->dma_addr, | |
1029 | pdc->dma_size, | |
1030 | DMA_TO_DEVICE); | |
1031 | } | |
1032 | ||
1e6c9c28 AV |
1033 | /* |
1034 | * Disable all interrupts, port and break condition. | |
1035 | */ | |
7192f92c | 1036 | UART_PUT_CR(port, ATMEL_US_RSTSTA); |
1e6c9c28 AV |
1037 | UART_PUT_IDR(port, -1); |
1038 | ||
1039 | /* | |
1040 | * Free the interrupt | |
1041 | */ | |
1042 | free_irq(port->irq, port); | |
1043 | ||
1044 | /* | |
1045 | * If there is a specific "close" function (to unregister | |
1046 | * control line interrupts) | |
1047 | */ | |
71f2e2b8 HS |
1048 | if (atmel_close_hook) |
1049 | atmel_close_hook(port); | |
1e6c9c28 AV |
1050 | } |
1051 | ||
9afd561a HS |
1052 | /* |
1053 | * Flush any TX data submitted for DMA. Called when the TX circular | |
1054 | * buffer is reset. | |
1055 | */ | |
1056 | static void atmel_flush_buffer(struct uart_port *port) | |
1057 | { | |
1058 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | |
1059 | ||
1060 | if (atmel_use_dma_tx(port)) { | |
1061 | UART_PUT_TCR(port, 0); | |
1062 | atmel_port->pdc_tx.ofs = 0; | |
1063 | } | |
1064 | } | |
1065 | ||
1e6c9c28 AV |
1066 | /* |
1067 | * Power / Clock management. | |
1068 | */ | |
b843aa21 RB |
1069 | static void atmel_serial_pm(struct uart_port *port, unsigned int state, |
1070 | unsigned int oldstate) | |
1e6c9c28 | 1071 | { |
c811ab8c | 1072 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 | 1073 | |
1e6c9c28 | 1074 | switch (state) { |
b843aa21 RB |
1075 | case 0: |
1076 | /* | |
1077 | * Enable the peripheral clock for this serial port. | |
1078 | * This is called on uart_open() or a resume event. | |
1079 | */ | |
1080 | clk_enable(atmel_port->clk); | |
f05596db AS |
1081 | |
1082 | /* re-enable interrupts if we disabled some on suspend */ | |
1083 | UART_PUT_IER(port, atmel_port->backup_imr); | |
b843aa21 RB |
1084 | break; |
1085 | case 3: | |
f05596db AS |
1086 | /* Back up the interrupt mask and disable all interrupts */ |
1087 | atmel_port->backup_imr = UART_GET_IMR(port); | |
1088 | UART_PUT_IDR(port, -1); | |
1089 | ||
b843aa21 RB |
1090 | /* |
1091 | * Disable the peripheral clock for this serial port. | |
1092 | * This is called on uart_close() or a suspend event. | |
1093 | */ | |
1094 | clk_disable(atmel_port->clk); | |
1095 | break; | |
1096 | default: | |
1097 | printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); | |
1e6c9c28 AV |
1098 | } |
1099 | } | |
1100 | ||
1101 | /* | |
1102 | * Change the port parameters | |
1103 | */ | |
b843aa21 RB |
1104 | static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, |
1105 | struct ktermios *old) | |
1e6c9c28 AV |
1106 | { |
1107 | unsigned long flags; | |
1108 | unsigned int mode, imr, quot, baud; | |
e8faff73 | 1109 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 1110 | |
03abeac0 | 1111 | /* Get current mode register */ |
b843aa21 | 1112 | mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL |
8e706c4d PM |
1113 | | ATMEL_US_NBSTOP | ATMEL_US_PAR |
1114 | | ATMEL_US_USMODE); | |
03abeac0 | 1115 | |
b843aa21 | 1116 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); |
1e6c9c28 AV |
1117 | quot = uart_get_divisor(port, baud); |
1118 | ||
b843aa21 | 1119 | if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ |
03abeac0 AV |
1120 | quot /= 8; |
1121 | mode |= ATMEL_US_USCLKS_MCK_DIV8; | |
1122 | } | |
1e6c9c28 AV |
1123 | |
1124 | /* byte size */ | |
1125 | switch (termios->c_cflag & CSIZE) { | |
1126 | case CS5: | |
7192f92c | 1127 | mode |= ATMEL_US_CHRL_5; |
1e6c9c28 AV |
1128 | break; |
1129 | case CS6: | |
7192f92c | 1130 | mode |= ATMEL_US_CHRL_6; |
1e6c9c28 AV |
1131 | break; |
1132 | case CS7: | |
7192f92c | 1133 | mode |= ATMEL_US_CHRL_7; |
1e6c9c28 AV |
1134 | break; |
1135 | default: | |
7192f92c | 1136 | mode |= ATMEL_US_CHRL_8; |
1e6c9c28 AV |
1137 | break; |
1138 | } | |
1139 | ||
1140 | /* stop bits */ | |
1141 | if (termios->c_cflag & CSTOPB) | |
7192f92c | 1142 | mode |= ATMEL_US_NBSTOP_2; |
1e6c9c28 AV |
1143 | |
1144 | /* parity */ | |
1145 | if (termios->c_cflag & PARENB) { | |
b843aa21 RB |
1146 | /* Mark or Space parity */ |
1147 | if (termios->c_cflag & CMSPAR) { | |
1e6c9c28 | 1148 | if (termios->c_cflag & PARODD) |
7192f92c | 1149 | mode |= ATMEL_US_PAR_MARK; |
1e6c9c28 | 1150 | else |
7192f92c | 1151 | mode |= ATMEL_US_PAR_SPACE; |
b843aa21 | 1152 | } else if (termios->c_cflag & PARODD) |
7192f92c | 1153 | mode |= ATMEL_US_PAR_ODD; |
1e6c9c28 | 1154 | else |
7192f92c | 1155 | mode |= ATMEL_US_PAR_EVEN; |
b843aa21 | 1156 | } else |
7192f92c | 1157 | mode |= ATMEL_US_PAR_NONE; |
1e6c9c28 | 1158 | |
8e706c4d PM |
1159 | /* hardware handshake (RTS/CTS) */ |
1160 | if (termios->c_cflag & CRTSCTS) | |
1161 | mode |= ATMEL_US_USMODE_HWHS; | |
1162 | else | |
1163 | mode |= ATMEL_US_USMODE_NORMAL; | |
1164 | ||
1e6c9c28 AV |
1165 | spin_lock_irqsave(&port->lock, flags); |
1166 | ||
7192f92c | 1167 | port->read_status_mask = ATMEL_US_OVRE; |
1e6c9c28 | 1168 | if (termios->c_iflag & INPCK) |
7192f92c | 1169 | port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); |
1e6c9c28 | 1170 | if (termios->c_iflag & (BRKINT | PARMRK)) |
7192f92c | 1171 | port->read_status_mask |= ATMEL_US_RXBRK; |
1e6c9c28 | 1172 | |
a6670615 CC |
1173 | if (atmel_use_dma_rx(port)) |
1174 | /* need to enable error interrupts */ | |
1175 | UART_PUT_IER(port, port->read_status_mask); | |
1176 | ||
1e6c9c28 AV |
1177 | /* |
1178 | * Characters to ignore | |
1179 | */ | |
1180 | port->ignore_status_mask = 0; | |
1181 | if (termios->c_iflag & IGNPAR) | |
7192f92c | 1182 | port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE); |
1e6c9c28 | 1183 | if (termios->c_iflag & IGNBRK) { |
7192f92c | 1184 | port->ignore_status_mask |= ATMEL_US_RXBRK; |
1e6c9c28 AV |
1185 | /* |
1186 | * If we're ignoring parity and break indicators, | |
1187 | * ignore overruns too (for real raw support). | |
1188 | */ | |
1189 | if (termios->c_iflag & IGNPAR) | |
7192f92c | 1190 | port->ignore_status_mask |= ATMEL_US_OVRE; |
1e6c9c28 | 1191 | } |
b843aa21 | 1192 | /* TODO: Ignore all characters if CREAD is set.*/ |
1e6c9c28 AV |
1193 | |
1194 | /* update the per-port timeout */ | |
1195 | uart_update_timeout(port, termios->c_cflag, baud); | |
1196 | ||
0ccad870 HS |
1197 | /* |
1198 | * save/disable interrupts. The tty layer will ensure that the | |
1199 | * transmitter is empty if requested by the caller, so there's | |
1200 | * no need to wait for it here. | |
1201 | */ | |
b843aa21 RB |
1202 | imr = UART_GET_IMR(port); |
1203 | UART_PUT_IDR(port, -1); | |
1e6c9c28 AV |
1204 | |
1205 | /* disable receiver and transmitter */ | |
7192f92c | 1206 | UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); |
1e6c9c28 | 1207 | |
e8faff73 CS |
1208 | /* Resetting serial mode to RS232 (0x0) */ |
1209 | mode &= ~ATMEL_US_USMODE; | |
1210 | ||
1211 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) { | |
1212 | dev_dbg(port->dev, "Setting UART to RS485\n"); | |
1213 | UART_PUT_TTGR(port, atmel_port->rs485.delay_rts_before_send); | |
1214 | mode |= ATMEL_US_USMODE_RS485; | |
1215 | } else { | |
1216 | dev_dbg(port->dev, "Setting UART to RS232\n"); | |
1217 | } | |
1218 | ||
1e6c9c28 AV |
1219 | /* set the parity, stop bits and data size */ |
1220 | UART_PUT_MR(port, mode); | |
1221 | ||
1222 | /* set the baud rate */ | |
1223 | UART_PUT_BRGR(port, quot); | |
7192f92c HS |
1224 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
1225 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
1e6c9c28 AV |
1226 | |
1227 | /* restore interrupts */ | |
1228 | UART_PUT_IER(port, imr); | |
1229 | ||
1230 | /* CTS flow-control and modem-status interrupts */ | |
1231 | if (UART_ENABLE_MS(port, termios->c_cflag)) | |
1232 | port->ops->enable_ms(port); | |
1233 | ||
1234 | spin_unlock_irqrestore(&port->lock, flags); | |
1235 | } | |
1236 | ||
1237 | /* | |
1238 | * Return string describing the specified port | |
1239 | */ | |
7192f92c | 1240 | static const char *atmel_type(struct uart_port *port) |
1e6c9c28 | 1241 | { |
9ab4f88b | 1242 | return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL; |
1e6c9c28 AV |
1243 | } |
1244 | ||
1245 | /* | |
1246 | * Release the memory region(s) being used by 'port'. | |
1247 | */ | |
7192f92c | 1248 | static void atmel_release_port(struct uart_port *port) |
1e6c9c28 | 1249 | { |
afefc415 AV |
1250 | struct platform_device *pdev = to_platform_device(port->dev); |
1251 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; | |
1252 | ||
1253 | release_mem_region(port->mapbase, size); | |
1254 | ||
1255 | if (port->flags & UPF_IOREMAP) { | |
1256 | iounmap(port->membase); | |
1257 | port->membase = NULL; | |
1258 | } | |
1e6c9c28 AV |
1259 | } |
1260 | ||
1261 | /* | |
1262 | * Request the memory region(s) being used by 'port'. | |
1263 | */ | |
7192f92c | 1264 | static int atmel_request_port(struct uart_port *port) |
1e6c9c28 | 1265 | { |
afefc415 AV |
1266 | struct platform_device *pdev = to_platform_device(port->dev); |
1267 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; | |
1268 | ||
7192f92c | 1269 | if (!request_mem_region(port->mapbase, size, "atmel_serial")) |
afefc415 AV |
1270 | return -EBUSY; |
1271 | ||
1272 | if (port->flags & UPF_IOREMAP) { | |
1273 | port->membase = ioremap(port->mapbase, size); | |
1274 | if (port->membase == NULL) { | |
1275 | release_mem_region(port->mapbase, size); | |
1276 | return -ENOMEM; | |
1277 | } | |
1278 | } | |
1e6c9c28 | 1279 | |
afefc415 | 1280 | return 0; |
1e6c9c28 AV |
1281 | } |
1282 | ||
1283 | /* | |
1284 | * Configure/autoconfigure the port. | |
1285 | */ | |
7192f92c | 1286 | static void atmel_config_port(struct uart_port *port, int flags) |
1e6c9c28 AV |
1287 | { |
1288 | if (flags & UART_CONFIG_TYPE) { | |
9ab4f88b | 1289 | port->type = PORT_ATMEL; |
7192f92c | 1290 | atmel_request_port(port); |
1e6c9c28 AV |
1291 | } |
1292 | } | |
1293 | ||
1294 | /* | |
1295 | * Verify the new serial_struct (for TIOCSSERIAL). | |
1296 | */ | |
7192f92c | 1297 | static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser) |
1e6c9c28 AV |
1298 | { |
1299 | int ret = 0; | |
9ab4f88b | 1300 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL) |
1e6c9c28 AV |
1301 | ret = -EINVAL; |
1302 | if (port->irq != ser->irq) | |
1303 | ret = -EINVAL; | |
1304 | if (ser->io_type != SERIAL_IO_MEM) | |
1305 | ret = -EINVAL; | |
1306 | if (port->uartclk / 16 != ser->baud_base) | |
1307 | ret = -EINVAL; | |
1308 | if ((void *)port->mapbase != ser->iomem_base) | |
1309 | ret = -EINVAL; | |
1310 | if (port->iobase != ser->port) | |
1311 | ret = -EINVAL; | |
1312 | if (ser->hub6 != 0) | |
1313 | ret = -EINVAL; | |
1314 | return ret; | |
1315 | } | |
1316 | ||
8fe2d541 AT |
1317 | #ifdef CONFIG_CONSOLE_POLL |
1318 | static int atmel_poll_get_char(struct uart_port *port) | |
1319 | { | |
1320 | while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY)) | |
1321 | cpu_relax(); | |
1322 | ||
1323 | return UART_GET_CHAR(port); | |
1324 | } | |
1325 | ||
1326 | static void atmel_poll_put_char(struct uart_port *port, unsigned char ch) | |
1327 | { | |
1328 | while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) | |
1329 | cpu_relax(); | |
1330 | ||
1331 | UART_PUT_CHAR(port, ch); | |
1332 | } | |
1333 | #endif | |
1334 | ||
e8faff73 CS |
1335 | static int |
1336 | atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) | |
1337 | { | |
1338 | struct serial_rs485 rs485conf; | |
1339 | ||
1340 | switch (cmd) { | |
1341 | case TIOCSRS485: | |
1342 | if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, | |
1343 | sizeof(rs485conf))) | |
1344 | return -EFAULT; | |
1345 | ||
1346 | atmel_config_rs485(port, &rs485conf); | |
1347 | break; | |
1348 | ||
1349 | case TIOCGRS485: | |
1350 | if (copy_to_user((struct serial_rs485 *) arg, | |
1351 | &(to_atmel_uart_port(port)->rs485), | |
1352 | sizeof(rs485conf))) | |
1353 | return -EFAULT; | |
1354 | break; | |
1355 | ||
1356 | default: | |
1357 | return -ENOIOCTLCMD; | |
1358 | } | |
1359 | return 0; | |
1360 | } | |
1361 | ||
1362 | ||
1363 | ||
7192f92c HS |
1364 | static struct uart_ops atmel_pops = { |
1365 | .tx_empty = atmel_tx_empty, | |
1366 | .set_mctrl = atmel_set_mctrl, | |
1367 | .get_mctrl = atmel_get_mctrl, | |
1368 | .stop_tx = atmel_stop_tx, | |
1369 | .start_tx = atmel_start_tx, | |
1370 | .stop_rx = atmel_stop_rx, | |
1371 | .enable_ms = atmel_enable_ms, | |
1372 | .break_ctl = atmel_break_ctl, | |
1373 | .startup = atmel_startup, | |
1374 | .shutdown = atmel_shutdown, | |
9afd561a | 1375 | .flush_buffer = atmel_flush_buffer, |
7192f92c HS |
1376 | .set_termios = atmel_set_termios, |
1377 | .type = atmel_type, | |
1378 | .release_port = atmel_release_port, | |
1379 | .request_port = atmel_request_port, | |
1380 | .config_port = atmel_config_port, | |
1381 | .verify_port = atmel_verify_port, | |
1382 | .pm = atmel_serial_pm, | |
e8faff73 | 1383 | .ioctl = atmel_ioctl, |
8fe2d541 AT |
1384 | #ifdef CONFIG_CONSOLE_POLL |
1385 | .poll_get_char = atmel_poll_get_char, | |
1386 | .poll_put_char = atmel_poll_put_char, | |
1387 | #endif | |
1e6c9c28 AV |
1388 | }; |
1389 | ||
afefc415 AV |
1390 | /* |
1391 | * Configure the port from the platform device resource info. | |
1392 | */ | |
b843aa21 RB |
1393 | static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, |
1394 | struct platform_device *pdev) | |
1e6c9c28 | 1395 | { |
7192f92c | 1396 | struct uart_port *port = &atmel_port->uart; |
73e2798b | 1397 | struct atmel_uart_data *data = pdev->dev.platform_data; |
afefc415 | 1398 | |
e8faff73 CS |
1399 | port->iotype = UPIO_MEM; |
1400 | port->flags = UPF_BOOT_AUTOCONF; | |
1401 | port->ops = &atmel_pops; | |
1402 | port->fifosize = 1; | |
1403 | port->line = pdev->id; | |
1404 | port->dev = &pdev->dev; | |
afefc415 AV |
1405 | port->mapbase = pdev->resource[0].start; |
1406 | port->irq = pdev->resource[1].start; | |
1407 | ||
1ecc26bd RB |
1408 | tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, |
1409 | (unsigned long)port); | |
1410 | ||
1411 | memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring)); | |
1412 | ||
75d35213 HS |
1413 | if (data->regs) |
1414 | /* Already mapped by setup code */ | |
1415 | port->membase = data->regs; | |
afefc415 AV |
1416 | else { |
1417 | port->flags |= UPF_IOREMAP; | |
1418 | port->membase = NULL; | |
1419 | } | |
1e6c9c28 | 1420 | |
b843aa21 RB |
1421 | /* for console, the clock could already be configured */ |
1422 | if (!atmel_port->clk) { | |
7192f92c HS |
1423 | atmel_port->clk = clk_get(&pdev->dev, "usart"); |
1424 | clk_enable(atmel_port->clk); | |
1425 | port->uartclk = clk_get_rate(atmel_port->clk); | |
06a7f058 DB |
1426 | clk_disable(atmel_port->clk); |
1427 | /* only enable clock when USART is in use */ | |
afefc415 | 1428 | } |
a6670615 CC |
1429 | |
1430 | atmel_port->use_dma_rx = data->use_dma_rx; | |
1431 | atmel_port->use_dma_tx = data->use_dma_tx; | |
e8faff73 CS |
1432 | atmel_port->rs485 = data->rs485; |
1433 | /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */ | |
1434 | if (atmel_port->rs485.flags & SER_RS485_ENABLED) | |
1435 | atmel_port->tx_done_mask = ATMEL_US_TXEMPTY; | |
1436 | else if (atmel_use_dma_tx(port)) { | |
a6670615 | 1437 | port->fifosize = PDC_BUFFER_SIZE; |
e8faff73 CS |
1438 | atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE; |
1439 | } else { | |
1440 | atmel_port->tx_done_mask = ATMEL_US_TXRDY; | |
1441 | } | |
1e6c9c28 AV |
1442 | } |
1443 | ||
afefc415 AV |
1444 | /* |
1445 | * Register board-specific modem-control line handlers. | |
1446 | */ | |
71f2e2b8 | 1447 | void __init atmel_register_uart_fns(struct atmel_port_fns *fns) |
1e6c9c28 AV |
1448 | { |
1449 | if (fns->enable_ms) | |
7192f92c | 1450 | atmel_pops.enable_ms = fns->enable_ms; |
1e6c9c28 | 1451 | if (fns->get_mctrl) |
7192f92c | 1452 | atmel_pops.get_mctrl = fns->get_mctrl; |
1e6c9c28 | 1453 | if (fns->set_mctrl) |
7192f92c | 1454 | atmel_pops.set_mctrl = fns->set_mctrl; |
71f2e2b8 HS |
1455 | atmel_open_hook = fns->open; |
1456 | atmel_close_hook = fns->close; | |
7192f92c HS |
1457 | atmel_pops.pm = fns->pm; |
1458 | atmel_pops.set_wake = fns->set_wake; | |
1e6c9c28 AV |
1459 | } |
1460 | ||
749c4e60 | 1461 | #ifdef CONFIG_SERIAL_ATMEL_CONSOLE |
7192f92c | 1462 | static void atmel_console_putchar(struct uart_port *port, int ch) |
d358788f | 1463 | { |
7192f92c | 1464 | while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) |
829dd811 | 1465 | cpu_relax(); |
d358788f RK |
1466 | UART_PUT_CHAR(port, ch); |
1467 | } | |
1e6c9c28 AV |
1468 | |
1469 | /* | |
1470 | * Interrupts are disabled on entering | |
1471 | */ | |
7192f92c | 1472 | static void atmel_console_write(struct console *co, const char *s, u_int count) |
1e6c9c28 | 1473 | { |
7192f92c | 1474 | struct uart_port *port = &atmel_ports[co->index].uart; |
e8faff73 | 1475 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
d358788f | 1476 | unsigned int status, imr; |
39d4c922 | 1477 | unsigned int pdc_tx; |
1e6c9c28 AV |
1478 | |
1479 | /* | |
b843aa21 | 1480 | * First, save IMR and then disable interrupts |
1e6c9c28 | 1481 | */ |
b843aa21 | 1482 | imr = UART_GET_IMR(port); |
e8faff73 | 1483 | UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask); |
1e6c9c28 | 1484 | |
39d4c922 MP |
1485 | /* Store PDC transmit status and disable it */ |
1486 | pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN; | |
1487 | UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); | |
1488 | ||
7192f92c | 1489 | uart_console_write(port, s, count, atmel_console_putchar); |
1e6c9c28 AV |
1490 | |
1491 | /* | |
b843aa21 RB |
1492 | * Finally, wait for transmitter to become empty |
1493 | * and restore IMR | |
1e6c9c28 AV |
1494 | */ |
1495 | do { | |
1496 | status = UART_GET_CSR(port); | |
7192f92c | 1497 | } while (!(status & ATMEL_US_TXRDY)); |
39d4c922 MP |
1498 | |
1499 | /* Restore PDC transmit status */ | |
1500 | if (pdc_tx) | |
1501 | UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); | |
1502 | ||
b843aa21 RB |
1503 | /* set interrupts back the way they were */ |
1504 | UART_PUT_IER(port, imr); | |
1e6c9c28 AV |
1505 | } |
1506 | ||
1507 | /* | |
b843aa21 RB |
1508 | * If the port was already initialised (eg, by a boot loader), |
1509 | * try to determine the current setup. | |
1e6c9c28 | 1510 | */ |
b843aa21 RB |
1511 | static void __init atmel_console_get_options(struct uart_port *port, int *baud, |
1512 | int *parity, int *bits) | |
1e6c9c28 AV |
1513 | { |
1514 | unsigned int mr, quot; | |
1515 | ||
1c0fd82f HS |
1516 | /* |
1517 | * If the baud rate generator isn't running, the port wasn't | |
1518 | * initialized by the boot loader. | |
1519 | */ | |
9c81c5c9 | 1520 | quot = UART_GET_BRGR(port) & ATMEL_US_CD; |
1c0fd82f HS |
1521 | if (!quot) |
1522 | return; | |
1e6c9c28 | 1523 | |
7192f92c HS |
1524 | mr = UART_GET_MR(port) & ATMEL_US_CHRL; |
1525 | if (mr == ATMEL_US_CHRL_8) | |
1e6c9c28 AV |
1526 | *bits = 8; |
1527 | else | |
1528 | *bits = 7; | |
1529 | ||
7192f92c HS |
1530 | mr = UART_GET_MR(port) & ATMEL_US_PAR; |
1531 | if (mr == ATMEL_US_PAR_EVEN) | |
1e6c9c28 | 1532 | *parity = 'e'; |
7192f92c | 1533 | else if (mr == ATMEL_US_PAR_ODD) |
1e6c9c28 AV |
1534 | *parity = 'o'; |
1535 | ||
4d5e392c HS |
1536 | /* |
1537 | * The serial core only rounds down when matching this to a | |
1538 | * supported baud rate. Make sure we don't end up slightly | |
1539 | * lower than one of those, as it would make us fall through | |
1540 | * to a much lower baud rate than we really want. | |
1541 | */ | |
4d5e392c | 1542 | *baud = port->uartclk / (16 * (quot - 1)); |
1e6c9c28 AV |
1543 | } |
1544 | ||
7192f92c | 1545 | static int __init atmel_console_setup(struct console *co, char *options) |
1e6c9c28 | 1546 | { |
7192f92c | 1547 | struct uart_port *port = &atmel_ports[co->index].uart; |
1e6c9c28 AV |
1548 | int baud = 115200; |
1549 | int bits = 8; | |
1550 | int parity = 'n'; | |
1551 | int flow = 'n'; | |
1552 | ||
b843aa21 RB |
1553 | if (port->membase == NULL) { |
1554 | /* Port not initialized yet - delay setup */ | |
afefc415 | 1555 | return -ENODEV; |
b843aa21 | 1556 | } |
1e6c9c28 | 1557 | |
06a7f058 DB |
1558 | clk_enable(atmel_ports[co->index].clk); |
1559 | ||
b843aa21 | 1560 | UART_PUT_IDR(port, -1); |
7192f92c HS |
1561 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
1562 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | |
1e6c9c28 AV |
1563 | |
1564 | if (options) | |
1565 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1566 | else | |
7192f92c | 1567 | atmel_console_get_options(port, &baud, &parity, &bits); |
1e6c9c28 AV |
1568 | |
1569 | return uart_set_options(port, co, baud, parity, bits, flow); | |
1570 | } | |
1571 | ||
7192f92c | 1572 | static struct uart_driver atmel_uart; |
1e6c9c28 | 1573 | |
7192f92c HS |
1574 | static struct console atmel_console = { |
1575 | .name = ATMEL_DEVICENAME, | |
1576 | .write = atmel_console_write, | |
1e6c9c28 | 1577 | .device = uart_console_device, |
7192f92c | 1578 | .setup = atmel_console_setup, |
1e6c9c28 AV |
1579 | .flags = CON_PRINTBUFFER, |
1580 | .index = -1, | |
7192f92c | 1581 | .data = &atmel_uart, |
1e6c9c28 AV |
1582 | }; |
1583 | ||
06a7f058 | 1584 | #define ATMEL_CONSOLE_DEVICE (&atmel_console) |
1e6c9c28 | 1585 | |
afefc415 AV |
1586 | /* |
1587 | * Early console initialization (before VM subsystem initialized). | |
1588 | */ | |
7192f92c | 1589 | static int __init atmel_console_init(void) |
1e6c9c28 | 1590 | { |
73e2798b | 1591 | if (atmel_default_console_device) { |
b843aa21 RB |
1592 | add_preferred_console(ATMEL_DEVICENAME, |
1593 | atmel_default_console_device->id, NULL); | |
1594 | atmel_init_port(&atmel_ports[atmel_default_console_device->id], | |
1595 | atmel_default_console_device); | |
7192f92c | 1596 | register_console(&atmel_console); |
afefc415 | 1597 | } |
1e6c9c28 | 1598 | |
1e6c9c28 AV |
1599 | return 0; |
1600 | } | |
b843aa21 | 1601 | |
7192f92c | 1602 | console_initcall(atmel_console_init); |
1e6c9c28 | 1603 | |
afefc415 AV |
1604 | /* |
1605 | * Late console initialization. | |
1606 | */ | |
7192f92c | 1607 | static int __init atmel_late_console_init(void) |
afefc415 | 1608 | { |
b843aa21 RB |
1609 | if (atmel_default_console_device |
1610 | && !(atmel_console.flags & CON_ENABLED)) | |
7192f92c | 1611 | register_console(&atmel_console); |
afefc415 AV |
1612 | |
1613 | return 0; | |
1614 | } | |
b843aa21 | 1615 | |
7192f92c | 1616 | core_initcall(atmel_late_console_init); |
afefc415 | 1617 | |
dfa7f343 HS |
1618 | static inline bool atmel_is_console_port(struct uart_port *port) |
1619 | { | |
1620 | return port->cons && port->cons->index == port->line; | |
1621 | } | |
1622 | ||
1e6c9c28 | 1623 | #else |
7192f92c | 1624 | #define ATMEL_CONSOLE_DEVICE NULL |
dfa7f343 HS |
1625 | |
1626 | static inline bool atmel_is_console_port(struct uart_port *port) | |
1627 | { | |
1628 | return false; | |
1629 | } | |
1e6c9c28 AV |
1630 | #endif |
1631 | ||
7192f92c | 1632 | static struct uart_driver atmel_uart = { |
b843aa21 RB |
1633 | .owner = THIS_MODULE, |
1634 | .driver_name = "atmel_serial", | |
1635 | .dev_name = ATMEL_DEVICENAME, | |
1636 | .major = SERIAL_ATMEL_MAJOR, | |
1637 | .minor = MINOR_START, | |
1638 | .nr = ATMEL_MAX_UART, | |
1639 | .cons = ATMEL_CONSOLE_DEVICE, | |
1e6c9c28 AV |
1640 | }; |
1641 | ||
afefc415 | 1642 | #ifdef CONFIG_PM |
f826caa4 HS |
1643 | static bool atmel_serial_clk_will_stop(void) |
1644 | { | |
1645 | #ifdef CONFIG_ARCH_AT91 | |
1646 | return at91_suspend_entering_slow_clock(); | |
1647 | #else | |
1648 | return false; | |
1649 | #endif | |
1650 | } | |
1651 | ||
b843aa21 RB |
1652 | static int atmel_serial_suspend(struct platform_device *pdev, |
1653 | pm_message_t state) | |
1e6c9c28 | 1654 | { |
afefc415 | 1655 | struct uart_port *port = platform_get_drvdata(pdev); |
c811ab8c | 1656 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 | 1657 | |
e1c609ef HS |
1658 | if (atmel_is_console_port(port) && console_suspend_enabled) { |
1659 | /* Drain the TX shifter */ | |
1660 | while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) | |
1661 | cpu_relax(); | |
1662 | } | |
1663 | ||
f05596db AS |
1664 | /* we can not wake up if we're running on slow clock */ |
1665 | atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); | |
1666 | if (atmel_serial_clk_will_stop()) | |
1667 | device_set_wakeup_enable(&pdev->dev, 0); | |
1668 | ||
1669 | uart_suspend_port(&atmel_uart, port); | |
1e6c9c28 | 1670 | |
afefc415 AV |
1671 | return 0; |
1672 | } | |
1e6c9c28 | 1673 | |
7192f92c | 1674 | static int atmel_serial_resume(struct platform_device *pdev) |
afefc415 AV |
1675 | { |
1676 | struct uart_port *port = platform_get_drvdata(pdev); | |
c811ab8c | 1677 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
1e6c9c28 | 1678 | |
f05596db AS |
1679 | uart_resume_port(&atmel_uart, port); |
1680 | device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup); | |
1e6c9c28 AV |
1681 | |
1682 | return 0; | |
1683 | } | |
afefc415 | 1684 | #else |
7192f92c HS |
1685 | #define atmel_serial_suspend NULL |
1686 | #define atmel_serial_resume NULL | |
afefc415 | 1687 | #endif |
1e6c9c28 | 1688 | |
7192f92c | 1689 | static int __devinit atmel_serial_probe(struct platform_device *pdev) |
1e6c9c28 | 1690 | { |
7192f92c | 1691 | struct atmel_uart_port *port; |
1ecc26bd | 1692 | void *data; |
afefc415 | 1693 | int ret; |
1e6c9c28 | 1694 | |
9d09daf8 | 1695 | BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); |
1ecc26bd | 1696 | |
7192f92c | 1697 | port = &atmel_ports[pdev->id]; |
f05596db AS |
1698 | port->backup_imr = 0; |
1699 | ||
7192f92c | 1700 | atmel_init_port(port, pdev); |
1e6c9c28 | 1701 | |
a6670615 CC |
1702 | if (!atmel_use_dma_rx(&port->uart)) { |
1703 | ret = -ENOMEM; | |
6433471d HS |
1704 | data = kmalloc(sizeof(struct atmel_uart_char) |
1705 | * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL); | |
a6670615 CC |
1706 | if (!data) |
1707 | goto err_alloc_ring; | |
1708 | port->rx_ring.buf = data; | |
1709 | } | |
1ecc26bd | 1710 | |
7192f92c | 1711 | ret = uart_add_one_port(&atmel_uart, &port->uart); |
dfa7f343 HS |
1712 | if (ret) |
1713 | goto err_add_port; | |
1714 | ||
8da14b5f | 1715 | #ifdef CONFIG_SERIAL_ATMEL_CONSOLE |
06a7f058 DB |
1716 | if (atmel_is_console_port(&port->uart) |
1717 | && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { | |
1718 | /* | |
1719 | * The serial core enabled the clock for us, so undo | |
1720 | * the clk_enable() in atmel_console_setup() | |
1721 | */ | |
1722 | clk_disable(port->clk); | |
1723 | } | |
8da14b5f | 1724 | #endif |
06a7f058 | 1725 | |
dfa7f343 HS |
1726 | device_init_wakeup(&pdev->dev, 1); |
1727 | platform_set_drvdata(pdev, port); | |
1728 | ||
1729 | return 0; | |
1730 | ||
1731 | err_add_port: | |
1ecc26bd RB |
1732 | kfree(port->rx_ring.buf); |
1733 | port->rx_ring.buf = NULL; | |
1734 | err_alloc_ring: | |
dfa7f343 | 1735 | if (!atmel_is_console_port(&port->uart)) { |
dfa7f343 HS |
1736 | clk_put(port->clk); |
1737 | port->clk = NULL; | |
afefc415 AV |
1738 | } |
1739 | ||
1740 | return ret; | |
1741 | } | |
1742 | ||
7192f92c | 1743 | static int __devexit atmel_serial_remove(struct platform_device *pdev) |
afefc415 AV |
1744 | { |
1745 | struct uart_port *port = platform_get_drvdata(pdev); | |
c811ab8c | 1746 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
afefc415 AV |
1747 | int ret = 0; |
1748 | ||
afefc415 AV |
1749 | device_init_wakeup(&pdev->dev, 0); |
1750 | platform_set_drvdata(pdev, NULL); | |
1751 | ||
dfa7f343 HS |
1752 | ret = uart_remove_one_port(&atmel_uart, port); |
1753 | ||
1ecc26bd RB |
1754 | tasklet_kill(&atmel_port->tasklet); |
1755 | kfree(atmel_port->rx_ring.buf); | |
1756 | ||
dfa7f343 HS |
1757 | /* "port" is allocated statically, so we shouldn't free it */ |
1758 | ||
dfa7f343 | 1759 | clk_put(atmel_port->clk); |
afefc415 AV |
1760 | |
1761 | return ret; | |
1762 | } | |
1763 | ||
7192f92c HS |
1764 | static struct platform_driver atmel_serial_driver = { |
1765 | .probe = atmel_serial_probe, | |
1766 | .remove = __devexit_p(atmel_serial_remove), | |
1767 | .suspend = atmel_serial_suspend, | |
1768 | .resume = atmel_serial_resume, | |
afefc415 | 1769 | .driver = { |
1e8ea802 | 1770 | .name = "atmel_usart", |
afefc415 AV |
1771 | .owner = THIS_MODULE, |
1772 | }, | |
1773 | }; | |
1774 | ||
7192f92c | 1775 | static int __init atmel_serial_init(void) |
afefc415 AV |
1776 | { |
1777 | int ret; | |
1778 | ||
7192f92c | 1779 | ret = uart_register_driver(&atmel_uart); |
afefc415 AV |
1780 | if (ret) |
1781 | return ret; | |
1782 | ||
7192f92c | 1783 | ret = platform_driver_register(&atmel_serial_driver); |
afefc415 | 1784 | if (ret) |
7192f92c | 1785 | uart_unregister_driver(&atmel_uart); |
afefc415 AV |
1786 | |
1787 | return ret; | |
1788 | } | |
1789 | ||
7192f92c | 1790 | static void __exit atmel_serial_exit(void) |
afefc415 | 1791 | { |
7192f92c HS |
1792 | platform_driver_unregister(&atmel_serial_driver); |
1793 | uart_unregister_driver(&atmel_uart); | |
1e6c9c28 AV |
1794 | } |
1795 | ||
7192f92c HS |
1796 | module_init(atmel_serial_init); |
1797 | module_exit(atmel_serial_exit); | |
1e6c9c28 AV |
1798 | |
1799 | MODULE_AUTHOR("Rick Bronson"); | |
7192f92c | 1800 | MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver"); |
1e6c9c28 | 1801 | MODULE_LICENSE("GPL"); |
e169c139 | 1802 | MODULE_ALIAS("platform:atmel_usart"); |