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1 | /* |
2 | * Copyright (C) 2004 by Thomas Rathbone, HP Labs | |
3 | * Copyright (C) 2005 by Ivan Kokshaysky | |
4 | * Copyright (C) 2006 by SAN People | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the | |
18 | * Free Software Foundation, Inc., | |
19 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | */ | |
21 | ||
22 | #ifndef AT91_UDC_H | |
23 | #define AT91_UDC_H | |
24 | ||
25 | /* | |
26 | * USB Device Port (UDP) registers. | |
27 | * Based on AT91RM9200 datasheet revision E. | |
28 | */ | |
29 | ||
30 | #define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */ | |
31 | #define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */ | |
32 | #define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */ | |
33 | #define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */ | |
34 | ||
35 | #define AT91_UDP_GLB_STAT 0x04 /* Global State Register */ | |
36 | #define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */ | |
37 | #define AT91_UDP_CONFG (1 << 1) /* Configured */ | |
38 | #define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */ | |
39 | #define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */ | |
40 | #define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */ | |
41 | ||
42 | #define AT91_UDP_FADDR 0x08 /* Function Address Register */ | |
43 | #define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */ | |
44 | #define AT91_UDP_FEN (1 << 8) /* Function Enable */ | |
45 | ||
46 | #define AT91_UDP_IER 0x10 /* Interrupt Enable Register */ | |
47 | #define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */ | |
48 | #define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */ | |
49 | ||
50 | #define AT91_UDP_ISR 0x1c /* Interrupt Status Register */ | |
51 | #define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */ | |
52 | #define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */ | |
53 | #define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */ | |
54 | #define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */ | |
55 | #define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */ | |
56 | #define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */ | |
57 | #define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */ | |
58 | ||
59 | #define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */ | |
60 | #define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */ | |
61 | ||
62 | #define AT91_UDP_CSR(n) (0x30+((n)*4)) /* Endpoint Control/Status Registers 0-7 */ | |
63 | #define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */ | |
64 | #define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */ | |
65 | #define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */ | |
66 | #define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */ | |
67 | #define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */ | |
68 | #define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */ | |
69 | #define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */ | |
70 | #define AT91_UDP_DIR (1 << 7) /* Transfer Direction */ | |
71 | #define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */ | |
72 | #define AT91_UDP_EPTYPE_CTRL (0 << 8) | |
73 | #define AT91_UDP_EPTYPE_ISO_OUT (1 << 8) | |
74 | #define AT91_UDP_EPTYPE_BULK_OUT (2 << 8) | |
75 | #define AT91_UDP_EPTYPE_INT_OUT (3 << 8) | |
76 | #define AT91_UDP_EPTYPE_ISO_IN (5 << 8) | |
77 | #define AT91_UDP_EPTYPE_BULK_IN (6 << 8) | |
78 | #define AT91_UDP_EPTYPE_INT_IN (7 << 8) | |
79 | #define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */ | |
80 | #define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */ | |
81 | #define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */ | |
82 | ||
83 | #define AT91_UDP_FDR(n) (0x50+((n)*4)) /* Endpoint FIFO Data Registers 0-7 */ | |
84 | ||
85 | #define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */ | |
86 | #define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */ | |
87 | ||
88 | ||
89 | /*-------------------------------------------------------------------------*/ | |
90 | ||
91 | /* | |
92 | * controller driver data structures | |
93 | */ | |
94 | ||
95 | #define NUM_ENDPOINTS 6 | |
96 | ||
97 | /* | |
98 | * hardware won't disable bus reset, or resume while the controller | |
99 | * is suspended ... watching suspend helps keep the logic symmetric. | |
100 | */ | |
101 | #define MINIMUS_INTERRUPTUS \ | |
102 | (AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP) | |
103 | ||
104 | struct at91_ep { | |
105 | struct usb_ep ep; | |
106 | struct list_head queue; | |
107 | struct at91_udc *udc; | |
108 | void __iomem *creg; | |
109 | ||
110 | unsigned maxpacket:16; | |
111 | u8 int_mask; | |
112 | unsigned is_pingpong:1; | |
113 | ||
114 | unsigned stopped:1; | |
115 | unsigned is_in:1; | |
116 | unsigned is_iso:1; | |
117 | unsigned fifo_bank:1; | |
118 | ||
119 | const struct usb_endpoint_descriptor | |
120 | *desc; | |
121 | }; | |
122 | ||
123 | /* | |
124 | * driver is non-SMP, and just blocks IRQs whenever it needs | |
125 | * access protection for chip registers or driver state | |
126 | */ | |
127 | struct at91_udc { | |
128 | struct usb_gadget gadget; | |
129 | struct at91_ep ep[NUM_ENDPOINTS]; | |
130 | struct usb_gadget_driver *driver; | |
131 | unsigned vbus:1; | |
132 | unsigned enabled:1; | |
133 | unsigned clocked:1; | |
134 | unsigned suspended:1; | |
135 | unsigned req_pending:1; | |
136 | unsigned wait_for_addr_ack:1; | |
137 | unsigned wait_for_config_ack:1; | |
138 | unsigned selfpowered:1; | |
139 | u8 addr; | |
140 | struct at91_udc_data board; | |
141 | struct clk *iclk, *fclk; | |
142 | struct platform_device *pdev; | |
143 | struct proc_dir_entry *pde; | |
8b2e7668 | 144 | int udp_irq; |
bae4bd84 DB |
145 | }; |
146 | ||
147 | static inline struct at91_udc *to_udc(struct usb_gadget *g) | |
148 | { | |
149 | return container_of(g, struct at91_udc, gadget); | |
150 | } | |
151 | ||
152 | struct at91_request { | |
153 | struct usb_request req; | |
154 | struct list_head queue; | |
155 | }; | |
156 | ||
157 | /*-------------------------------------------------------------------------*/ | |
158 | ||
159 | #ifdef DEBUG | |
160 | #define DBG(stuff...) printk(KERN_DEBUG "udc: " stuff) | |
161 | #else | |
162 | #define DBG(stuff...) do{}while(0) | |
163 | #endif | |
164 | ||
165 | #ifdef VERBOSE | |
166 | # define VDBG DBG | |
167 | #else | |
168 | # define VDBG(stuff...) do{}while(0) | |
169 | #endif | |
170 | ||
171 | #ifdef PACKET_TRACE | |
172 | # define PACKET VDBG | |
173 | #else | |
174 | # define PACKET(stuff...) do{}while(0) | |
175 | #endif | |
176 | ||
177 | #define ERR(stuff...) printk(KERN_ERR "udc: " stuff) | |
178 | #define WARN(stuff...) printk(KERN_WARNING "udc: " stuff) | |
179 | #define INFO(stuff...) printk(KERN_INFO "udc: " stuff) | |
180 | ||
181 | #endif | |
182 |