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277164f0 NZ |
1 | /* |
2 | * Copyright (C) 2011 Marvell International Ltd. All rights reserved. | |
3 | * Author: Chao Xie <chao.xie@marvell.com> | |
4 | * Neil Zhang <zhangwm@marvell.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
277164f0 NZ |
14 | #include <linux/io.h> |
15 | #include <linux/uaccess.h> | |
16 | #include <linux/device.h> | |
17 | #include <linux/proc_fs.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/workqueue.h> | |
20 | #include <linux/platform_device.h> | |
21 | ||
22 | #include <linux/usb.h> | |
23 | #include <linux/usb/ch9.h> | |
24 | #include <linux/usb/otg.h> | |
25 | #include <linux/usb/gadget.h> | |
26 | #include <linux/usb/hcd.h> | |
27 | #include <linux/platform_data/mv_usb.h> | |
28 | ||
94ae9843 | 29 | #include "phy-mv-usb.h" |
277164f0 NZ |
30 | |
31 | #define DRIVER_DESC "Marvell USB OTG transceiver driver" | |
32 | #define DRIVER_VERSION "Jan 20, 2010" | |
33 | ||
34 | MODULE_DESCRIPTION(DRIVER_DESC); | |
35 | MODULE_VERSION(DRIVER_VERSION); | |
36 | MODULE_LICENSE("GPL"); | |
37 | ||
38 | static const char driver_name[] = "mv-otg"; | |
39 | ||
40 | static char *state_string[] = { | |
41 | "undefined", | |
42 | "b_idle", | |
43 | "b_srp_init", | |
44 | "b_peripheral", | |
45 | "b_wait_acon", | |
46 | "b_host", | |
47 | "a_idle", | |
48 | "a_wait_vrise", | |
49 | "a_wait_bcon", | |
50 | "a_host", | |
51 | "a_suspend", | |
52 | "a_peripheral", | |
53 | "a_wait_vfall", | |
54 | "a_vbus_err" | |
55 | }; | |
56 | ||
b1c711d6 | 57 | static int mv_otg_set_vbus(struct usb_otg *otg, bool on) |
277164f0 | 58 | { |
b1c711d6 | 59 | struct mv_otg *mvotg = container_of(otg->phy, struct mv_otg, phy); |
277164f0 NZ |
60 | if (mvotg->pdata->set_vbus == NULL) |
61 | return -ENODEV; | |
62 | ||
63 | return mvotg->pdata->set_vbus(on); | |
64 | } | |
65 | ||
b1c711d6 | 66 | static int mv_otg_set_host(struct usb_otg *otg, |
277164f0 NZ |
67 | struct usb_bus *host) |
68 | { | |
69 | otg->host = host; | |
70 | ||
71 | return 0; | |
72 | } | |
73 | ||
b1c711d6 | 74 | static int mv_otg_set_peripheral(struct usb_otg *otg, |
277164f0 NZ |
75 | struct usb_gadget *gadget) |
76 | { | |
77 | otg->gadget = gadget; | |
78 | ||
79 | return 0; | |
80 | } | |
81 | ||
82 | static void mv_otg_run_state_machine(struct mv_otg *mvotg, | |
83 | unsigned long delay) | |
84 | { | |
85 | dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n"); | |
86 | if (!mvotg->qwork) | |
87 | return; | |
88 | ||
89 | queue_delayed_work(mvotg->qwork, &mvotg->work, delay); | |
90 | } | |
91 | ||
92 | static void mv_otg_timer_await_bcon(unsigned long data) | |
93 | { | |
94 | struct mv_otg *mvotg = (struct mv_otg *) data; | |
95 | ||
96 | mvotg->otg_ctrl.a_wait_bcon_timeout = 1; | |
97 | ||
98 | dev_info(&mvotg->pdev->dev, "B Device No Response!\n"); | |
99 | ||
100 | if (spin_trylock(&mvotg->wq_lock)) { | |
101 | mv_otg_run_state_machine(mvotg, 0); | |
102 | spin_unlock(&mvotg->wq_lock); | |
103 | } | |
104 | } | |
105 | ||
106 | static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id) | |
107 | { | |
108 | struct timer_list *timer; | |
109 | ||
110 | if (id >= OTG_TIMER_NUM) | |
111 | return -EINVAL; | |
112 | ||
113 | timer = &mvotg->otg_ctrl.timer[id]; | |
114 | ||
115 | if (timer_pending(timer)) | |
116 | del_timer(timer); | |
117 | ||
118 | return 0; | |
119 | } | |
120 | ||
121 | static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id, | |
122 | unsigned long interval, | |
123 | void (*callback) (unsigned long)) | |
124 | { | |
125 | struct timer_list *timer; | |
126 | ||
127 | if (id >= OTG_TIMER_NUM) | |
128 | return -EINVAL; | |
129 | ||
130 | timer = &mvotg->otg_ctrl.timer[id]; | |
131 | if (timer_pending(timer)) { | |
132 | dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id); | |
133 | return -EBUSY; | |
134 | } | |
135 | ||
136 | init_timer(timer); | |
137 | timer->data = (unsigned long) mvotg; | |
138 | timer->function = callback; | |
139 | timer->expires = jiffies + interval; | |
140 | add_timer(timer); | |
141 | ||
142 | return 0; | |
143 | } | |
144 | ||
145 | static int mv_otg_reset(struct mv_otg *mvotg) | |
146 | { | |
147 | unsigned int loops; | |
148 | u32 tmp; | |
149 | ||
150 | /* Stop the controller */ | |
151 | tmp = readl(&mvotg->op_regs->usbcmd); | |
152 | tmp &= ~USBCMD_RUN_STOP; | |
153 | writel(tmp, &mvotg->op_regs->usbcmd); | |
154 | ||
155 | /* Reset the controller to get default values */ | |
156 | writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd); | |
157 | ||
158 | loops = 500; | |
159 | while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) { | |
160 | if (loops == 0) { | |
161 | dev_err(&mvotg->pdev->dev, | |
162 | "Wait for RESET completed TIMEOUT\n"); | |
163 | return -ETIMEDOUT; | |
164 | } | |
165 | loops--; | |
166 | udelay(20); | |
167 | } | |
168 | ||
169 | writel(0x0, &mvotg->op_regs->usbintr); | |
170 | tmp = readl(&mvotg->op_regs->usbsts); | |
171 | writel(tmp, &mvotg->op_regs->usbsts); | |
172 | ||
173 | return 0; | |
174 | } | |
175 | ||
176 | static void mv_otg_init_irq(struct mv_otg *mvotg) | |
177 | { | |
178 | u32 otgsc; | |
179 | ||
180 | mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID | |
181 | | OTGSC_INTR_A_VBUS_VALID; | |
182 | mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID | |
183 | | OTGSC_INTSTS_A_VBUS_VALID; | |
184 | ||
185 | if (mvotg->pdata->vbus == NULL) { | |
186 | mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID | |
187 | | OTGSC_INTR_B_SESSION_END; | |
188 | mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID | |
189 | | OTGSC_INTSTS_B_SESSION_END; | |
190 | } | |
191 | ||
192 | if (mvotg->pdata->id == NULL) { | |
193 | mvotg->irq_en |= OTGSC_INTR_USB_ID; | |
194 | mvotg->irq_status |= OTGSC_INTSTS_USB_ID; | |
195 | } | |
196 | ||
197 | otgsc = readl(&mvotg->op_regs->otgsc); | |
198 | otgsc |= mvotg->irq_en; | |
199 | writel(otgsc, &mvotg->op_regs->otgsc); | |
200 | } | |
201 | ||
202 | static void mv_otg_start_host(struct mv_otg *mvotg, int on) | |
203 | { | |
2053c2d1 | 204 | #ifdef CONFIG_USB |
b1c711d6 | 205 | struct usb_otg *otg = mvotg->phy.otg; |
277164f0 NZ |
206 | struct usb_hcd *hcd; |
207 | ||
208 | if (!otg->host) | |
209 | return; | |
210 | ||
211 | dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop"); | |
212 | ||
213 | hcd = bus_to_hcd(otg->host); | |
214 | ||
3c9740a1 | 215 | if (on) { |
277164f0 | 216 | usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); |
3c9740a1 PC |
217 | device_wakeup_enable(hcd->self.controller); |
218 | } else { | |
277164f0 | 219 | usb_remove_hcd(hcd); |
3c9740a1 | 220 | } |
2053c2d1 | 221 | #endif /* CONFIG_USB */ |
277164f0 NZ |
222 | } |
223 | ||
224 | static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on) | |
225 | { | |
b1c711d6 | 226 | struct usb_otg *otg = mvotg->phy.otg; |
277164f0 NZ |
227 | |
228 | if (!otg->gadget) | |
229 | return; | |
230 | ||
b1c711d6 | 231 | dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off"); |
277164f0 NZ |
232 | |
233 | if (on) | |
234 | usb_gadget_vbus_connect(otg->gadget); | |
235 | else | |
236 | usb_gadget_vbus_disconnect(otg->gadget); | |
237 | } | |
238 | ||
239 | static void otg_clock_enable(struct mv_otg *mvotg) | |
240 | { | |
df18feda | 241 | clk_prepare_enable(mvotg->clk); |
277164f0 NZ |
242 | } |
243 | ||
244 | static void otg_clock_disable(struct mv_otg *mvotg) | |
245 | { | |
df18feda | 246 | clk_disable_unprepare(mvotg->clk); |
277164f0 NZ |
247 | } |
248 | ||
249 | static int mv_otg_enable_internal(struct mv_otg *mvotg) | |
250 | { | |
251 | int retval = 0; | |
252 | ||
253 | if (mvotg->active) | |
254 | return 0; | |
255 | ||
256 | dev_dbg(&mvotg->pdev->dev, "otg enabled\n"); | |
257 | ||
258 | otg_clock_enable(mvotg); | |
259 | if (mvotg->pdata->phy_init) { | |
260 | retval = mvotg->pdata->phy_init(mvotg->phy_regs); | |
261 | if (retval) { | |
262 | dev_err(&mvotg->pdev->dev, | |
263 | "init phy error %d\n", retval); | |
264 | otg_clock_disable(mvotg); | |
265 | return retval; | |
266 | } | |
267 | } | |
268 | mvotg->active = 1; | |
269 | ||
270 | return 0; | |
271 | ||
272 | } | |
273 | ||
274 | static int mv_otg_enable(struct mv_otg *mvotg) | |
275 | { | |
276 | if (mvotg->clock_gating) | |
277 | return mv_otg_enable_internal(mvotg); | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
282 | static void mv_otg_disable_internal(struct mv_otg *mvotg) | |
283 | { | |
284 | if (mvotg->active) { | |
285 | dev_dbg(&mvotg->pdev->dev, "otg disabled\n"); | |
286 | if (mvotg->pdata->phy_deinit) | |
287 | mvotg->pdata->phy_deinit(mvotg->phy_regs); | |
288 | otg_clock_disable(mvotg); | |
289 | mvotg->active = 0; | |
290 | } | |
291 | } | |
292 | ||
293 | static void mv_otg_disable(struct mv_otg *mvotg) | |
294 | { | |
295 | if (mvotg->clock_gating) | |
296 | mv_otg_disable_internal(mvotg); | |
297 | } | |
298 | ||
299 | static void mv_otg_update_inputs(struct mv_otg *mvotg) | |
300 | { | |
301 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; | |
302 | u32 otgsc; | |
303 | ||
304 | otgsc = readl(&mvotg->op_regs->otgsc); | |
305 | ||
306 | if (mvotg->pdata->vbus) { | |
307 | if (mvotg->pdata->vbus->poll() == VBUS_HIGH) { | |
308 | otg_ctrl->b_sess_vld = 1; | |
309 | otg_ctrl->b_sess_end = 0; | |
310 | } else { | |
311 | otg_ctrl->b_sess_vld = 0; | |
312 | otg_ctrl->b_sess_end = 1; | |
313 | } | |
314 | } else { | |
315 | otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID); | |
316 | otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END); | |
317 | } | |
318 | ||
319 | if (mvotg->pdata->id) | |
320 | otg_ctrl->id = !!mvotg->pdata->id->poll(); | |
321 | else | |
322 | otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID); | |
323 | ||
324 | if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id) | |
325 | otg_ctrl->a_bus_req = 1; | |
326 | ||
327 | otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID); | |
328 | otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID); | |
329 | ||
330 | dev_dbg(&mvotg->pdev->dev, "%s: ", __func__); | |
331 | dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id); | |
332 | dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld); | |
333 | dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end); | |
334 | dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld); | |
335 | dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld); | |
336 | } | |
337 | ||
338 | static void mv_otg_update_state(struct mv_otg *mvotg) | |
339 | { | |
340 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; | |
b1c711d6 | 341 | struct usb_phy *phy = &mvotg->phy; |
e47d9254 | 342 | int old_state = mvotg->phy.otg->state; |
277164f0 NZ |
343 | |
344 | switch (old_state) { | |
345 | case OTG_STATE_UNDEFINED: | |
e47d9254 | 346 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
347 | /* FALL THROUGH */ |
348 | case OTG_STATE_B_IDLE: | |
349 | if (otg_ctrl->id == 0) | |
e47d9254 | 350 | mvotg->phy.otg->state = OTG_STATE_A_IDLE; |
277164f0 | 351 | else if (otg_ctrl->b_sess_vld) |
e47d9254 | 352 | mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
277164f0 NZ |
353 | break; |
354 | case OTG_STATE_B_PERIPHERAL: | |
355 | if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0) | |
e47d9254 | 356 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
357 | break; |
358 | case OTG_STATE_A_IDLE: | |
359 | if (otg_ctrl->id) | |
e47d9254 | 360 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
361 | else if (!(otg_ctrl->a_bus_drop) && |
362 | (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det)) | |
e47d9254 | 363 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE; |
277164f0 NZ |
364 | break; |
365 | case OTG_STATE_A_WAIT_VRISE: | |
366 | if (otg_ctrl->a_vbus_vld) | |
e47d9254 | 367 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON; |
277164f0 NZ |
368 | break; |
369 | case OTG_STATE_A_WAIT_BCON: | |
370 | if (otg_ctrl->id || otg_ctrl->a_bus_drop | |
371 | || otg_ctrl->a_wait_bcon_timeout) { | |
372 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
373 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
e47d9254 | 374 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
277164f0 NZ |
375 | otg_ctrl->a_bus_req = 0; |
376 | } else if (!otg_ctrl->a_vbus_vld) { | |
377 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
378 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
e47d9254 | 379 | mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
277164f0 NZ |
380 | } else if (otg_ctrl->b_conn) { |
381 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
382 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
e47d9254 | 383 | mvotg->phy.otg->state = OTG_STATE_A_HOST; |
277164f0 NZ |
384 | } |
385 | break; | |
386 | case OTG_STATE_A_HOST: | |
387 | if (otg_ctrl->id || !otg_ctrl->b_conn | |
388 | || otg_ctrl->a_bus_drop) | |
e47d9254 | 389 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON; |
277164f0 | 390 | else if (!otg_ctrl->a_vbus_vld) |
e47d9254 | 391 | mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
277164f0 NZ |
392 | break; |
393 | case OTG_STATE_A_WAIT_VFALL: | |
394 | if (otg_ctrl->id | |
395 | || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld) | |
396 | || otg_ctrl->a_bus_req) | |
e47d9254 | 397 | mvotg->phy.otg->state = OTG_STATE_A_IDLE; |
277164f0 NZ |
398 | break; |
399 | case OTG_STATE_A_VBUS_ERR: | |
400 | if (otg_ctrl->id || otg_ctrl->a_clr_err | |
401 | || otg_ctrl->a_bus_drop) { | |
402 | otg_ctrl->a_clr_err = 0; | |
e47d9254 | 403 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
277164f0 NZ |
404 | } |
405 | break; | |
406 | default: | |
407 | break; | |
408 | } | |
409 | } | |
410 | ||
411 | static void mv_otg_work(struct work_struct *work) | |
412 | { | |
413 | struct mv_otg *mvotg; | |
b1c711d6 HK |
414 | struct usb_phy *phy; |
415 | struct usb_otg *otg; | |
277164f0 NZ |
416 | int old_state; |
417 | ||
63a13079 | 418 | mvotg = container_of(to_delayed_work(work), struct mv_otg, work); |
277164f0 NZ |
419 | |
420 | run: | |
421 | /* work queue is single thread, or we need spin_lock to protect */ | |
b1c711d6 | 422 | phy = &mvotg->phy; |
e47d9254 AT |
423 | otg = mvotg->phy.otg; |
424 | old_state = otg->state; | |
277164f0 NZ |
425 | |
426 | if (!mvotg->active) | |
427 | return; | |
428 | ||
429 | mv_otg_update_inputs(mvotg); | |
430 | mv_otg_update_state(mvotg); | |
431 | ||
e47d9254 | 432 | if (old_state != mvotg->phy.otg->state) { |
277164f0 NZ |
433 | dev_info(&mvotg->pdev->dev, "change from state %s to %s\n", |
434 | state_string[old_state], | |
e47d9254 | 435 | state_string[mvotg->phy.otg->state]); |
277164f0 | 436 | |
e47d9254 | 437 | switch (mvotg->phy.otg->state) { |
277164f0 | 438 | case OTG_STATE_B_IDLE: |
b1c711d6 | 439 | otg->default_a = 0; |
277164f0 NZ |
440 | if (old_state == OTG_STATE_B_PERIPHERAL) |
441 | mv_otg_start_periphrals(mvotg, 0); | |
442 | mv_otg_reset(mvotg); | |
443 | mv_otg_disable(mvotg); | |
444 | break; | |
445 | case OTG_STATE_B_PERIPHERAL: | |
446 | mv_otg_enable(mvotg); | |
447 | mv_otg_start_periphrals(mvotg, 1); | |
448 | break; | |
449 | case OTG_STATE_A_IDLE: | |
b1c711d6 | 450 | otg->default_a = 1; |
277164f0 NZ |
451 | mv_otg_enable(mvotg); |
452 | if (old_state == OTG_STATE_A_WAIT_VFALL) | |
453 | mv_otg_start_host(mvotg, 0); | |
454 | mv_otg_reset(mvotg); | |
455 | break; | |
456 | case OTG_STATE_A_WAIT_VRISE: | |
b1c711d6 | 457 | mv_otg_set_vbus(otg, 1); |
277164f0 NZ |
458 | break; |
459 | case OTG_STATE_A_WAIT_BCON: | |
460 | if (old_state != OTG_STATE_A_HOST) | |
461 | mv_otg_start_host(mvotg, 1); | |
462 | mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER, | |
463 | T_A_WAIT_BCON, | |
464 | mv_otg_timer_await_bcon); | |
465 | /* | |
466 | * Now, we directly enter A_HOST. So set b_conn = 1 | |
467 | * here. In fact, it need host driver to notify us. | |
468 | */ | |
469 | mvotg->otg_ctrl.b_conn = 1; | |
470 | break; | |
471 | case OTG_STATE_A_HOST: | |
472 | break; | |
473 | case OTG_STATE_A_WAIT_VFALL: | |
474 | /* | |
475 | * Now, we has exited A_HOST. So set b_conn = 0 | |
476 | * here. In fact, it need host driver to notify us. | |
477 | */ | |
478 | mvotg->otg_ctrl.b_conn = 0; | |
b1c711d6 | 479 | mv_otg_set_vbus(otg, 0); |
277164f0 NZ |
480 | break; |
481 | case OTG_STATE_A_VBUS_ERR: | |
482 | break; | |
483 | default: | |
484 | break; | |
485 | } | |
486 | goto run; | |
487 | } | |
488 | } | |
489 | ||
490 | static irqreturn_t mv_otg_irq(int irq, void *dev) | |
491 | { | |
492 | struct mv_otg *mvotg = dev; | |
493 | u32 otgsc; | |
494 | ||
495 | otgsc = readl(&mvotg->op_regs->otgsc); | |
496 | writel(otgsc, &mvotg->op_regs->otgsc); | |
497 | ||
498 | /* | |
499 | * if we have vbus, then the vbus detection for B-device | |
500 | * will be done by mv_otg_inputs_irq(). | |
501 | */ | |
502 | if (mvotg->pdata->vbus) | |
503 | if ((otgsc & OTGSC_STS_USB_ID) && | |
504 | !(otgsc & OTGSC_INTSTS_USB_ID)) | |
505 | return IRQ_NONE; | |
506 | ||
507 | if ((otgsc & mvotg->irq_status) == 0) | |
508 | return IRQ_NONE; | |
509 | ||
510 | mv_otg_run_state_machine(mvotg, 0); | |
511 | ||
512 | return IRQ_HANDLED; | |
513 | } | |
514 | ||
515 | static irqreturn_t mv_otg_inputs_irq(int irq, void *dev) | |
516 | { | |
517 | struct mv_otg *mvotg = dev; | |
518 | ||
519 | /* The clock may disabled at this time */ | |
520 | if (!mvotg->active) { | |
521 | mv_otg_enable(mvotg); | |
522 | mv_otg_init_irq(mvotg); | |
523 | } | |
524 | ||
525 | mv_otg_run_state_machine(mvotg, 0); | |
526 | ||
527 | return IRQ_HANDLED; | |
528 | } | |
529 | ||
530 | static ssize_t | |
531 | get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) | |
532 | { | |
533 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
534 | return scnprintf(buf, PAGE_SIZE, "%d\n", | |
535 | mvotg->otg_ctrl.a_bus_req); | |
536 | } | |
537 | ||
538 | static ssize_t | |
539 | set_a_bus_req(struct device *dev, struct device_attribute *attr, | |
540 | const char *buf, size_t count) | |
541 | { | |
542 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
543 | ||
544 | if (count > 2) | |
545 | return -1; | |
546 | ||
547 | /* We will use this interface to change to A device */ | |
e47d9254 AT |
548 | if (mvotg->phy.otg->state != OTG_STATE_B_IDLE |
549 | && mvotg->phy.otg->state != OTG_STATE_A_IDLE) | |
277164f0 NZ |
550 | return -1; |
551 | ||
552 | /* The clock may disabled and we need to set irq for ID detected */ | |
553 | mv_otg_enable(mvotg); | |
554 | mv_otg_init_irq(mvotg); | |
555 | ||
556 | if (buf[0] == '1') { | |
557 | mvotg->otg_ctrl.a_bus_req = 1; | |
558 | mvotg->otg_ctrl.a_bus_drop = 0; | |
559 | dev_dbg(&mvotg->pdev->dev, | |
560 | "User request: a_bus_req = 1\n"); | |
561 | ||
562 | if (spin_trylock(&mvotg->wq_lock)) { | |
563 | mv_otg_run_state_machine(mvotg, 0); | |
564 | spin_unlock(&mvotg->wq_lock); | |
565 | } | |
566 | } | |
567 | ||
568 | return count; | |
569 | } | |
570 | ||
571 | static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, | |
572 | set_a_bus_req); | |
573 | ||
574 | static ssize_t | |
575 | set_a_clr_err(struct device *dev, struct device_attribute *attr, | |
576 | const char *buf, size_t count) | |
577 | { | |
578 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
b1c711d6 | 579 | if (!mvotg->phy.otg->default_a) |
277164f0 NZ |
580 | return -1; |
581 | ||
582 | if (count > 2) | |
583 | return -1; | |
584 | ||
585 | if (buf[0] == '1') { | |
586 | mvotg->otg_ctrl.a_clr_err = 1; | |
587 | dev_dbg(&mvotg->pdev->dev, | |
588 | "User request: a_clr_err = 1\n"); | |
589 | } | |
590 | ||
591 | if (spin_trylock(&mvotg->wq_lock)) { | |
592 | mv_otg_run_state_machine(mvotg, 0); | |
593 | spin_unlock(&mvotg->wq_lock); | |
594 | } | |
595 | ||
596 | return count; | |
597 | } | |
598 | ||
599 | static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err); | |
600 | ||
601 | static ssize_t | |
602 | get_a_bus_drop(struct device *dev, struct device_attribute *attr, | |
603 | char *buf) | |
604 | { | |
605 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
606 | return scnprintf(buf, PAGE_SIZE, "%d\n", | |
607 | mvotg->otg_ctrl.a_bus_drop); | |
608 | } | |
609 | ||
610 | static ssize_t | |
611 | set_a_bus_drop(struct device *dev, struct device_attribute *attr, | |
612 | const char *buf, size_t count) | |
613 | { | |
614 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
b1c711d6 | 615 | if (!mvotg->phy.otg->default_a) |
277164f0 NZ |
616 | return -1; |
617 | ||
618 | if (count > 2) | |
619 | return -1; | |
620 | ||
621 | if (buf[0] == '0') { | |
622 | mvotg->otg_ctrl.a_bus_drop = 0; | |
623 | dev_dbg(&mvotg->pdev->dev, | |
624 | "User request: a_bus_drop = 0\n"); | |
625 | } else if (buf[0] == '1') { | |
626 | mvotg->otg_ctrl.a_bus_drop = 1; | |
627 | mvotg->otg_ctrl.a_bus_req = 0; | |
628 | dev_dbg(&mvotg->pdev->dev, | |
629 | "User request: a_bus_drop = 1\n"); | |
630 | dev_dbg(&mvotg->pdev->dev, | |
631 | "User request: and a_bus_req = 0\n"); | |
632 | } | |
633 | ||
634 | if (spin_trylock(&mvotg->wq_lock)) { | |
635 | mv_otg_run_state_machine(mvotg, 0); | |
636 | spin_unlock(&mvotg->wq_lock); | |
637 | } | |
638 | ||
639 | return count; | |
640 | } | |
641 | ||
642 | static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, | |
643 | get_a_bus_drop, set_a_bus_drop); | |
644 | ||
645 | static struct attribute *inputs_attrs[] = { | |
646 | &dev_attr_a_bus_req.attr, | |
647 | &dev_attr_a_clr_err.attr, | |
648 | &dev_attr_a_bus_drop.attr, | |
649 | NULL, | |
650 | }; | |
651 | ||
652 | static struct attribute_group inputs_attr_group = { | |
653 | .name = "inputs", | |
654 | .attrs = inputs_attrs, | |
655 | }; | |
656 | ||
d07f4a82 | 657 | static int mv_otg_remove(struct platform_device *pdev) |
277164f0 NZ |
658 | { |
659 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
277164f0 NZ |
660 | |
661 | sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group); | |
662 | ||
277164f0 NZ |
663 | if (mvotg->qwork) { |
664 | flush_workqueue(mvotg->qwork); | |
665 | destroy_workqueue(mvotg->qwork); | |
666 | } | |
667 | ||
668 | mv_otg_disable(mvotg); | |
669 | ||
662dca54 | 670 | usb_remove_phy(&mvotg->phy); |
277164f0 | 671 | |
277164f0 NZ |
672 | return 0; |
673 | } | |
674 | ||
675 | static int mv_otg_probe(struct platform_device *pdev) | |
676 | { | |
19f9e188 | 677 | struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev); |
277164f0 | 678 | struct mv_otg *mvotg; |
b1c711d6 | 679 | struct usb_otg *otg; |
277164f0 | 680 | struct resource *r; |
df18feda | 681 | int retval = 0, i; |
277164f0 NZ |
682 | |
683 | if (pdata == NULL) { | |
684 | dev_err(&pdev->dev, "failed to get platform data\n"); | |
685 | return -ENODEV; | |
686 | } | |
687 | ||
df18feda | 688 | mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL); |
aa10c7b0 | 689 | if (!mvotg) |
277164f0 | 690 | return -ENOMEM; |
277164f0 | 691 | |
fb3dfe13 CX |
692 | otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); |
693 | if (!otg) | |
b1c711d6 | 694 | return -ENOMEM; |
b1c711d6 | 695 | |
277164f0 NZ |
696 | platform_set_drvdata(pdev, mvotg); |
697 | ||
698 | mvotg->pdev = pdev; | |
699 | mvotg->pdata = pdata; | |
700 | ||
df18feda CX |
701 | mvotg->clk = devm_clk_get(&pdev->dev, NULL); |
702 | if (IS_ERR(mvotg->clk)) | |
703 | return PTR_ERR(mvotg->clk); | |
277164f0 NZ |
704 | |
705 | mvotg->qwork = create_singlethread_workqueue("mv_otg_queue"); | |
706 | if (!mvotg->qwork) { | |
707 | dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n"); | |
fb3dfe13 | 708 | return -ENOMEM; |
277164f0 NZ |
709 | } |
710 | ||
711 | INIT_DELAYED_WORK(&mvotg->work, mv_otg_work); | |
712 | ||
713 | /* OTG common part */ | |
714 | mvotg->pdev = pdev; | |
b1c711d6 HK |
715 | mvotg->phy.dev = &pdev->dev; |
716 | mvotg->phy.otg = otg; | |
717 | mvotg->phy.label = driver_name; | |
b1c711d6 HK |
718 | |
719 | otg->phy = &mvotg->phy; | |
e47d9254 | 720 | otg->state = OTG_STATE_UNDEFINED; |
b1c711d6 HK |
721 | otg->set_host = mv_otg_set_host; |
722 | otg->set_peripheral = mv_otg_set_peripheral; | |
723 | otg->set_vbus = mv_otg_set_vbus; | |
277164f0 NZ |
724 | |
725 | for (i = 0; i < OTG_TIMER_NUM; i++) | |
726 | init_timer(&mvotg->otg_ctrl.timer[i]); | |
727 | ||
728 | r = platform_get_resource_byname(mvotg->pdev, | |
729 | IORESOURCE_MEM, "phyregs"); | |
730 | if (r == NULL) { | |
731 | dev_err(&pdev->dev, "no phy I/O memory resource defined\n"); | |
732 | retval = -ENODEV; | |
733 | goto err_destroy_workqueue; | |
734 | } | |
735 | ||
fb3dfe13 | 736 | mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
277164f0 NZ |
737 | if (mvotg->phy_regs == NULL) { |
738 | dev_err(&pdev->dev, "failed to map phy I/O memory\n"); | |
739 | retval = -EFAULT; | |
740 | goto err_destroy_workqueue; | |
741 | } | |
742 | ||
743 | r = platform_get_resource_byname(mvotg->pdev, | |
744 | IORESOURCE_MEM, "capregs"); | |
745 | if (r == NULL) { | |
746 | dev_err(&pdev->dev, "no I/O memory resource defined\n"); | |
747 | retval = -ENODEV; | |
fb3dfe13 | 748 | goto err_destroy_workqueue; |
277164f0 NZ |
749 | } |
750 | ||
fb3dfe13 | 751 | mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
277164f0 NZ |
752 | if (mvotg->cap_regs == NULL) { |
753 | dev_err(&pdev->dev, "failed to map I/O memory\n"); | |
754 | retval = -EFAULT; | |
fb3dfe13 | 755 | goto err_destroy_workqueue; |
277164f0 NZ |
756 | } |
757 | ||
758 | /* we will acces controller register, so enable the udc controller */ | |
759 | retval = mv_otg_enable_internal(mvotg); | |
760 | if (retval) { | |
761 | dev_err(&pdev->dev, "mv otg enable error %d\n", retval); | |
fb3dfe13 | 762 | goto err_destroy_workqueue; |
277164f0 NZ |
763 | } |
764 | ||
765 | mvotg->op_regs = | |
766 | (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs | |
767 | + (readl(mvotg->cap_regs) & CAPLENGTH_MASK)); | |
768 | ||
769 | if (pdata->id) { | |
fb3dfe13 CX |
770 | retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq, |
771 | NULL, mv_otg_inputs_irq, | |
772 | IRQF_ONESHOT, "id", mvotg); | |
277164f0 NZ |
773 | if (retval) { |
774 | dev_info(&pdev->dev, | |
775 | "Failed to request irq for ID\n"); | |
776 | pdata->id = NULL; | |
777 | } | |
778 | } | |
779 | ||
780 | if (pdata->vbus) { | |
781 | mvotg->clock_gating = 1; | |
fb3dfe13 CX |
782 | retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq, |
783 | NULL, mv_otg_inputs_irq, | |
784 | IRQF_ONESHOT, "vbus", mvotg); | |
277164f0 NZ |
785 | if (retval) { |
786 | dev_info(&pdev->dev, | |
787 | "Failed to request irq for VBUS, " | |
788 | "disable clock gating\n"); | |
789 | mvotg->clock_gating = 0; | |
790 | pdata->vbus = NULL; | |
791 | } | |
792 | } | |
793 | ||
794 | if (pdata->disable_otg_clock_gating) | |
795 | mvotg->clock_gating = 0; | |
796 | ||
797 | mv_otg_reset(mvotg); | |
798 | mv_otg_init_irq(mvotg); | |
799 | ||
800 | r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0); | |
801 | if (r == NULL) { | |
802 | dev_err(&pdev->dev, "no IRQ resource defined\n"); | |
803 | retval = -ENODEV; | |
804 | goto err_disable_clk; | |
805 | } | |
806 | ||
807 | mvotg->irq = r->start; | |
fb3dfe13 | 808 | if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED, |
277164f0 NZ |
809 | driver_name, mvotg)) { |
810 | dev_err(&pdev->dev, "Request irq %d for OTG failed\n", | |
811 | mvotg->irq); | |
812 | mvotg->irq = 0; | |
813 | retval = -ENODEV; | |
814 | goto err_disable_clk; | |
815 | } | |
816 | ||
662dca54 | 817 | retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2); |
277164f0 NZ |
818 | if (retval < 0) { |
819 | dev_err(&pdev->dev, "can't register transceiver, %d\n", | |
820 | retval); | |
fb3dfe13 | 821 | goto err_disable_clk; |
277164f0 NZ |
822 | } |
823 | ||
824 | retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group); | |
825 | if (retval < 0) { | |
826 | dev_dbg(&pdev->dev, | |
827 | "Can't register sysfs attr group: %d\n", retval); | |
fb3dfe13 | 828 | goto err_remove_phy; |
277164f0 NZ |
829 | } |
830 | ||
831 | spin_lock_init(&mvotg->wq_lock); | |
832 | if (spin_trylock(&mvotg->wq_lock)) { | |
833 | mv_otg_run_state_machine(mvotg, 2 * HZ); | |
834 | spin_unlock(&mvotg->wq_lock); | |
835 | } | |
836 | ||
837 | dev_info(&pdev->dev, | |
838 | "successful probe OTG device %s clock gating.\n", | |
839 | mvotg->clock_gating ? "with" : "without"); | |
840 | ||
841 | return 0; | |
842 | ||
fb3dfe13 | 843 | err_remove_phy: |
662dca54 | 844 | usb_remove_phy(&mvotg->phy); |
277164f0 | 845 | err_disable_clk: |
277164f0 | 846 | mv_otg_disable_internal(mvotg); |
277164f0 NZ |
847 | err_destroy_workqueue: |
848 | flush_workqueue(mvotg->qwork); | |
849 | destroy_workqueue(mvotg->qwork); | |
277164f0 | 850 | |
277164f0 NZ |
851 | return retval; |
852 | } | |
853 | ||
854 | #ifdef CONFIG_PM | |
855 | static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state) | |
856 | { | |
857 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
858 | ||
b1c711d6 | 859 | if (mvotg->phy.state != OTG_STATE_B_IDLE) { |
277164f0 NZ |
860 | dev_info(&pdev->dev, |
861 | "OTG state is not B_IDLE, it is %d!\n", | |
b1c711d6 | 862 | mvotg->phy.state); |
277164f0 NZ |
863 | return -EAGAIN; |
864 | } | |
865 | ||
866 | if (!mvotg->clock_gating) | |
867 | mv_otg_disable_internal(mvotg); | |
868 | ||
869 | return 0; | |
870 | } | |
871 | ||
872 | static int mv_otg_resume(struct platform_device *pdev) | |
873 | { | |
874 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
875 | u32 otgsc; | |
876 | ||
877 | if (!mvotg->clock_gating) { | |
878 | mv_otg_enable_internal(mvotg); | |
879 | ||
880 | otgsc = readl(&mvotg->op_regs->otgsc); | |
881 | otgsc |= mvotg->irq_en; | |
882 | writel(otgsc, &mvotg->op_regs->otgsc); | |
883 | ||
884 | if (spin_trylock(&mvotg->wq_lock)) { | |
885 | mv_otg_run_state_machine(mvotg, 0); | |
886 | spin_unlock(&mvotg->wq_lock); | |
887 | } | |
888 | } | |
889 | return 0; | |
890 | } | |
891 | #endif | |
892 | ||
893 | static struct platform_driver mv_otg_driver = { | |
894 | .probe = mv_otg_probe, | |
d07f4a82 | 895 | .remove = mv_otg_remove, |
277164f0 NZ |
896 | .driver = { |
897 | .owner = THIS_MODULE, | |
898 | .name = driver_name, | |
899 | }, | |
900 | #ifdef CONFIG_PM | |
901 | .suspend = mv_otg_suspend, | |
902 | .resume = mv_otg_resume, | |
903 | #endif | |
904 | }; | |
ca21dda6 | 905 | module_platform_driver(mv_otg_driver); |