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257e02d8 TT |
1 | /* Ravenscar x86-64 target support. |
2 | ||
3666a048 | 3 | Copyright (C) 2020-2021 Free Software Foundation, Inc. |
257e02d8 TT |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "gdbarch.h" | |
22 | #include "gdbcore.h" | |
23 | #include "regcache.h" | |
24 | #include "amd64-tdep.h" | |
25 | #include "inferior.h" | |
26 | #include "ravenscar-thread.h" | |
27 | #include "amd64-ravenscar-thread.h" | |
28 | ||
29 | struct amd64_ravenscar_ops : public ravenscar_arch_ops | |
30 | { | |
31 | void fetch_registers (struct regcache *regcache, int regnum) override; | |
32 | void store_registers (struct regcache *regcache, int regnum) override; | |
33 | ||
34 | private: | |
35 | ||
36 | /* Return the offset of the register in the context buffer. */ | |
37 | int register_offset (struct gdbarch *arch, int regnum); | |
38 | }; | |
39 | ||
40 | /* x86-64 Ravenscar stores registers as: | |
41 | ||
42 | type Context_Buffer is record | |
43 | RIP : System.Address; | |
44 | RFLAGS : EFLAGS; | |
45 | RSP : System.Address; | |
46 | ||
47 | RBX : System.Address; | |
48 | RBP : System.Address; | |
49 | R12 : System.Address; | |
50 | R13 : System.Address; | |
51 | R14 : System.Address; | |
52 | R15 : System.Address; | |
53 | end record; | |
54 | */ | |
55 | static const int register_layout[] = | |
56 | { | |
57 | AMD64_RIP_REGNUM, | |
58 | AMD64_EFLAGS_REGNUM, | |
59 | AMD64_RSP_REGNUM, | |
60 | AMD64_RBX_REGNUM, | |
61 | AMD64_RBP_REGNUM, | |
62 | AMD64_R12_REGNUM, | |
63 | AMD64_R13_REGNUM, | |
64 | AMD64_R14_REGNUM, | |
65 | AMD64_R15_REGNUM, | |
66 | }; | |
67 | ||
68 | int | |
69 | amd64_ravenscar_ops::register_offset (struct gdbarch *arch, int regnum) | |
70 | { | |
71 | for (int i = 0; i < ARRAY_SIZE (register_layout); ++i) | |
72 | if (register_layout[i] == regnum) | |
73 | return i * 8; | |
74 | /* Not saved. */ | |
75 | return -1; | |
76 | } | |
77 | ||
78 | /* Supply register REGNUM, which has been saved at REGISTER_ADDR, to | |
79 | the regcache. */ | |
80 | ||
81 | static void | |
82 | supply_register_at_address (struct regcache *regcache, int regnum, | |
83 | CORE_ADDR register_addr) | |
84 | { | |
85 | struct gdbarch *gdbarch = regcache->arch (); | |
86 | int buf_size = register_size (gdbarch, regnum); | |
87 | gdb_byte *buf; | |
88 | ||
89 | buf = (gdb_byte *) alloca (buf_size); | |
90 | read_memory (register_addr, buf, buf_size); | |
91 | regcache->raw_supply (regnum, buf); | |
92 | } | |
93 | ||
94 | void | |
95 | amd64_ravenscar_ops::fetch_registers (struct regcache *regcache, int regnum) | |
96 | { | |
97 | struct gdbarch *gdbarch = regcache->arch (); | |
98 | const int num_regs = gdbarch_num_regs (gdbarch); | |
99 | int current_regnum; | |
100 | CORE_ADDR current_address; | |
101 | CORE_ADDR thread_descriptor_address; | |
102 | ||
103 | /* The tid is the thread_id field, which is a pointer to the thread. */ | |
104 | thread_descriptor_address = (CORE_ADDR) inferior_ptid.tid (); | |
105 | ||
106 | /* Read registers. */ | |
107 | for (current_regnum = 0; current_regnum < num_regs; current_regnum++) | |
108 | { | |
109 | int offset = register_offset (gdbarch, current_regnum); | |
110 | ||
111 | if (offset != -1) | |
112 | { | |
113 | current_address = thread_descriptor_address + offset; | |
114 | supply_register_at_address (regcache, current_regnum, | |
115 | current_address); | |
116 | } | |
117 | } | |
118 | } | |
119 | ||
120 | void | |
121 | amd64_ravenscar_ops::store_registers (struct regcache *regcache, int regnum) | |
122 | { | |
123 | struct gdbarch *gdbarch = regcache->arch (); | |
124 | int buf_size = register_size (gdbarch, regnum); | |
125 | gdb_byte buf[buf_size]; | |
126 | CORE_ADDR register_address; | |
127 | ||
128 | int offset = register_offset (gdbarch, regnum); | |
129 | if (offset != -1) | |
130 | { | |
131 | register_address = inferior_ptid.tid () + offset; | |
132 | ||
133 | regcache->raw_collect (regnum, buf); | |
134 | write_memory (register_address, | |
135 | buf, | |
136 | buf_size); | |
137 | } | |
138 | } | |
139 | ||
140 | /* The ravenscar_arch_ops vector for AMD64 targets. */ | |
141 | ||
142 | static struct amd64_ravenscar_ops amd64_ravenscar_ops; | |
143 | ||
144 | /* Register amd64_ravenscar_ops in GDBARCH. */ | |
145 | ||
146 | void | |
147 | register_amd64_ravenscar_ops (struct gdbarch *gdbarch) | |
148 | { | |
149 | set_gdbarch_ravenscar_ops (gdbarch, &amd64_ravenscar_ops); | |
150 | } |