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1 | /****************************************************************************** |
2 | * | |
3 | * Name: actbl71.h - IA-64 Extensions to the ACPI Spec Rev. 0.71 | |
4 | * This file includes tables specific to this | |
5 | * specification revision. | |
6 | * | |
7 | *****************************************************************************/ | |
8 | ||
9 | /* | |
10 | * Copyright (C) 2000 - 2003, R. Byron Moore | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __ACTBL71_H__ | |
28 | #define __ACTBL71_H__ | |
29 | ||
1da177e4 LT |
30 | /* 0.71 FADT address_space data item bitmasks defines */ |
31 | /* If the associated bit is zero then it is in memory space else in io space */ | |
32 | ||
33 | #define SMI_CMD_ADDRESS_SPACE 0x01 | |
34 | #define PM1_BLK_ADDRESS_SPACE 0x02 | |
35 | #define PM2_CNT_BLK_ADDRESS_SPACE 0x04 | |
36 | #define PM_TMR_BLK_ADDRESS_SPACE 0x08 | |
37 | #define GPE0_BLK_ADDRESS_SPACE 0x10 | |
38 | #define GPE1_BLK_ADDRESS_SPACE 0x20 | |
39 | ||
40 | /* Only for clarity in declarations */ | |
41 | ||
4be44fcd | 42 | typedef u64 IO_ADDRESS; |
1da177e4 LT |
43 | |
44 | #pragma pack(1) | |
4be44fcd LB |
45 | struct { /* Root System Descriptor Pointer */ |
46 | NATIVE_CHAR signature[8]; /* contains "RSD PTR " */ | |
47 | u8 checksum; /* to make sum of struct == 0 */ | |
48 | NATIVE_CHAR oem_id[6]; /* OEM identification */ | |
49 | u8 reserved; /* Must be 0 for 1.0, 2 for 2.0 */ | |
50 | u64 rsdt_physical_address; /* 64-bit physical address of RSDT */ | |
1da177e4 LT |
51 | }; |
52 | ||
1da177e4 LT |
53 | /*****************************************/ |
54 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ | |
55 | /* for the Root System Description Table */ | |
56 | /*****************************************/ | |
4be44fcd LB |
57 | struct { |
58 | struct acpi_table_header header; /* Table header */ | |
59 | u32 reserved_pad; /* IA64 alignment, must be 0 */ | |
60 | u64 table_offset_entry[1]; /* Array of pointers to other */ | |
61 | /* tables' headers */ | |
1da177e4 LT |
62 | }; |
63 | ||
1da177e4 LT |
64 | /*******************************************/ |
65 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ | |
66 | /* for the Firmware ACPI Control Structure */ | |
67 | /*******************************************/ | |
4be44fcd LB |
68 | struct { |
69 | NATIVE_CHAR signature[4]; /* signature "FACS" */ | |
70 | u32 length; /* length of structure, in bytes */ | |
71 | u32 hardware_signature; /* hardware configuration signature */ | |
72 | u32 reserved4; /* must be 0 */ | |
73 | u64 firmware_waking_vector; /* ACPI OS waking vector */ | |
74 | u64 global_lock; /* Global Lock */ | |
75 | u32 S4bios_f:1; /* Indicates if S4BIOS support is present */ | |
76 | u32 reserved1:31; /* must be 0 */ | |
77 | u8 reserved3[28]; /* reserved - must be zero */ | |
1da177e4 LT |
78 | }; |
79 | ||
1da177e4 LT |
80 | /******************************************/ |
81 | /* IA64 Extensions to ACPI Spec Rev 0.71 */ | |
82 | /* for the Fixed ACPI Description Table */ | |
83 | /******************************************/ | |
4be44fcd LB |
84 | struct { |
85 | struct acpi_table_header header; /* table header */ | |
86 | u32 reserved_pad; /* IA64 alignment, must be 0 */ | |
87 | u64 firmware_ctrl; /* 64-bit Physical address of FACS */ | |
88 | u64 dsdt; /* 64-bit Physical address of DSDT */ | |
89 | u8 model; /* System Interrupt Model */ | |
90 | u8 address_space; /* Address Space Bitmask */ | |
91 | u16 sci_int; /* System vector of SCI interrupt */ | |
92 | u8 acpi_enable; /* value to write to smi_cmd to enable ACPI */ | |
93 | u8 acpi_disable; /* value to write to smi_cmd to disable ACPI */ | |
94 | u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ | |
95 | u8 reserved2; /* reserved - must be zero */ | |
96 | u64 smi_cmd; /* Port address of SMI command port */ | |
97 | u64 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ | |
98 | u64 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ | |
99 | u64 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ | |
100 | u64 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ | |
101 | u64 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ | |
102 | u64 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ | |
103 | u64 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ | |
104 | u64 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ | |
105 | u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ | |
106 | u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ | |
107 | u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ | |
108 | u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ | |
109 | u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ | |
110 | u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ | |
111 | u8 gpe1_base; /* offset in gpe model where gpe1 events start */ | |
112 | u8 reserved3; /* reserved */ | |
113 | u16 plvl2_lat; /* worst case HW latency to enter/exit C2 state */ | |
114 | u16 plvl3_lat; /* worst case HW latency to enter/exit C3 state */ | |
115 | u8 day_alrm; /* index to day-of-month alarm in RTC CMOS RAM */ | |
116 | u8 mon_alrm; /* index to month-of-year alarm in RTC CMOS RAM */ | |
117 | u8 century; /* index to century in RTC CMOS RAM */ | |
118 | u8 reserved4; /* reserved */ | |
119 | u32 flush_cash:1; /* PAL_FLUSH_CACHE is correctly supported */ | |
120 | u32 reserved5:1; /* reserved - must be zero */ | |
121 | u32 proc_c1:1; /* all processors support C1 state */ | |
122 | u32 plvl2_up:1; /* C2 state works on MP system */ | |
123 | u32 pwr_button:1; /* Power button is handled as a generic feature */ | |
124 | u32 sleep_button:1; /* Sleep button is handled as a generic feature, or not present */ | |
125 | u32 fixed_rTC:1; /* RTC wakeup stat not in fixed register space */ | |
126 | u32 rtcs4:1; /* RTC wakeup stat not possible from S4 */ | |
127 | u32 tmr_val_ext:1; /* tmr_val is 32 bits */ | |
128 | u32 dock_cap:1; /* Supports Docking */ | |
129 | u32 reserved6:22; /* reserved - must be zero */ | |
1da177e4 LT |
130 | }; |
131 | ||
132 | #pragma pack() | |
133 | ||
4be44fcd | 134 | #endif /* __ACTBL71_H__ */ |