Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _ALPHA_BYTEORDER_H |
2 | #define _ALPHA_BYTEORDER_H | |
3 | ||
4 | #include <asm/types.h> | |
5 | #include <linux/compiler.h> | |
6 | #include <asm/compiler.h> | |
7 | ||
8 | #ifdef __GNUC__ | |
9 | ||
10 | static __inline __attribute_const__ __u32 __arch__swab32(__u32 x) | |
11 | { | |
12 | /* | |
13 | * Unfortunately, we can't use the 6 instruction sequence | |
14 | * on ev6 since the latency of the UNPKBW is 3, which is | |
15 | * pretty hard to hide. Just in case a future implementation | |
16 | * has a lower latency, here's the sequence (also by Mike Burrows) | |
17 | * | |
18 | * UNPKBW a0, v0 v0: 00AA00BB00CC00DD | |
19 | * SLL v0, 24, a0 a0: BB00CC00DD000000 | |
20 | * BIS v0, a0, a0 a0: BBAACCBBDDCC00DD | |
21 | * EXTWL a0, 6, v0 v0: 000000000000BBAA | |
22 | * ZAP a0, 0xf3, a0 a0: 00000000DDCC0000 | |
23 | * ADDL a0, v0, v0 v0: ssssssssDDCCBBAA | |
24 | */ | |
25 | ||
26 | __u64 t0, t1, t2, t3; | |
27 | ||
28 | t0 = __kernel_inslh(x, 7); /* t0 : 0000000000AABBCC */ | |
29 | t1 = __kernel_inswl(x, 3); /* t1 : 000000CCDD000000 */ | |
30 | t1 |= t0; /* t1 : 000000CCDDAABBCC */ | |
31 | t2 = t1 >> 16; /* t2 : 0000000000CCDDAA */ | |
32 | t0 = t1 & 0xFF00FF00; /* t0 : 00000000DD00BB00 */ | |
33 | t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ | |
34 | t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */ | |
35 | ||
36 | return t1; | |
37 | } | |
38 | ||
39 | #define __arch__swab32 __arch__swab32 | |
40 | ||
41 | #endif /* __GNUC__ */ | |
42 | ||
43 | #define __BYTEORDER_HAS_U64__ | |
44 | ||
45 | #include <linux/byteorder/little_endian.h> | |
46 | ||
47 | #endif /* _ALPHA_BYTEORDER_H */ |