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1da177e4 LT |
1 | #ifndef ASMARM_DMA_MAPPING_H |
2 | #define ASMARM_DMA_MAPPING_H | |
3 | ||
4 | #ifdef __KERNEL__ | |
5 | ||
1da177e4 LT |
6 | #include <linux/mm.h> /* need struct page */ |
7 | ||
8 | #include <asm/scatterlist.h> | |
9 | ||
10 | /* | |
11 | * DMA-consistent mapping functions. These allocate/free a region of | |
12 | * uncached, unwrite-buffered mapped memory space for use with DMA | |
13 | * devices. This is the "generic" version. The PCI specific version | |
14 | * is in pci.h | |
15 | */ | |
16 | extern void consistent_sync(void *kaddr, size_t size, int rw); | |
17 | ||
18 | /* | |
19 | * Return whether the given device DMA address mask can be supported | |
20 | * properly. For example, if your device can only drive the low 24-bits | |
21 | * during bus mastering, then you would pass 0x00ffffff as the mask | |
22 | * to this function. | |
7a228aaa | 23 | * |
24 | * FIXME: This should really be a platform specific issue - we should | |
25 | * return false if GFP_DMA allocations may not satisfy the supplied 'mask'. | |
1da177e4 LT |
26 | */ |
27 | static inline int dma_supported(struct device *dev, u64 mask) | |
28 | { | |
29 | return dev->dma_mask && *dev->dma_mask != 0; | |
30 | } | |
31 | ||
32 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) | |
33 | { | |
34 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | |
35 | return -EIO; | |
36 | ||
37 | *dev->dma_mask = dma_mask; | |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
42 | static inline int dma_get_cache_alignment(void) | |
43 | { | |
44 | return 32; | |
45 | } | |
46 | ||
47 | static inline int dma_is_consistent(dma_addr_t handle) | |
48 | { | |
23759dc6 | 49 | return !!arch_is_coherent(); |
1da177e4 LT |
50 | } |
51 | ||
52 | /* | |
53 | * DMA errors are defined by all-bits-set in the DMA address. | |
54 | */ | |
55 | static inline int dma_mapping_error(dma_addr_t dma_addr) | |
56 | { | |
57 | return dma_addr == ~0; | |
58 | } | |
59 | ||
60 | /** | |
61 | * dma_alloc_coherent - allocate consistent memory for DMA | |
62 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
63 | * @size: required memory size | |
64 | * @handle: bus-specific DMA address | |
65 | * | |
66 | * Allocate some uncached, unbuffered memory for a device for | |
67 | * performing DMA. This function allocates pages, and will | |
68 | * return the CPU-viewed address, and sets @handle to be the | |
69 | * device-viewed address. | |
70 | */ | |
71 | extern void * | |
f9e3214a | 72 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); |
1da177e4 LT |
73 | |
74 | /** | |
75 | * dma_free_coherent - free memory allocated by dma_alloc_coherent | |
76 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
77 | * @size: size of memory originally requested in dma_alloc_coherent | |
78 | * @cpu_addr: CPU-view address returned from dma_alloc_coherent | |
79 | * @handle: device-view address returned from dma_alloc_coherent | |
80 | * | |
81 | * Free (and unmap) a DMA buffer previously allocated by | |
82 | * dma_alloc_coherent(). | |
83 | * | |
84 | * References to memory and mappings associated with cpu_addr/handle | |
85 | * during and after this call executing are illegal. | |
86 | */ | |
87 | extern void | |
88 | dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, | |
89 | dma_addr_t handle); | |
90 | ||
91 | /** | |
92 | * dma_mmap_coherent - map a coherent DMA allocation into user space | |
93 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
94 | * @vma: vm_area_struct describing requested user mapping | |
95 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent | |
96 | * @handle: device-view address returned from dma_alloc_coherent | |
97 | * @size: size of memory originally requested in dma_alloc_coherent | |
98 | * | |
99 | * Map a coherent DMA buffer previously allocated by dma_alloc_coherent | |
100 | * into user space. The coherent DMA buffer must not be freed by the | |
101 | * driver until the user space mapping has been released. | |
102 | */ | |
103 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, | |
104 | void *cpu_addr, dma_addr_t handle, size_t size); | |
105 | ||
106 | ||
107 | /** | |
108 | * dma_alloc_writecombine - allocate writecombining memory for DMA | |
109 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
110 | * @size: required memory size | |
111 | * @handle: bus-specific DMA address | |
112 | * | |
113 | * Allocate some uncached, buffered memory for a device for | |
114 | * performing DMA. This function allocates pages, and will | |
115 | * return the CPU-viewed address, and sets @handle to be the | |
116 | * device-viewed address. | |
117 | */ | |
118 | extern void * | |
f9e3214a | 119 | dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); |
1da177e4 LT |
120 | |
121 | #define dma_free_writecombine(dev,size,cpu_addr,handle) \ | |
122 | dma_free_coherent(dev,size,cpu_addr,handle) | |
123 | ||
124 | int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, | |
125 | void *cpu_addr, dma_addr_t handle, size_t size); | |
126 | ||
127 | ||
128 | /** | |
129 | * dma_map_single - map a single buffer for streaming DMA | |
130 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
131 | * @cpu_addr: CPU direct mapped address of buffer | |
132 | * @size: size of buffer to map | |
133 | * @dir: DMA transfer direction | |
134 | * | |
135 | * Ensure that any data held in the cache is appropriately discarded | |
136 | * or written back. | |
137 | * | |
138 | * The device owns this memory once this call has completed. The CPU | |
139 | * can regain ownership by calling dma_unmap_single() or | |
140 | * dma_sync_single_for_cpu(). | |
141 | */ | |
142 | #ifndef CONFIG_DMABOUNCE | |
143 | static inline dma_addr_t | |
144 | dma_map_single(struct device *dev, void *cpu_addr, size_t size, | |
145 | enum dma_data_direction dir) | |
146 | { | |
23759dc6 LB |
147 | if (!arch_is_coherent()) |
148 | consistent_sync(cpu_addr, size, dir); | |
149 | ||
1da177e4 LT |
150 | return virt_to_dma(dev, (unsigned long)cpu_addr); |
151 | } | |
152 | #else | |
153 | extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction); | |
154 | #endif | |
155 | ||
156 | /** | |
157 | * dma_map_page - map a portion of a page for streaming DMA | |
158 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
159 | * @page: page that buffer resides in | |
160 | * @offset: offset into page for start of buffer | |
161 | * @size: size of buffer to map | |
162 | * @dir: DMA transfer direction | |
163 | * | |
164 | * Ensure that any data held in the cache is appropriately discarded | |
165 | * or written back. | |
166 | * | |
167 | * The device owns this memory once this call has completed. The CPU | |
168 | * can regain ownership by calling dma_unmap_page() or | |
169 | * dma_sync_single_for_cpu(). | |
170 | */ | |
171 | static inline dma_addr_t | |
172 | dma_map_page(struct device *dev, struct page *page, | |
173 | unsigned long offset, size_t size, | |
174 | enum dma_data_direction dir) | |
175 | { | |
176 | return dma_map_single(dev, page_address(page) + offset, size, (int)dir); | |
177 | } | |
178 | ||
179 | /** | |
180 | * dma_unmap_single - unmap a single buffer previously mapped | |
181 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
182 | * @handle: DMA address of buffer | |
183 | * @size: size of buffer to map | |
184 | * @dir: DMA transfer direction | |
185 | * | |
186 | * Unmap a single streaming mode DMA translation. The handle and size | |
187 | * must match what was provided in the previous dma_map_single() call. | |
188 | * All other usages are undefined. | |
189 | * | |
190 | * After this call, reads by the CPU to the buffer are guaranteed to see | |
191 | * whatever the device wrote there. | |
192 | */ | |
193 | #ifndef CONFIG_DMABOUNCE | |
194 | static inline void | |
195 | dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size, | |
196 | enum dma_data_direction dir) | |
197 | { | |
198 | /* nothing to do */ | |
199 | } | |
200 | #else | |
201 | extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction); | |
202 | #endif | |
203 | ||
204 | /** | |
205 | * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() | |
206 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
207 | * @handle: DMA address of buffer | |
208 | * @size: size of buffer to map | |
209 | * @dir: DMA transfer direction | |
210 | * | |
211 | * Unmap a single streaming mode DMA translation. The handle and size | |
212 | * must match what was provided in the previous dma_map_single() call. | |
213 | * All other usages are undefined. | |
214 | * | |
215 | * After this call, reads by the CPU to the buffer are guaranteed to see | |
216 | * whatever the device wrote there. | |
217 | */ | |
218 | static inline void | |
219 | dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, | |
220 | enum dma_data_direction dir) | |
221 | { | |
222 | dma_unmap_single(dev, handle, size, (int)dir); | |
223 | } | |
224 | ||
225 | /** | |
226 | * dma_map_sg - map a set of SG buffers for streaming mode DMA | |
227 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
228 | * @sg: list of buffers | |
229 | * @nents: number of buffers to map | |
230 | * @dir: DMA transfer direction | |
231 | * | |
232 | * Map a set of buffers described by scatterlist in streaming | |
233 | * mode for DMA. This is the scatter-gather version of the | |
234 | * above dma_map_single interface. Here the scatter gather list | |
235 | * elements are each tagged with the appropriate dma address | |
236 | * and length. They are obtained via sg_dma_{address,length}(SG). | |
237 | * | |
238 | * NOTE: An implementation may be able to use a smaller number of | |
239 | * DMA address/length pairs than there are SG table elements. | |
240 | * (for example via virtual mapping capabilities) | |
241 | * The routine returns the number of addr/length pairs actually | |
242 | * used, at most nents. | |
243 | * | |
244 | * Device ownership issues as mentioned above for dma_map_single are | |
245 | * the same here. | |
246 | */ | |
247 | #ifndef CONFIG_DMABOUNCE | |
248 | static inline int | |
249 | dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |
250 | enum dma_data_direction dir) | |
251 | { | |
252 | int i; | |
253 | ||
254 | for (i = 0; i < nents; i++, sg++) { | |
255 | char *virt; | |
256 | ||
257 | sg->dma_address = page_to_dma(dev, sg->page) + sg->offset; | |
258 | virt = page_address(sg->page) + sg->offset; | |
23759dc6 LB |
259 | |
260 | if (!arch_is_coherent()) | |
261 | consistent_sync(virt, sg->length, dir); | |
1da177e4 LT |
262 | } |
263 | ||
264 | return nents; | |
265 | } | |
266 | #else | |
267 | extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); | |
268 | #endif | |
269 | ||
270 | /** | |
271 | * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg | |
272 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
273 | * @sg: list of buffers | |
274 | * @nents: number of buffers to map | |
275 | * @dir: DMA transfer direction | |
276 | * | |
277 | * Unmap a set of streaming mode DMA translations. | |
278 | * Again, CPU read rules concerning calls here are the same as for | |
279 | * dma_unmap_single() above. | |
280 | */ | |
281 | #ifndef CONFIG_DMABOUNCE | |
282 | static inline void | |
283 | dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, | |
284 | enum dma_data_direction dir) | |
285 | { | |
286 | ||
287 | /* nothing to do */ | |
288 | } | |
289 | #else | |
290 | extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); | |
291 | #endif | |
292 | ||
293 | ||
294 | /** | |
295 | * dma_sync_single_for_cpu | |
296 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
297 | * @handle: DMA address of buffer | |
298 | * @size: size of buffer to map | |
299 | * @dir: DMA transfer direction | |
300 | * | |
301 | * Make physical memory consistent for a single streaming mode DMA | |
302 | * translation after a transfer. | |
303 | * | |
304 | * If you perform a dma_map_single() but wish to interrogate the | |
305 | * buffer using the cpu, yet do not wish to teardown the PCI dma | |
306 | * mapping, you must call this function before doing so. At the | |
307 | * next point you give the PCI dma address back to the card, you | |
308 | * must first the perform a dma_sync_for_device, and then the | |
309 | * device again owns the buffer. | |
310 | */ | |
311 | #ifndef CONFIG_DMABOUNCE | |
312 | static inline void | |
313 | dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, | |
314 | enum dma_data_direction dir) | |
315 | { | |
23759dc6 LB |
316 | if (!arch_is_coherent()) |
317 | consistent_sync((void *)dma_to_virt(dev, handle), size, dir); | |
1da177e4 LT |
318 | } |
319 | ||
320 | static inline void | |
321 | dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, | |
322 | enum dma_data_direction dir) | |
323 | { | |
23759dc6 LB |
324 | if (!arch_is_coherent()) |
325 | consistent_sync((void *)dma_to_virt(dev, handle), size, dir); | |
1da177e4 LT |
326 | } |
327 | #else | |
328 | extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); | |
329 | extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction); | |
330 | #endif | |
331 | ||
332 | ||
333 | /** | |
334 | * dma_sync_sg_for_cpu | |
335 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
336 | * @sg: list of buffers | |
337 | * @nents: number of buffers to map | |
338 | * @dir: DMA transfer direction | |
339 | * | |
340 | * Make physical memory consistent for a set of streaming | |
341 | * mode DMA translations after a transfer. | |
342 | * | |
343 | * The same as dma_sync_single_for_* but for a scatter-gather list, | |
344 | * same rules and usage. | |
345 | */ | |
346 | #ifndef CONFIG_DMABOUNCE | |
347 | static inline void | |
348 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, | |
349 | enum dma_data_direction dir) | |
350 | { | |
351 | int i; | |
352 | ||
353 | for (i = 0; i < nents; i++, sg++) { | |
354 | char *virt = page_address(sg->page) + sg->offset; | |
23759dc6 LB |
355 | if (!arch_is_coherent()) |
356 | consistent_sync(virt, sg->length, dir); | |
1da177e4 LT |
357 | } |
358 | } | |
359 | ||
360 | static inline void | |
361 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, | |
362 | enum dma_data_direction dir) | |
363 | { | |
364 | int i; | |
365 | ||
366 | for (i = 0; i < nents; i++, sg++) { | |
367 | char *virt = page_address(sg->page) + sg->offset; | |
23759dc6 LB |
368 | if (!arch_is_coherent()) |
369 | consistent_sync(virt, sg->length, dir); | |
1da177e4 LT |
370 | } |
371 | } | |
372 | #else | |
373 | extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction); | |
374 | extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction); | |
375 | #endif | |
376 | ||
377 | #ifdef CONFIG_DMABOUNCE | |
378 | /* | |
379 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" | |
380 | * and utilize bounce buffers as needed to work around limited DMA windows. | |
381 | * | |
382 | * On the SA-1111, a bug limits DMA to only certain regions of RAM. | |
383 | * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) | |
384 | * On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM) | |
385 | * | |
386 | * The following are helper functions used by the dmabounce subystem | |
387 | * | |
388 | */ | |
389 | ||
390 | /** | |
391 | * dmabounce_register_dev | |
392 | * | |
393 | * @dev: valid struct device pointer | |
394 | * @small_buf_size: size of buffers to use with small buffer pool | |
395 | * @large_buf_size: size of buffers to use with large buffer pool (can be 0) | |
396 | * | |
397 | * This function should be called by low-level platform code to register | |
398 | * a device as requireing DMA buffer bouncing. The function will allocate | |
399 | * appropriate DMA pools for the device. | |
400 | * | |
401 | */ | |
402 | extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long); | |
403 | ||
404 | /** | |
405 | * dmabounce_unregister_dev | |
406 | * | |
407 | * @dev: valid struct device pointer | |
408 | * | |
409 | * This function should be called by low-level platform code when device | |
410 | * that was previously registered with dmabounce_register_dev is removed | |
411 | * from the system. | |
412 | * | |
413 | */ | |
414 | extern void dmabounce_unregister_dev(struct device *); | |
415 | ||
416 | /** | |
417 | * dma_needs_bounce | |
418 | * | |
419 | * @dev: valid struct device pointer | |
420 | * @dma_handle: dma_handle of unbounced buffer | |
421 | * @size: size of region being mapped | |
422 | * | |
423 | * Platforms that utilize the dmabounce mechanism must implement | |
424 | * this function. | |
425 | * | |
426 | * The dmabounce routines call this function whenever a dma-mapping | |
427 | * is requested to determine whether a given buffer needs to be bounced | |
428 | * or not. The function must return 0 if the the buffer is OK for | |
429 | * DMA access and 1 if the buffer needs to be bounced. | |
430 | * | |
431 | */ | |
432 | extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); | |
433 | #endif /* CONFIG_DMABOUNCE */ | |
434 | ||
435 | #endif /* __KERNEL__ */ | |
436 | #endif |