thp, x86: introduce HAVE_ARCH_TRANSPARENT_HUGEPAGE
[deliverable/linux.git] / include / asm-generic / pgtable.h
CommitLineData
1da177e4
LT
1#ifndef _ASM_GENERIC_PGTABLE_H
2#define _ASM_GENERIC_PGTABLE_H
3
673eae82 4#ifndef __ASSEMBLY__
9535239f 5#ifdef CONFIG_MMU
673eae82 6
fbd71844 7#include <linux/mm_types.h>
187f1882 8#include <linux/bug.h>
fbd71844 9
1da177e4 10#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
e2cda322
AA
11extern int ptep_set_access_flags(struct vm_area_struct *vma,
12 unsigned long address, pte_t *ptep,
13 pte_t entry, int dirty);
14#endif
15
16#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
17extern int pmdp_set_access_flags(struct vm_area_struct *vma,
18 unsigned long address, pmd_t *pmdp,
19 pmd_t entry, int dirty);
1da177e4
LT
20#endif
21
22#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
e2cda322
AA
23static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
24 unsigned long address,
25 pte_t *ptep)
26{
27 pte_t pte = *ptep;
28 int r = 1;
29 if (!pte_young(pte))
30 r = 0;
31 else
32 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
33 return r;
34}
35#endif
36
37#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
38#ifdef CONFIG_TRANSPARENT_HUGEPAGE
39static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
40 unsigned long address,
41 pmd_t *pmdp)
42{
43 pmd_t pmd = *pmdp;
44 int r = 1;
45 if (!pmd_young(pmd))
46 r = 0;
47 else
48 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
49 return r;
50}
51#else /* CONFIG_TRANSPARENT_HUGEPAGE */
52static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
53 unsigned long address,
54 pmd_t *pmdp)
55{
56 BUG();
57 return 0;
58}
59#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
60#endif
61
62#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
e2cda322
AA
63int ptep_clear_flush_young(struct vm_area_struct *vma,
64 unsigned long address, pte_t *ptep);
65#endif
66
67#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
68int pmdp_clear_flush_young(struct vm_area_struct *vma,
69 unsigned long address, pmd_t *pmdp);
1da177e4
LT
70#endif
71
1da177e4 72#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
e2cda322
AA
73static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
74 unsigned long address,
75 pte_t *ptep)
76{
77 pte_t pte = *ptep;
78 pte_clear(mm, address, ptep);
79 return pte;
80}
81#endif
82
83#ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
84#ifdef CONFIG_TRANSPARENT_HUGEPAGE
85static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
86 unsigned long address,
87 pmd_t *pmdp)
88{
89 pmd_t pmd = *pmdp;
90 pmd_clear(mm, address, pmdp);
91 return pmd;
49b24d6b 92}
e2cda322 93#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
94#endif
95
a600388d 96#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
e2cda322
AA
97static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
98 unsigned long address, pte_t *ptep,
99 int full)
100{
101 pte_t pte;
102 pte = ptep_get_and_clear(mm, address, ptep);
103 return pte;
104}
a600388d
ZA
105#endif
106
9888a1ca
ZA
107/*
108 * Some architectures may be able to avoid expensive synchronization
109 * primitives when modifications are made to PTE's which are already
110 * not present, or in the process of an address space destruction.
111 */
112#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
e2cda322
AA
113static inline void pte_clear_not_present_full(struct mm_struct *mm,
114 unsigned long address,
115 pte_t *ptep,
116 int full)
117{
118 pte_clear(mm, address, ptep);
119}
a600388d
ZA
120#endif
121
1da177e4 122#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
e2cda322
AA
123extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
124 unsigned long address,
125 pte_t *ptep);
126#endif
127
128#ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
129extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
130 unsigned long address,
131 pmd_t *pmdp);
1da177e4
LT
132#endif
133
134#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
8c65b4a6 135struct mm_struct;
1da177e4
LT
136static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
137{
138 pte_t old_pte = *ptep;
139 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
140}
141#endif
142
e2cda322
AA
143#ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
144#ifdef CONFIG_TRANSPARENT_HUGEPAGE
145static inline void pmdp_set_wrprotect(struct mm_struct *mm,
146 unsigned long address, pmd_t *pmdp)
147{
148 pmd_t old_pmd = *pmdp;
149 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
150}
151#else /* CONFIG_TRANSPARENT_HUGEPAGE */
152static inline void pmdp_set_wrprotect(struct mm_struct *mm,
153 unsigned long address, pmd_t *pmdp)
154{
155 BUG();
156}
157#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
158#endif
159
160#ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
73636b1a
CM
161extern void pmdp_splitting_flush(struct vm_area_struct *vma,
162 unsigned long address, pmd_t *pmdp);
e2cda322
AA
163#endif
164
1da177e4 165#ifndef __HAVE_ARCH_PTE_SAME
e2cda322
AA
166static inline int pte_same(pte_t pte_a, pte_t pte_b)
167{
168 return pte_val(pte_a) == pte_val(pte_b);
169}
170#endif
171
172#ifndef __HAVE_ARCH_PMD_SAME
173#ifdef CONFIG_TRANSPARENT_HUGEPAGE
174static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
175{
176 return pmd_val(pmd_a) == pmd_val(pmd_b);
177}
178#else /* CONFIG_TRANSPARENT_HUGEPAGE */
179static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
180{
181 BUG();
182 return 0;
183}
184#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1da177e4
LT
185#endif
186
2d42552d
MS
187#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
188#define page_test_and_clear_dirty(pfn, mapped) (0)
6c210482
MS
189#endif
190
2d42552d 191#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
b4955ce3
AK
192#define pte_maybe_dirty(pte) pte_dirty(pte)
193#else
194#define pte_maybe_dirty(pte) (1)
1da177e4
LT
195#endif
196
197#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
2d42552d 198#define page_test_and_clear_young(pfn) (0)
1da177e4
LT
199#endif
200
201#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
202#define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
203#endif
204
0b0968a3 205#ifndef __HAVE_ARCH_MOVE_PTE
8b1f3124 206#define move_pte(pte, prot, old_addr, new_addr) (pte)
8b1f3124
NP
207#endif
208
61c77326
SL
209#ifndef flush_tlb_fix_spurious_fault
210#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
211#endif
212
0634a632
PM
213#ifndef pgprot_noncached
214#define pgprot_noncached(prot) (prot)
215#endif
216
2520bd31 217#ifndef pgprot_writecombine
218#define pgprot_writecombine pgprot_noncached
219#endif
220
1da177e4 221/*
8f6c99c1
HD
222 * When walking page tables, get the address of the next boundary,
223 * or the end address of the range if that comes earlier. Although no
224 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
1da177e4
LT
225 */
226
1da177e4
LT
227#define pgd_addr_end(addr, end) \
228({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
229 (__boundary - 1 < (end) - 1)? __boundary: (end); \
230})
1da177e4
LT
231
232#ifndef pud_addr_end
233#define pud_addr_end(addr, end) \
234({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
235 (__boundary - 1 < (end) - 1)? __boundary: (end); \
236})
237#endif
238
239#ifndef pmd_addr_end
240#define pmd_addr_end(addr, end) \
241({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
242 (__boundary - 1 < (end) - 1)? __boundary: (end); \
243})
244#endif
245
1da177e4
LT
246/*
247 * When walking page tables, we usually want to skip any p?d_none entries;
248 * and any p?d_bad entries - reporting the error before resetting to none.
249 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
250 */
251void pgd_clear_bad(pgd_t *);
252void pud_clear_bad(pud_t *);
253void pmd_clear_bad(pmd_t *);
254
255static inline int pgd_none_or_clear_bad(pgd_t *pgd)
256{
257 if (pgd_none(*pgd))
258 return 1;
259 if (unlikely(pgd_bad(*pgd))) {
260 pgd_clear_bad(pgd);
261 return 1;
262 }
263 return 0;
264}
265
266static inline int pud_none_or_clear_bad(pud_t *pud)
267{
268 if (pud_none(*pud))
269 return 1;
270 if (unlikely(pud_bad(*pud))) {
271 pud_clear_bad(pud);
272 return 1;
273 }
274 return 0;
275}
276
277static inline int pmd_none_or_clear_bad(pmd_t *pmd)
278{
279 if (pmd_none(*pmd))
280 return 1;
281 if (unlikely(pmd_bad(*pmd))) {
282 pmd_clear_bad(pmd);
283 return 1;
284 }
285 return 0;
286}
9535239f 287
1ea0704e
JF
288static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
289 unsigned long addr,
290 pte_t *ptep)
291{
292 /*
293 * Get the current pte state, but zero it out to make it
294 * non-present, preventing the hardware from asynchronously
295 * updating it.
296 */
297 return ptep_get_and_clear(mm, addr, ptep);
298}
299
300static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
301 unsigned long addr,
302 pte_t *ptep, pte_t pte)
303{
304 /*
305 * The pte is non-present, so there's no hardware state to
306 * preserve.
307 */
308 set_pte_at(mm, addr, ptep, pte);
309}
310
311#ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
312/*
313 * Start a pte protection read-modify-write transaction, which
314 * protects against asynchronous hardware modifications to the pte.
315 * The intention is not to prevent the hardware from making pte
316 * updates, but to prevent any updates it may make from being lost.
317 *
318 * This does not protect against other software modifications of the
319 * pte; the appropriate pte lock must be held over the transation.
320 *
321 * Note that this interface is intended to be batchable, meaning that
322 * ptep_modify_prot_commit may not actually update the pte, but merely
323 * queue the update to be done at some later time. The update must be
324 * actually committed before the pte lock is released, however.
325 */
326static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
327 unsigned long addr,
328 pte_t *ptep)
329{
330 return __ptep_modify_prot_start(mm, addr, ptep);
331}
332
333/*
334 * Commit an update to a pte, leaving any hardware-controlled bits in
335 * the PTE unmodified.
336 */
337static inline void ptep_modify_prot_commit(struct mm_struct *mm,
338 unsigned long addr,
339 pte_t *ptep, pte_t pte)
340{
341 __ptep_modify_prot_commit(mm, addr, ptep, pte);
342}
343#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
fe1a6875 344#endif /* CONFIG_MMU */
1ea0704e 345
9535239f
GU
346/*
347 * A facility to provide lazy MMU batching. This allows PTE updates and
348 * page invalidations to be delayed until a call to leave lazy MMU mode
349 * is issued. Some architectures may benefit from doing this, and it is
350 * beneficial for both shadow and direct mode hypervisors, which may batch
351 * the PTE updates which happen during this window. Note that using this
352 * interface requires that read hazards be removed from the code. A read
353 * hazard could result in the direct mode hypervisor case, since the actual
354 * write to the page tables may not yet have taken place, so reads though
355 * a raw PTE pointer after it has been modified are not guaranteed to be
356 * up to date. This mode can only be entered and left under the protection of
357 * the page table locks for all page tables which may be modified. In the UP
358 * case, this is required so that preemption is disabled, and in the SMP case,
359 * it must synchronize the delayed page table writes properly on other CPUs.
360 */
361#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
362#define arch_enter_lazy_mmu_mode() do {} while (0)
363#define arch_leave_lazy_mmu_mode() do {} while (0)
364#define arch_flush_lazy_mmu_mode() do {} while (0)
365#endif
366
367/*
7fd7d83d
JF
368 * A facility to provide batching of the reload of page tables and
369 * other process state with the actual context switch code for
370 * paravirtualized guests. By convention, only one of the batched
371 * update (lazy) modes (CPU, MMU) should be active at any given time,
372 * entry should never be nested, and entry and exits should always be
373 * paired. This is for sanity of maintaining and reasoning about the
374 * kernel code. In this case, the exit (end of the context switch) is
375 * in architecture-specific code, and so doesn't need a generic
376 * definition.
9535239f 377 */
7fd7d83d 378#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
224101ed 379#define arch_start_context_switch(prev) do {} while (0)
9535239f
GU
380#endif
381
34801ba9 382#ifndef __HAVE_PFNMAP_TRACKING
383/*
5180da41
SS
384 * Interfaces that can be used by architecture code to keep track of
385 * memory type of pfn mappings specified by the remap_pfn_range,
386 * vm_insert_pfn.
387 */
388
389/*
390 * track_pfn_remap is called when a _new_ pfn mapping is being established
391 * by remap_pfn_range() for physical range indicated by pfn and size.
34801ba9 392 */
5180da41 393static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
394 unsigned long pfn, unsigned long addr,
395 unsigned long size)
34801ba9 396{
397 return 0;
398}
399
400/*
5180da41
SS
401 * track_pfn_insert is called when a _new_ single pfn is established
402 * by vm_insert_pfn().
403 */
404static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
405 unsigned long pfn)
406{
407 return 0;
408}
409
410/*
411 * track_pfn_copy is called when vma that is covering the pfnmap gets
34801ba9 412 * copied through copy_page_range().
413 */
5180da41 414static inline int track_pfn_copy(struct vm_area_struct *vma)
34801ba9 415{
416 return 0;
417}
418
419/*
34801ba9 420 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
421 * untrack can be called for a specific region indicated by pfn and size or
5180da41 422 * can be for the entire vma (in which case pfn, size are zero).
34801ba9 423 */
5180da41
SS
424static inline void untrack_pfn(struct vm_area_struct *vma,
425 unsigned long pfn, unsigned long size)
34801ba9 426{
427}
428#else
5180da41 429extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
b3b9c293
KK
430 unsigned long pfn, unsigned long addr,
431 unsigned long size);
5180da41
SS
432extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
433 unsigned long pfn);
434extern int track_pfn_copy(struct vm_area_struct *vma);
435extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
436 unsigned long size);
34801ba9 437#endif
438
1a5a9906
AA
439#ifdef CONFIG_MMU
440
5f6e8da7
AA
441#ifndef CONFIG_TRANSPARENT_HUGEPAGE
442static inline int pmd_trans_huge(pmd_t pmd)
443{
444 return 0;
445}
446static inline int pmd_trans_splitting(pmd_t pmd)
447{
448 return 0;
449}
e2cda322
AA
450#ifndef __HAVE_ARCH_PMD_WRITE
451static inline int pmd_write(pmd_t pmd)
452{
453 BUG();
454 return 0;
455}
456#endif /* __HAVE_ARCH_PMD_WRITE */
1a5a9906
AA
457#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
458
26c19178
AA
459#ifndef pmd_read_atomic
460static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
461{
462 /*
463 * Depend on compiler for an atomic pmd read. NOTE: this is
464 * only going to work, if the pmdval_t isn't larger than
465 * an unsigned long.
466 */
467 return *pmdp;
468}
469#endif
470
1a5a9906
AA
471/*
472 * This function is meant to be used by sites walking pagetables with
473 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
474 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
475 * into a null pmd and the transhuge page fault can convert a null pmd
476 * into an hugepmd or into a regular pmd (if the hugepage allocation
477 * fails). While holding the mmap_sem in read mode the pmd becomes
478 * stable and stops changing under us only if it's not null and not a
479 * transhuge pmd. When those races occurs and this function makes a
480 * difference vs the standard pmd_none_or_clear_bad, the result is
481 * undefined so behaving like if the pmd was none is safe (because it
482 * can return none anyway). The compiler level barrier() is critically
483 * important to compute the two checks atomically on the same pmdval.
26c19178
AA
484 *
485 * For 32bit kernels with a 64bit large pmd_t this automatically takes
486 * care of reading the pmd atomically to avoid SMP race conditions
487 * against pmd_populate() when the mmap_sem is hold for reading by the
488 * caller (a special atomic read not done by "gcc" as in the generic
489 * version above, is also needed when THP is disabled because the page
490 * fault can populate the pmd from under us).
1a5a9906
AA
491 */
492static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
493{
26c19178 494 pmd_t pmdval = pmd_read_atomic(pmd);
1a5a9906
AA
495 /*
496 * The barrier will stabilize the pmdval in a register or on
497 * the stack so that it will stop changing under the code.
e4eed03f
AA
498 *
499 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
500 * pmd_read_atomic is allowed to return a not atomic pmdval
501 * (for example pointing to an hugepage that has never been
502 * mapped in the pmd). The below checks will only care about
503 * the low part of the pmd with 32bit PAE x86 anyway, with the
504 * exception of pmd_none(). So the important thing is that if
505 * the low part of the pmd is found null, the high part will
506 * be also null or the pmd_none() check below would be
507 * confused.
1a5a9906
AA
508 */
509#ifdef CONFIG_TRANSPARENT_HUGEPAGE
510 barrier();
511#endif
512 if (pmd_none(pmdval))
513 return 1;
514 if (unlikely(pmd_bad(pmdval))) {
515 if (!pmd_trans_huge(pmdval))
516 pmd_clear_bad(pmd);
517 return 1;
518 }
519 return 0;
520}
521
522/*
523 * This is a noop if Transparent Hugepage Support is not built into
524 * the kernel. Otherwise it is equivalent to
525 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
526 * places that already verified the pmd is not none and they want to
527 * walk ptes while holding the mmap sem in read mode (write mode don't
528 * need this). If THP is not enabled, the pmd can't go away under the
529 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
530 * run a pmd_trans_unstable before walking the ptes after
531 * split_huge_page_pmd returns (because it may have run when the pmd
532 * become null, but then a page fault can map in a THP and not a
533 * regular page).
534 */
535static inline int pmd_trans_unstable(pmd_t *pmd)
536{
537#ifdef CONFIG_TRANSPARENT_HUGEPAGE
538 return pmd_none_or_trans_huge_or_clear_bad(pmd);
539#else
540 return 0;
5f6e8da7 541#endif
1a5a9906
AA
542}
543
544#endif /* CONFIG_MMU */
5f6e8da7 545
1da177e4
LT
546#endif /* !__ASSEMBLY__ */
547
548#endif /* _ASM_GENERIC_PGTABLE_H */
This page took 0.706099 seconds and 5 git commands to generate.