Commit | Line | Data |
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1da177e4 | 1 | /* |
8882a4da | 2 | * include/asm-powerpc/paca.h |
1da177e4 | 3 | * |
8882a4da DG |
4 | * This control block defines the PACA which defines the processor |
5 | * specific data for each logical processor on the system. | |
1da177e4 LT |
6 | * There are some pointers defined that are utilized by PLIC. |
7 | * | |
8 | * C 2001 PPC 64 Team, IBM Corp | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version | |
13 | * 2 of the License, or (at your option) any later version. | |
8882a4da DG |
14 | */ |
15 | #ifndef _ASM_POWERPC_PACA_H | |
16 | #define _ASM_POWERPC_PACA_H | |
88ced031 | 17 | #ifdef __KERNEL__ |
1da177e4 | 18 | |
1da177e4 LT |
19 | #include <asm/types.h> |
20 | #include <asm/lppaca.h> | |
1da177e4 LT |
21 | #include <asm/mmu.h> |
22 | ||
23 | register struct paca_struct *local_paca asm("r13"); | |
048c8bc9 HD |
24 | |
25 | #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) | |
26 | extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ | |
27 | /* | |
28 | * Add standard checks that preemption cannot occur when using get_paca(): | |
29 | * otherwise the paca_struct it points to may be the wrong one just after. | |
30 | */ | |
31 | #define get_paca() ((void) debug_smp_processor_id(), local_paca) | |
32 | #else | |
1da177e4 | 33 | #define get_paca() local_paca |
048c8bc9 HD |
34 | #endif |
35 | ||
3356bb9f | 36 | #define get_lppaca() (get_paca()->lppaca_ptr) |
2f6093c8 | 37 | #define get_slb_shadow() (get_paca()->slb_shadow_ptr) |
1da177e4 LT |
38 | |
39 | struct task_struct; | |
1da177e4 LT |
40 | |
41 | /* | |
42 | * Defines the layout of the paca. | |
43 | * | |
44 | * This structure is not directly accessed by firmware or the service | |
30ff2e87 | 45 | * processor. |
1da177e4 LT |
46 | */ |
47 | struct paca_struct { | |
48 | /* | |
49 | * Because hw_cpu_id, unlike other paca fields, is accessed | |
50 | * routinely from other CPUs (from the IRQ code), we stick to | |
51 | * read-only (after boot) fields in the first cacheline to | |
52 | * avoid cacheline bouncing. | |
53 | */ | |
54 | ||
1da177e4 | 55 | struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ |
1da177e4 LT |
56 | |
57 | /* | |
2ef9481e | 58 | * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c |
1da177e4 LT |
59 | * load lock_token and paca_index with a single lwz |
60 | * instruction. They must travel together and be properly | |
61 | * aligned. | |
62 | */ | |
63 | u16 lock_token; /* Constant 0x8000, used in locks */ | |
64 | u16 paca_index; /* Logical processor number */ | |
65 | ||
1da177e4 LT |
66 | u64 kernel_toc; /* Kernel TOC address */ |
67 | u64 stab_real; /* Absolute address of segment table */ | |
68 | u64 stab_addr; /* Virtual address of segment table */ | |
69 | void *emergency_sp; /* pointer to emergency stack */ | |
7a0268fa | 70 | u64 data_offset; /* per cpu data offset */ |
1da177e4 LT |
71 | s16 hw_cpu_id; /* Physical processor number */ |
72 | u8 cpu_start; /* At startup, processor spins until */ | |
73 | /* this becomes non-zero. */ | |
e91948fd | 74 | struct slb_shadow *slb_shadow_ptr; |
1da177e4 LT |
75 | |
76 | /* | |
77 | * Now, starting in cacheline 2, the exception save areas | |
78 | */ | |
3c726f8d BH |
79 | /* used for most interrupts/exceptions */ |
80 | u64 exgen[10] __attribute__((aligned(0x80))); | |
81 | u64 exmc[10]; /* used for machine checks */ | |
82 | u64 exslb[10]; /* used for SLB/segment table misses | |
83 | * on the linear mapping */ | |
3c726f8d | 84 | |
1da177e4 | 85 | mm_context_t context; |
bf72aeba | 86 | u16 vmalloc_sllp; |
1da177e4 | 87 | u16 slb_cache_ptr; |
d0f13e3c | 88 | u16 slb_cache[SLB_CACHE_ENTRIES]; |
1da177e4 LT |
89 | |
90 | /* | |
91 | * then miscellaneous read-write fields | |
92 | */ | |
93 | struct task_struct *__current; /* Pointer to current */ | |
94 | u64 kstack; /* Saved Kernel stack addr */ | |
95 | u64 stab_rr; /* stab/slb round-robin counter */ | |
1da177e4 LT |
96 | u64 saved_r1; /* r1 save for RTAS calls */ |
97 | u64 saved_msr; /* MSR saved here by enter_rtas */ | |
68730401 | 98 | u16 trap_save; /* Used when bad stack is encountered */ |
d04c56f7 PM |
99 | u8 soft_enabled; /* irq soft-enable flag */ |
100 | u8 hard_enabled; /* set if irqs are enabled in MSR */ | |
f007cacf | 101 | u8 io_sync; /* writel() needs spin_unlock sync */ |
c6622f63 PM |
102 | |
103 | /* Stuff for accurate time accounting */ | |
104 | u64 user_time; /* accumulated usermode TB ticks */ | |
105 | u64 system_time; /* accumulated system TB ticks */ | |
106 | u64 startpurr; /* PURR/TB value snapshot */ | |
4603ac18 | 107 | u64 startspurr; /* SPURR value snapshot */ |
1da177e4 LT |
108 | }; |
109 | ||
110 | extern struct paca_struct paca[]; | |
90035fe3 | 111 | extern void initialise_pacas(void); |
1da177e4 | 112 | |
88ced031 | 113 | #endif /* __KERNEL__ */ |
8882a4da | 114 | #endif /* _ASM_POWERPC_PACA_H */ |