Commit | Line | Data |
---|---|---|
c777ac55 | 1 | |
d824e66a | 2 | #include <linux/irq.h> |
c777ac55 AM |
3 | |
4 | void set_pending_irq(unsigned int irq, cpumask_t mask) | |
5 | { | |
6 | irq_desc_t *desc = irq_desc + irq; | |
7 | unsigned long flags; | |
8 | ||
9 | spin_lock_irqsave(&desc->lock, flags); | |
10 | desc->move_irq = 1; | |
11 | pending_irq_cpumask[irq] = mask; | |
12 | spin_unlock_irqrestore(&desc->lock, flags); | |
13 | } | |
14 | ||
15 | void move_native_irq(int irq) | |
16 | { | |
17 | cpumask_t tmp; | |
18 | irq_desc_t *desc = irq_descp(irq); | |
19 | ||
501f2499 | 20 | if (likely(!desc->move_irq)) |
c777ac55 AM |
21 | return; |
22 | ||
501f2499 BH |
23 | /* |
24 | * Paranoia: cpu-local interrupts shouldn't be calling in here anyway. | |
25 | */ | |
26 | if (CHECK_IRQ_PER_CPU(desc->status)) { | |
27 | WARN_ON(1); | |
28 | return; | |
29 | } | |
30 | ||
c777ac55 AM |
31 | desc->move_irq = 0; |
32 | ||
33 | if (likely(cpus_empty(pending_irq_cpumask[irq]))) | |
34 | return; | |
35 | ||
36 | if (!desc->handler->set_affinity) | |
37 | return; | |
38 | ||
501f2499 BH |
39 | assert_spin_locked(&desc->lock); |
40 | ||
c777ac55 AM |
41 | cpus_and(tmp, pending_irq_cpumask[irq], cpu_online_map); |
42 | ||
43 | /* | |
44 | * If there was a valid mask to work with, please | |
45 | * do the disable, re-program, enable sequence. | |
46 | * This is *not* particularly important for level triggered | |
47 | * but in a edge trigger case, we might be setting rte | |
48 | * when an active trigger is comming in. This could | |
49 | * cause some ioapics to mal-function. | |
50 | * Being paranoid i guess! | |
51 | */ | |
52 | if (unlikely(!cpus_empty(tmp))) { | |
501f2499 BH |
53 | if (likely(!(desc->status & IRQ_DISABLED))) |
54 | desc->handler->disable(irq); | |
55 | ||
c777ac55 | 56 | desc->handler->set_affinity(irq,tmp); |
501f2499 BH |
57 | |
58 | if (likely(!(desc->status & IRQ_DISABLED))) | |
59 | desc->handler->enable(irq); | |
c777ac55 AM |
60 | } |
61 | cpus_clear(pending_irq_cpumask[irq]); | |
62 | } |