Commit | Line | Data |
---|---|---|
1319b2f6 OC |
1 | /* |
2 | * rt5645.c -- RT5645 ALSA SoC audio codec driver | |
3 | * | |
4 | * Copyright 2013 Realtek Semiconductor Corp. | |
5 | * Author: Bard Liao <bardliao@realtek.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/moduleparam.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/pm.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/spi/spi.h> | |
f3fa1bbd | 20 | #include <linux/gpio.h> |
baf2a0e1 | 21 | #include <linux/gpio/consumer.h> |
3168c201 | 22 | #include <linux/acpi.h> |
78c34fd4 | 23 | #include <linux/dmi.h> |
9fc114c5 | 24 | #include <linux/regulator/consumer.h> |
1319b2f6 OC |
25 | #include <sound/core.h> |
26 | #include <sound/pcm.h> | |
27 | #include <sound/pcm_params.h> | |
28 | #include <sound/jack.h> | |
29 | #include <sound/soc.h> | |
30 | #include <sound/soc-dapm.h> | |
31 | #include <sound/initval.h> | |
32 | #include <sound/tlv.h> | |
33 | ||
49ef7925 | 34 | #include "rl6231.h" |
1319b2f6 OC |
35 | #include "rt5645.h" |
36 | ||
37 | #define RT5645_DEVICE_ID 0x6308 | |
5c4ca99d | 38 | #define RT5650_DEVICE_ID 0x6419 |
1319b2f6 OC |
39 | |
40 | #define RT5645_PR_RANGE_BASE (0xff + 1) | |
41 | #define RT5645_PR_SPACING 0x100 | |
42 | ||
43 | #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING)) | |
44 | ||
45 | static const struct regmap_range_cfg rt5645_ranges[] = { | |
46 | { | |
47 | .name = "PR", | |
48 | .range_min = RT5645_PR_BASE, | |
49 | .range_max = RT5645_PR_BASE + 0xf8, | |
50 | .selector_reg = RT5645_PRIV_INDEX, | |
51 | .selector_mask = 0xff, | |
52 | .selector_shift = 0x0, | |
53 | .window_start = RT5645_PRIV_DATA, | |
54 | .window_len = 0x1, | |
55 | }, | |
56 | }; | |
57 | ||
8019ff6c | 58 | static const struct reg_sequence init_list[] = { |
1319b2f6 | 59 | {RT5645_PR_BASE + 0x3d, 0x3600}, |
4809b96e OC |
60 | {RT5645_PR_BASE + 0x1c, 0xfd20}, |
61 | {RT5645_PR_BASE + 0x20, 0x611f}, | |
62 | {RT5645_PR_BASE + 0x21, 0x4040}, | |
63 | {RT5645_PR_BASE + 0x23, 0x0004}, | |
1319b2f6 OC |
64 | }; |
65 | #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list) | |
66 | ||
8019ff6c | 67 | static const struct reg_sequence rt5650_init_list[] = { |
5c4ca99d BL |
68 | {0xf6, 0x0100}, |
69 | }; | |
70 | ||
1319b2f6 OC |
71 | static const struct reg_default rt5645_reg[] = { |
72 | { 0x00, 0x0000 }, | |
73 | { 0x01, 0xc8c8 }, | |
74 | { 0x02, 0xc8c8 }, | |
75 | { 0x03, 0xc8c8 }, | |
76 | { 0x0a, 0x0002 }, | |
77 | { 0x0b, 0x2827 }, | |
78 | { 0x0c, 0xe000 }, | |
79 | { 0x0d, 0x0000 }, | |
80 | { 0x0e, 0x0000 }, | |
81 | { 0x0f, 0x0808 }, | |
82 | { 0x14, 0x3333 }, | |
83 | { 0x16, 0x4b00 }, | |
84 | { 0x18, 0x018b }, | |
85 | { 0x19, 0xafaf }, | |
86 | { 0x1a, 0xafaf }, | |
87 | { 0x1b, 0x0001 }, | |
88 | { 0x1c, 0x2f2f }, | |
89 | { 0x1d, 0x2f2f }, | |
90 | { 0x1e, 0x0000 }, | |
91 | { 0x20, 0x0000 }, | |
92 | { 0x27, 0x7060 }, | |
93 | { 0x28, 0x7070 }, | |
94 | { 0x29, 0x8080 }, | |
95 | { 0x2a, 0x5656 }, | |
96 | { 0x2b, 0x5454 }, | |
97 | { 0x2c, 0xaaa0 }, | |
5c4ca99d | 98 | { 0x2d, 0x0000 }, |
1319b2f6 OC |
99 | { 0x2f, 0x1002 }, |
100 | { 0x31, 0x5000 }, | |
101 | { 0x32, 0x0000 }, | |
102 | { 0x33, 0x0000 }, | |
103 | { 0x34, 0x0000 }, | |
104 | { 0x35, 0x0000 }, | |
105 | { 0x3b, 0x0000 }, | |
106 | { 0x3c, 0x007f }, | |
107 | { 0x3d, 0x0000 }, | |
108 | { 0x3e, 0x007f }, | |
109 | { 0x3f, 0x0000 }, | |
110 | { 0x40, 0x001f }, | |
111 | { 0x41, 0x0000 }, | |
112 | { 0x42, 0x001f }, | |
113 | { 0x45, 0x6000 }, | |
114 | { 0x46, 0x003e }, | |
115 | { 0x47, 0x003e }, | |
116 | { 0x48, 0xf807 }, | |
117 | { 0x4a, 0x0004 }, | |
118 | { 0x4d, 0x0000 }, | |
119 | { 0x4e, 0x0000 }, | |
120 | { 0x4f, 0x01ff }, | |
121 | { 0x50, 0x0000 }, | |
122 | { 0x51, 0x0000 }, | |
123 | { 0x52, 0x01ff }, | |
124 | { 0x53, 0xf000 }, | |
125 | { 0x56, 0x0111 }, | |
126 | { 0x57, 0x0064 }, | |
127 | { 0x58, 0xef0e }, | |
128 | { 0x59, 0xf0f0 }, | |
129 | { 0x5a, 0xef0e }, | |
130 | { 0x5b, 0xf0f0 }, | |
131 | { 0x5c, 0xef0e }, | |
132 | { 0x5d, 0xf0f0 }, | |
133 | { 0x5e, 0xf000 }, | |
134 | { 0x5f, 0x0000 }, | |
135 | { 0x61, 0x0300 }, | |
136 | { 0x62, 0x0000 }, | |
137 | { 0x63, 0x00c2 }, | |
138 | { 0x64, 0x0000 }, | |
139 | { 0x65, 0x0000 }, | |
140 | { 0x66, 0x0000 }, | |
141 | { 0x6a, 0x0000 }, | |
142 | { 0x6c, 0x0aaa }, | |
143 | { 0x70, 0x8000 }, | |
144 | { 0x71, 0x8000 }, | |
145 | { 0x72, 0x8000 }, | |
146 | { 0x73, 0x7770 }, | |
147 | { 0x74, 0x3e00 }, | |
148 | { 0x75, 0x2409 }, | |
149 | { 0x76, 0x000a }, | |
150 | { 0x77, 0x0c00 }, | |
151 | { 0x78, 0x0000 }, | |
df078d29 | 152 | { 0x79, 0x0123 }, |
1319b2f6 OC |
153 | { 0x80, 0x0000 }, |
154 | { 0x81, 0x0000 }, | |
155 | { 0x82, 0x0000 }, | |
156 | { 0x83, 0x0000 }, | |
157 | { 0x84, 0x0000 }, | |
158 | { 0x85, 0x0000 }, | |
159 | { 0x8a, 0x0000 }, | |
160 | { 0x8e, 0x0004 }, | |
161 | { 0x8f, 0x1100 }, | |
162 | { 0x90, 0x0646 }, | |
163 | { 0x91, 0x0c06 }, | |
164 | { 0x93, 0x0000 }, | |
165 | { 0x94, 0x0200 }, | |
166 | { 0x95, 0x0000 }, | |
167 | { 0x9a, 0x2184 }, | |
168 | { 0x9b, 0x010a }, | |
169 | { 0x9c, 0x0aea }, | |
170 | { 0x9d, 0x000c }, | |
171 | { 0x9e, 0x0400 }, | |
172 | { 0xa0, 0xa0a8 }, | |
173 | { 0xa1, 0x0059 }, | |
174 | { 0xa2, 0x0001 }, | |
175 | { 0xae, 0x6000 }, | |
176 | { 0xaf, 0x0000 }, | |
177 | { 0xb0, 0x6000 }, | |
178 | { 0xb1, 0x0000 }, | |
179 | { 0xb2, 0x0000 }, | |
180 | { 0xb3, 0x001f }, | |
181 | { 0xb4, 0x020c }, | |
182 | { 0xb5, 0x1f00 }, | |
183 | { 0xb6, 0x0000 }, | |
184 | { 0xbb, 0x0000 }, | |
185 | { 0xbc, 0x0000 }, | |
186 | { 0xbd, 0x0000 }, | |
187 | { 0xbe, 0x0000 }, | |
188 | { 0xbf, 0x3100 }, | |
189 | { 0xc0, 0x0000 }, | |
190 | { 0xc1, 0x0000 }, | |
191 | { 0xc2, 0x0000 }, | |
192 | { 0xc3, 0x2000 }, | |
193 | { 0xcd, 0x0000 }, | |
194 | { 0xce, 0x0000 }, | |
195 | { 0xcf, 0x1813 }, | |
196 | { 0xd0, 0x0690 }, | |
197 | { 0xd1, 0x1c17 }, | |
198 | { 0xd3, 0xb320 }, | |
199 | { 0xd4, 0x0000 }, | |
200 | { 0xd6, 0x0400 }, | |
201 | { 0xd9, 0x0809 }, | |
202 | { 0xda, 0x0000 }, | |
203 | { 0xdb, 0x0003 }, | |
204 | { 0xdc, 0x0049 }, | |
205 | { 0xdd, 0x001b }, | |
5c4ca99d BL |
206 | { 0xdf, 0x0008 }, |
207 | { 0xe0, 0x4000 }, | |
1319b2f6 OC |
208 | { 0xe6, 0x8000 }, |
209 | { 0xe7, 0x0200 }, | |
210 | { 0xec, 0xb300 }, | |
211 | { 0xed, 0x0000 }, | |
212 | { 0xf0, 0x001f }, | |
213 | { 0xf1, 0x020c }, | |
214 | { 0xf2, 0x1f00 }, | |
215 | { 0xf3, 0x0000 }, | |
216 | { 0xf4, 0x4000 }, | |
217 | { 0xf8, 0x0000 }, | |
218 | { 0xf9, 0x0000 }, | |
219 | { 0xfa, 0x2060 }, | |
220 | { 0xfb, 0x4040 }, | |
221 | { 0xfc, 0x0000 }, | |
222 | { 0xfd, 0x0002 }, | |
223 | { 0xfe, 0x10ec }, | |
224 | { 0xff, 0x6308 }, | |
225 | }; | |
226 | ||
9fc114c5 KC |
227 | static const char *const rt5645_supply_names[] = { |
228 | "avdd", | |
229 | "cpvdd", | |
230 | }; | |
231 | ||
232 | struct rt5645_priv { | |
233 | struct snd_soc_codec *codec; | |
234 | struct rt5645_platform_data pdata; | |
235 | struct regmap *regmap; | |
236 | struct i2c_client *i2c; | |
237 | struct gpio_desc *gpiod_hp_det; | |
238 | struct snd_soc_jack *hp_jack; | |
239 | struct snd_soc_jack *mic_jack; | |
240 | struct snd_soc_jack *btn_jack; | |
241 | struct delayed_work jack_detect_work; | |
242 | struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)]; | |
243 | ||
244 | int codec_type; | |
245 | int sysclk; | |
246 | int sysclk_src; | |
247 | int lrck[RT5645_AIFS]; | |
248 | int bclk[RT5645_AIFS]; | |
249 | int master[RT5645_AIFS]; | |
250 | ||
251 | int pll_src; | |
252 | int pll_in; | |
253 | int pll_out; | |
254 | ||
255 | int jack_type; | |
256 | bool en_button_func; | |
588cd850 | 257 | bool hp_on; |
9fc114c5 KC |
258 | }; |
259 | ||
1319b2f6 OC |
260 | static int rt5645_reset(struct snd_soc_codec *codec) |
261 | { | |
262 | return snd_soc_write(codec, RT5645_RESET, 0); | |
263 | } | |
264 | ||
265 | static bool rt5645_volatile_register(struct device *dev, unsigned int reg) | |
266 | { | |
267 | int i; | |
268 | ||
269 | for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) { | |
270 | if (reg >= rt5645_ranges[i].range_min && | |
271 | reg <= rt5645_ranges[i].range_max) { | |
272 | return true; | |
273 | } | |
274 | } | |
275 | ||
276 | switch (reg) { | |
277 | case RT5645_RESET: | |
278 | case RT5645_PRIV_DATA: | |
279 | case RT5645_IN1_CTRL1: | |
280 | case RT5645_IN1_CTRL2: | |
281 | case RT5645_IN1_CTRL3: | |
282 | case RT5645_A_JD_CTRL1: | |
283 | case RT5645_ADC_EQ_CTRL1: | |
284 | case RT5645_EQ_CTRL1: | |
285 | case RT5645_ALC_CTRL_1: | |
286 | case RT5645_IRQ_CTRL2: | |
287 | case RT5645_IRQ_CTRL3: | |
288 | case RT5645_INT_IRQ_ST: | |
289 | case RT5645_IL_CMD: | |
5c4ca99d | 290 | case RT5650_4BTN_IL_CMD1: |
1319b2f6 OC |
291 | case RT5645_VENDOR_ID: |
292 | case RT5645_VENDOR_ID1: | |
293 | case RT5645_VENDOR_ID2: | |
71bfa9b4 | 294 | return true; |
1319b2f6 | 295 | default: |
71bfa9b4 | 296 | return false; |
1319b2f6 OC |
297 | } |
298 | } | |
299 | ||
300 | static bool rt5645_readable_register(struct device *dev, unsigned int reg) | |
301 | { | |
302 | int i; | |
303 | ||
304 | for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) { | |
305 | if (reg >= rt5645_ranges[i].range_min && | |
306 | reg <= rt5645_ranges[i].range_max) { | |
307 | return true; | |
308 | } | |
309 | } | |
310 | ||
311 | switch (reg) { | |
312 | case RT5645_RESET: | |
313 | case RT5645_SPK_VOL: | |
314 | case RT5645_HP_VOL: | |
315 | case RT5645_LOUT1: | |
316 | case RT5645_IN1_CTRL1: | |
317 | case RT5645_IN1_CTRL2: | |
318 | case RT5645_IN1_CTRL3: | |
319 | case RT5645_IN2_CTRL: | |
320 | case RT5645_INL1_INR1_VOL: | |
321 | case RT5645_SPK_FUNC_LIM: | |
322 | case RT5645_ADJ_HPF_CTRL: | |
323 | case RT5645_DAC1_DIG_VOL: | |
324 | case RT5645_DAC2_DIG_VOL: | |
325 | case RT5645_DAC_CTRL: | |
326 | case RT5645_STO1_ADC_DIG_VOL: | |
327 | case RT5645_MONO_ADC_DIG_VOL: | |
328 | case RT5645_ADC_BST_VOL1: | |
329 | case RT5645_ADC_BST_VOL2: | |
330 | case RT5645_STO1_ADC_MIXER: | |
331 | case RT5645_MONO_ADC_MIXER: | |
332 | case RT5645_AD_DA_MIXER: | |
333 | case RT5645_STO_DAC_MIXER: | |
334 | case RT5645_MONO_DAC_MIXER: | |
335 | case RT5645_DIG_MIXER: | |
5c4ca99d | 336 | case RT5650_A_DAC_SOUR: |
1319b2f6 OC |
337 | case RT5645_DIG_INF1_DATA: |
338 | case RT5645_PDM_OUT_CTRL: | |
339 | case RT5645_REC_L1_MIXER: | |
340 | case RT5645_REC_L2_MIXER: | |
341 | case RT5645_REC_R1_MIXER: | |
342 | case RT5645_REC_R2_MIXER: | |
343 | case RT5645_HPMIXL_CTRL: | |
344 | case RT5645_HPOMIXL_CTRL: | |
345 | case RT5645_HPMIXR_CTRL: | |
346 | case RT5645_HPOMIXR_CTRL: | |
347 | case RT5645_HPO_MIXER: | |
348 | case RT5645_SPK_L_MIXER: | |
349 | case RT5645_SPK_R_MIXER: | |
350 | case RT5645_SPO_MIXER: | |
351 | case RT5645_SPO_CLSD_RATIO: | |
352 | case RT5645_OUT_L1_MIXER: | |
353 | case RT5645_OUT_R1_MIXER: | |
354 | case RT5645_OUT_L_GAIN1: | |
355 | case RT5645_OUT_L_GAIN2: | |
356 | case RT5645_OUT_R_GAIN1: | |
357 | case RT5645_OUT_R_GAIN2: | |
358 | case RT5645_LOUT_MIXER: | |
359 | case RT5645_HAPTIC_CTRL1: | |
360 | case RT5645_HAPTIC_CTRL2: | |
361 | case RT5645_HAPTIC_CTRL3: | |
362 | case RT5645_HAPTIC_CTRL4: | |
363 | case RT5645_HAPTIC_CTRL5: | |
364 | case RT5645_HAPTIC_CTRL6: | |
365 | case RT5645_HAPTIC_CTRL7: | |
366 | case RT5645_HAPTIC_CTRL8: | |
367 | case RT5645_HAPTIC_CTRL9: | |
368 | case RT5645_HAPTIC_CTRL10: | |
369 | case RT5645_PWR_DIG1: | |
370 | case RT5645_PWR_DIG2: | |
371 | case RT5645_PWR_ANLG1: | |
372 | case RT5645_PWR_ANLG2: | |
373 | case RT5645_PWR_MIXER: | |
374 | case RT5645_PWR_VOL: | |
375 | case RT5645_PRIV_INDEX: | |
376 | case RT5645_PRIV_DATA: | |
377 | case RT5645_I2S1_SDP: | |
378 | case RT5645_I2S2_SDP: | |
379 | case RT5645_ADDA_CLK1: | |
380 | case RT5645_ADDA_CLK2: | |
381 | case RT5645_DMIC_CTRL1: | |
382 | case RT5645_DMIC_CTRL2: | |
383 | case RT5645_TDM_CTRL_1: | |
384 | case RT5645_TDM_CTRL_2: | |
df078d29 | 385 | case RT5645_TDM_CTRL_3: |
1fcb76db | 386 | case RT5650_TDM_CTRL_4: |
1319b2f6 OC |
387 | case RT5645_GLB_CLK: |
388 | case RT5645_PLL_CTRL1: | |
389 | case RT5645_PLL_CTRL2: | |
390 | case RT5645_ASRC_1: | |
391 | case RT5645_ASRC_2: | |
392 | case RT5645_ASRC_3: | |
393 | case RT5645_ASRC_4: | |
394 | case RT5645_DEPOP_M1: | |
395 | case RT5645_DEPOP_M2: | |
396 | case RT5645_DEPOP_M3: | |
b1d42598 | 397 | case RT5645_CHARGE_PUMP: |
1319b2f6 OC |
398 | case RT5645_MICBIAS: |
399 | case RT5645_A_JD_CTRL1: | |
400 | case RT5645_VAD_CTRL4: | |
401 | case RT5645_CLSD_OUT_CTRL: | |
402 | case RT5645_ADC_EQ_CTRL1: | |
403 | case RT5645_ADC_EQ_CTRL2: | |
404 | case RT5645_EQ_CTRL1: | |
405 | case RT5645_EQ_CTRL2: | |
406 | case RT5645_ALC_CTRL_1: | |
407 | case RT5645_ALC_CTRL_2: | |
408 | case RT5645_ALC_CTRL_3: | |
409 | case RT5645_ALC_CTRL_4: | |
410 | case RT5645_ALC_CTRL_5: | |
411 | case RT5645_JD_CTRL: | |
412 | case RT5645_IRQ_CTRL1: | |
413 | case RT5645_IRQ_CTRL2: | |
414 | case RT5645_IRQ_CTRL3: | |
415 | case RT5645_INT_IRQ_ST: | |
416 | case RT5645_GPIO_CTRL1: | |
417 | case RT5645_GPIO_CTRL2: | |
418 | case RT5645_GPIO_CTRL3: | |
419 | case RT5645_BASS_BACK: | |
420 | case RT5645_MP3_PLUS1: | |
421 | case RT5645_MP3_PLUS2: | |
422 | case RT5645_ADJ_HPF1: | |
423 | case RT5645_ADJ_HPF2: | |
424 | case RT5645_HP_CALIB_AMP_DET: | |
425 | case RT5645_SV_ZCD1: | |
426 | case RT5645_SV_ZCD2: | |
427 | case RT5645_IL_CMD: | |
428 | case RT5645_IL_CMD2: | |
429 | case RT5645_IL_CMD3: | |
5c4ca99d BL |
430 | case RT5650_4BTN_IL_CMD1: |
431 | case RT5650_4BTN_IL_CMD2: | |
1319b2f6 OC |
432 | case RT5645_DRC1_HL_CTRL1: |
433 | case RT5645_DRC2_HL_CTRL1: | |
434 | case RT5645_ADC_MONO_HP_CTRL1: | |
435 | case RT5645_ADC_MONO_HP_CTRL2: | |
436 | case RT5645_DRC2_CTRL1: | |
437 | case RT5645_DRC2_CTRL2: | |
438 | case RT5645_DRC2_CTRL3: | |
439 | case RT5645_DRC2_CTRL4: | |
440 | case RT5645_DRC2_CTRL5: | |
441 | case RT5645_JD_CTRL3: | |
442 | case RT5645_JD_CTRL4: | |
443 | case RT5645_GEN_CTRL1: | |
444 | case RT5645_GEN_CTRL2: | |
445 | case RT5645_GEN_CTRL3: | |
446 | case RT5645_VENDOR_ID: | |
447 | case RT5645_VENDOR_ID1: | |
448 | case RT5645_VENDOR_ID2: | |
71bfa9b4 | 449 | return true; |
1319b2f6 | 450 | default: |
71bfa9b4 | 451 | return false; |
1319b2f6 OC |
452 | } |
453 | } | |
454 | ||
455 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); | |
177e1e1f | 456 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0); |
1319b2f6 | 457 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
177e1e1f | 458 | static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0); |
1319b2f6 OC |
459 | static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); |
460 | ||
461 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ | |
6d698a83 | 462 | static const DECLARE_TLV_DB_RANGE(bst_tlv, |
1319b2f6 OC |
463 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
464 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), | |
465 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), | |
466 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), | |
467 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), | |
468 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), | |
6d698a83 LPC |
469 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) |
470 | ); | |
1319b2f6 | 471 | |
e29fd55d OC |
472 | /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */ |
473 | static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv, | |
474 | 0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0), | |
475 | 5, 5, TLV_DB_SCALE_ITEM(82, 0, 0), | |
476 | 6, 6, TLV_DB_SCALE_ITEM(158, 0, 0), | |
477 | 7, 7, TLV_DB_SCALE_ITEM(228, 0, 0) | |
478 | ); | |
479 | ||
1319b2f6 OC |
480 | static const struct snd_kcontrol_new rt5645_snd_controls[] = { |
481 | /* Speaker Output Volume */ | |
482 | SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL, | |
483 | RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), | |
484 | SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL, | |
485 | RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), | |
486 | ||
e29fd55d OC |
487 | /* ClassD modulator Speaker Gain Ratio */ |
488 | SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO, | |
489 | RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv), | |
490 | ||
1319b2f6 | 491 | /* Headphone Output Volume */ |
692768c4 | 492 | SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL, |
1319b2f6 | 493 | RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), |
692768c4 | 494 | SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL, |
1319b2f6 OC |
495 | RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), |
496 | ||
497 | /* OUTPUT Control */ | |
498 | SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1, | |
499 | RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), | |
500 | SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1, | |
501 | RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), | |
502 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1, | |
503 | RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), | |
504 | ||
505 | /* DAC Digital Volume */ | |
506 | SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL, | |
507 | RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1), | |
508 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL, | |
177e1e1f | 509 | RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv), |
1319b2f6 | 510 | SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL, |
177e1e1f | 511 | RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv), |
1319b2f6 OC |
512 | |
513 | /* IN1/IN2 Control */ | |
514 | SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1, | |
515 | RT5645_BST_SFT1, 8, 0, bst_tlv), | |
516 | SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL, | |
517 | RT5645_BST_SFT2, 8, 0, bst_tlv), | |
518 | ||
519 | /* INL/INR Volume Control */ | |
520 | SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL, | |
521 | RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv), | |
522 | ||
523 | /* ADC Digital Volume Control */ | |
524 | SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL, | |
525 | RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), | |
526 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL, | |
177e1e1f | 527 | RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv), |
1319b2f6 OC |
528 | SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL, |
529 | RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), | |
530 | SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL, | |
177e1e1f | 531 | RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv), |
1319b2f6 OC |
532 | |
533 | /* ADC Boost Volume Control */ | |
534 | SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1, | |
535 | RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0, | |
536 | adc_bst_tlv), | |
537 | SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1, | |
538 | RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0, | |
539 | adc_bst_tlv), | |
540 | ||
541 | /* I2S2 function select */ | |
542 | SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT, | |
543 | 1, 1), | |
1319b2f6 OC |
544 | }; |
545 | ||
546 | /** | |
547 | * set_dmic_clk - Set parameter of dmic. | |
548 | * | |
549 | * @w: DAPM widget. | |
550 | * @kcontrol: The kcontrol of this widget. | |
551 | * @event: Event id. | |
552 | * | |
1319b2f6 OC |
553 | */ |
554 | static int set_dmic_clk(struct snd_soc_dapm_widget *w, | |
555 | struct snd_kcontrol *kcontrol, int event) | |
556 | { | |
c5f596cb | 557 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
1319b2f6 | 558 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
00a6d6e5 | 559 | int idx, rate; |
1319b2f6 | 560 | |
00a6d6e5 OC |
561 | rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap, |
562 | RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT); | |
563 | idx = rl6231_calc_dmic_clk(rate); | |
1319b2f6 OC |
564 | if (idx < 0) |
565 | dev_err(codec->dev, "Failed to set DMIC clock\n"); | |
566 | else | |
567 | snd_soc_update_bits(codec, RT5645_DMIC_CTRL1, | |
568 | RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT); | |
569 | return idx; | |
570 | } | |
571 | ||
572 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, | |
573 | struct snd_soc_dapm_widget *sink) | |
574 | { | |
c5f596cb | 575 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
1319b2f6 OC |
576 | unsigned int val; |
577 | ||
c5f596cb | 578 | val = snd_soc_read(codec, RT5645_GLB_CLK); |
1319b2f6 OC |
579 | val &= RT5645_SCLK_SRC_MASK; |
580 | if (val == RT5645_SCLK_SRC_PLL1) | |
581 | return 1; | |
582 | else | |
583 | return 0; | |
584 | } | |
585 | ||
9e268353 BL |
586 | static int is_using_asrc(struct snd_soc_dapm_widget *source, |
587 | struct snd_soc_dapm_widget *sink) | |
588 | { | |
c5f596cb | 589 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
9e268353 BL |
590 | unsigned int reg, shift, val; |
591 | ||
592 | switch (source->shift) { | |
593 | case 0: | |
594 | reg = RT5645_ASRC_3; | |
595 | shift = 0; | |
596 | break; | |
597 | case 1: | |
598 | reg = RT5645_ASRC_3; | |
599 | shift = 4; | |
600 | break; | |
601 | case 3: | |
602 | reg = RT5645_ASRC_2; | |
603 | shift = 0; | |
604 | break; | |
605 | case 8: | |
606 | reg = RT5645_ASRC_2; | |
607 | shift = 4; | |
608 | break; | |
609 | case 9: | |
610 | reg = RT5645_ASRC_2; | |
611 | shift = 8; | |
612 | break; | |
613 | case 10: | |
614 | reg = RT5645_ASRC_2; | |
615 | shift = 12; | |
616 | break; | |
617 | default: | |
618 | return 0; | |
619 | } | |
620 | ||
c5f596cb | 621 | val = (snd_soc_read(codec, reg) >> shift) & 0xf; |
9e268353 BL |
622 | switch (val) { |
623 | case 1: | |
624 | case 2: | |
625 | case 3: | |
626 | case 4: | |
627 | return 1; | |
628 | default: | |
629 | return 0; | |
630 | } | |
631 | ||
632 | } | |
633 | ||
79080a8b FY |
634 | /** |
635 | * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters | |
636 | * @codec: SoC audio codec device. | |
637 | * @filter_mask: mask of filters. | |
638 | * @clk_src: clock source | |
639 | * | |
640 | * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can | |
641 | * only support standard 32fs or 64fs i2s format, ASRC should be enabled to | |
642 | * support special i2s clock format such as Intel's 100fs(100 * sampling rate). | |
643 | * ASRC function will track i2s clock and generate a corresponding system clock | |
644 | * for codec. This function provides an API to select the clock source for a | |
645 | * set of filters specified by the mask. And the codec driver will turn on ASRC | |
646 | * for these filters if ASRC is selected as their clock source. | |
647 | */ | |
648 | int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec, | |
649 | unsigned int filter_mask, unsigned int clk_src) | |
650 | { | |
651 | unsigned int asrc2_mask = 0; | |
652 | unsigned int asrc2_value = 0; | |
653 | unsigned int asrc3_mask = 0; | |
654 | unsigned int asrc3_value = 0; | |
655 | ||
656 | switch (clk_src) { | |
657 | case RT5645_CLK_SEL_SYS: | |
658 | case RT5645_CLK_SEL_I2S1_ASRC: | |
659 | case RT5645_CLK_SEL_I2S2_ASRC: | |
660 | case RT5645_CLK_SEL_SYS2: | |
661 | break; | |
662 | ||
663 | default: | |
664 | return -EINVAL; | |
665 | } | |
666 | ||
667 | if (filter_mask & RT5645_DA_STEREO_FILTER) { | |
668 | asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK; | |
669 | asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK) | |
670 | | (clk_src << RT5645_DA_STO_CLK_SEL_SFT); | |
671 | } | |
672 | ||
673 | if (filter_mask & RT5645_DA_MONO_L_FILTER) { | |
674 | asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK; | |
675 | asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK) | |
676 | | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT); | |
677 | } | |
678 | ||
679 | if (filter_mask & RT5645_DA_MONO_R_FILTER) { | |
680 | asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK; | |
681 | asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK) | |
682 | | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT); | |
683 | } | |
684 | ||
685 | if (filter_mask & RT5645_AD_STEREO_FILTER) { | |
686 | asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK; | |
687 | asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK) | |
688 | | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT); | |
689 | } | |
690 | ||
691 | if (filter_mask & RT5645_AD_MONO_L_FILTER) { | |
692 | asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK; | |
693 | asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK) | |
694 | | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT); | |
695 | } | |
696 | ||
697 | if (filter_mask & RT5645_AD_MONO_R_FILTER) { | |
698 | asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK; | |
699 | asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK) | |
700 | | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT); | |
701 | } | |
702 | ||
703 | if (asrc2_mask) | |
704 | snd_soc_update_bits(codec, RT5645_ASRC_2, | |
705 | asrc2_mask, asrc2_value); | |
706 | ||
707 | if (asrc3_mask) | |
708 | snd_soc_update_bits(codec, RT5645_ASRC_3, | |
709 | asrc3_mask, asrc3_value); | |
710 | ||
711 | return 0; | |
712 | } | |
713 | EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src); | |
714 | ||
1319b2f6 OC |
715 | /* Digital Mixer */ |
716 | static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = { | |
717 | SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER, | |
718 | RT5645_M_ADC_L1_SFT, 1, 1), | |
719 | SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER, | |
720 | RT5645_M_ADC_L2_SFT, 1, 1), | |
721 | }; | |
722 | ||
723 | static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = { | |
724 | SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER, | |
725 | RT5645_M_ADC_R1_SFT, 1, 1), | |
726 | SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER, | |
727 | RT5645_M_ADC_R2_SFT, 1, 1), | |
728 | }; | |
729 | ||
730 | static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = { | |
731 | SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER, | |
732 | RT5645_M_MONO_ADC_L1_SFT, 1, 1), | |
733 | SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER, | |
734 | RT5645_M_MONO_ADC_L2_SFT, 1, 1), | |
735 | }; | |
736 | ||
737 | static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = { | |
738 | SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER, | |
739 | RT5645_M_MONO_ADC_R1_SFT, 1, 1), | |
740 | SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER, | |
741 | RT5645_M_MONO_ADC_R2_SFT, 1, 1), | |
742 | }; | |
743 | ||
744 | static const struct snd_kcontrol_new rt5645_dac_l_mix[] = { | |
745 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, | |
746 | RT5645_M_ADCMIX_L_SFT, 1, 1), | |
747 | SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, | |
748 | RT5645_M_DAC1_L_SFT, 1, 1), | |
749 | }; | |
750 | ||
751 | static const struct snd_kcontrol_new rt5645_dac_r_mix[] = { | |
752 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, | |
753 | RT5645_M_ADCMIX_R_SFT, 1, 1), | |
754 | SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, | |
755 | RT5645_M_DAC1_R_SFT, 1, 1), | |
756 | }; | |
757 | ||
758 | static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = { | |
759 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER, | |
760 | RT5645_M_DAC_L1_SFT, 1, 1), | |
761 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER, | |
762 | RT5645_M_DAC_L2_SFT, 1, 1), | |
763 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER, | |
764 | RT5645_M_DAC_R1_STO_L_SFT, 1, 1), | |
765 | }; | |
766 | ||
767 | static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = { | |
768 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER, | |
769 | RT5645_M_DAC_R1_SFT, 1, 1), | |
770 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER, | |
771 | RT5645_M_DAC_R2_SFT, 1, 1), | |
772 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER, | |
773 | RT5645_M_DAC_L1_STO_R_SFT, 1, 1), | |
774 | }; | |
775 | ||
776 | static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = { | |
777 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER, | |
778 | RT5645_M_DAC_L1_MONO_L_SFT, 1, 1), | |
779 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER, | |
780 | RT5645_M_DAC_L2_MONO_L_SFT, 1, 1), | |
781 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER, | |
782 | RT5645_M_DAC_R2_MONO_L_SFT, 1, 1), | |
783 | }; | |
784 | ||
785 | static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = { | |
786 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER, | |
787 | RT5645_M_DAC_R1_MONO_R_SFT, 1, 1), | |
788 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER, | |
789 | RT5645_M_DAC_R2_MONO_R_SFT, 1, 1), | |
790 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER, | |
791 | RT5645_M_DAC_L2_MONO_R_SFT, 1, 1), | |
792 | }; | |
793 | ||
794 | static const struct snd_kcontrol_new rt5645_dig_l_mix[] = { | |
795 | SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER, | |
796 | RT5645_M_STO_L_DAC_L_SFT, 1, 1), | |
797 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER, | |
798 | RT5645_M_DAC_L2_DAC_L_SFT, 1, 1), | |
799 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER, | |
800 | RT5645_M_DAC_R2_DAC_L_SFT, 1, 1), | |
801 | }; | |
802 | ||
803 | static const struct snd_kcontrol_new rt5645_dig_r_mix[] = { | |
804 | SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER, | |
805 | RT5645_M_STO_R_DAC_R_SFT, 1, 1), | |
806 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER, | |
807 | RT5645_M_DAC_R2_DAC_R_SFT, 1, 1), | |
808 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER, | |
809 | RT5645_M_DAC_L2_DAC_R_SFT, 1, 1), | |
810 | }; | |
811 | ||
812 | /* Analog Input Mixer */ | |
813 | static const struct snd_kcontrol_new rt5645_rec_l_mix[] = { | |
814 | SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER, | |
815 | RT5645_M_HP_L_RM_L_SFT, 1, 1), | |
816 | SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER, | |
817 | RT5645_M_IN_L_RM_L_SFT, 1, 1), | |
818 | SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER, | |
819 | RT5645_M_BST2_RM_L_SFT, 1, 1), | |
820 | SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER, | |
821 | RT5645_M_BST1_RM_L_SFT, 1, 1), | |
822 | SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER, | |
823 | RT5645_M_OM_L_RM_L_SFT, 1, 1), | |
824 | }; | |
825 | ||
826 | static const struct snd_kcontrol_new rt5645_rec_r_mix[] = { | |
827 | SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER, | |
828 | RT5645_M_HP_R_RM_R_SFT, 1, 1), | |
829 | SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER, | |
830 | RT5645_M_IN_R_RM_R_SFT, 1, 1), | |
831 | SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER, | |
832 | RT5645_M_BST2_RM_R_SFT, 1, 1), | |
833 | SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER, | |
834 | RT5645_M_BST1_RM_R_SFT, 1, 1), | |
835 | SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER, | |
836 | RT5645_M_OM_R_RM_R_SFT, 1, 1), | |
837 | }; | |
838 | ||
839 | static const struct snd_kcontrol_new rt5645_spk_l_mix[] = { | |
840 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER, | |
841 | RT5645_M_DAC_L1_SM_L_SFT, 1, 1), | |
842 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER, | |
843 | RT5645_M_DAC_L2_SM_L_SFT, 1, 1), | |
844 | SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER, | |
845 | RT5645_M_IN_L_SM_L_SFT, 1, 1), | |
846 | SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER, | |
847 | RT5645_M_BST1_L_SM_L_SFT, 1, 1), | |
848 | }; | |
849 | ||
850 | static const struct snd_kcontrol_new rt5645_spk_r_mix[] = { | |
851 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER, | |
852 | RT5645_M_DAC_R1_SM_R_SFT, 1, 1), | |
853 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER, | |
854 | RT5645_M_DAC_R2_SM_R_SFT, 1, 1), | |
855 | SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER, | |
856 | RT5645_M_IN_R_SM_R_SFT, 1, 1), | |
857 | SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER, | |
858 | RT5645_M_BST2_R_SM_R_SFT, 1, 1), | |
859 | }; | |
860 | ||
861 | static const struct snd_kcontrol_new rt5645_out_l_mix[] = { | |
862 | SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER, | |
863 | RT5645_M_BST1_OM_L_SFT, 1, 1), | |
864 | SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER, | |
865 | RT5645_M_IN_L_OM_L_SFT, 1, 1), | |
866 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER, | |
867 | RT5645_M_DAC_L2_OM_L_SFT, 1, 1), | |
868 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER, | |
869 | RT5645_M_DAC_L1_OM_L_SFT, 1, 1), | |
870 | }; | |
871 | ||
872 | static const struct snd_kcontrol_new rt5645_out_r_mix[] = { | |
873 | SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER, | |
874 | RT5645_M_BST2_OM_R_SFT, 1, 1), | |
875 | SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER, | |
876 | RT5645_M_IN_R_OM_R_SFT, 1, 1), | |
877 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER, | |
878 | RT5645_M_DAC_R2_OM_R_SFT, 1, 1), | |
879 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER, | |
880 | RT5645_M_DAC_R1_OM_R_SFT, 1, 1), | |
881 | }; | |
882 | ||
883 | static const struct snd_kcontrol_new rt5645_spo_l_mix[] = { | |
884 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER, | |
885 | RT5645_M_DAC_R1_SPM_L_SFT, 1, 1), | |
886 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER, | |
887 | RT5645_M_DAC_L1_SPM_L_SFT, 1, 1), | |
888 | SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER, | |
889 | RT5645_M_SV_R_SPM_L_SFT, 1, 1), | |
890 | SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER, | |
891 | RT5645_M_SV_L_SPM_L_SFT, 1, 1), | |
892 | }; | |
893 | ||
894 | static const struct snd_kcontrol_new rt5645_spo_r_mix[] = { | |
895 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER, | |
896 | RT5645_M_DAC_R1_SPM_R_SFT, 1, 1), | |
897 | SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER, | |
898 | RT5645_M_SV_R_SPM_R_SFT, 1, 1), | |
899 | }; | |
900 | ||
901 | static const struct snd_kcontrol_new rt5645_hpo_mix[] = { | |
902 | SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER, | |
903 | RT5645_M_DAC1_HM_SFT, 1, 1), | |
904 | SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER, | |
905 | RT5645_M_HPVOL_HM_SFT, 1, 1), | |
906 | }; | |
907 | ||
908 | static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = { | |
909 | SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL, | |
910 | RT5645_M_DAC1_HV_SFT, 1, 1), | |
911 | SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL, | |
912 | RT5645_M_DAC2_HV_SFT, 1, 1), | |
913 | SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL, | |
914 | RT5645_M_IN_HV_SFT, 1, 1), | |
915 | SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL, | |
916 | RT5645_M_BST1_HV_SFT, 1, 1), | |
917 | }; | |
918 | ||
919 | static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = { | |
920 | SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL, | |
921 | RT5645_M_DAC1_HV_SFT, 1, 1), | |
922 | SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL, | |
923 | RT5645_M_DAC2_HV_SFT, 1, 1), | |
924 | SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL, | |
925 | RT5645_M_IN_HV_SFT, 1, 1), | |
926 | SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL, | |
927 | RT5645_M_BST2_HV_SFT, 1, 1), | |
928 | }; | |
929 | ||
930 | static const struct snd_kcontrol_new rt5645_lout_mix[] = { | |
931 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER, | |
932 | RT5645_M_DAC_L1_LM_SFT, 1, 1), | |
933 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER, | |
934 | RT5645_M_DAC_R1_LM_SFT, 1, 1), | |
935 | SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER, | |
936 | RT5645_M_OV_L_LM_SFT, 1, 1), | |
937 | SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER, | |
938 | RT5645_M_OV_R_LM_SFT, 1, 1), | |
939 | }; | |
940 | ||
941 | /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */ | |
942 | static const char * const rt5645_dac1_src[] = { | |
943 | "IF1 DAC", "IF2 DAC", "IF3 DAC" | |
944 | }; | |
945 | ||
946 | static SOC_ENUM_SINGLE_DECL( | |
947 | rt5645_dac1l_enum, RT5645_AD_DA_MIXER, | |
948 | RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src); | |
949 | ||
950 | static const struct snd_kcontrol_new rt5645_dac1l_mux = | |
951 | SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum); | |
952 | ||
953 | static SOC_ENUM_SINGLE_DECL( | |
954 | rt5645_dac1r_enum, RT5645_AD_DA_MIXER, | |
955 | RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src); | |
956 | ||
957 | static const struct snd_kcontrol_new rt5645_dac1r_mux = | |
958 | SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum); | |
959 | ||
960 | /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ | |
961 | static const char * const rt5645_dac12_src[] = { | |
962 | "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC" | |
963 | }; | |
964 | ||
965 | static SOC_ENUM_SINGLE_DECL( | |
966 | rt5645_dac2l_enum, RT5645_DAC_CTRL, | |
967 | RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src); | |
968 | ||
969 | static const struct snd_kcontrol_new rt5645_dac_l2_mux = | |
970 | SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum); | |
971 | ||
972 | static const char * const rt5645_dacr2_src[] = { | |
973 | "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic" | |
974 | }; | |
975 | ||
976 | static SOC_ENUM_SINGLE_DECL( | |
977 | rt5645_dac2r_enum, RT5645_DAC_CTRL, | |
978 | RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src); | |
979 | ||
980 | static const struct snd_kcontrol_new rt5645_dac_r2_mux = | |
981 | SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum); | |
982 | ||
983 | ||
984 | /* INL/R source */ | |
985 | static const char * const rt5645_inl_src[] = { | |
986 | "IN2P", "MonoP" | |
987 | }; | |
988 | ||
989 | static SOC_ENUM_SINGLE_DECL( | |
990 | rt5645_inl_enum, RT5645_INL1_INR1_VOL, | |
991 | RT5645_INL_SEL_SFT, rt5645_inl_src); | |
992 | ||
993 | static const struct snd_kcontrol_new rt5645_inl_mux = | |
994 | SOC_DAPM_ENUM("INL source", rt5645_inl_enum); | |
995 | ||
996 | static const char * const rt5645_inr_src[] = { | |
997 | "IN2N", "MonoN" | |
998 | }; | |
999 | ||
1000 | static SOC_ENUM_SINGLE_DECL( | |
1001 | rt5645_inr_enum, RT5645_INL1_INR1_VOL, | |
1002 | RT5645_INR_SEL_SFT, rt5645_inr_src); | |
1003 | ||
1004 | static const struct snd_kcontrol_new rt5645_inr_mux = | |
1005 | SOC_DAPM_ENUM("INR source", rt5645_inr_enum); | |
1006 | ||
1007 | /* Stereo1 ADC source */ | |
1008 | /* MX-27 [12] */ | |
1009 | static const char * const rt5645_stereo_adc1_src[] = { | |
1010 | "DAC MIX", "ADC" | |
1011 | }; | |
1012 | ||
1013 | static SOC_ENUM_SINGLE_DECL( | |
1014 | rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER, | |
1015 | RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src); | |
1016 | ||
1017 | static const struct snd_kcontrol_new rt5645_sto_adc1_mux = | |
1018 | SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum); | |
1019 | ||
1020 | /* MX-27 [11] */ | |
1021 | static const char * const rt5645_stereo_adc2_src[] = { | |
1022 | "DAC MIX", "DMIC" | |
1023 | }; | |
1024 | ||
1025 | static SOC_ENUM_SINGLE_DECL( | |
1026 | rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER, | |
1027 | RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src); | |
1028 | ||
1029 | static const struct snd_kcontrol_new rt5645_sto_adc2_mux = | |
1030 | SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum); | |
1031 | ||
1032 | /* MX-27 [8] */ | |
1033 | static const char * const rt5645_stereo_dmic_src[] = { | |
1034 | "DMIC1", "DMIC2" | |
1035 | }; | |
1036 | ||
1037 | static SOC_ENUM_SINGLE_DECL( | |
1038 | rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER, | |
1039 | RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src); | |
1040 | ||
1041 | static const struct snd_kcontrol_new rt5645_sto1_dmic_mux = | |
1042 | SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum); | |
1043 | ||
1044 | /* Mono ADC source */ | |
1045 | /* MX-28 [12] */ | |
1046 | static const char * const rt5645_mono_adc_l1_src[] = { | |
1047 | "Mono DAC MIXL", "ADC" | |
1048 | }; | |
1049 | ||
1050 | static SOC_ENUM_SINGLE_DECL( | |
1051 | rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER, | |
1052 | RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src); | |
1053 | ||
1054 | static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux = | |
1055 | SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum); | |
1056 | /* MX-28 [11] */ | |
1057 | static const char * const rt5645_mono_adc_l2_src[] = { | |
1058 | "Mono DAC MIXL", "DMIC" | |
1059 | }; | |
1060 | ||
1061 | static SOC_ENUM_SINGLE_DECL( | |
1062 | rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER, | |
1063 | RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src); | |
1064 | ||
1065 | static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux = | |
1066 | SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum); | |
1067 | ||
1068 | /* MX-28 [8] */ | |
1069 | static const char * const rt5645_mono_dmic_src[] = { | |
1070 | "DMIC1", "DMIC2" | |
1071 | }; | |
1072 | ||
1073 | static SOC_ENUM_SINGLE_DECL( | |
1074 | rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER, | |
1075 | RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src); | |
1076 | ||
1077 | static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux = | |
1078 | SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum); | |
1079 | /* MX-28 [1:0] */ | |
1080 | static SOC_ENUM_SINGLE_DECL( | |
1081 | rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER, | |
1082 | RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src); | |
1083 | ||
1084 | static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux = | |
1085 | SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum); | |
1086 | /* MX-28 [4] */ | |
1087 | static const char * const rt5645_mono_adc_r1_src[] = { | |
1088 | "Mono DAC MIXR", "ADC" | |
1089 | }; | |
1090 | ||
1091 | static SOC_ENUM_SINGLE_DECL( | |
1092 | rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER, | |
1093 | RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src); | |
1094 | ||
1095 | static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux = | |
1096 | SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum); | |
1097 | /* MX-28 [3] */ | |
1098 | static const char * const rt5645_mono_adc_r2_src[] = { | |
1099 | "Mono DAC MIXR", "DMIC" | |
1100 | }; | |
1101 | ||
1102 | static SOC_ENUM_SINGLE_DECL( | |
1103 | rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER, | |
1104 | RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src); | |
1105 | ||
1106 | static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux = | |
1107 | SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum); | |
1108 | ||
1109 | /* MX-77 [9:8] */ | |
1110 | static const char * const rt5645_if1_adc_in_src[] = { | |
21ab3f2b BL |
1111 | "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC", |
1112 | "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1" | |
1319b2f6 OC |
1113 | }; |
1114 | ||
1115 | static SOC_ENUM_SINGLE_DECL( | |
1116 | rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1, | |
1117 | RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src); | |
1118 | ||
1119 | static const struct snd_kcontrol_new rt5645_if1_adc_in_mux = | |
1120 | SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum); | |
1121 | ||
21ab3f2b BL |
1122 | /* MX-78 [4:0] */ |
1123 | static const char * const rt5650_if1_adc_in_src[] = { | |
1124 | "IF_ADC1/IF_ADC2/DAC_REF/Null", | |
1125 | "IF_ADC1/IF_ADC2/Null/DAC_REF", | |
1126 | "IF_ADC1/DAC_REF/IF_ADC2/Null", | |
1127 | "IF_ADC1/DAC_REF/Null/IF_ADC2", | |
1128 | "IF_ADC1/Null/DAC_REF/IF_ADC2", | |
1129 | "IF_ADC1/Null/IF_ADC2/DAC_REF", | |
1130 | ||
1131 | "IF_ADC2/IF_ADC1/DAC_REF/Null", | |
1132 | "IF_ADC2/IF_ADC1/Null/DAC_REF", | |
1133 | "IF_ADC2/DAC_REF/IF_ADC1/Null", | |
1134 | "IF_ADC2/DAC_REF/Null/IF_ADC1", | |
1135 | "IF_ADC2/Null/DAC_REF/IF_ADC1", | |
1136 | "IF_ADC2/Null/IF_ADC1/DAC_REF", | |
1137 | ||
1138 | "DAC_REF/IF_ADC1/IF_ADC2/Null", | |
1139 | "DAC_REF/IF_ADC1/Null/IF_ADC2", | |
1140 | "DAC_REF/IF_ADC2/IF_ADC1/Null", | |
1141 | "DAC_REF/IF_ADC2/Null/IF_ADC1", | |
1142 | "DAC_REF/Null/IF_ADC1/IF_ADC2", | |
1143 | "DAC_REF/Null/IF_ADC2/IF_ADC1", | |
1144 | ||
1145 | "Null/IF_ADC1/IF_ADC2/DAC_REF", | |
1146 | "Null/IF_ADC1/DAC_REF/IF_ADC2", | |
1147 | "Null/IF_ADC2/IF_ADC1/DAC_REF", | |
1148 | "Null/IF_ADC2/DAC_REF/IF_ADC1", | |
1149 | "Null/DAC_REF/IF_ADC1/IF_ADC2", | |
1150 | "Null/DAC_REF/IF_ADC2/IF_ADC1", | |
1151 | }; | |
1152 | ||
1153 | static SOC_ENUM_SINGLE_DECL( | |
1154 | rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2, | |
1155 | 0, rt5650_if1_adc_in_src); | |
1156 | ||
1157 | static const struct snd_kcontrol_new rt5650_if1_adc_in_mux = | |
1158 | SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum); | |
1159 | ||
1160 | /* MX-78 [15:14][13:12][11:10] */ | |
1161 | static const char * const rt5645_tdm_adc_swap_select[] = { | |
1162 | "L/R", "R/L", "L/L", "R/R" | |
1163 | }; | |
1164 | ||
1165 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum, | |
1166 | RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select); | |
1167 | ||
1168 | static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux = | |
1169 | SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum); | |
1170 | ||
1171 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum, | |
1172 | RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select); | |
1173 | ||
1174 | static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux = | |
1175 | SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum); | |
1176 | ||
1177 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum, | |
1178 | RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select); | |
1179 | ||
1180 | static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux = | |
1181 | SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum); | |
1182 | ||
1183 | /* MX-77 [7:6][5:4][3:2] */ | |
1184 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum, | |
1185 | RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select); | |
1186 | ||
1187 | static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux = | |
1188 | SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum); | |
1189 | ||
1190 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum, | |
1191 | RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select); | |
1192 | ||
1193 | static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux = | |
1194 | SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum); | |
1195 | ||
1196 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum, | |
1197 | RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select); | |
1198 | ||
1199 | static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux = | |
1200 | SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum); | |
1201 | ||
1202 | /* MX-79 [14:12][10:8][6:4][2:0] */ | |
1203 | static const char * const rt5645_tdm_dac_swap_select[] = { | |
1204 | "Slot0", "Slot1", "Slot2", "Slot3" | |
1205 | }; | |
1206 | ||
1207 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum, | |
1208 | RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select); | |
1209 | ||
1210 | static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux = | |
1211 | SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum); | |
1212 | ||
1213 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum, | |
1214 | RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select); | |
1215 | ||
1216 | static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux = | |
1217 | SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum); | |
1218 | ||
1219 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum, | |
1220 | RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select); | |
1221 | ||
1222 | static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux = | |
1223 | SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum); | |
1224 | ||
1225 | static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum, | |
1226 | RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select); | |
1227 | ||
1228 | static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux = | |
1229 | SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum); | |
1230 | ||
1231 | /* MX-7a [14:12][10:8][6:4][2:0] */ | |
1232 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum, | |
1233 | RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select); | |
1234 | ||
1235 | static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux = | |
1236 | SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum); | |
1237 | ||
1238 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum, | |
1239 | RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select); | |
1240 | ||
1241 | static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux = | |
1242 | SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum); | |
1243 | ||
1244 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum, | |
1245 | RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select); | |
1246 | ||
1247 | static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux = | |
1248 | SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum); | |
1249 | ||
1250 | static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum, | |
1251 | RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select); | |
1252 | ||
1253 | static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux = | |
1254 | SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum); | |
1255 | ||
5c4ca99d BL |
1256 | /* MX-2d [3] [2] */ |
1257 | static const char * const rt5650_a_dac1_src[] = { | |
1258 | "DAC1", "Stereo DAC Mixer" | |
1259 | }; | |
1260 | ||
1261 | static SOC_ENUM_SINGLE_DECL( | |
1262 | rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR, | |
1263 | RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src); | |
1264 | ||
1265 | static const struct snd_kcontrol_new rt5650_a_dac1_l_mux = | |
1266 | SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum); | |
1267 | ||
1268 | static SOC_ENUM_SINGLE_DECL( | |
1269 | rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR, | |
1270 | RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src); | |
1271 | ||
1272 | static const struct snd_kcontrol_new rt5650_a_dac1_r_mux = | |
1273 | SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum); | |
1274 | ||
1275 | /* MX-2d [1] [0] */ | |
1276 | static const char * const rt5650_a_dac2_src[] = { | |
1277 | "Stereo DAC Mixer", "Mono DAC Mixer" | |
1278 | }; | |
1279 | ||
1280 | static SOC_ENUM_SINGLE_DECL( | |
1281 | rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR, | |
1282 | RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src); | |
1283 | ||
1284 | static const struct snd_kcontrol_new rt5650_a_dac2_l_mux = | |
1285 | SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum); | |
1286 | ||
1287 | static SOC_ENUM_SINGLE_DECL( | |
1288 | rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR, | |
1289 | RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src); | |
1290 | ||
1291 | static const struct snd_kcontrol_new rt5650_a_dac2_r_mux = | |
1292 | SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum); | |
1293 | ||
1319b2f6 OC |
1294 | /* MX-2F [13:12] */ |
1295 | static const char * const rt5645_if2_adc_in_src[] = { | |
1296 | "IF_ADC1", "IF_ADC2", "VAD_ADC" | |
1297 | }; | |
1298 | ||
1299 | static SOC_ENUM_SINGLE_DECL( | |
1300 | rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA, | |
1301 | RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src); | |
1302 | ||
1303 | static const struct snd_kcontrol_new rt5645_if2_adc_in_mux = | |
1304 | SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum); | |
1305 | ||
1306 | /* MX-2F [1:0] */ | |
1307 | static const char * const rt5645_if3_adc_in_src[] = { | |
1308 | "IF_ADC1", "IF_ADC2", "VAD_ADC" | |
1309 | }; | |
1310 | ||
1311 | static SOC_ENUM_SINGLE_DECL( | |
1312 | rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA, | |
1313 | RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src); | |
1314 | ||
1315 | static const struct snd_kcontrol_new rt5645_if3_adc_in_mux = | |
1316 | SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum); | |
1317 | ||
1318 | /* MX-31 [15] [13] [11] [9] */ | |
1319 | static const char * const rt5645_pdm_src[] = { | |
1320 | "Mono DAC", "Stereo DAC" | |
1321 | }; | |
1322 | ||
1323 | static SOC_ENUM_SINGLE_DECL( | |
1324 | rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL, | |
1325 | RT5645_PDM1_L_SFT, rt5645_pdm_src); | |
1326 | ||
1327 | static const struct snd_kcontrol_new rt5645_pdm1_l_mux = | |
1328 | SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum); | |
1329 | ||
1330 | static SOC_ENUM_SINGLE_DECL( | |
1331 | rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL, | |
1332 | RT5645_PDM1_R_SFT, rt5645_pdm_src); | |
1333 | ||
1334 | static const struct snd_kcontrol_new rt5645_pdm1_r_mux = | |
1335 | SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum); | |
1336 | ||
1337 | /* MX-9D [9:8] */ | |
1338 | static const char * const rt5645_vad_adc_src[] = { | |
1339 | "Sto1 ADC L", "Mono ADC L", "Mono ADC R" | |
1340 | }; | |
1341 | ||
1342 | static SOC_ENUM_SINGLE_DECL( | |
1343 | rt5645_vad_adc_enum, RT5645_VAD_CTRL4, | |
1344 | RT5645_VAD_SEL_SFT, rt5645_vad_adc_src); | |
1345 | ||
1346 | static const struct snd_kcontrol_new rt5645_vad_adc_mux = | |
1347 | SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum); | |
1348 | ||
1349 | static const struct snd_kcontrol_new spk_l_vol_control = | |
1350 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL, | |
1351 | RT5645_L_MUTE_SFT, 1, 1); | |
1352 | ||
1353 | static const struct snd_kcontrol_new spk_r_vol_control = | |
1354 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL, | |
1355 | RT5645_R_MUTE_SFT, 1, 1); | |
1356 | ||
1357 | static const struct snd_kcontrol_new hp_l_vol_control = | |
1358 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL, | |
1359 | RT5645_L_MUTE_SFT, 1, 1); | |
1360 | ||
1361 | static const struct snd_kcontrol_new hp_r_vol_control = | |
1362 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL, | |
1363 | RT5645_R_MUTE_SFT, 1, 1); | |
1364 | ||
1365 | static const struct snd_kcontrol_new pdm1_l_vol_control = | |
1366 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL, | |
1367 | RT5645_M_PDM1_L, 1, 1); | |
1368 | ||
1369 | static const struct snd_kcontrol_new pdm1_r_vol_control = | |
1370 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL, | |
1371 | RT5645_M_PDM1_R, 1, 1); | |
1372 | ||
1373 | static void hp_amp_power(struct snd_soc_codec *codec, int on) | |
1374 | { | |
1375 | static int hp_amp_power_count; | |
1376 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
1377 | ||
1378 | if (on) { | |
1379 | if (hp_amp_power_count <= 0) { | |
d12d6c4e | 1380 | if (rt5645->codec_type == CODEC_TYPE_RT5650) { |
588cd850 | 1381 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x3100); |
d12d6c4e JL |
1382 | snd_soc_write(codec, RT5645_CHARGE_PUMP, |
1383 | 0x0e06); | |
588cd850 OC |
1384 | snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d); |
1385 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1386 | RT5645_HP_DCC_INT1, 0x9f01); | |
1387 | msleep(20); | |
1388 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1389 | RT5645_HP_CO_MASK, RT5645_HP_CO_EN); | |
d12d6c4e JL |
1390 | regmap_write(rt5645->regmap, RT5645_PR_BASE + |
1391 | 0x3e, 0x7400); | |
1392 | snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737); | |
1393 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1394 | RT5645_MAMP_INT_REG2, 0xfc00); | |
1395 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); | |
588cd850 OC |
1396 | mdelay(5); |
1397 | rt5645->hp_on = true; | |
d12d6c4e JL |
1398 | } else { |
1399 | /* depop parameters */ | |
1400 | snd_soc_update_bits(codec, RT5645_DEPOP_M2, | |
1401 | RT5645_DEPOP_MASK, RT5645_DEPOP_MAN); | |
1402 | snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d); | |
1403 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1404 | RT5645_HP_DCC_INT1, 0x9f01); | |
1405 | mdelay(150); | |
1406 | /* headphone amp power on */ | |
1407 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1408 | RT5645_PWR_FV1 | RT5645_PWR_FV2, 0); | |
1409 | snd_soc_update_bits(codec, RT5645_PWR_VOL, | |
1410 | RT5645_PWR_HV_L | RT5645_PWR_HV_R, | |
1411 | RT5645_PWR_HV_L | RT5645_PWR_HV_R); | |
1412 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1413 | RT5645_PWR_HP_L | RT5645_PWR_HP_R | | |
1414 | RT5645_PWR_HA, | |
1415 | RT5645_PWR_HP_L | RT5645_PWR_HP_R | | |
1416 | RT5645_PWR_HA); | |
1417 | mdelay(5); | |
1418 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1419 | RT5645_PWR_FV1 | RT5645_PWR_FV2, | |
1420 | RT5645_PWR_FV1 | RT5645_PWR_FV2); | |
1421 | ||
1422 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1423 | RT5645_HP_CO_MASK | RT5645_HP_SG_MASK, | |
1424 | RT5645_HP_CO_EN | RT5645_HP_SG_EN); | |
1425 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1426 | 0x14, 0x1aaa); | |
1427 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1428 | 0x24, 0x0430); | |
1429 | } | |
1319b2f6 OC |
1430 | } |
1431 | hp_amp_power_count++; | |
1432 | } else { | |
1433 | hp_amp_power_count--; | |
1434 | if (hp_amp_power_count <= 0) { | |
d12d6c4e JL |
1435 | if (rt5645->codec_type == CODEC_TYPE_RT5650) { |
1436 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1437 | 0x3e, 0x7400); | |
1438 | snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737); | |
1439 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | |
1440 | RT5645_MAMP_INT_REG2, 0xfc00); | |
1441 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); | |
1442 | msleep(100); | |
1443 | snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001); | |
1444 | ||
1445 | } else { | |
1446 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1447 | RT5645_HP_SG_MASK | | |
1448 | RT5645_HP_L_SMT_MASK | | |
1449 | RT5645_HP_R_SMT_MASK, | |
1450 | RT5645_HP_SG_DIS | | |
1451 | RT5645_HP_L_SMT_DIS | | |
1452 | RT5645_HP_R_SMT_DIS); | |
1453 | /* headphone amp power down */ | |
1454 | snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000); | |
1455 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1456 | RT5645_PWR_HP_L | RT5645_PWR_HP_R | | |
1457 | RT5645_PWR_HA, 0); | |
1458 | snd_soc_update_bits(codec, RT5645_DEPOP_M2, | |
1459 | RT5645_DEPOP_MASK, 0); | |
1460 | } | |
1319b2f6 OC |
1461 | } |
1462 | } | |
1463 | } | |
1464 | ||
1465 | static int rt5645_hp_event(struct snd_soc_dapm_widget *w, | |
1466 | struct snd_kcontrol *kcontrol, int event) | |
1467 | { | |
c5f596cb | 1468 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
1319b2f6 OC |
1469 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
1470 | ||
1471 | switch (event) { | |
1472 | case SND_SOC_DAPM_POST_PMU: | |
1473 | hp_amp_power(codec, 1); | |
1474 | /* headphone unmute sequence */ | |
d12d6c4e | 1475 | if (rt5645->codec_type == CODEC_TYPE_RT5645) { |
5c4ca99d BL |
1476 | snd_soc_update_bits(codec, RT5645_DEPOP_M3, |
1477 | RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK | | |
1478 | RT5645_CP_FQ3_MASK, | |
1479 | (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) | | |
1480 | (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) | | |
1481 | (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT)); | |
d12d6c4e JL |
1482 | regmap_write(rt5645->regmap, RT5645_PR_BASE + |
1483 | RT5645_MAMP_INT_REG2, 0xfc00); | |
1484 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1485 | RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN); | |
1486 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1487 | RT5645_RSTN_MASK, RT5645_RSTN_EN); | |
1488 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1489 | RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK | | |
1490 | RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS | | |
1491 | RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN); | |
1492 | msleep(40); | |
1493 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1494 | RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK | | |
1495 | RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS | | |
1496 | RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS); | |
5c4ca99d | 1497 | } |
1319b2f6 OC |
1498 | break; |
1499 | ||
1500 | case SND_SOC_DAPM_PRE_PMD: | |
1501 | /* headphone mute sequence */ | |
d12d6c4e | 1502 | if (rt5645->codec_type == CODEC_TYPE_RT5645) { |
5c4ca99d BL |
1503 | snd_soc_update_bits(codec, RT5645_DEPOP_M3, |
1504 | RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK | | |
1505 | RT5645_CP_FQ3_MASK, | |
1506 | (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) | | |
1507 | (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) | | |
1508 | (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT)); | |
d12d6c4e JL |
1509 | regmap_write(rt5645->regmap, RT5645_PR_BASE + |
1510 | RT5645_MAMP_INT_REG2, 0xfc00); | |
1511 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1512 | RT5645_HP_SG_MASK, RT5645_HP_SG_EN); | |
1513 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1514 | RT5645_RSTP_MASK, RT5645_RSTP_EN); | |
1515 | snd_soc_update_bits(codec, RT5645_DEPOP_M1, | |
1516 | RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK | | |
1517 | RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS | | |
1518 | RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN); | |
1519 | msleep(30); | |
5c4ca99d | 1520 | } |
1319b2f6 OC |
1521 | hp_amp_power(codec, 0); |
1522 | break; | |
1523 | ||
1524 | default: | |
1525 | return 0; | |
1526 | } | |
1527 | ||
1528 | return 0; | |
1529 | } | |
1530 | ||
1531 | static int rt5645_spk_event(struct snd_soc_dapm_widget *w, | |
1532 | struct snd_kcontrol *kcontrol, int event) | |
1533 | { | |
c5f596cb | 1534 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
1319b2f6 OC |
1535 | |
1536 | switch (event) { | |
1537 | case SND_SOC_DAPM_POST_PMU: | |
1538 | snd_soc_update_bits(codec, RT5645_PWR_DIG1, | |
1539 | RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | | |
1540 | RT5645_PWR_CLS_D_L, | |
1541 | RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | | |
1542 | RT5645_PWR_CLS_D_L); | |
1543 | break; | |
1544 | ||
1545 | case SND_SOC_DAPM_PRE_PMD: | |
1546 | snd_soc_update_bits(codec, RT5645_PWR_DIG1, | |
1547 | RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | | |
1548 | RT5645_PWR_CLS_D_L, 0); | |
1549 | break; | |
1550 | ||
1551 | default: | |
1552 | return 0; | |
1553 | } | |
1554 | ||
1555 | return 0; | |
1556 | } | |
1557 | ||
1558 | static int rt5645_lout_event(struct snd_soc_dapm_widget *w, | |
1559 | struct snd_kcontrol *kcontrol, int event) | |
1560 | { | |
c5f596cb | 1561 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
1319b2f6 OC |
1562 | |
1563 | switch (event) { | |
1564 | case SND_SOC_DAPM_POST_PMU: | |
1565 | hp_amp_power(codec, 1); | |
1566 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1567 | RT5645_PWR_LM, RT5645_PWR_LM); | |
1568 | snd_soc_update_bits(codec, RT5645_LOUT1, | |
1569 | RT5645_L_MUTE | RT5645_R_MUTE, 0); | |
1570 | break; | |
1571 | ||
1572 | case SND_SOC_DAPM_PRE_PMD: | |
1573 | snd_soc_update_bits(codec, RT5645_LOUT1, | |
1574 | RT5645_L_MUTE | RT5645_R_MUTE, | |
1575 | RT5645_L_MUTE | RT5645_R_MUTE); | |
1576 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
1577 | RT5645_PWR_LM, 0); | |
1578 | hp_amp_power(codec, 0); | |
1579 | break; | |
1580 | ||
1581 | default: | |
1582 | return 0; | |
1583 | } | |
1584 | ||
1585 | return 0; | |
1586 | } | |
1587 | ||
1588 | static int rt5645_bst2_event(struct snd_soc_dapm_widget *w, | |
1589 | struct snd_kcontrol *kcontrol, int event) | |
1590 | { | |
c5f596cb | 1591 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
1319b2f6 OC |
1592 | |
1593 | switch (event) { | |
1594 | case SND_SOC_DAPM_POST_PMU: | |
1595 | snd_soc_update_bits(codec, RT5645_PWR_ANLG2, | |
1596 | RT5645_PWR_BST2_P, RT5645_PWR_BST2_P); | |
1597 | break; | |
1598 | ||
1599 | case SND_SOC_DAPM_PRE_PMD: | |
1600 | snd_soc_update_bits(codec, RT5645_PWR_ANLG2, | |
1601 | RT5645_PWR_BST2_P, 0); | |
1602 | break; | |
1603 | ||
1604 | default: | |
1605 | return 0; | |
1606 | } | |
1607 | ||
1608 | return 0; | |
1609 | } | |
1610 | ||
588cd850 OC |
1611 | static int rt5650_hp_event(struct snd_soc_dapm_widget *w, |
1612 | struct snd_kcontrol *k, int event) | |
1613 | { | |
1614 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | |
1615 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
1616 | ||
1617 | switch (event) { | |
1618 | case SND_SOC_DAPM_POST_PMU: | |
1619 | if (rt5645->hp_on) { | |
1620 | msleep(100); | |
1621 | rt5645->hp_on = false; | |
1622 | } | |
1623 | break; | |
1624 | ||
1625 | default: | |
1626 | return 0; | |
1627 | } | |
1628 | ||
1629 | return 0; | |
1630 | } | |
1631 | ||
1319b2f6 OC |
1632 | static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = { |
1633 | SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER, | |
1634 | RT5645_PWR_LDO2_BIT, 0, NULL, 0), | |
1635 | SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2, | |
1636 | RT5645_PWR_PLL_BIT, 0, NULL, 0), | |
1637 | ||
1638 | SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2, | |
1639 | RT5645_PWR_JD1_BIT, 0, NULL, 0), | |
1640 | SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL, | |
1641 | RT5645_PWR_MIC_DET_BIT, 0, NULL, 0), | |
1642 | ||
9e268353 BL |
1643 | /* ASRC */ |
1644 | SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1, | |
1645 | 11, 0, NULL, 0), | |
1646 | SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1, | |
1647 | 12, 0, NULL, 0), | |
1648 | SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1, | |
1649 | 10, 0, NULL, 0), | |
1650 | SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1, | |
1651 | 9, 0, NULL, 0), | |
1652 | SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1, | |
1653 | 8, 0, NULL, 0), | |
1654 | SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1, | |
1655 | 7, 0, NULL, 0), | |
1656 | SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1, | |
1657 | 5, 0, NULL, 0), | |
1658 | SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1, | |
1659 | 4, 0, NULL, 0), | |
1660 | SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1, | |
1661 | 3, 0, NULL, 0), | |
1662 | SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1, | |
1663 | 1, 0, NULL, 0), | |
1664 | SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1, | |
1665 | 0, 0, NULL, 0), | |
1666 | ||
1319b2f6 OC |
1667 | /* Input Side */ |
1668 | /* micbias */ | |
1669 | SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2, | |
1670 | RT5645_PWR_MB1_BIT, 0), | |
1671 | SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2, | |
1672 | RT5645_PWR_MB2_BIT, 0), | |
1673 | /* Input Lines */ | |
1674 | SND_SOC_DAPM_INPUT("DMIC L1"), | |
1675 | SND_SOC_DAPM_INPUT("DMIC R1"), | |
1676 | SND_SOC_DAPM_INPUT("DMIC L2"), | |
1677 | SND_SOC_DAPM_INPUT("DMIC R2"), | |
1678 | ||
1679 | SND_SOC_DAPM_INPUT("IN1P"), | |
1680 | SND_SOC_DAPM_INPUT("IN1N"), | |
1681 | SND_SOC_DAPM_INPUT("IN2P"), | |
1682 | SND_SOC_DAPM_INPUT("IN2N"), | |
1683 | ||
1684 | SND_SOC_DAPM_INPUT("Haptic Generator"), | |
1685 | ||
1686 | SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1687 | SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1688 | SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, | |
1689 | set_dmic_clk, SND_SOC_DAPM_PRE_PMU), | |
1690 | SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1, | |
1691 | RT5645_DMIC_1_EN_SFT, 0, NULL, 0), | |
1692 | SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1, | |
1693 | RT5645_DMIC_2_EN_SFT, 0, NULL, 0), | |
1694 | /* Boost */ | |
1695 | SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2, | |
1696 | RT5645_PWR_BST1_BIT, 0, NULL, 0), | |
1697 | SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2, | |
1698 | RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event, | |
1699 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
1700 | /* Input Volume */ | |
1701 | SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL, | |
1702 | RT5645_PWR_IN_L_BIT, 0, NULL, 0), | |
1703 | SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL, | |
1704 | RT5645_PWR_IN_R_BIT, 0, NULL, 0), | |
1705 | /* REC Mixer */ | |
1706 | SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT, | |
1707 | 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)), | |
1708 | SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT, | |
1709 | 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)), | |
1710 | /* ADCs */ | |
1711 | SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), | |
1712 | SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), | |
1713 | ||
1714 | SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1, | |
1715 | RT5645_PWR_ADC_L_BIT, 0, NULL, 0), | |
1716 | SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1, | |
1717 | RT5645_PWR_ADC_R_BIT, 0, NULL, 0), | |
1718 | ||
1719 | /* ADC Mux */ | |
1720 | SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, | |
1721 | &rt5645_sto1_dmic_mux), | |
1722 | SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, | |
1723 | &rt5645_sto_adc2_mux), | |
1724 | SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, | |
1725 | &rt5645_sto_adc2_mux), | |
1726 | SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, | |
1727 | &rt5645_sto_adc1_mux), | |
1728 | SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, | |
1729 | &rt5645_sto_adc1_mux), | |
1730 | SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, | |
1731 | &rt5645_mono_dmic_l_mux), | |
1732 | SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, | |
1733 | &rt5645_mono_dmic_r_mux), | |
1734 | SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, | |
1735 | &rt5645_mono_adc_l2_mux), | |
1736 | SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, | |
1737 | &rt5645_mono_adc_l1_mux), | |
1738 | SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, | |
1739 | &rt5645_mono_adc_r1_mux), | |
1740 | SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, | |
1741 | &rt5645_mono_adc_r2_mux), | |
1742 | /* ADC Mixer */ | |
1743 | ||
1744 | SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2, | |
1745 | RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0), | |
1319b2f6 OC |
1746 | SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0, |
1747 | rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix), | |
1748 | NULL, 0), | |
1749 | SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0, | |
1750 | rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix), | |
1751 | NULL, 0), | |
1752 | SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2, | |
1753 | RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0), | |
1754 | SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0, | |
1755 | rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix), | |
1756 | NULL, 0), | |
1757 | SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2, | |
1758 | RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0), | |
1759 | SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0, | |
1760 | rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix), | |
1761 | NULL, 0), | |
1762 | ||
1763 | /* ADC PGA */ | |
1764 | SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1765 | SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1766 | SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1767 | SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1768 | SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1769 | SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1770 | SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1771 | SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1772 | SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1773 | SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1774 | ||
1775 | /* IF1 2 Mux */ | |
1319b2f6 OC |
1776 | SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, |
1777 | 0, 0, &rt5645_if2_adc_in_mux), | |
1778 | ||
1779 | /* Digital Interface */ | |
1780 | SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1, | |
1781 | RT5645_PWR_I2S1_BIT, 0, NULL, 0), | |
786aa09b | 1782 | SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0), |
1319b2f6 OC |
1783 | SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
1784 | SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), | |
786aa09b | 1785 | SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0), |
1319b2f6 OC |
1786 | SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), |
1787 | SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1788 | SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1789 | SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1, | |
1790 | RT5645_PWR_I2S2_BIT, 0, NULL, 0), | |
1791 | SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1792 | SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1793 | SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1794 | SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1795 | ||
1796 | /* Digital Interface Select */ | |
1797 | SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, | |
1798 | 0, 0, &rt5645_vad_adc_mux), | |
1799 | ||
1800 | /* Audio Interface */ | |
1801 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), | |
1802 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), | |
1803 | SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), | |
1804 | SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), | |
1805 | ||
1806 | /* Output Side */ | |
1807 | /* DAC mixer before sound effect */ | |
1808 | SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, | |
1809 | rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)), | |
1810 | SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, | |
1811 | rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)), | |
1812 | ||
1813 | /* DAC2 channel Mux */ | |
1814 | SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux), | |
1815 | SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux), | |
1816 | SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1, | |
1817 | RT5645_PWR_DAC_L2_BIT, 0, NULL, 0), | |
1818 | SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1, | |
1819 | RT5645_PWR_DAC_R2_BIT, 0, NULL, 0), | |
1820 | ||
1821 | SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux), | |
1822 | SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux), | |
1823 | ||
1824 | /* DAC Mixer */ | |
1825 | SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2, | |
1826 | RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0), | |
1827 | SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2, | |
1828 | RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0), | |
1829 | SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2, | |
1830 | RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0), | |
1831 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, | |
1832 | rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)), | |
1833 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, | |
1834 | rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)), | |
1835 | SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, | |
1836 | rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)), | |
1837 | SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, | |
1838 | rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)), | |
1839 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, | |
1840 | rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)), | |
1841 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, | |
1842 | rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)), | |
1843 | ||
1844 | /* DACs */ | |
1845 | SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT, | |
1846 | 0), | |
1847 | SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT, | |
1848 | 0), | |
1849 | SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT, | |
1850 | 0), | |
1851 | SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT, | |
1852 | 0), | |
1853 | /* OUT Mixer */ | |
1854 | SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT, | |
1855 | 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)), | |
1856 | SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT, | |
1857 | 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)), | |
1858 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT, | |
1859 | 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)), | |
1860 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT, | |
1861 | 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)), | |
1862 | /* Ouput Volume */ | |
1863 | SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0, | |
1864 | &spk_l_vol_control), | |
1865 | SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0, | |
1866 | &spk_r_vol_control), | |
1867 | SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT, | |
1868 | 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)), | |
1869 | SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT, | |
1870 | 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)), | |
1871 | SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER, | |
1872 | RT5645_PWR_HM_L_BIT, 0, NULL, 0), | |
1873 | SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER, | |
1874 | RT5645_PWR_HM_R_BIT, 0, NULL, 0), | |
1875 | SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1876 | SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1877 | SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), | |
1878 | SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control), | |
1879 | SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control), | |
1880 | ||
1881 | /* HPO/LOUT/Mono Mixer */ | |
1882 | SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix, | |
1883 | ARRAY_SIZE(rt5645_spo_l_mix)), | |
1884 | SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix, | |
1885 | ARRAY_SIZE(rt5645_spo_r_mix)), | |
1886 | SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix, | |
1887 | ARRAY_SIZE(rt5645_hpo_mix)), | |
1888 | SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix, | |
1889 | ARRAY_SIZE(rt5645_lout_mix)), | |
1890 | ||
1891 | SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event, | |
1892 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
1893 | SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event, | |
1894 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
1895 | SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event, | |
1896 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | |
1897 | ||
1898 | /* PDM */ | |
1899 | SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT, | |
1900 | 0, NULL, 0), | |
1901 | SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux), | |
1902 | SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux), | |
1903 | ||
1904 | SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control), | |
1905 | SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control), | |
1906 | ||
1907 | /* Output Lines */ | |
1908 | SND_SOC_DAPM_OUTPUT("HPOL"), | |
1909 | SND_SOC_DAPM_OUTPUT("HPOR"), | |
1910 | SND_SOC_DAPM_OUTPUT("LOUTL"), | |
1911 | SND_SOC_DAPM_OUTPUT("LOUTR"), | |
1912 | SND_SOC_DAPM_OUTPUT("PDM1L"), | |
1913 | SND_SOC_DAPM_OUTPUT("PDM1R"), | |
1914 | SND_SOC_DAPM_OUTPUT("SPOL"), | |
1915 | SND_SOC_DAPM_OUTPUT("SPOR"), | |
588cd850 | 1916 | SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event), |
1319b2f6 OC |
1917 | }; |
1918 | ||
83c09290 BL |
1919 | static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = { |
1920 | SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0, | |
1921 | &rt5645_if1_dac0_tdm_sel_mux), | |
1922 | SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0, | |
1923 | &rt5645_if1_dac1_tdm_sel_mux), | |
1924 | SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0, | |
1925 | &rt5645_if1_dac2_tdm_sel_mux), | |
1926 | SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0, | |
1927 | &rt5645_if1_dac3_tdm_sel_mux), | |
1928 | SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM, | |
1929 | 0, 0, &rt5645_if1_adc_in_mux), | |
1930 | SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM, | |
1931 | 0, 0, &rt5645_if1_adc1_in_mux), | |
1932 | SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM, | |
1933 | 0, 0, &rt5645_if1_adc2_in_mux), | |
1934 | SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM, | |
1935 | 0, 0, &rt5645_if1_adc3_in_mux), | |
1319b2f6 OC |
1936 | }; |
1937 | ||
5c4ca99d BL |
1938 | static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = { |
1939 | SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM, | |
1940 | 0, 0, &rt5650_a_dac1_l_mux), | |
1941 | SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM, | |
1942 | 0, 0, &rt5650_a_dac1_r_mux), | |
1943 | SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM, | |
1944 | 0, 0, &rt5650_a_dac2_l_mux), | |
1945 | SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM, | |
1946 | 0, 0, &rt5650_a_dac2_r_mux), | |
851b81e8 MC |
1947 | |
1948 | SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM, | |
1949 | 0, 0, &rt5650_if1_adc1_in_mux), | |
1950 | SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM, | |
1951 | 0, 0, &rt5650_if1_adc2_in_mux), | |
1952 | SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM, | |
1953 | 0, 0, &rt5650_if1_adc3_in_mux), | |
1954 | SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM, | |
1955 | 0, 0, &rt5650_if1_adc_in_mux), | |
1956 | ||
1957 | SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0, | |
1958 | &rt5650_if1_dac0_tdm_sel_mux), | |
1959 | SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0, | |
1960 | &rt5650_if1_dac1_tdm_sel_mux), | |
1961 | SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0, | |
1962 | &rt5650_if1_dac2_tdm_sel_mux), | |
1963 | SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0, | |
1964 | &rt5650_if1_dac3_tdm_sel_mux), | |
5c4ca99d BL |
1965 | }; |
1966 | ||
1319b2f6 | 1967 | static const struct snd_soc_dapm_route rt5645_dapm_routes[] = { |
9e268353 | 1968 | { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc }, |
9e268353 BL |
1969 | { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc }, |
1970 | { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc }, | |
1971 | { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc }, | |
1972 | { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc }, | |
1973 | { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc }, | |
1974 | ||
1975 | { "I2S1", NULL, "I2S1 ASRC" }, | |
1976 | { "I2S2", NULL, "I2S2 ASRC" }, | |
1977 | ||
1319b2f6 OC |
1978 | { "IN1P", NULL, "LDO2" }, |
1979 | { "IN2P", NULL, "LDO2" }, | |
1980 | ||
1981 | { "DMIC1", NULL, "DMIC L1" }, | |
1982 | { "DMIC1", NULL, "DMIC R1" }, | |
1983 | { "DMIC2", NULL, "DMIC L2" }, | |
1984 | { "DMIC2", NULL, "DMIC R2" }, | |
1985 | ||
1986 | { "BST1", NULL, "IN1P" }, | |
1987 | { "BST1", NULL, "IN1N" }, | |
1988 | { "BST1", NULL, "JD Power" }, | |
1989 | { "BST1", NULL, "Mic Det Power" }, | |
1990 | { "BST2", NULL, "IN2P" }, | |
1991 | { "BST2", NULL, "IN2N" }, | |
1992 | ||
1993 | { "INL VOL", NULL, "IN2P" }, | |
1994 | { "INR VOL", NULL, "IN2N" }, | |
1995 | ||
1996 | { "RECMIXL", "HPOL Switch", "HPOL" }, | |
1997 | { "RECMIXL", "INL Switch", "INL VOL" }, | |
1998 | { "RECMIXL", "BST2 Switch", "BST2" }, | |
1999 | { "RECMIXL", "BST1 Switch", "BST1" }, | |
2000 | { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" }, | |
2001 | ||
2002 | { "RECMIXR", "HPOR Switch", "HPOR" }, | |
2003 | { "RECMIXR", "INR Switch", "INR VOL" }, | |
2004 | { "RECMIXR", "BST2 Switch", "BST2" }, | |
2005 | { "RECMIXR", "BST1 Switch", "BST1" }, | |
2006 | { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" }, | |
2007 | ||
2008 | { "ADC L", NULL, "RECMIXL" }, | |
2009 | { "ADC L", NULL, "ADC L power" }, | |
2010 | { "ADC R", NULL, "RECMIXR" }, | |
2011 | { "ADC R", NULL, "ADC R power" }, | |
2012 | ||
2013 | {"DMIC L1", NULL, "DMIC CLK"}, | |
2014 | {"DMIC L1", NULL, "DMIC1 Power"}, | |
2015 | {"DMIC R1", NULL, "DMIC CLK"}, | |
2016 | {"DMIC R1", NULL, "DMIC1 Power"}, | |
2017 | {"DMIC L2", NULL, "DMIC CLK"}, | |
2018 | {"DMIC L2", NULL, "DMIC2 Power"}, | |
2019 | {"DMIC R2", NULL, "DMIC CLK"}, | |
2020 | {"DMIC R2", NULL, "DMIC2 Power"}, | |
2021 | ||
2022 | { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, | |
2023 | { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, | |
9e268353 | 2024 | { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" }, |
1319b2f6 OC |
2025 | |
2026 | { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, | |
2027 | { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, | |
9e268353 | 2028 | { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" }, |
1319b2f6 OC |
2029 | |
2030 | { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, | |
2031 | { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, | |
9e268353 | 2032 | { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" }, |
1319b2f6 OC |
2033 | |
2034 | { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, | |
2035 | { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, | |
2036 | { "Stereo1 ADC L1 Mux", "ADC", "ADC L" }, | |
2037 | { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, | |
2038 | ||
2039 | { "Stereo1 ADC R1 Mux", "ADC", "ADC R" }, | |
2040 | { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, | |
2041 | { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, | |
2042 | { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, | |
2043 | ||
2044 | { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, | |
2045 | { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, | |
2046 | { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, | |
2047 | { "Mono ADC L1 Mux", "ADC", "ADC L" }, | |
2048 | ||
2049 | { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, | |
2050 | { "Mono ADC R1 Mux", "ADC", "ADC R" }, | |
2051 | { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, | |
2052 | { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, | |
2053 | ||
2054 | { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, | |
2055 | { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, | |
2056 | { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, | |
2057 | { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, | |
2058 | ||
2059 | { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, | |
2060 | { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" }, | |
2061 | { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll }, | |
2062 | ||
2063 | { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, | |
2064 | { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" }, | |
2065 | { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll }, | |
2066 | ||
2067 | { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, | |
2068 | { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, | |
2069 | { "Mono ADC MIXL", NULL, "adc mono left filter" }, | |
2070 | { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll }, | |
2071 | ||
2072 | { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, | |
2073 | { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, | |
2074 | { "Mono ADC MIXR", NULL, "adc mono right filter" }, | |
2075 | { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll }, | |
2076 | ||
2077 | { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, | |
2078 | { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, | |
2079 | { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, | |
2080 | ||
2081 | { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, | |
2082 | { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, | |
2083 | { "IF_ADC2", NULL, "Mono ADC MIXL" }, | |
2084 | { "IF_ADC2", NULL, "Mono ADC MIXR" }, | |
2085 | { "VAD_ADC", NULL, "VAD ADC Mux" }, | |
2086 | ||
1319b2f6 OC |
2087 | { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, |
2088 | { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, | |
2089 | { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, | |
2090 | ||
2091 | { "IF1 ADC", NULL, "I2S1" }, | |
1319b2f6 OC |
2092 | { "IF2 ADC", NULL, "I2S2" }, |
2093 | { "IF2 ADC", NULL, "IF2 ADC Mux" }, | |
2094 | ||
1319b2f6 OC |
2095 | { "AIF2TX", NULL, "IF2 ADC" }, |
2096 | ||
21ab3f2b | 2097 | { "IF1 DAC0", NULL, "AIF1RX" }, |
1319b2f6 OC |
2098 | { "IF1 DAC1", NULL, "AIF1RX" }, |
2099 | { "IF1 DAC2", NULL, "AIF1RX" }, | |
21ab3f2b | 2100 | { "IF1 DAC3", NULL, "AIF1RX" }, |
1319b2f6 OC |
2101 | { "IF2 DAC", NULL, "AIF2RX" }, |
2102 | ||
21ab3f2b | 2103 | { "IF1 DAC0", NULL, "I2S1" }, |
1319b2f6 OC |
2104 | { "IF1 DAC1", NULL, "I2S1" }, |
2105 | { "IF1 DAC2", NULL, "I2S1" }, | |
21ab3f2b | 2106 | { "IF1 DAC3", NULL, "I2S1" }, |
1319b2f6 OC |
2107 | { "IF2 DAC", NULL, "I2S2" }, |
2108 | ||
1319b2f6 OC |
2109 | { "IF2 DAC L", NULL, "IF2 DAC" }, |
2110 | { "IF2 DAC R", NULL, "IF2 DAC" }, | |
2111 | ||
1319b2f6 | 2112 | { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, |
1319b2f6 OC |
2113 | { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, |
2114 | ||
2115 | { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, | |
2116 | { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, | |
2117 | { "DAC1 MIXL", NULL, "dac stereo1 filter" }, | |
2118 | { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, | |
2119 | { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, | |
2120 | { "DAC1 MIXR", NULL, "dac stereo1 filter" }, | |
2121 | ||
1319b2f6 OC |
2122 | { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, |
2123 | { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" }, | |
2124 | { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, | |
2125 | { "DAC L2 Volume", NULL, "DAC L2 Mux" }, | |
2126 | { "DAC L2 Volume", NULL, "dac mono left filter" }, | |
2127 | ||
1319b2f6 OC |
2128 | { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, |
2129 | { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" }, | |
2130 | { "DAC R2 Mux", "Haptic", "Haptic Generator" }, | |
2131 | { "DAC R2 Volume", NULL, "DAC R2 Mux" }, | |
2132 | { "DAC R2 Volume", NULL, "dac mono right filter" }, | |
2133 | ||
2134 | { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, | |
2135 | { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, | |
2136 | { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, | |
2137 | { "Stereo DAC MIXL", NULL, "dac stereo1 filter" }, | |
2138 | { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, | |
2139 | { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, | |
2140 | { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, | |
2141 | { "Stereo DAC MIXR", NULL, "dac stereo1 filter" }, | |
2142 | ||
2143 | { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, | |
2144 | { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, | |
2145 | { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, | |
2146 | { "Mono DAC MIXL", NULL, "dac mono left filter" }, | |
2147 | { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, | |
2148 | { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, | |
2149 | { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, | |
2150 | { "Mono DAC MIXR", NULL, "dac mono right filter" }, | |
2151 | ||
2152 | { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, | |
2153 | { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, | |
2154 | { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, | |
2155 | { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, | |
2156 | { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, | |
2157 | { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, | |
2158 | ||
1319b2f6 | 2159 | { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll }, |
1319b2f6 | 2160 | { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll }, |
1319b2f6 | 2161 | { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll }, |
1319b2f6 OC |
2162 | { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll }, |
2163 | ||
2164 | { "SPK MIXL", "BST1 Switch", "BST1" }, | |
2165 | { "SPK MIXL", "INL Switch", "INL VOL" }, | |
2166 | { "SPK MIXL", "DAC L1 Switch", "DAC L1" }, | |
2167 | { "SPK MIXL", "DAC L2 Switch", "DAC L2" }, | |
2168 | { "SPK MIXR", "BST2 Switch", "BST2" }, | |
2169 | { "SPK MIXR", "INR Switch", "INR VOL" }, | |
2170 | { "SPK MIXR", "DAC R1 Switch", "DAC R1" }, | |
2171 | { "SPK MIXR", "DAC R2 Switch", "DAC R2" }, | |
2172 | ||
2173 | { "OUT MIXL", "BST1 Switch", "BST1" }, | |
2174 | { "OUT MIXL", "INL Switch", "INL VOL" }, | |
2175 | { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, | |
2176 | { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, | |
2177 | ||
2178 | { "OUT MIXR", "BST2 Switch", "BST2" }, | |
2179 | { "OUT MIXR", "INR Switch", "INR VOL" }, | |
2180 | { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, | |
2181 | { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, | |
2182 | ||
2183 | { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, | |
2184 | { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" }, | |
2185 | { "HPOVOL MIXL", "INL Switch", "INL VOL" }, | |
2186 | { "HPOVOL MIXL", "BST1 Switch", "BST1" }, | |
2187 | { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" }, | |
2188 | { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, | |
2189 | { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" }, | |
2190 | { "HPOVOL MIXR", "INR Switch", "INR VOL" }, | |
2191 | { "HPOVOL MIXR", "BST2 Switch", "BST2" }, | |
2192 | { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" }, | |
2193 | ||
2194 | { "DAC 2", NULL, "DAC L2" }, | |
2195 | { "DAC 2", NULL, "DAC R2" }, | |
2196 | { "DAC 1", NULL, "DAC L1" }, | |
2197 | { "DAC 1", NULL, "DAC R1" }, | |
2198 | { "HPOVOL L", "Switch", "HPOVOL MIXL" }, | |
2199 | { "HPOVOL R", "Switch", "HPOVOL MIXR" }, | |
2200 | { "HPOVOL", NULL, "HPOVOL L" }, | |
2201 | { "HPOVOL", NULL, "HPOVOL R" }, | |
2202 | { "HPO MIX", "DAC1 Switch", "DAC 1" }, | |
2203 | { "HPO MIX", "HPVOL Switch", "HPOVOL" }, | |
2204 | ||
2205 | { "SPKVOL L", "Switch", "SPK MIXL" }, | |
2206 | { "SPKVOL R", "Switch", "SPK MIXR" }, | |
2207 | ||
2208 | { "SPOL MIX", "DAC R1 Switch", "DAC R1" }, | |
2209 | { "SPOL MIX", "DAC L1 Switch", "DAC L1" }, | |
2210 | { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" }, | |
2211 | { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" }, | |
2212 | { "SPOR MIX", "DAC R1 Switch", "DAC R1" }, | |
2213 | { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" }, | |
2214 | ||
2215 | { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, | |
2216 | { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, | |
2217 | { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, | |
2218 | { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, | |
2219 | ||
2220 | { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, | |
2221 | { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, | |
2222 | { "PDM1 L Mux", NULL, "PDM1 Power" }, | |
2223 | { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, | |
2224 | { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, | |
2225 | { "PDM1 R Mux", NULL, "PDM1 Power" }, | |
2226 | ||
2227 | { "HP amp", NULL, "HPO MIX" }, | |
2228 | { "HP amp", NULL, "JD Power" }, | |
2229 | { "HP amp", NULL, "Mic Det Power" }, | |
2230 | { "HP amp", NULL, "LDO2" }, | |
2231 | { "HPOL", NULL, "HP amp" }, | |
2232 | { "HPOR", NULL, "HP amp" }, | |
2233 | ||
2234 | { "LOUT amp", NULL, "LOUT MIX" }, | |
2235 | { "LOUTL", NULL, "LOUT amp" }, | |
2236 | { "LOUTR", NULL, "LOUT amp" }, | |
2237 | ||
2238 | { "PDM1 L", "Switch", "PDM1 L Mux" }, | |
2239 | { "PDM1 R", "Switch", "PDM1 R Mux" }, | |
2240 | ||
2241 | { "PDM1L", NULL, "PDM1 L" }, | |
2242 | { "PDM1R", NULL, "PDM1 R" }, | |
2243 | ||
2244 | { "SPK amp", NULL, "SPOL MIX" }, | |
2245 | { "SPK amp", NULL, "SPOR MIX" }, | |
2246 | { "SPOL", NULL, "SPK amp" }, | |
2247 | { "SPOR", NULL, "SPK amp" }, | |
2248 | }; | |
2249 | ||
5c4ca99d BL |
2250 | static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = { |
2251 | { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"}, | |
2252 | { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"}, | |
2253 | { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"}, | |
2254 | { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"}, | |
2255 | ||
2256 | { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"}, | |
2257 | { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"}, | |
2258 | { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"}, | |
2259 | { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"}, | |
2260 | ||
2261 | { "DAC L1", NULL, "A DAC1 L Mux" }, | |
2262 | { "DAC R1", NULL, "A DAC1 R Mux" }, | |
2263 | { "DAC L2", NULL, "A DAC2 L Mux" }, | |
2264 | { "DAC R2", NULL, "A DAC2 R Mux" }, | |
21ab3f2b BL |
2265 | |
2266 | { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" }, | |
2267 | { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" }, | |
2268 | { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" }, | |
2269 | { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" }, | |
2270 | ||
2271 | { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" }, | |
2272 | { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" }, | |
2273 | { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" }, | |
2274 | { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" }, | |
2275 | ||
2276 | { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" }, | |
2277 | { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" }, | |
2278 | { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" }, | |
2279 | { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" }, | |
2280 | ||
2281 | { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" }, | |
2282 | { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" }, | |
2283 | { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" }, | |
2284 | ||
2285 | { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" }, | |
2286 | { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" }, | |
2287 | { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" }, | |
2288 | { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" }, | |
2289 | { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" }, | |
2290 | { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" }, | |
2291 | ||
2292 | { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" }, | |
2293 | { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" }, | |
2294 | { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" }, | |
2295 | { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" }, | |
2296 | { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" }, | |
2297 | { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" }, | |
2298 | ||
2299 | { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" }, | |
2300 | { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" }, | |
2301 | { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" }, | |
2302 | { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" }, | |
2303 | { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" }, | |
2304 | { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" }, | |
2305 | ||
2306 | { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" }, | |
2307 | { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" }, | |
2308 | { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" }, | |
2309 | { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" }, | |
2310 | { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" }, | |
2311 | { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" }, | |
2312 | { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" }, | |
2313 | ||
2314 | { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" }, | |
2315 | { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" }, | |
2316 | { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" }, | |
2317 | { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" }, | |
2318 | ||
2319 | { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" }, | |
2320 | { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" }, | |
2321 | { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" }, | |
2322 | { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" }, | |
2323 | ||
2324 | { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" }, | |
2325 | { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" }, | |
2326 | { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" }, | |
2327 | { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" }, | |
2328 | ||
2329 | { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" }, | |
2330 | { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" }, | |
2331 | { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" }, | |
2332 | { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" }, | |
2333 | ||
2334 | { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" }, | |
2335 | { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" }, | |
2336 | ||
2337 | { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" }, | |
2338 | { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" }, | |
5c4ca99d BL |
2339 | }; |
2340 | ||
2341 | static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = { | |
2342 | { "DAC L1", NULL, "Stereo DAC MIXL" }, | |
2343 | { "DAC R1", NULL, "Stereo DAC MIXR" }, | |
2344 | { "DAC L2", NULL, "Mono DAC MIXL" }, | |
2345 | { "DAC R2", NULL, "Mono DAC MIXR" }, | |
21ab3f2b BL |
2346 | |
2347 | { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" }, | |
2348 | { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" }, | |
2349 | { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" }, | |
2350 | { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" }, | |
2351 | ||
2352 | { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" }, | |
2353 | { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" }, | |
2354 | { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" }, | |
2355 | { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" }, | |
2356 | ||
2357 | { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" }, | |
2358 | { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" }, | |
2359 | { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" }, | |
2360 | { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" }, | |
2361 | ||
2362 | { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" }, | |
2363 | { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" }, | |
2364 | { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" }, | |
2365 | ||
2366 | { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" }, | |
2367 | { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" }, | |
2368 | { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" }, | |
2369 | { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" }, | |
2370 | { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" }, | |
2371 | ||
2372 | { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" }, | |
2373 | { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" }, | |
2374 | { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" }, | |
2375 | { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" }, | |
2376 | ||
2377 | { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" }, | |
2378 | { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" }, | |
2379 | { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" }, | |
2380 | { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" }, | |
2381 | ||
2382 | { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" }, | |
2383 | { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" }, | |
2384 | { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" }, | |
2385 | { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" }, | |
2386 | ||
2387 | { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" }, | |
2388 | { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" }, | |
2389 | { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" }, | |
2390 | { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" }, | |
2391 | ||
2392 | { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" }, | |
2393 | { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" }, | |
2394 | ||
2395 | { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" }, | |
2396 | { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" }, | |
5c4ca99d BL |
2397 | }; |
2398 | ||
1319b2f6 OC |
2399 | static int rt5645_hw_params(struct snd_pcm_substream *substream, |
2400 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | |
2401 | { | |
2402 | struct snd_soc_codec *codec = dai->codec; | |
2403 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
57bf2736 | 2404 | unsigned int val_len = 0, val_clk, mask_clk, dl_sft; |
1319b2f6 OC |
2405 | int pre_div, bclk_ms, frame_size; |
2406 | ||
2407 | rt5645->lrck[dai->id] = params_rate(params); | |
d92950e7 | 2408 | pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]); |
1319b2f6 OC |
2409 | if (pre_div < 0) { |
2410 | dev_err(codec->dev, "Unsupported clock setting\n"); | |
2411 | return -EINVAL; | |
2412 | } | |
2413 | frame_size = snd_soc_params_to_frame_size(params); | |
2414 | if (frame_size < 0) { | |
2415 | dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); | |
2416 | return -EINVAL; | |
2417 | } | |
57bf2736 BL |
2418 | |
2419 | switch (rt5645->codec_type) { | |
2420 | case CODEC_TYPE_RT5650: | |
2421 | dl_sft = 4; | |
2422 | break; | |
2423 | default: | |
2424 | dl_sft = 2; | |
2425 | break; | |
2426 | } | |
2427 | ||
1319b2f6 OC |
2428 | bclk_ms = frame_size > 32; |
2429 | rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms); | |
2430 | ||
2431 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", | |
2432 | rt5645->bclk[dai->id], rt5645->lrck[dai->id]); | |
2433 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", | |
2434 | bclk_ms, pre_div, dai->id); | |
2435 | ||
2436 | switch (params_width(params)) { | |
2437 | case 16: | |
2438 | break; | |
2439 | case 20: | |
57bf2736 | 2440 | val_len = 0x1; |
1319b2f6 OC |
2441 | break; |
2442 | case 24: | |
57bf2736 | 2443 | val_len = 0x2; |
1319b2f6 OC |
2444 | break; |
2445 | case 8: | |
57bf2736 | 2446 | val_len = 0x3; |
1319b2f6 OC |
2447 | break; |
2448 | default: | |
2449 | return -EINVAL; | |
2450 | } | |
2451 | ||
2452 | switch (dai->id) { | |
2453 | case RT5645_AIF1: | |
33de3d54 BL |
2454 | mask_clk = RT5645_I2S_PD1_MASK; |
2455 | val_clk = pre_div << RT5645_I2S_PD1_SFT; | |
1319b2f6 | 2456 | snd_soc_update_bits(codec, RT5645_I2S1_SDP, |
57bf2736 | 2457 | (0x3 << dl_sft), (val_len << dl_sft)); |
1319b2f6 OC |
2458 | snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk); |
2459 | break; | |
2460 | case RT5645_AIF2: | |
2461 | mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK; | |
2462 | val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT | | |
2463 | pre_div << RT5645_I2S_PD2_SFT; | |
2464 | snd_soc_update_bits(codec, RT5645_I2S2_SDP, | |
57bf2736 | 2465 | (0x3 << dl_sft), (val_len << dl_sft)); |
1319b2f6 OC |
2466 | snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk); |
2467 | break; | |
2468 | default: | |
2469 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); | |
2470 | return -EINVAL; | |
2471 | } | |
2472 | ||
2473 | return 0; | |
2474 | } | |
2475 | ||
2476 | static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |
2477 | { | |
2478 | struct snd_soc_codec *codec = dai->codec; | |
2479 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
57bf2736 BL |
2480 | unsigned int reg_val = 0, pol_sft; |
2481 | ||
2482 | switch (rt5645->codec_type) { | |
2483 | case CODEC_TYPE_RT5650: | |
2484 | pol_sft = 8; | |
2485 | break; | |
2486 | default: | |
2487 | pol_sft = 7; | |
2488 | break; | |
2489 | } | |
1319b2f6 OC |
2490 | |
2491 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
2492 | case SND_SOC_DAIFMT_CBM_CFM: | |
2493 | rt5645->master[dai->id] = 1; | |
2494 | break; | |
2495 | case SND_SOC_DAIFMT_CBS_CFS: | |
2496 | reg_val |= RT5645_I2S_MS_S; | |
2497 | rt5645->master[dai->id] = 0; | |
2498 | break; | |
2499 | default: | |
2500 | return -EINVAL; | |
2501 | } | |
2502 | ||
2503 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | |
2504 | case SND_SOC_DAIFMT_NB_NF: | |
2505 | break; | |
2506 | case SND_SOC_DAIFMT_IB_NF: | |
57bf2736 | 2507 | reg_val |= (1 << pol_sft); |
1319b2f6 OC |
2508 | break; |
2509 | default: | |
2510 | return -EINVAL; | |
2511 | } | |
2512 | ||
2513 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
2514 | case SND_SOC_DAIFMT_I2S: | |
2515 | break; | |
2516 | case SND_SOC_DAIFMT_LEFT_J: | |
2517 | reg_val |= RT5645_I2S_DF_LEFT; | |
2518 | break; | |
2519 | case SND_SOC_DAIFMT_DSP_A: | |
2520 | reg_val |= RT5645_I2S_DF_PCM_A; | |
2521 | break; | |
2522 | case SND_SOC_DAIFMT_DSP_B: | |
2523 | reg_val |= RT5645_I2S_DF_PCM_B; | |
2524 | break; | |
2525 | default: | |
2526 | return -EINVAL; | |
2527 | } | |
2528 | switch (dai->id) { | |
2529 | case RT5645_AIF1: | |
2530 | snd_soc_update_bits(codec, RT5645_I2S1_SDP, | |
57bf2736 | 2531 | RT5645_I2S_MS_MASK | (1 << pol_sft) | |
1319b2f6 OC |
2532 | RT5645_I2S_DF_MASK, reg_val); |
2533 | break; | |
8c325704 AL |
2534 | case RT5645_AIF2: |
2535 | snd_soc_update_bits(codec, RT5645_I2S2_SDP, | |
57bf2736 | 2536 | RT5645_I2S_MS_MASK | (1 << pol_sft) | |
1319b2f6 OC |
2537 | RT5645_I2S_DF_MASK, reg_val); |
2538 | break; | |
2539 | default: | |
2540 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); | |
2541 | return -EINVAL; | |
2542 | } | |
2543 | return 0; | |
2544 | } | |
2545 | ||
2546 | static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai, | |
2547 | int clk_id, unsigned int freq, int dir) | |
2548 | { | |
2549 | struct snd_soc_codec *codec = dai->codec; | |
2550 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
2551 | unsigned int reg_val = 0; | |
2552 | ||
2553 | if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src) | |
2554 | return 0; | |
2555 | ||
2556 | switch (clk_id) { | |
2557 | case RT5645_SCLK_S_MCLK: | |
2558 | reg_val |= RT5645_SCLK_SRC_MCLK; | |
2559 | break; | |
2560 | case RT5645_SCLK_S_PLL1: | |
2561 | reg_val |= RT5645_SCLK_SRC_PLL1; | |
2562 | break; | |
2563 | case RT5645_SCLK_S_RCCLK: | |
2564 | reg_val |= RT5645_SCLK_SRC_RCCLK; | |
2565 | break; | |
2566 | default: | |
2567 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); | |
2568 | return -EINVAL; | |
2569 | } | |
2570 | snd_soc_update_bits(codec, RT5645_GLB_CLK, | |
2571 | RT5645_SCLK_SRC_MASK, reg_val); | |
2572 | rt5645->sysclk = freq; | |
2573 | rt5645->sysclk_src = clk_id; | |
2574 | ||
2575 | dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); | |
2576 | ||
2577 | return 0; | |
2578 | } | |
2579 | ||
1319b2f6 OC |
2580 | static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, |
2581 | unsigned int freq_in, unsigned int freq_out) | |
2582 | { | |
2583 | struct snd_soc_codec *codec = dai->codec; | |
2584 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
71c7a2d6 | 2585 | struct rl6231_pll_code pll_code; |
1319b2f6 OC |
2586 | int ret; |
2587 | ||
2588 | if (source == rt5645->pll_src && freq_in == rt5645->pll_in && | |
2589 | freq_out == rt5645->pll_out) | |
2590 | return 0; | |
2591 | ||
2592 | if (!freq_in || !freq_out) { | |
2593 | dev_dbg(codec->dev, "PLL disabled\n"); | |
2594 | ||
2595 | rt5645->pll_in = 0; | |
2596 | rt5645->pll_out = 0; | |
2597 | snd_soc_update_bits(codec, RT5645_GLB_CLK, | |
2598 | RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK); | |
2599 | return 0; | |
2600 | } | |
2601 | ||
2602 | switch (source) { | |
2603 | case RT5645_PLL1_S_MCLK: | |
2604 | snd_soc_update_bits(codec, RT5645_GLB_CLK, | |
2605 | RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK); | |
2606 | break; | |
2607 | case RT5645_PLL1_S_BCLK1: | |
2608 | case RT5645_PLL1_S_BCLK2: | |
2609 | switch (dai->id) { | |
2610 | case RT5645_AIF1: | |
2611 | snd_soc_update_bits(codec, RT5645_GLB_CLK, | |
2612 | RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1); | |
2613 | break; | |
2614 | case RT5645_AIF2: | |
2615 | snd_soc_update_bits(codec, RT5645_GLB_CLK, | |
2616 | RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2); | |
2617 | break; | |
2618 | default: | |
2619 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); | |
2620 | return -EINVAL; | |
2621 | } | |
2622 | break; | |
2623 | default: | |
2624 | dev_err(codec->dev, "Unknown PLL source %d\n", source); | |
2625 | return -EINVAL; | |
2626 | } | |
2627 | ||
71c7a2d6 | 2628 | ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); |
1319b2f6 OC |
2629 | if (ret < 0) { |
2630 | dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); | |
2631 | return ret; | |
2632 | } | |
2633 | ||
2634 | dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", | |
2635 | pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), | |
2636 | pll_code.n_code, pll_code.k_code); | |
2637 | ||
2638 | snd_soc_write(codec, RT5645_PLL_CTRL1, | |
2639 | pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code); | |
2640 | snd_soc_write(codec, RT5645_PLL_CTRL2, | |
2641 | (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT | | |
2642 | pll_code.m_bp << RT5645_PLL_M_BP_SFT); | |
2643 | ||
2644 | rt5645->pll_in = freq_in; | |
2645 | rt5645->pll_out = freq_out; | |
2646 | rt5645->pll_src = source; | |
2647 | ||
2648 | return 0; | |
2649 | } | |
2650 | ||
2651 | static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, | |
2652 | unsigned int rx_mask, int slots, int slot_width) | |
2653 | { | |
2654 | struct snd_soc_codec *codec = dai->codec; | |
42ce5b8a BL |
2655 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
2656 | unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft; | |
2657 | unsigned int mask, val = 0; | |
2658 | ||
2659 | switch (rt5645->codec_type) { | |
2660 | case CODEC_TYPE_RT5650: | |
2661 | en_sft = 15; | |
2662 | i_slot_sft = 10; | |
2663 | o_slot_sft = 8; | |
2664 | i_width_sht = 6; | |
2665 | o_width_sht = 4; | |
2666 | mask = 0x8ff0; | |
2667 | break; | |
2668 | default: | |
2669 | en_sft = 14; | |
2670 | i_slot_sft = o_slot_sft = 12; | |
2671 | i_width_sht = o_width_sht = 10; | |
2672 | mask = 0x7c00; | |
2673 | break; | |
2674 | } | |
850577db | 2675 | if (rx_mask || tx_mask) { |
42ce5b8a BL |
2676 | val |= (1 << en_sft); |
2677 | if (rt5645->codec_type == CODEC_TYPE_RT5645) | |
2678 | snd_soc_update_bits(codec, RT5645_BASS_BACK, | |
2679 | RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB); | |
850577db | 2680 | } |
1319b2f6 OC |
2681 | |
2682 | switch (slots) { | |
2683 | case 4: | |
42ce5b8a | 2684 | val |= (1 << i_slot_sft) | (1 << o_slot_sft); |
1319b2f6 OC |
2685 | break; |
2686 | case 6: | |
42ce5b8a | 2687 | val |= (2 << i_slot_sft) | (2 << o_slot_sft); |
1319b2f6 OC |
2688 | break; |
2689 | case 8: | |
42ce5b8a | 2690 | val |= (3 << i_slot_sft) | (3 << o_slot_sft); |
1319b2f6 OC |
2691 | break; |
2692 | case 2: | |
2693 | default: | |
2694 | break; | |
2695 | } | |
2696 | ||
2697 | switch (slot_width) { | |
2698 | case 20: | |
42ce5b8a | 2699 | val |= (1 << i_width_sht) | (1 << o_width_sht); |
1319b2f6 OC |
2700 | break; |
2701 | case 24: | |
42ce5b8a | 2702 | val |= (2 << i_width_sht) | (2 << o_width_sht); |
1319b2f6 OC |
2703 | break; |
2704 | case 32: | |
42ce5b8a | 2705 | val |= (3 << i_width_sht) | (3 << o_width_sht); |
1319b2f6 OC |
2706 | break; |
2707 | case 16: | |
2708 | default: | |
2709 | break; | |
2710 | } | |
2711 | ||
42ce5b8a | 2712 | snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val); |
1319b2f6 OC |
2713 | |
2714 | return 0; | |
2715 | } | |
2716 | ||
2717 | static int rt5645_set_bias_level(struct snd_soc_codec *codec, | |
2718 | enum snd_soc_bias_level level) | |
2719 | { | |
6e747d53 BL |
2720 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
2721 | ||
1319b2f6 | 2722 | switch (level) { |
0b2e4959 | 2723 | case SND_SOC_BIAS_PREPARE: |
e2ada818 | 2724 | if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { |
1319b2f6 OC |
2725 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, |
2726 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | |
2727 | RT5645_PWR_BG | RT5645_PWR_VREF2, | |
2728 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | |
2729 | RT5645_PWR_BG | RT5645_PWR_VREF2); | |
2730 | mdelay(10); | |
2731 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
2732 | RT5645_PWR_FV1 | RT5645_PWR_FV2, | |
2733 | RT5645_PWR_FV1 | RT5645_PWR_FV2); | |
2734 | snd_soc_update_bits(codec, RT5645_GEN_CTRL1, | |
2735 | RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL); | |
2736 | } | |
2737 | break; | |
2738 | ||
0b2e4959 BL |
2739 | case SND_SOC_BIAS_STANDBY: |
2740 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
2741 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | |
2742 | RT5645_PWR_BG | RT5645_PWR_VREF2, | |
2743 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | |
2744 | RT5645_PWR_BG | RT5645_PWR_VREF2); | |
2745 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | |
2746 | RT5645_PWR_FV1 | RT5645_PWR_FV2, | |
2747 | RT5645_PWR_FV1 | RT5645_PWR_FV2); | |
2748 | break; | |
2749 | ||
1319b2f6 OC |
2750 | case SND_SOC_BIAS_OFF: |
2751 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100); | |
6e747d53 BL |
2752 | if (!rt5645->en_button_func) |
2753 | snd_soc_update_bits(codec, RT5645_GEN_CTRL1, | |
2754 | RT5645_DIG_GATE_CTRL, 0); | |
0b2e4959 BL |
2755 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, |
2756 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | |
2757 | RT5645_PWR_BG | RT5645_PWR_VREF2 | | |
2758 | RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0); | |
1319b2f6 OC |
2759 | break; |
2760 | ||
2761 | default: | |
2762 | break; | |
2763 | } | |
1319b2f6 OC |
2764 | |
2765 | return 0; | |
2766 | } | |
2767 | ||
6e747d53 BL |
2768 | static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec, |
2769 | bool enable) | |
f3fa1bbd | 2770 | { |
e2ada818 | 2771 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
f3fa1bbd | 2772 | |
6e747d53 | 2773 | if (enable) { |
a4e3c5fa NB |
2774 | snd_soc_dapm_force_enable_pin(dapm, "ADC L power"); |
2775 | snd_soc_dapm_force_enable_pin(dapm, "ADC R power"); | |
2776 | snd_soc_dapm_sync(dapm); | |
22f5d9f8 | 2777 | |
6e747d53 BL |
2778 | snd_soc_update_bits(codec, |
2779 | RT5645_INT_IRQ_ST, 0x8, 0x8); | |
2780 | snd_soc_update_bits(codec, | |
2781 | RT5650_4BTN_IL_CMD2, 0x8000, 0x8000); | |
2782 | snd_soc_read(codec, RT5650_4BTN_IL_CMD1); | |
2783 | pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1, | |
2784 | snd_soc_read(codec, RT5650_4BTN_IL_CMD1)); | |
2785 | } else { | |
2786 | snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0); | |
2787 | snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0); | |
22f5d9f8 | 2788 | |
a4e3c5fa NB |
2789 | snd_soc_dapm_disable_pin(dapm, "ADC L power"); |
2790 | snd_soc_dapm_disable_pin(dapm, "ADC R power"); | |
2791 | snd_soc_dapm_sync(dapm); | |
75945896 | 2792 | } |
6e747d53 | 2793 | } |
f3fa1bbd | 2794 | |
6e747d53 BL |
2795 | static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert) |
2796 | { | |
e2ada818 | 2797 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
6e747d53 BL |
2798 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
2799 | unsigned int val; | |
f3fa1bbd | 2800 | |
6e747d53 | 2801 | if (jack_insert) { |
05a9b46a JL |
2802 | regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0006); |
2803 | ||
b14c9174 NB |
2804 | /* for jack type detect */ |
2805 | snd_soc_dapm_force_enable_pin(dapm, "LDO2"); | |
2806 | snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); | |
2807 | snd_soc_dapm_sync(dapm); | |
2808 | if (!dapm->card->instantiated) { | |
6e747d53 BL |
2809 | /* Power up necessary bits for JD if dapm is |
2810 | not ready yet */ | |
05a9b46a JL |
2811 | regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1, |
2812 | RT5645_PWR_MB | RT5645_PWR_VREF2, | |
2813 | RT5645_PWR_MB | RT5645_PWR_VREF2); | |
2814 | regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER, | |
6e747d53 | 2815 | RT5645_PWR_LDO2, RT5645_PWR_LDO2); |
05a9b46a | 2816 | regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL, |
6e747d53 BL |
2817 | RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET); |
2818 | } | |
f3fa1bbd | 2819 | |
05a9b46a | 2820 | regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0); |
f2988afe OC |
2821 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, |
2822 | RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD); | |
2823 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, | |
2824 | RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN); | |
05a9b46a | 2825 | msleep(100); |
f2988afe OC |
2826 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, |
2827 | RT5645_CBJ_MN_JD, 0); | |
05a9b46a | 2828 | |
8db7f56d | 2829 | msleep(600); |
05a9b46a JL |
2830 | regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val); |
2831 | val &= 0x7; | |
f3fa1bbd OC |
2832 | dev_dbg(codec->dev, "val = %d\n", val); |
2833 | ||
6e747d53 BL |
2834 | if (val == 1 || val == 2) { |
2835 | rt5645->jack_type = SND_JACK_HEADSET; | |
2836 | if (rt5645->en_button_func) { | |
6e747d53 BL |
2837 | rt5645_enable_push_button_irq(codec, true); |
2838 | } | |
2839 | } else { | |
b14c9174 NB |
2840 | snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); |
2841 | snd_soc_dapm_sync(dapm); | |
6e747d53 BL |
2842 | rt5645->jack_type = SND_JACK_HEADPHONE; |
2843 | } | |
917536ae JL |
2844 | if (rt5645->pdata.jd_invert) |
2845 | regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, | |
2846 | RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV); | |
6e747d53 BL |
2847 | } else { /* jack out */ |
2848 | rt5645->jack_type = 0; | |
a4e3c5fa | 2849 | |
f2988afe OC |
2850 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, |
2851 | RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD); | |
2852 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, | |
2853 | RT5645_CBJ_BST1_EN, 0); | |
8db7f56d | 2854 | |
6e747d53 BL |
2855 | if (rt5645->en_button_func) |
2856 | rt5645_enable_push_button_irq(codec, false); | |
a4e3c5fa NB |
2857 | |
2858 | if (rt5645->pdata.jd_mode == 0) | |
2859 | snd_soc_dapm_disable_pin(dapm, "LDO2"); | |
2860 | snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); | |
2861 | snd_soc_dapm_sync(dapm); | |
917536ae JL |
2862 | if (rt5645->pdata.jd_invert) |
2863 | regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, | |
2864 | RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR); | |
f3fa1bbd OC |
2865 | } |
2866 | ||
6e747d53 | 2867 | return rt5645->jack_type; |
f3fa1bbd OC |
2868 | } |
2869 | ||
f312bc59 NB |
2870 | static int rt5645_button_detect(struct snd_soc_codec *codec) |
2871 | { | |
2872 | int btn_type, val; | |
2873 | ||
2874 | val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1); | |
2875 | pr_debug("val=0x%x\n", val); | |
2876 | btn_type = val & 0xfff0; | |
2877 | snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val); | |
2878 | ||
2879 | return btn_type; | |
2880 | } | |
2881 | ||
345b0f50 | 2882 | static irqreturn_t rt5645_irq(int irq, void *data); |
d5660422 | 2883 | |
f3fa1bbd | 2884 | int rt5645_set_jack_detect(struct snd_soc_codec *codec, |
6e747d53 BL |
2885 | struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack, |
2886 | struct snd_soc_jack *btn_jack) | |
f3fa1bbd OC |
2887 | { |
2888 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
2889 | ||
471f208a BL |
2890 | rt5645->hp_jack = hp_jack; |
2891 | rt5645->mic_jack = mic_jack; | |
6e747d53 BL |
2892 | rt5645->btn_jack = btn_jack; |
2893 | if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) { | |
2894 | rt5645->en_button_func = true; | |
2895 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
2896 | RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ); | |
6e747d53 BL |
2897 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1, |
2898 | RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL); | |
2899 | } | |
345b0f50 | 2900 | rt5645_irq(0, rt5645); |
f3fa1bbd OC |
2901 | |
2902 | return 0; | |
2903 | } | |
2904 | EXPORT_SYMBOL_GPL(rt5645_set_jack_detect); | |
2905 | ||
cd6e82b8 OC |
2906 | static void rt5645_jack_detect_work(struct work_struct *work) |
2907 | { | |
2908 | struct rt5645_priv *rt5645 = | |
2909 | container_of(work, struct rt5645_priv, jack_detect_work.work); | |
6e747d53 BL |
2910 | int val, btn_type, gpio_state = 0, report = 0; |
2911 | ||
f2a5ded3 | 2912 | if (!rt5645->codec) |
f136dce4 | 2913 | return; |
f2a5ded3 | 2914 | |
6e747d53 BL |
2915 | switch (rt5645->pdata.jd_mode) { |
2916 | case 0: /* Not using rt5645 JD */ | |
0b0cefc8 OC |
2917 | if (rt5645->gpiod_hp_det) { |
2918 | gpio_state = gpiod_get_value(rt5645->gpiod_hp_det); | |
2919 | dev_dbg(rt5645->codec->dev, "gpio_state = %d\n", | |
2920 | gpio_state); | |
2921 | report = rt5645_jack_detect(rt5645->codec, gpio_state); | |
6e747d53 BL |
2922 | } |
2923 | snd_soc_jack_report(rt5645->hp_jack, | |
2924 | report, SND_JACK_HEADPHONE); | |
2925 | snd_soc_jack_report(rt5645->mic_jack, | |
2926 | report, SND_JACK_MICROPHONE); | |
f312bc59 | 2927 | return; |
6e747d53 BL |
2928 | case 1: /* 2 port */ |
2929 | val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0070; | |
2930 | break; | |
2931 | default: /* 1 port */ | |
2932 | val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0020; | |
2933 | break; | |
2934 | ||
2935 | } | |
2936 | ||
2937 | switch (val) { | |
2938 | /* jack in */ | |
2939 | case 0x30: /* 2 port */ | |
2940 | case 0x0: /* 1 port or 2 port */ | |
2941 | if (rt5645->jack_type == 0) { | |
2942 | report = rt5645_jack_detect(rt5645->codec, 1); | |
2943 | /* for push button and jack out */ | |
2944 | break; | |
2945 | } | |
2946 | btn_type = 0; | |
2947 | if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) { | |
2948 | /* button pressed */ | |
2949 | report = SND_JACK_HEADSET; | |
2950 | btn_type = rt5645_button_detect(rt5645->codec); | |
2951 | /* rt5650 can report three kinds of button behavior, | |
2952 | one click, double click and hold. However, | |
2953 | currently we will report button pressed/released | |
2954 | event. So all the three button behaviors are | |
2955 | treated as button pressed. */ | |
2956 | switch (btn_type) { | |
2957 | case 0x8000: | |
2958 | case 0x4000: | |
2959 | case 0x2000: | |
2960 | report |= SND_JACK_BTN_0; | |
2961 | break; | |
2962 | case 0x1000: | |
2963 | case 0x0800: | |
2964 | case 0x0400: | |
2965 | report |= SND_JACK_BTN_1; | |
2966 | break; | |
2967 | case 0x0200: | |
2968 | case 0x0100: | |
2969 | case 0x0080: | |
2970 | report |= SND_JACK_BTN_2; | |
2971 | break; | |
2972 | case 0x0040: | |
2973 | case 0x0020: | |
2974 | case 0x0010: | |
2975 | report |= SND_JACK_BTN_3; | |
2976 | break; | |
2977 | case 0x0000: /* unpressed */ | |
2978 | break; | |
2979 | default: | |
2980 | dev_err(rt5645->codec->dev, | |
2981 | "Unexpected button code 0x%04x\n", | |
2982 | btn_type); | |
2983 | break; | |
2984 | } | |
2985 | } | |
2986 | if (btn_type == 0)/* button release */ | |
2987 | report = rt5645->jack_type; | |
2988 | ||
2989 | break; | |
2990 | /* jack out */ | |
2991 | case 0x70: /* 2 port */ | |
2992 | case 0x10: /* 2 port */ | |
2993 | case 0x20: /* 1 port */ | |
2994 | report = 0; | |
2995 | snd_soc_update_bits(rt5645->codec, | |
2996 | RT5645_INT_IRQ_ST, 0x1, 0x0); | |
2997 | rt5645_jack_detect(rt5645->codec, 0); | |
2998 | break; | |
2999 | default: | |
3000 | break; | |
3001 | } | |
3002 | ||
3003 | snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE); | |
3004 | snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE); | |
3005 | if (rt5645->en_button_func) | |
3006 | snd_soc_jack_report(rt5645->btn_jack, | |
e0b5d906 BL |
3007 | report, SND_JACK_BTN_0 | SND_JACK_BTN_1 | |
3008 | SND_JACK_BTN_2 | SND_JACK_BTN_3); | |
f312bc59 | 3009 | } |
6e747d53 | 3010 | |
f312bc59 NB |
3011 | static irqreturn_t rt5645_irq(int irq, void *data) |
3012 | { | |
3013 | struct rt5645_priv *rt5645 = data; | |
3014 | ||
3015 | queue_delayed_work(system_power_efficient_wq, | |
3016 | &rt5645->jack_detect_work, msecs_to_jiffies(250)); | |
6e747d53 | 3017 | |
f312bc59 | 3018 | return IRQ_HANDLED; |
6e747d53 BL |
3019 | } |
3020 | ||
1319b2f6 OC |
3021 | static int rt5645_probe(struct snd_soc_codec *codec) |
3022 | { | |
e2ada818 | 3023 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
1319b2f6 OC |
3024 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); |
3025 | ||
3026 | rt5645->codec = codec; | |
3027 | ||
5c4ca99d BL |
3028 | switch (rt5645->codec_type) { |
3029 | case CODEC_TYPE_RT5645: | |
f2a76385 | 3030 | snd_soc_dapm_new_controls(dapm, |
83c09290 BL |
3031 | rt5645_specific_dapm_widgets, |
3032 | ARRAY_SIZE(rt5645_specific_dapm_widgets)); | |
e2ada818 | 3033 | snd_soc_dapm_add_routes(dapm, |
5c4ca99d BL |
3034 | rt5645_specific_dapm_routes, |
3035 | ARRAY_SIZE(rt5645_specific_dapm_routes)); | |
3036 | break; | |
3037 | case CODEC_TYPE_RT5650: | |
e2ada818 | 3038 | snd_soc_dapm_new_controls(dapm, |
5c4ca99d BL |
3039 | rt5650_specific_dapm_widgets, |
3040 | ARRAY_SIZE(rt5650_specific_dapm_widgets)); | |
e2ada818 | 3041 | snd_soc_dapm_add_routes(dapm, |
5c4ca99d BL |
3042 | rt5650_specific_dapm_routes, |
3043 | ARRAY_SIZE(rt5650_specific_dapm_routes)); | |
3044 | break; | |
3045 | } | |
3046 | ||
bd1204cb | 3047 | snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); |
1319b2f6 | 3048 | |
bb656add | 3049 | /* for JD function */ |
ac4fc3ee | 3050 | if (rt5645->pdata.jd_mode) { |
e2ada818 LPC |
3051 | snd_soc_dapm_force_enable_pin(dapm, "JD Power"); |
3052 | snd_soc_dapm_force_enable_pin(dapm, "LDO2"); | |
3053 | snd_soc_dapm_sync(dapm); | |
bb656add BL |
3054 | } |
3055 | ||
1319b2f6 OC |
3056 | return 0; |
3057 | } | |
3058 | ||
3059 | static int rt5645_remove(struct snd_soc_codec *codec) | |
3060 | { | |
3061 | rt5645_reset(codec); | |
3062 | return 0; | |
3063 | } | |
3064 | ||
3065 | #ifdef CONFIG_PM | |
3066 | static int rt5645_suspend(struct snd_soc_codec *codec) | |
3067 | { | |
3068 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
3069 | ||
3070 | regcache_cache_only(rt5645->regmap, true); | |
3071 | regcache_mark_dirty(rt5645->regmap); | |
3072 | ||
3073 | return 0; | |
3074 | } | |
3075 | ||
3076 | static int rt5645_resume(struct snd_soc_codec *codec) | |
3077 | { | |
3078 | struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); | |
3079 | ||
3080 | regcache_cache_only(rt5645->regmap, false); | |
0f776efd | 3081 | regcache_sync(rt5645->regmap); |
1319b2f6 OC |
3082 | |
3083 | return 0; | |
3084 | } | |
3085 | #else | |
3086 | #define rt5645_suspend NULL | |
3087 | #define rt5645_resume NULL | |
3088 | #endif | |
3089 | ||
3090 | #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000 | |
3091 | #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | |
3092 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) | |
3093 | ||
64793047 | 3094 | static const struct snd_soc_dai_ops rt5645_aif_dai_ops = { |
1319b2f6 OC |
3095 | .hw_params = rt5645_hw_params, |
3096 | .set_fmt = rt5645_set_dai_fmt, | |
3097 | .set_sysclk = rt5645_set_dai_sysclk, | |
3098 | .set_tdm_slot = rt5645_set_tdm_slot, | |
3099 | .set_pll = rt5645_set_dai_pll, | |
3100 | }; | |
3101 | ||
9e22f782 | 3102 | static struct snd_soc_dai_driver rt5645_dai[] = { |
1319b2f6 OC |
3103 | { |
3104 | .name = "rt5645-aif1", | |
3105 | .id = RT5645_AIF1, | |
3106 | .playback = { | |
3107 | .stream_name = "AIF1 Playback", | |
3108 | .channels_min = 1, | |
3109 | .channels_max = 2, | |
3110 | .rates = RT5645_STEREO_RATES, | |
3111 | .formats = RT5645_FORMATS, | |
3112 | }, | |
3113 | .capture = { | |
3114 | .stream_name = "AIF1 Capture", | |
3115 | .channels_min = 1, | |
3116 | .channels_max = 2, | |
3117 | .rates = RT5645_STEREO_RATES, | |
3118 | .formats = RT5645_FORMATS, | |
3119 | }, | |
3120 | .ops = &rt5645_aif_dai_ops, | |
3121 | }, | |
3122 | { | |
3123 | .name = "rt5645-aif2", | |
3124 | .id = RT5645_AIF2, | |
3125 | .playback = { | |
3126 | .stream_name = "AIF2 Playback", | |
3127 | .channels_min = 1, | |
3128 | .channels_max = 2, | |
3129 | .rates = RT5645_STEREO_RATES, | |
3130 | .formats = RT5645_FORMATS, | |
3131 | }, | |
3132 | .capture = { | |
3133 | .stream_name = "AIF2 Capture", | |
3134 | .channels_min = 1, | |
3135 | .channels_max = 2, | |
3136 | .rates = RT5645_STEREO_RATES, | |
3137 | .formats = RT5645_FORMATS, | |
3138 | }, | |
3139 | .ops = &rt5645_aif_dai_ops, | |
3140 | }, | |
3141 | }; | |
3142 | ||
3143 | static struct snd_soc_codec_driver soc_codec_dev_rt5645 = { | |
3144 | .probe = rt5645_probe, | |
3145 | .remove = rt5645_remove, | |
3146 | .suspend = rt5645_suspend, | |
3147 | .resume = rt5645_resume, | |
3148 | .set_bias_level = rt5645_set_bias_level, | |
3149 | .idle_bias_off = true, | |
3150 | .controls = rt5645_snd_controls, | |
3151 | .num_controls = ARRAY_SIZE(rt5645_snd_controls), | |
3152 | .dapm_widgets = rt5645_dapm_widgets, | |
3153 | .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets), | |
3154 | .dapm_routes = rt5645_dapm_routes, | |
3155 | .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes), | |
3156 | }; | |
3157 | ||
3158 | static const struct regmap_config rt5645_regmap = { | |
3159 | .reg_bits = 8, | |
3160 | .val_bits = 16, | |
afefc128 | 3161 | .use_single_rw = true, |
1319b2f6 OC |
3162 | .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) * |
3163 | RT5645_PR_SPACING), | |
3164 | .volatile_reg = rt5645_volatile_register, | |
3165 | .readable_reg = rt5645_readable_register, | |
3166 | ||
3167 | .cache_type = REGCACHE_RBTREE, | |
3168 | .reg_defaults = rt5645_reg, | |
3169 | .num_reg_defaults = ARRAY_SIZE(rt5645_reg), | |
3170 | .ranges = rt5645_ranges, | |
3171 | .num_ranges = ARRAY_SIZE(rt5645_ranges), | |
3172 | }; | |
3173 | ||
3174 | static const struct i2c_device_id rt5645_i2c_id[] = { | |
3175 | { "rt5645", 0 }, | |
5c4ca99d | 3176 | { "rt5650", 0 }, |
1319b2f6 OC |
3177 | { } |
3178 | }; | |
3179 | MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id); | |
3180 | ||
3168c201 FY |
3181 | #ifdef CONFIG_ACPI |
3182 | static struct acpi_device_id rt5645_acpi_match[] = { | |
3183 | { "10EC5645", 0 }, | |
3184 | { "10EC5650", 0 }, | |
3185 | {}, | |
3186 | }; | |
3187 | MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match); | |
3188 | #endif | |
3189 | ||
78c34fd4 FY |
3190 | static struct rt5645_platform_data *rt5645_pdata; |
3191 | ||
3192 | static struct rt5645_platform_data strago_platform_data = { | |
ac4fc3ee | 3193 | .dmic1_data_pin = RT5645_DMIC1_DISABLE, |
78c34fd4 | 3194 | .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, |
78c34fd4 FY |
3195 | .jd_mode = 3, |
3196 | }; | |
3197 | ||
3198 | static int strago_quirk_cb(const struct dmi_system_id *id) | |
3199 | { | |
3200 | rt5645_pdata = &strago_platform_data; | |
3201 | ||
3202 | return 1; | |
3203 | } | |
3204 | ||
0bc7d10c | 3205 | static const struct dmi_system_id dmi_platform_intel_braswell[] = { |
78c34fd4 FY |
3206 | { |
3207 | .ident = "Intel Strago", | |
3208 | .callback = strago_quirk_cb, | |
3209 | .matches = { | |
3210 | DMI_MATCH(DMI_PRODUCT_NAME, "Strago"), | |
3211 | }, | |
3212 | }, | |
c1713485 OC |
3213 | { |
3214 | .ident = "Google Celes", | |
3215 | .callback = strago_quirk_cb, | |
3216 | .matches = { | |
3217 | DMI_MATCH(DMI_PRODUCT_NAME, "Celes"), | |
3218 | }, | |
3219 | }, | |
721b51fc JL |
3220 | { |
3221 | .ident = "Google Ultima", | |
3222 | .callback = strago_quirk_cb, | |
3223 | .matches = { | |
3224 | DMI_MATCH(DMI_PRODUCT_NAME, "Ultima"), | |
3225 | }, | |
3226 | }, | |
78c34fd4 FY |
3227 | { } |
3228 | }; | |
3229 | ||
e9159e75 JL |
3230 | static struct rt5645_platform_data buddy_platform_data = { |
3231 | .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5, | |
3232 | .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, | |
3233 | .jd_mode = 3, | |
917536ae | 3234 | .jd_invert = true, |
e9159e75 JL |
3235 | }; |
3236 | ||
3237 | static int buddy_quirk_cb(const struct dmi_system_id *id) | |
3238 | { | |
3239 | rt5645_pdata = &buddy_platform_data; | |
3240 | ||
3241 | return 1; | |
3242 | } | |
3243 | ||
3244 | static struct dmi_system_id dmi_platform_intel_broadwell[] __initdata = { | |
3245 | { | |
3246 | .ident = "Chrome Buddy", | |
3247 | .callback = buddy_quirk_cb, | |
3248 | .matches = { | |
3249 | DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"), | |
3250 | }, | |
3251 | }, | |
3252 | { } | |
3253 | }; | |
3254 | ||
3255 | ||
48edaa4b OC |
3256 | static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev) |
3257 | { | |
3258 | rt5645->pdata.in2_diff = device_property_read_bool(dev, | |
3259 | "realtek,in2-differential"); | |
3260 | device_property_read_u32(dev, | |
3261 | "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin); | |
3262 | device_property_read_u32(dev, | |
3263 | "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin); | |
3264 | device_property_read_u32(dev, | |
3265 | "realtek,jd-mode", &rt5645->pdata.jd_mode); | |
3266 | ||
3267 | return 0; | |
3268 | } | |
3269 | ||
1319b2f6 OC |
3270 | static int rt5645_i2c_probe(struct i2c_client *i2c, |
3271 | const struct i2c_device_id *id) | |
3272 | { | |
3273 | struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev); | |
3274 | struct rt5645_priv *rt5645; | |
9fc114c5 | 3275 | int ret, i; |
1319b2f6 OC |
3276 | unsigned int val; |
3277 | ||
3278 | rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv), | |
3279 | GFP_KERNEL); | |
3280 | if (rt5645 == NULL) | |
3281 | return -ENOMEM; | |
3282 | ||
f3fa1bbd | 3283 | rt5645->i2c = i2c; |
1319b2f6 OC |
3284 | i2c_set_clientdata(i2c, rt5645); |
3285 | ||
48edaa4b | 3286 | if (pdata) |
1319b2f6 | 3287 | rt5645->pdata = *pdata; |
e9159e75 JL |
3288 | else if (dmi_check_system(dmi_platform_intel_braswell) || |
3289 | dmi_check_system(dmi_platform_intel_broadwell)) | |
48edaa4b OC |
3290 | rt5645->pdata = *rt5645_pdata; |
3291 | else | |
3292 | rt5645_parse_dt(rt5645, &i2c->dev); | |
1319b2f6 | 3293 | |
25c8888a AL |
3294 | rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect", |
3295 | GPIOD_IN); | |
0b0cefc8 OC |
3296 | |
3297 | if (IS_ERR(rt5645->gpiod_hp_det)) { | |
0b0cefc8 | 3298 | dev_err(&i2c->dev, "failed to initialize gpiod\n"); |
25c8888a | 3299 | return PTR_ERR(rt5645->gpiod_hp_det); |
0b0cefc8 OC |
3300 | } |
3301 | ||
1319b2f6 OC |
3302 | rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap); |
3303 | if (IS_ERR(rt5645->regmap)) { | |
3304 | ret = PTR_ERR(rt5645->regmap); | |
3305 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", | |
3306 | ret); | |
3307 | return ret; | |
3308 | } | |
3309 | ||
9fc114c5 KC |
3310 | for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++) |
3311 | rt5645->supplies[i].supply = rt5645_supply_names[i]; | |
3312 | ||
3313 | ret = devm_regulator_bulk_get(&i2c->dev, | |
3314 | ARRAY_SIZE(rt5645->supplies), | |
3315 | rt5645->supplies); | |
3316 | if (ret) { | |
3317 | dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); | |
3318 | return ret; | |
3319 | } | |
3320 | ||
3321 | ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies), | |
3322 | rt5645->supplies); | |
3323 | if (ret) { | |
3324 | dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); | |
3325 | return ret; | |
3326 | } | |
3327 | ||
1319b2f6 | 3328 | regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val); |
5c4ca99d BL |
3329 | |
3330 | switch (val) { | |
3331 | case RT5645_DEVICE_ID: | |
3332 | rt5645->codec_type = CODEC_TYPE_RT5645; | |
3333 | break; | |
3334 | case RT5650_DEVICE_ID: | |
3335 | rt5645->codec_type = CODEC_TYPE_RT5650; | |
3336 | break; | |
3337 | default: | |
1319b2f6 | 3338 | dev_err(&i2c->dev, |
8f68e80f | 3339 | "Device with ID register %#x is not rt5645 or rt5650\n", |
5c4ca99d | 3340 | val); |
9fc114c5 KC |
3341 | ret = -ENODEV; |
3342 | goto err_enable; | |
d12d6c4e JL |
3343 | } |
3344 | ||
1319b2f6 OC |
3345 | regmap_write(rt5645->regmap, RT5645_RESET, 0); |
3346 | ||
3347 | ret = regmap_register_patch(rt5645->regmap, init_list, | |
3348 | ARRAY_SIZE(init_list)); | |
3349 | if (ret != 0) | |
3350 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); | |
3351 | ||
5c4ca99d BL |
3352 | if (rt5645->codec_type == CODEC_TYPE_RT5650) { |
3353 | ret = regmap_register_patch(rt5645->regmap, rt5650_init_list, | |
3354 | ARRAY_SIZE(rt5650_init_list)); | |
3355 | if (ret != 0) | |
3356 | dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n", | |
3357 | ret); | |
3358 | } | |
3359 | ||
1319b2f6 OC |
3360 | if (rt5645->pdata.in2_diff) |
3361 | regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL, | |
3362 | RT5645_IN_DF2, RT5645_IN_DF2); | |
3363 | ||
ac4fc3ee | 3364 | if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) { |
1319b2f6 OC |
3365 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
3366 | RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL); | |
ac4fc3ee BL |
3367 | } |
3368 | switch (rt5645->pdata.dmic1_data_pin) { | |
3369 | case RT5645_DMIC_DATA_IN2N: | |
3370 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3371 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N); | |
3372 | break; | |
1319b2f6 | 3373 | |
ac4fc3ee | 3374 | case RT5645_DMIC_DATA_GPIO5: |
a094935e BL |
3375 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, |
3376 | RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO); | |
ac4fc3ee BL |
3377 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, |
3378 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5); | |
3379 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3380 | RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA); | |
3381 | break; | |
1319b2f6 | 3382 | |
ac4fc3ee BL |
3383 | case RT5645_DMIC_DATA_GPIO11: |
3384 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3385 | RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11); | |
3386 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3387 | RT5645_GP11_PIN_MASK, | |
3388 | RT5645_GP11_PIN_DMIC1_SDA); | |
3389 | break; | |
1319b2f6 | 3390 | |
ac4fc3ee BL |
3391 | default: |
3392 | break; | |
3393 | } | |
1319b2f6 | 3394 | |
ac4fc3ee BL |
3395 | switch (rt5645->pdata.dmic2_data_pin) { |
3396 | case RT5645_DMIC_DATA_IN2P: | |
3397 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3398 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P); | |
3399 | break; | |
1319b2f6 | 3400 | |
ac4fc3ee BL |
3401 | case RT5645_DMIC_DATA_GPIO6: |
3402 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3403 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6); | |
3404 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3405 | RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA); | |
3406 | break; | |
1319b2f6 | 3407 | |
ac4fc3ee BL |
3408 | case RT5645_DMIC_DATA_GPIO10: |
3409 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3410 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10); | |
3411 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3412 | RT5645_GP10_PIN_MASK, | |
3413 | RT5645_GP10_PIN_DMIC2_SDA); | |
3414 | break; | |
1319b2f6 | 3415 | |
ac4fc3ee BL |
3416 | case RT5645_DMIC_DATA_GPIO12: |
3417 | regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, | |
3418 | RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12); | |
3419 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3420 | RT5645_GP12_PIN_MASK, | |
3421 | RT5645_GP12_PIN_DMIC2_SDA); | |
3422 | break; | |
1319b2f6 | 3423 | |
ac4fc3ee BL |
3424 | default: |
3425 | break; | |
1319b2f6 OC |
3426 | } |
3427 | ||
ac4fc3ee | 3428 | if (rt5645->pdata.jd_mode) { |
bb656add | 3429 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, |
ac4fc3ee BL |
3430 | RT5645_IRQ_CLK_GATE_CTRL, |
3431 | RT5645_IRQ_CLK_GATE_CTRL); | |
bb656add | 3432 | regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, |
ac4fc3ee | 3433 | RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT); |
2d4e2d02 BL |
3434 | regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, |
3435 | RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN); | |
3436 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, | |
3437 | RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE); | |
3438 | regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER, | |
3439 | RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE); | |
3440 | regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, | |
3441 | RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN); | |
3442 | regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, | |
3443 | RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ); | |
3444 | switch (rt5645->pdata.jd_mode) { | |
3445 | case 1: | |
3446 | regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, | |
3447 | RT5645_JD1_MODE_MASK, | |
3448 | RT5645_JD1_MODE_0); | |
3449 | break; | |
3450 | case 2: | |
3451 | regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, | |
3452 | RT5645_JD1_MODE_MASK, | |
3453 | RT5645_JD1_MODE_1); | |
3454 | break; | |
3455 | case 3: | |
3456 | regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, | |
3457 | RT5645_JD1_MODE_MASK, | |
3458 | RT5645_JD1_MODE_2); | |
3459 | break; | |
3460 | default: | |
3461 | break; | |
3462 | } | |
3463 | } | |
3464 | ||
7ea3470a NB |
3465 | INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work); |
3466 | ||
f3fa1bbd OC |
3467 | if (rt5645->i2c->irq) { |
3468 | ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq, | |
3469 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | |
3470 | | IRQF_ONESHOT, "rt5645", rt5645); | |
5168c547 | 3471 | if (ret) { |
f3fa1bbd | 3472 | dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); |
9fc114c5 | 3473 | goto err_enable; |
5168c547 | 3474 | } |
f3fa1bbd OC |
3475 | } |
3476 | ||
5168c547 KC |
3477 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645, |
3478 | rt5645_dai, ARRAY_SIZE(rt5645_dai)); | |
3479 | if (ret) | |
3480 | goto err_irq; | |
3481 | ||
3482 | return 0; | |
3483 | ||
3484 | err_irq: | |
3485 | if (rt5645->i2c->irq) | |
3486 | free_irq(rt5645->i2c->irq, rt5645); | |
9fc114c5 KC |
3487 | err_enable: |
3488 | regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies); | |
5168c547 | 3489 | return ret; |
1319b2f6 OC |
3490 | } |
3491 | ||
3492 | static int rt5645_i2c_remove(struct i2c_client *i2c) | |
3493 | { | |
f3fa1bbd OC |
3494 | struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c); |
3495 | ||
3496 | if (i2c->irq) | |
3497 | free_irq(i2c->irq, rt5645); | |
3498 | ||
cd6e82b8 OC |
3499 | cancel_delayed_work_sync(&rt5645->jack_detect_work); |
3500 | ||
1319b2f6 | 3501 | snd_soc_unregister_codec(&i2c->dev); |
9fc114c5 | 3502 | regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies); |
1319b2f6 OC |
3503 | |
3504 | return 0; | |
3505 | } | |
3506 | ||
f2988afe OC |
3507 | static void rt5645_i2c_shutdown(struct i2c_client *i2c) |
3508 | { | |
3509 | struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c); | |
3510 | ||
3511 | regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, | |
3512 | RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND); | |
3513 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD, | |
3514 | RT5645_CBJ_MN_JD); | |
3515 | regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN, | |
3516 | 0); | |
3517 | } | |
3518 | ||
9e22f782 | 3519 | static struct i2c_driver rt5645_i2c_driver = { |
1319b2f6 OC |
3520 | .driver = { |
3521 | .name = "rt5645", | |
3168c201 | 3522 | .acpi_match_table = ACPI_PTR(rt5645_acpi_match), |
1319b2f6 OC |
3523 | }, |
3524 | .probe = rt5645_i2c_probe, | |
f2988afe OC |
3525 | .remove = rt5645_i2c_remove, |
3526 | .shutdown = rt5645_i2c_shutdown, | |
1319b2f6 OC |
3527 | .id_table = rt5645_i2c_id, |
3528 | }; | |
3529 | module_i2c_driver(rt5645_i2c_driver); | |
3530 | ||
3531 | MODULE_DESCRIPTION("ASoC RT5645 driver"); | |
3532 | MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); | |
3533 | MODULE_LICENSE("GPL v2"); |