sparc64: Convert EBUS floppy support to pure OF driver.
[deliverable/linux.git] / sound / sparc / cs4231.c
CommitLineData
1da177e4
LT
1/*
2 * Driver for CS4231 sound chips found on Sparcs.
ae251031 3 * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
1da177e4
LT
4 *
5 * Based entirely upon drivers/sbus/audio/cs4231.c which is:
9e9abb4f 6 * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
1da177e4 7 * and also sound/isa/cs423x/cs4231_lib.c which is:
c1017a4c 8 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT
9 */
10
1da177e4
LT
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/moduleparam.h>
9e9abb4f
KH
18#include <linux/irq.h>
19#include <linux/io.h>
ae251031
DM
20#include <linux/of.h>
21#include <linux/of_device.h>
1da177e4 22
1da177e4
LT
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/info.h>
26#include <sound/control.h>
27#include <sound/timer.h>
28#include <sound/initval.h>
29#include <sound/pcm_params.h>
30
1da177e4
LT
31#ifdef CONFIG_SBUS
32#define SBUS_SUPPORT
1da177e4
LT
33#endif
34
35#if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36#define EBUS_SUPPORT
1da177e4
LT
37#include <linux/pci.h>
38#include <asm/ebus.h>
aae7fb87 39#include <asm/ebus_dma.h>
1da177e4
LT
40#endif
41
42static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
9e9abb4f
KH
44/* Enable this card */
45static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
1da177e4
LT
46
47module_param_array(index, int, NULL, 0444);
48MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
49module_param_array(id, charp, NULL, 0444);
50MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
51module_param_array(enable, bool, NULL, 0444);
52MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
53MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
54MODULE_DESCRIPTION("Sun CS4231");
55MODULE_LICENSE("GPL");
56MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
57
5a820fa7 58#ifdef SBUS_SUPPORT
be9b7e8c 59struct sbus_dma_info {
9e9abb4f
KH
60 spinlock_t lock; /* DMA access lock */
61 int dir;
62 void __iomem *regs;
be9b7e8c 63};
5a820fa7
GC
64#endif
65
4f3f2f6f 66struct snd_cs4231;
be9b7e8c 67struct cs4231_dma_control {
9e9abb4f
KH
68 void (*prepare)(struct cs4231_dma_control *dma_cont,
69 int dir);
70 void (*enable)(struct cs4231_dma_control *dma_cont, int on);
71 int (*request)(struct cs4231_dma_control *dma_cont,
72 dma_addr_t bus_addr, size_t len);
73 unsigned int (*address)(struct cs4231_dma_control *dma_cont);
74 void (*preallocate)(struct snd_cs4231 *chip,
75 struct snd_pcm *pcm);
1da177e4 76#ifdef EBUS_SUPPORT
b128254f 77 struct ebus_dma_info ebus_info;
1da177e4 78#endif
5a820fa7 79#ifdef SBUS_SUPPORT
b128254f 80 struct sbus_dma_info sbus_info;
5a820fa7 81#endif
be9b7e8c 82};
b128254f
GC
83
84struct snd_cs4231 {
9e9abb4f 85 spinlock_t lock; /* registers access lock */
b128254f
GC
86 void __iomem *port;
87
be9b7e8c
TI
88 struct cs4231_dma_control p_dma;
89 struct cs4231_dma_control c_dma;
5a820fa7 90
1da177e4
LT
91 u32 flags;
92#define CS4231_FLAG_EBUS 0x00000001
93#define CS4231_FLAG_PLAYBACK 0x00000002
94#define CS4231_FLAG_CAPTURE 0x00000004
95
be9b7e8c
TI
96 struct snd_card *card;
97 struct snd_pcm *pcm;
98 struct snd_pcm_substream *playback_substream;
1da177e4 99 unsigned int p_periods_sent;
be9b7e8c 100 struct snd_pcm_substream *capture_substream;
1da177e4 101 unsigned int c_periods_sent;
be9b7e8c 102 struct snd_timer *timer;
1da177e4
LT
103
104 unsigned short mode;
105#define CS4231_MODE_NONE 0x0000
106#define CS4231_MODE_PLAY 0x0001
107#define CS4231_MODE_RECORD 0x0002
108#define CS4231_MODE_TIMER 0x0004
9e9abb4f
KH
109#define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
110 CS4231_MODE_TIMER)
1da177e4
LT
111
112 unsigned char image[32]; /* registers image */
113 int mce_bit;
114 int calibrate_mute;
9e9abb4f
KH
115 struct mutex mce_mutex; /* mutex for mce register */
116 struct mutex open_mutex; /* mutex for ALSA open/close */
1da177e4
LT
117
118 union {
119#ifdef SBUS_SUPPORT
ae251031 120 struct of_device *op;
1da177e4
LT
121#endif
122#ifdef EBUS_SUPPORT
123 struct pci_dev *pdev;
124#endif
125 } dev_u;
126 unsigned int irq[2];
127 unsigned int regs_size;
128 struct snd_cs4231 *next;
b128254f 129};
1da177e4 130
be9b7e8c 131static struct snd_cs4231 *cs4231_list;
1da177e4
LT
132
133/* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
134 * now.... -DaveM
135 */
136
137/* IO ports */
7e52f3da 138#include <sound/cs4231-regs.h>
1da177e4
LT
139
140/* XXX offsets are different than PC ISA chips... */
7e52f3da 141#define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
1da177e4
LT
142
143/* SBUS DMA register defines. */
144
145#define APCCSR 0x10UL /* APC DMA CSR */
146#define APCCVA 0x20UL /* APC Capture DMA Address */
147#define APCCC 0x24UL /* APC Capture Count */
148#define APCCNVA 0x28UL /* APC Capture DMA Next Address */
149#define APCCNC 0x2cUL /* APC Capture Next Count */
150#define APCPVA 0x30UL /* APC Play DMA Address */
151#define APCPC 0x34UL /* APC Play Count */
152#define APCPNVA 0x38UL /* APC Play DMA Next Address */
153#define APCPNC 0x3cUL /* APC Play Next Count */
154
5a820fa7
GC
155/* Defines for SBUS DMA-routines */
156
157#define APCVA 0x0UL /* APC DMA Address */
158#define APCC 0x4UL /* APC Count */
159#define APCNVA 0x8UL /* APC DMA Next Address */
160#define APCNC 0xcUL /* APC Next Count */
161#define APC_PLAY 0x30UL /* Play registers start at 0x30 */
162#define APC_RECORD 0x20UL /* Record registers start at 0x20 */
163
1da177e4
LT
164/* APCCSR bits */
165
166#define APC_INT_PENDING 0x800000 /* Interrupt Pending */
167#define APC_PLAY_INT 0x400000 /* Playback interrupt */
168#define APC_CAPT_INT 0x200000 /* Capture interrupt */
169#define APC_GENL_INT 0x100000 /* General interrupt */
170#define APC_XINT_ENA 0x80000 /* General ext int. enable */
171#define APC_XINT_PLAY 0x40000 /* Playback ext intr */
172#define APC_XINT_CAPT 0x20000 /* Capture ext intr */
173#define APC_XINT_GENL 0x10000 /* Error ext intr */
174#define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
175#define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
176#define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
177#define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
178#define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
179#define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
180#define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
181#define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
182#define APC_PPAUSE 0x80 /* Pause the play DMA */
183#define APC_CPAUSE 0x40 /* Pause the capture DMA */
184#define APC_CDC_RESET 0x20 /* CODEC RESET */
185#define APC_PDMA_READY 0x08 /* Play DMA Go */
186#define APC_CDMA_READY 0x04 /* Capture DMA Go */
187#define APC_CHIP_RESET 0x01 /* Reset the chip */
188
189/* EBUS DMA register offsets */
190
191#define EBDMA_CSR 0x00UL /* Control/Status */
192#define EBDMA_ADDR 0x04UL /* DMA Address */
193#define EBDMA_COUNT 0x08UL /* DMA Count */
194
195/*
196 * Some variables
197 */
198
199static unsigned char freq_bits[14] = {
200 /* 5510 */ 0x00 | CS4231_XTAL2,
201 /* 6620 */ 0x0E | CS4231_XTAL2,
202 /* 8000 */ 0x00 | CS4231_XTAL1,
203 /* 9600 */ 0x0E | CS4231_XTAL1,
204 /* 11025 */ 0x02 | CS4231_XTAL2,
205 /* 16000 */ 0x02 | CS4231_XTAL1,
206 /* 18900 */ 0x04 | CS4231_XTAL2,
207 /* 22050 */ 0x06 | CS4231_XTAL2,
208 /* 27042 */ 0x04 | CS4231_XTAL1,
209 /* 32000 */ 0x06 | CS4231_XTAL1,
210 /* 33075 */ 0x0C | CS4231_XTAL2,
211 /* 37800 */ 0x08 | CS4231_XTAL2,
212 /* 44100 */ 0x0A | CS4231_XTAL2,
213 /* 48000 */ 0x0C | CS4231_XTAL1
214};
215
216static unsigned int rates[14] = {
217 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
218 27042, 32000, 33075, 37800, 44100, 48000
219};
220
be9b7e8c 221static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
c6c2d57b 222 .count = ARRAY_SIZE(rates),
1da177e4
LT
223 .list = rates,
224};
225
be9b7e8c 226static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
1da177e4
LT
227{
228 return snd_pcm_hw_constraint_list(runtime, 0,
229 SNDRV_PCM_HW_PARAM_RATE,
230 &hw_constraints_rates);
231}
232
233static unsigned char snd_cs4231_original_image[32] =
234{
235 0x00, /* 00/00 - lic */
236 0x00, /* 01/01 - ric */
237 0x9f, /* 02/02 - la1ic */
238 0x9f, /* 03/03 - ra1ic */
239 0x9f, /* 04/04 - la2ic */
240 0x9f, /* 05/05 - ra2ic */
241 0xbf, /* 06/06 - loc */
242 0xbf, /* 07/07 - roc */
243 0x20, /* 08/08 - pdfr */
244 CS4231_AUTOCALIB, /* 09/09 - ic */
245 0x00, /* 0a/10 - pc */
246 0x00, /* 0b/11 - ti */
247 CS4231_MODE2, /* 0c/12 - mi */
248 0x00, /* 0d/13 - lbc */
249 0x00, /* 0e/14 - pbru */
250 0x00, /* 0f/15 - pbrl */
251 0x80, /* 10/16 - afei */
252 0x01, /* 11/17 - afeii */
253 0x9f, /* 12/18 - llic */
254 0x9f, /* 13/19 - rlic */
255 0x00, /* 14/20 - tlb */
256 0x00, /* 15/21 - thb */
257 0x00, /* 16/22 - la3mic/reserved */
258 0x00, /* 17/23 - ra3mic/reserved */
259 0x00, /* 18/24 - afs */
260 0x00, /* 19/25 - lamoc/version */
261 0x00, /* 1a/26 - mioc */
262 0x00, /* 1b/27 - ramoc/reserved */
263 0x20, /* 1c/28 - cdfr */
264 0x00, /* 1d/29 - res4 */
265 0x00, /* 1e/30 - cbru */
266 0x00, /* 1f/31 - cbrl */
267};
268
be9b7e8c 269static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
1da177e4
LT
270{
271#ifdef EBUS_SUPPORT
c6c2d57b 272 if (cp->flags & CS4231_FLAG_EBUS)
1da177e4 273 return readb(reg_addr);
c6c2d57b 274 else
1da177e4
LT
275#endif
276#ifdef SBUS_SUPPORT
277 return sbus_readb(reg_addr);
278#endif
1da177e4
LT
279}
280
9e9abb4f
KH
281static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
282 void __iomem *reg_addr)
1da177e4
LT
283{
284#ifdef EBUS_SUPPORT
c6c2d57b 285 if (cp->flags & CS4231_FLAG_EBUS)
1da177e4 286 return writeb(val, reg_addr);
c6c2d57b 287 else
1da177e4
LT
288#endif
289#ifdef SBUS_SUPPORT
290 return sbus_writeb(val, reg_addr);
291#endif
1da177e4
LT
292}
293
294/*
295 * Basic I/O functions
296 */
297
c6c2d57b 298static void snd_cs4231_ready(struct snd_cs4231 *chip)
1da177e4
LT
299{
300 int timeout;
1da177e4 301
7e52f3da
KH
302 for (timeout = 250; timeout > 0; timeout--) {
303 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
304 if ((val & CS4231_INIT) == 0)
305 break;
306 udelay(100);
307 }
1da177e4
LT
308}
309
9e9abb4f
KH
310static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
311 unsigned char value)
1da177e4 312{
c6c2d57b 313 snd_cs4231_ready(chip);
a131430c 314#ifdef CONFIG_SND_DEBUG
7e52f3da 315 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
c6c2d57b
KH
316 snd_printdd("out: auto calibration time out - reg = 0x%x, "
317 "value = 0x%x\n",
318 reg, value);
a131430c 319#endif
7e52f3da 320 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
c6c2d57b 321 wmb();
7e52f3da 322 __cs4231_writeb(chip, value, CS4231U(chip, REG));
1da177e4
LT
323 mb();
324}
325
c6c2d57b
KH
326static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
327 unsigned char mask, unsigned char value)
1da177e4 328{
c6c2d57b 329 unsigned char tmp = (chip->image[reg] & mask) | value;
1da177e4 330
c6c2d57b
KH
331 chip->image[reg] = tmp;
332 if (!chip->calibrate_mute)
333 snd_cs4231_dout(chip, reg, tmp);
334}
335
336static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
337 unsigned char value)
338{
339 snd_cs4231_dout(chip, reg, value);
1da177e4
LT
340 chip->image[reg] = value;
341 mb();
1da177e4
LT
342}
343
be9b7e8c 344static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
1da177e4 345{
c6c2d57b 346 snd_cs4231_ready(chip);
1da177e4 347#ifdef CONFIG_SND_DEBUG
7e52f3da 348 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
c6c2d57b
KH
349 snd_printdd("in: auto calibration time out - reg = 0x%x\n",
350 reg);
1da177e4 351#endif
7e52f3da 352 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
1da177e4 353 mb();
7e52f3da 354 return __cs4231_readb(chip, CS4231U(chip, REG));
1da177e4
LT
355}
356
1da177e4
LT
357/*
358 * CS4231 detection / MCE routines
359 */
360
be9b7e8c 361static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
1da177e4
LT
362{
363 int timeout;
364
9e9abb4f 365 /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
1da177e4 366 for (timeout = 5; timeout > 0; timeout--)
7e52f3da 367 __cs4231_readb(chip, CS4231U(chip, REGSEL));
a131430c 368
1da177e4 369 /* end of cleanup sequence */
7e52f3da
KH
370 for (timeout = 500; timeout > 0; timeout--) {
371 int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
372 if ((val & CS4231_INIT) == 0)
373 break;
c6c2d57b 374 msleep(1);
7e52f3da 375 }
1da177e4
LT
376}
377
be9b7e8c 378static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
1da177e4
LT
379{
380 unsigned long flags;
381 int timeout;
382
383 spin_lock_irqsave(&chip->lock, flags);
c6c2d57b 384 snd_cs4231_ready(chip);
1da177e4 385#ifdef CONFIG_SND_DEBUG
7e52f3da 386 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
a131430c 387 snd_printdd("mce_up - auto calibration time out (0)\n");
1da177e4
LT
388#endif
389 chip->mce_bit |= CS4231_MCE;
7e52f3da 390 timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
1da177e4 391 if (timeout == 0x80)
9e9abb4f
KH
392 snd_printdd("mce_up [%p]: serious init problem - "
393 "codec still busy\n",
394 chip->port);
1da177e4 395 if (!(timeout & CS4231_MCE))
7e52f3da
KH
396 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
397 CS4231U(chip, REGSEL));
1da177e4
LT
398 spin_unlock_irqrestore(&chip->lock, flags);
399}
400
be9b7e8c 401static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
1da177e4 402{
9823adf6
KH
403 unsigned long flags, timeout;
404 int reg;
1da177e4 405
1da177e4 406 snd_cs4231_busy_wait(chip);
9823adf6 407 spin_lock_irqsave(&chip->lock, flags);
1da177e4 408#ifdef CONFIG_SND_DEBUG
7e52f3da
KH
409 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
410 snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
411 CS4231U(chip, REGSEL));
1da177e4
LT
412#endif
413 chip->mce_bit &= ~CS4231_MCE;
9823adf6
KH
414 reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
415 __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
7e52f3da 416 CS4231U(chip, REGSEL));
9823adf6
KH
417 if (reg == 0x80)
418 snd_printdd("mce_down [%p]: serious init problem "
419 "- codec still busy\n", chip->port);
420 if ((reg & CS4231_MCE) == 0) {
1da177e4
LT
421 spin_unlock_irqrestore(&chip->lock, flags);
422 return;
423 }
1da177e4 424
56f91585 425 /*
9823adf6 426 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
56f91585 427 */
9823adf6
KH
428 timeout = jiffies + msecs_to_jiffies(250);
429 do {
1da177e4 430 spin_unlock_irqrestore(&chip->lock, flags);
b875d650 431 msleep(1);
1da177e4 432 spin_lock_irqsave(&chip->lock, flags);
9823adf6
KH
433 reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
434 reg &= CS4231_CALIB_IN_PROGRESS;
435 } while (reg && time_before(jiffies, timeout));
1da177e4 436 spin_unlock_irqrestore(&chip->lock, flags);
9823adf6
KH
437
438 if (reg)
439 snd_printk(KERN_ERR
440 "mce_down - auto calibration time out (2)\n");
1da177e4
LT
441}
442
be9b7e8c
TI
443static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
444 struct snd_pcm_substream *substream,
445 unsigned int *periods_sent)
1da177e4 446{
be9b7e8c 447 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
448
449 while (1) {
a131430c
CZ
450 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
451 unsigned int offset = period_size * (*periods_sent);
1da177e4 452
817dd6ee 453 BUG_ON(period_size >= (1 << 24));
1da177e4 454
9e9abb4f
KH
455 if (dma_cont->request(dma_cont,
456 runtime->dma_addr + offset, period_size))
1da177e4 457 return;
1da177e4
LT
458 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
459 }
460}
a131430c 461
be9b7e8c
TI
462static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
463 unsigned int what, int on)
1da177e4 464{
be9b7e8c
TI
465 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
466 struct cs4231_dma_control *dma_cont;
a131430c 467
5a820fa7 468 if (what & CS4231_PLAYBACK_ENABLE) {
b128254f 469 dma_cont = &chip->p_dma;
a131430c 470 if (on) {
b128254f
GC
471 dma_cont->prepare(dma_cont, 0);
472 dma_cont->enable(dma_cont, 1);
473 snd_cs4231_advance_dma(dma_cont,
5a820fa7
GC
474 chip->playback_substream,
475 &chip->p_periods_sent);
a131430c 476 } else {
b128254f 477 dma_cont->enable(dma_cont, 0);
a131430c 478 }
5a820fa7
GC
479 }
480 if (what & CS4231_RECORD_ENABLE) {
b128254f 481 dma_cont = &chip->c_dma;
a131430c 482 if (on) {
b128254f
GC
483 dma_cont->prepare(dma_cont, 1);
484 dma_cont->enable(dma_cont, 1);
485 snd_cs4231_advance_dma(dma_cont,
5a820fa7
GC
486 chip->capture_substream,
487 &chip->c_periods_sent);
a131430c 488 } else {
b128254f 489 dma_cont->enable(dma_cont, 0);
a131430c 490 }
a131430c 491 }
1da177e4
LT
492}
493
be9b7e8c 494static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 495{
be9b7e8c 496 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
497 int result = 0;
498
499 switch (cmd) {
500 case SNDRV_PCM_TRIGGER_START:
501 case SNDRV_PCM_TRIGGER_STOP:
502 {
503 unsigned int what = 0;
be9b7e8c 504 struct snd_pcm_substream *s;
1da177e4
LT
505 unsigned long flags;
506
ef991b95 507 snd_pcm_group_for_each_entry(s, substream) {
1da177e4
LT
508 if (s == chip->playback_substream) {
509 what |= CS4231_PLAYBACK_ENABLE;
510 snd_pcm_trigger_done(s, substream);
511 } else if (s == chip->capture_substream) {
512 what |= CS4231_RECORD_ENABLE;
513 snd_pcm_trigger_done(s, substream);
514 }
515 }
516
1da177e4
LT
517 spin_lock_irqsave(&chip->lock, flags);
518 if (cmd == SNDRV_PCM_TRIGGER_START) {
a131430c 519 cs4231_dma_trigger(substream, what, 1);
1da177e4 520 chip->image[CS4231_IFACE_CTRL] |= what;
1da177e4 521 } else {
a131430c 522 cs4231_dma_trigger(substream, what, 0);
1da177e4
LT
523 chip->image[CS4231_IFACE_CTRL] &= ~what;
524 }
525 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
526 chip->image[CS4231_IFACE_CTRL]);
527 spin_unlock_irqrestore(&chip->lock, flags);
528 break;
529 }
530 default:
531 result = -EINVAL;
532 break;
533 }
a131430c 534
1da177e4
LT
535 return result;
536}
537
538/*
539 * CODEC I/O
540 */
541
542static unsigned char snd_cs4231_get_rate(unsigned int rate)
543{
544 int i;
545
546 for (i = 0; i < 14; i++)
547 if (rate == rates[i])
548 return freq_bits[i];
9e9abb4f 549
1da177e4
LT
550 return freq_bits[13];
551}
552
9e9abb4f
KH
553static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
554 int channels)
1da177e4
LT
555{
556 unsigned char rformat;
557
558 rformat = CS4231_LINEAR_8;
559 switch (format) {
9e9abb4f
KH
560 case SNDRV_PCM_FORMAT_MU_LAW:
561 rformat = CS4231_ULAW_8;
562 break;
563 case SNDRV_PCM_FORMAT_A_LAW:
564 rformat = CS4231_ALAW_8;
565 break;
566 case SNDRV_PCM_FORMAT_S16_LE:
567 rformat = CS4231_LINEAR_16;
568 break;
569 case SNDRV_PCM_FORMAT_S16_BE:
570 rformat = CS4231_LINEAR_16_BIG;
571 break;
572 case SNDRV_PCM_FORMAT_IMA_ADPCM:
573 rformat = CS4231_ADPCM_16;
574 break;
1da177e4
LT
575 }
576 if (channels > 1)
577 rformat |= CS4231_STEREO;
1da177e4
LT
578 return rformat;
579}
580
be9b7e8c 581static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
1da177e4
LT
582{
583 unsigned long flags;
584
585 mute = mute ? 1 : 0;
586 spin_lock_irqsave(&chip->lock, flags);
587 if (chip->calibrate_mute == mute) {
588 spin_unlock_irqrestore(&chip->lock, flags);
589 return;
590 }
591 if (!mute) {
592 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
593 chip->image[CS4231_LEFT_INPUT]);
594 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
595 chip->image[CS4231_RIGHT_INPUT]);
596 snd_cs4231_dout(chip, CS4231_LOOPBACK,
597 chip->image[CS4231_LOOPBACK]);
598 }
599 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
600 mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
601 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
602 mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
603 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
604 mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
605 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
606 mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
607 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
608 mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
609 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
610 mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
611 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
612 mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
613 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
614 mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
615 snd_cs4231_dout(chip, CS4231_MONO_CTRL,
616 mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
617 chip->calibrate_mute = mute;
618 spin_unlock_irqrestore(&chip->lock, flags);
619}
620
9e9abb4f
KH
621static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
622 struct snd_pcm_hw_params *params,
1da177e4
LT
623 unsigned char pdfr)
624{
625 unsigned long flags;
626
12aa7579 627 mutex_lock(&chip->mce_mutex);
1da177e4
LT
628 snd_cs4231_calibrate_mute(chip, 1);
629
630 snd_cs4231_mce_up(chip);
631
632 spin_lock_irqsave(&chip->lock, flags);
633 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
634 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
635 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
636 pdfr);
637 spin_unlock_irqrestore(&chip->lock, flags);
638
639 snd_cs4231_mce_down(chip);
640
641 snd_cs4231_calibrate_mute(chip, 0);
12aa7579 642 mutex_unlock(&chip->mce_mutex);
1da177e4
LT
643}
644
9e9abb4f
KH
645static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
646 struct snd_pcm_hw_params *params,
647 unsigned char cdfr)
1da177e4
LT
648{
649 unsigned long flags;
650
12aa7579 651 mutex_lock(&chip->mce_mutex);
1da177e4
LT
652 snd_cs4231_calibrate_mute(chip, 1);
653
654 snd_cs4231_mce_up(chip);
655
656 spin_lock_irqsave(&chip->lock, flags);
657 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
658 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
659 ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
660 (cdfr & 0x0f));
661 spin_unlock_irqrestore(&chip->lock, flags);
662 snd_cs4231_mce_down(chip);
663 snd_cs4231_mce_up(chip);
664 spin_lock_irqsave(&chip->lock, flags);
665 }
666 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
667 spin_unlock_irqrestore(&chip->lock, flags);
668
669 snd_cs4231_mce_down(chip);
670
671 snd_cs4231_calibrate_mute(chip, 0);
12aa7579 672 mutex_unlock(&chip->mce_mutex);
1da177e4
LT
673}
674
675/*
676 * Timer interface
677 */
678
be9b7e8c 679static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
1da177e4 680{
be9b7e8c 681 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT
682
683 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
684}
685
be9b7e8c 686static int snd_cs4231_timer_start(struct snd_timer *timer)
1da177e4
LT
687{
688 unsigned long flags;
689 unsigned int ticks;
be9b7e8c 690 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT
691
692 spin_lock_irqsave(&chip->lock, flags);
693 ticks = timer->sticks;
694 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
695 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
696 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
697 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
698 chip->image[CS4231_TIMER_HIGH] =
699 (unsigned char) (ticks >> 8));
700 snd_cs4231_out(chip, CS4231_TIMER_LOW,
701 chip->image[CS4231_TIMER_LOW] =
702 (unsigned char) ticks);
703 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
9e9abb4f
KH
704 chip->image[CS4231_ALT_FEATURE_1] |
705 CS4231_TIMER_ENABLE);
1da177e4
LT
706 }
707 spin_unlock_irqrestore(&chip->lock, flags);
708
709 return 0;
710}
711
be9b7e8c 712static int snd_cs4231_timer_stop(struct snd_timer *timer)
1da177e4
LT
713{
714 unsigned long flags;
be9b7e8c 715 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT
716
717 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f 718 chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
1da177e4 719 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
9e9abb4f 720 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT
721 spin_unlock_irqrestore(&chip->lock, flags);
722
723 return 0;
724}
725
be9b7e8c 726static void __init snd_cs4231_init(struct snd_cs4231 *chip)
1da177e4
LT
727{
728 unsigned long flags;
729
730 snd_cs4231_mce_down(chip);
731
732#ifdef SNDRV_DEBUG_MCE
a131430c 733 snd_printdd("init: (1)\n");
1da177e4
LT
734#endif
735 snd_cs4231_mce_up(chip);
736 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH
737 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
738 CS4231_PLAYBACK_PIO |
739 CS4231_RECORD_ENABLE |
740 CS4231_RECORD_PIO |
1da177e4
LT
741 CS4231_CALIB_MODE);
742 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
743 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
744 spin_unlock_irqrestore(&chip->lock, flags);
745 snd_cs4231_mce_down(chip);
746
747#ifdef SNDRV_DEBUG_MCE
a131430c 748 snd_printdd("init: (2)\n");
1da177e4
LT
749#endif
750
751 snd_cs4231_mce_up(chip);
752 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH
753 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
754 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT
755 spin_unlock_irqrestore(&chip->lock, flags);
756 snd_cs4231_mce_down(chip);
757
758#ifdef SNDRV_DEBUG_MCE
9e9abb4f
KH
759 snd_printdd("init: (3) - afei = 0x%x\n",
760 chip->image[CS4231_ALT_FEATURE_1]);
1da177e4
LT
761#endif
762
763 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH
764 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
765 chip->image[CS4231_ALT_FEATURE_2]);
1da177e4
LT
766 spin_unlock_irqrestore(&chip->lock, flags);
767
768 snd_cs4231_mce_up(chip);
769 spin_lock_irqsave(&chip->lock, flags);
9e9abb4f
KH
770 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
771 chip->image[CS4231_PLAYBK_FORMAT]);
1da177e4
LT
772 spin_unlock_irqrestore(&chip->lock, flags);
773 snd_cs4231_mce_down(chip);
774
775#ifdef SNDRV_DEBUG_MCE
a131430c 776 snd_printdd("init: (4)\n");
1da177e4
LT
777#endif
778
779 snd_cs4231_mce_up(chip);
780 spin_lock_irqsave(&chip->lock, flags);
781 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
782 spin_unlock_irqrestore(&chip->lock, flags);
783 snd_cs4231_mce_down(chip);
784
785#ifdef SNDRV_DEBUG_MCE
a131430c 786 snd_printdd("init: (5)\n");
1da177e4
LT
787#endif
788}
789
be9b7e8c 790static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT
791{
792 unsigned long flags;
793
12aa7579 794 mutex_lock(&chip->open_mutex);
1da177e4 795 if ((chip->mode & mode)) {
12aa7579 796 mutex_unlock(&chip->open_mutex);
1da177e4
LT
797 return -EAGAIN;
798 }
799 if (chip->mode & CS4231_MODE_OPEN) {
800 chip->mode |= mode;
12aa7579 801 mutex_unlock(&chip->open_mutex);
1da177e4
LT
802 return 0;
803 }
804 /* ok. now enable and ack CODEC IRQ */
805 spin_lock_irqsave(&chip->lock, flags);
806 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
807 CS4231_RECORD_IRQ |
808 CS4231_TIMER_IRQ);
809 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH
810 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
811 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT
812
813 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
814 CS4231_RECORD_IRQ |
815 CS4231_TIMER_IRQ);
816 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
a131430c 817
1da177e4
LT
818 spin_unlock_irqrestore(&chip->lock, flags);
819
820 chip->mode = mode;
12aa7579 821 mutex_unlock(&chip->open_mutex);
1da177e4
LT
822 return 0;
823}
824
be9b7e8c 825static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
1da177e4
LT
826{
827 unsigned long flags;
828
12aa7579 829 mutex_lock(&chip->open_mutex);
1da177e4
LT
830 chip->mode &= ~mode;
831 if (chip->mode & CS4231_MODE_OPEN) {
12aa7579 832 mutex_unlock(&chip->open_mutex);
1da177e4
LT
833 return;
834 }
835 snd_cs4231_calibrate_mute(chip, 1);
836
837 /* disable IRQ */
838 spin_lock_irqsave(&chip->lock, flags);
839 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH
840 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
841 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT
842
843 /* now disable record & playback */
844
845 if (chip->image[CS4231_IFACE_CTRL] &
846 (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
847 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
848 spin_unlock_irqrestore(&chip->lock, flags);
849 snd_cs4231_mce_up(chip);
850 spin_lock_irqsave(&chip->lock, flags);
851 chip->image[CS4231_IFACE_CTRL] &=
852 ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
853 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
9e9abb4f
KH
854 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
855 chip->image[CS4231_IFACE_CTRL]);
1da177e4
LT
856 spin_unlock_irqrestore(&chip->lock, flags);
857 snd_cs4231_mce_down(chip);
858 spin_lock_irqsave(&chip->lock, flags);
859 }
860
861 /* clear IRQ again */
862 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
7e52f3da
KH
863 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
864 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
1da177e4
LT
865 spin_unlock_irqrestore(&chip->lock, flags);
866
867 snd_cs4231_calibrate_mute(chip, 0);
868
869 chip->mode = 0;
12aa7579 870 mutex_unlock(&chip->open_mutex);
1da177e4
LT
871}
872
873/*
874 * timer open/close
875 */
876
be9b7e8c 877static int snd_cs4231_timer_open(struct snd_timer *timer)
1da177e4 878{
be9b7e8c 879 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT
880 snd_cs4231_open(chip, CS4231_MODE_TIMER);
881 return 0;
882}
883
9e9abb4f 884static int snd_cs4231_timer_close(struct snd_timer *timer)
1da177e4 885{
be9b7e8c 886 struct snd_cs4231 *chip = snd_timer_chip(timer);
1da177e4
LT
887 snd_cs4231_close(chip, CS4231_MODE_TIMER);
888 return 0;
889}
890
9e9abb4f 891static struct snd_timer_hardware snd_cs4231_timer_table = {
1da177e4
LT
892 .flags = SNDRV_TIMER_HW_AUTO,
893 .resolution = 9945,
894 .ticks = 65535,
895 .open = snd_cs4231_timer_open,
896 .close = snd_cs4231_timer_close,
897 .c_resolution = snd_cs4231_timer_resolution,
898 .start = snd_cs4231_timer_start,
899 .stop = snd_cs4231_timer_stop,
900};
901
902/*
903 * ok.. exported functions..
904 */
905
be9b7e8c
TI
906static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
907 struct snd_pcm_hw_params *hw_params)
1da177e4 908{
be9b7e8c 909 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
910 unsigned char new_pdfr;
911 int err;
912
9e9abb4f
KH
913 err = snd_pcm_lib_malloc_pages(substream,
914 params_buffer_bytes(hw_params));
915 if (err < 0)
1da177e4
LT
916 return err;
917 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
918 params_channels(hw_params)) |
919 snd_cs4231_get_rate(params_rate(hw_params));
920 snd_cs4231_playback_format(chip, hw_params, new_pdfr);
921
922 return 0;
923}
924
be9b7e8c 925static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 926{
be9b7e8c
TI
927 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
928 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
929 unsigned long flags;
930
931 spin_lock_irqsave(&chip->lock, flags);
a131430c 932
1da177e4
LT
933 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
934 CS4231_PLAYBACK_PIO);
a131430c 935
817dd6ee 936 BUG_ON(runtime->period_size > 0xffff + 1);
a131430c 937
a131430c 938 chip->p_periods_sent = 0;
1da177e4
LT
939 spin_unlock_irqrestore(&chip->lock, flags);
940
941 return 0;
942}
943
be9b7e8c
TI
944static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
945 struct snd_pcm_hw_params *hw_params)
1da177e4 946{
be9b7e8c 947 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
948 unsigned char new_cdfr;
949 int err;
950
9e9abb4f
KH
951 err = snd_pcm_lib_malloc_pages(substream,
952 params_buffer_bytes(hw_params));
953 if (err < 0)
1da177e4
LT
954 return err;
955 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
956 params_channels(hw_params)) |
957 snd_cs4231_get_rate(params_rate(hw_params));
958 snd_cs4231_capture_format(chip, hw_params, new_cdfr);
959
960 return 0;
961}
962
be9b7e8c 963static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 964{
be9b7e8c 965 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
966 unsigned long flags;
967
968 spin_lock_irqsave(&chip->lock, flags);
969 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
970 CS4231_RECORD_PIO);
971
a131430c 972
5a820fa7 973 chip->c_periods_sent = 0;
1da177e4
LT
974 spin_unlock_irqrestore(&chip->lock, flags);
975
976 return 0;
977}
978
be9b7e8c 979static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1da177e4
LT
980{
981 unsigned long flags;
982 unsigned char res;
983
984 spin_lock_irqsave(&chip->lock, flags);
985 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
986 spin_unlock_irqrestore(&chip->lock, flags);
987
9e9abb4f
KH
988 /* detect overrange only above 0dB; may be user selectable? */
989 if (res & (0x08 | 0x02))
1da177e4
LT
990 chip->capture_substream->runtime->overrange++;
991}
992
be9b7e8c 993static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1da177e4 994{
1da177e4
LT
995 if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
996 snd_pcm_period_elapsed(chip->playback_substream);
b128254f 997 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1da177e4
LT
998 &chip->p_periods_sent);
999 }
1000}
1001
be9b7e8c 1002static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1da177e4 1003{
1da177e4
LT
1004 if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1005 snd_pcm_period_elapsed(chip->capture_substream);
b128254f 1006 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1da177e4
LT
1007 &chip->c_periods_sent);
1008 }
1009}
1da177e4 1010
9e9abb4f
KH
1011static snd_pcm_uframes_t snd_cs4231_playback_pointer(
1012 struct snd_pcm_substream *substream)
1da177e4 1013{
be9b7e8c
TI
1014 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1015 struct cs4231_dma_control *dma_cont = &chip->p_dma;
5a820fa7 1016 size_t ptr;
9e9abb4f 1017
1da177e4
LT
1018 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1019 return 0;
b128254f
GC
1020 ptr = dma_cont->address(dma_cont);
1021 if (ptr != 0)
1022 ptr -= substream->runtime->dma_addr;
9e9abb4f 1023
1da177e4
LT
1024 return bytes_to_frames(substream->runtime, ptr);
1025}
1026
9e9abb4f
KH
1027static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1028 struct snd_pcm_substream *substream)
1da177e4 1029{
be9b7e8c
TI
1030 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1031 struct cs4231_dma_control *dma_cont = &chip->c_dma;
5a820fa7 1032 size_t ptr;
9e9abb4f 1033
1da177e4
LT
1034 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1035 return 0;
b128254f
GC
1036 ptr = dma_cont->address(dma_cont);
1037 if (ptr != 0)
1038 ptr -= substream->runtime->dma_addr;
9e9abb4f 1039
1da177e4
LT
1040 return bytes_to_frames(substream->runtime, ptr);
1041}
1042
be9b7e8c 1043static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1da177e4
LT
1044{
1045 unsigned long flags;
9e9abb4f
KH
1046 int i;
1047 int id = 0;
1048 int vers = 0;
1da177e4
LT
1049 unsigned char *ptr;
1050
1da177e4
LT
1051 for (i = 0; i < 50; i++) {
1052 mb();
7e52f3da 1053 if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
9e9abb4f 1054 msleep(2);
1da177e4
LT
1055 else {
1056 spin_lock_irqsave(&chip->lock, flags);
1057 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1058 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1059 vers = snd_cs4231_in(chip, CS4231_VERSION);
1060 spin_unlock_irqrestore(&chip->lock, flags);
1061 if (id == 0x0a)
1062 break; /* this is valid value */
1063 }
1064 }
1065 snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1066 if (id != 0x0a)
1067 return -ENODEV; /* no valid device found */
1068
1069 spin_lock_irqsave(&chip->lock, flags);
1070
7e52f3da
KH
1071 /* clear any pendings IRQ */
1072 __cs4231_readb(chip, CS4231U(chip, STATUS));
1073 __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1da177e4
LT
1074 mb();
1075
1076 spin_unlock_irqrestore(&chip->lock, flags);
1077
1078 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1079 chip->image[CS4231_IFACE_CTRL] =
1080 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1081 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1082 chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1083 if (vers & 0x20)
1084 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1085
1086 ptr = (unsigned char *) &chip->image;
1087
1088 snd_cs4231_mce_down(chip);
1089
1090 spin_lock_irqsave(&chip->lock, flags);
1091
1092 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1093 snd_cs4231_out(chip, i, *ptr++);
1094
1095 spin_unlock_irqrestore(&chip->lock, flags);
1096
1097 snd_cs4231_mce_up(chip);
1098
1099 snd_cs4231_mce_down(chip);
1100
1101 mdelay(2);
1102
1103 return 0; /* all things are ok.. */
1104}
1105
9e9abb4f
KH
1106static struct snd_pcm_hardware snd_cs4231_playback = {
1107 .info = SNDRV_PCM_INFO_MMAP |
1108 SNDRV_PCM_INFO_INTERLEAVED |
1109 SNDRV_PCM_INFO_MMAP_VALID |
1110 SNDRV_PCM_INFO_SYNC_START,
1111 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1112 SNDRV_PCM_FMTBIT_A_LAW |
1113 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1114 SNDRV_PCM_FMTBIT_U8 |
1115 SNDRV_PCM_FMTBIT_S16_LE |
1116 SNDRV_PCM_FMTBIT_S16_BE,
1117 .rates = SNDRV_PCM_RATE_KNOT |
1118 SNDRV_PCM_RATE_8000_48000,
1da177e4
LT
1119 .rate_min = 5510,
1120 .rate_max = 48000,
1121 .channels_min = 1,
1122 .channels_max = 2,
9e9abb4f 1123 .buffer_bytes_max = 32 * 1024,
f9af1d9d 1124 .period_bytes_min = 64,
9e9abb4f 1125 .period_bytes_max = 32 * 1024,
1da177e4
LT
1126 .periods_min = 1,
1127 .periods_max = 1024,
1128};
1129
9e9abb4f
KH
1130static struct snd_pcm_hardware snd_cs4231_capture = {
1131 .info = SNDRV_PCM_INFO_MMAP |
1132 SNDRV_PCM_INFO_INTERLEAVED |
1133 SNDRV_PCM_INFO_MMAP_VALID |
1134 SNDRV_PCM_INFO_SYNC_START,
1135 .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1136 SNDRV_PCM_FMTBIT_A_LAW |
1137 SNDRV_PCM_FMTBIT_IMA_ADPCM |
1138 SNDRV_PCM_FMTBIT_U8 |
1139 SNDRV_PCM_FMTBIT_S16_LE |
1140 SNDRV_PCM_FMTBIT_S16_BE,
1141 .rates = SNDRV_PCM_RATE_KNOT |
1142 SNDRV_PCM_RATE_8000_48000,
1da177e4
LT
1143 .rate_min = 5510,
1144 .rate_max = 48000,
1145 .channels_min = 1,
1146 .channels_max = 2,
9e9abb4f 1147 .buffer_bytes_max = 32 * 1024,
f9af1d9d 1148 .period_bytes_min = 64,
9e9abb4f 1149 .period_bytes_max = 32 * 1024,
1da177e4
LT
1150 .periods_min = 1,
1151 .periods_max = 1024,
1152};
1153
be9b7e8c 1154static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1da177e4 1155{
be9b7e8c
TI
1156 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1157 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1158 int err;
1159
1160 runtime->hw = snd_cs4231_playback;
1161
9e9abb4f
KH
1162 err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1163 if (err < 0) {
1da177e4
LT
1164 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1165 return err;
1166 }
1167 chip->playback_substream = substream;
1168 chip->p_periods_sent = 0;
1169 snd_pcm_set_sync(substream);
1170 snd_cs4231_xrate(runtime);
1171
1172 return 0;
1173}
1174
be9b7e8c 1175static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1da177e4 1176{
be9b7e8c
TI
1177 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1178 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
1179 int err;
1180
1181 runtime->hw = snd_cs4231_capture;
1182
9e9abb4f
KH
1183 err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1184 if (err < 0) {
1da177e4
LT
1185 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1186 return err;
1187 }
1188 chip->capture_substream = substream;
1189 chip->c_periods_sent = 0;
1190 snd_pcm_set_sync(substream);
1191 snd_cs4231_xrate(runtime);
1192
1193 return 0;
1194}
1195
be9b7e8c 1196static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1da177e4 1197{
be9b7e8c 1198 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4 1199
1da177e4 1200 snd_cs4231_close(chip, CS4231_MODE_PLAY);
b128254f 1201 chip->playback_substream = NULL;
1da177e4
LT
1202
1203 return 0;
1204}
1205
be9b7e8c 1206static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1da177e4 1207{
be9b7e8c 1208 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1da177e4 1209
1da177e4 1210 snd_cs4231_close(chip, CS4231_MODE_RECORD);
b128254f 1211 chip->capture_substream = NULL;
1da177e4
LT
1212
1213 return 0;
1214}
1215
1216/* XXX We can do some power-management, in particular on EBUS using
1217 * XXX the audio AUXIO register...
1218 */
1219
be9b7e8c 1220static struct snd_pcm_ops snd_cs4231_playback_ops = {
1da177e4
LT
1221 .open = snd_cs4231_playback_open,
1222 .close = snd_cs4231_playback_close,
1223 .ioctl = snd_pcm_lib_ioctl,
1224 .hw_params = snd_cs4231_playback_hw_params,
c6c2d57b 1225 .hw_free = snd_pcm_lib_free_pages,
1da177e4
LT
1226 .prepare = snd_cs4231_playback_prepare,
1227 .trigger = snd_cs4231_trigger,
1228 .pointer = snd_cs4231_playback_pointer,
1229};
1230
be9b7e8c 1231static struct snd_pcm_ops snd_cs4231_capture_ops = {
1da177e4
LT
1232 .open = snd_cs4231_capture_open,
1233 .close = snd_cs4231_capture_close,
1234 .ioctl = snd_pcm_lib_ioctl,
1235 .hw_params = snd_cs4231_capture_hw_params,
c6c2d57b 1236 .hw_free = snd_pcm_lib_free_pages,
1da177e4
LT
1237 .prepare = snd_cs4231_capture_prepare,
1238 .trigger = snd_cs4231_trigger,
1239 .pointer = snd_cs4231_capture_pointer,
1240};
1241
c6c2d57b 1242static int __init snd_cs4231_pcm(struct snd_card *card)
1da177e4 1243{
c6c2d57b 1244 struct snd_cs4231 *chip = card->private_data;
be9b7e8c 1245 struct snd_pcm *pcm;
1da177e4
LT
1246 int err;
1247
c6c2d57b
KH
1248 err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1249 if (err < 0)
1da177e4
LT
1250 return err;
1251
9e9abb4f
KH
1252 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1253 &snd_cs4231_playback_ops);
1254 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1255 &snd_cs4231_capture_ops);
1256
1da177e4
LT
1257 /* global setup */
1258 pcm->private_data = chip;
1da177e4
LT
1259 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1260 strcpy(pcm->name, "CS4231");
1261
b128254f 1262 chip->p_dma.preallocate(chip, pcm);
1da177e4
LT
1263
1264 chip->pcm = pcm;
1265
1266 return 0;
1267}
1268
c6c2d57b 1269static int __init snd_cs4231_timer(struct snd_card *card)
1da177e4 1270{
c6c2d57b 1271 struct snd_cs4231 *chip = card->private_data;
be9b7e8c
TI
1272 struct snd_timer *timer;
1273 struct snd_timer_id tid;
1da177e4
LT
1274 int err;
1275
1276 /* Timer initialization */
1277 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1278 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
c6c2d57b 1279 tid.card = card->number;
1da177e4
LT
1280 tid.device = 0;
1281 tid.subdevice = 0;
c6c2d57b
KH
1282 err = snd_timer_new(card, "CS4231", &tid, &timer);
1283 if (err < 0)
1da177e4
LT
1284 return err;
1285 strcpy(timer->name, "CS4231");
1286 timer->private_data = chip;
1da177e4
LT
1287 timer->hw = snd_cs4231_timer_table;
1288 chip->timer = timer;
1289
1290 return 0;
1291}
9e9abb4f 1292
1da177e4
LT
1293/*
1294 * MIXER part
1295 */
1296
be9b7e8c
TI
1297static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1299{
1300 static char *texts[4] = {
1301 "Line", "CD", "Mic", "Mix"
1302 };
1da177e4 1303
1da177e4
LT
1304 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1305 uinfo->count = 2;
1306 uinfo->value.enumerated.items = 4;
1307 if (uinfo->value.enumerated.item > 3)
1308 uinfo->value.enumerated.item = 3;
9e9abb4f
KH
1309 strcpy(uinfo->value.enumerated.name,
1310 texts[uinfo->value.enumerated.item]);
1da177e4
LT
1311
1312 return 0;
1313}
1314
be9b7e8c
TI
1315static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1316 struct snd_ctl_elem_value *ucontrol)
1da177e4 1317{
be9b7e8c 1318 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 1319 unsigned long flags;
9e9abb4f 1320
1da177e4
LT
1321 spin_lock_irqsave(&chip->lock, flags);
1322 ucontrol->value.enumerated.item[0] =
1323 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1324 ucontrol->value.enumerated.item[1] =
1325 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1326 spin_unlock_irqrestore(&chip->lock, flags);
1327
1328 return 0;
1329}
1330
be9b7e8c
TI
1331static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_value *ucontrol)
1da177e4 1333{
be9b7e8c 1334 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1335 unsigned long flags;
1336 unsigned short left, right;
1337 int change;
9e9abb4f 1338
1da177e4
LT
1339 if (ucontrol->value.enumerated.item[0] > 3 ||
1340 ucontrol->value.enumerated.item[1] > 3)
1341 return -EINVAL;
1342 left = ucontrol->value.enumerated.item[0] << 6;
1343 right = ucontrol->value.enumerated.item[1] << 6;
1344
1345 spin_lock_irqsave(&chip->lock, flags);
1346
1347 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1348 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1349 change = left != chip->image[CS4231_LEFT_INPUT] ||
9e9abb4f 1350 right != chip->image[CS4231_RIGHT_INPUT];
1da177e4
LT
1351 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1352 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1353
1354 spin_unlock_irqrestore(&chip->lock, flags);
1355
1356 return change;
1357}
1358
be9b7e8c
TI
1359static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1360 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1361{
1362 int mask = (kcontrol->private_value >> 16) & 0xff;
1363
1364 uinfo->type = (mask == 1) ?
1365 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1366 uinfo->count = 1;
1367 uinfo->value.integer.min = 0;
1368 uinfo->value.integer.max = mask;
1369
1370 return 0;
1371}
1372
be9b7e8c
TI
1373static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1374 struct snd_ctl_elem_value *ucontrol)
1da177e4 1375{
be9b7e8c 1376 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1377 unsigned long flags;
1378 int reg = kcontrol->private_value & 0xff;
1379 int shift = (kcontrol->private_value >> 8) & 0xff;
1380 int mask = (kcontrol->private_value >> 16) & 0xff;
1381 int invert = (kcontrol->private_value >> 24) & 0xff;
9e9abb4f 1382
1da177e4
LT
1383 spin_lock_irqsave(&chip->lock, flags);
1384
1385 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1386
1387 spin_unlock_irqrestore(&chip->lock, flags);
1388
1389 if (invert)
1390 ucontrol->value.integer.value[0] =
1391 (mask - ucontrol->value.integer.value[0]);
1392
1393 return 0;
1394}
1395
be9b7e8c
TI
1396static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1397 struct snd_ctl_elem_value *ucontrol)
1da177e4 1398{
be9b7e8c 1399 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1400 unsigned long flags;
1401 int reg = kcontrol->private_value & 0xff;
1402 int shift = (kcontrol->private_value >> 8) & 0xff;
1403 int mask = (kcontrol->private_value >> 16) & 0xff;
1404 int invert = (kcontrol->private_value >> 24) & 0xff;
1405 int change;
1406 unsigned short val;
9e9abb4f 1407
1da177e4
LT
1408 val = (ucontrol->value.integer.value[0] & mask);
1409 if (invert)
1410 val = mask - val;
1411 val <<= shift;
1412
1413 spin_lock_irqsave(&chip->lock, flags);
1414
1415 val = (chip->image[reg] & ~(mask << shift)) | val;
1416 change = val != chip->image[reg];
1417 snd_cs4231_out(chip, reg, val);
1418
1419 spin_unlock_irqrestore(&chip->lock, flags);
1420
1421 return change;
1422}
1423
be9b7e8c
TI
1424static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
1426{
1427 int mask = (kcontrol->private_value >> 24) & 0xff;
1428
1429 uinfo->type = mask == 1 ?
1430 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1431 uinfo->count = 2;
1432 uinfo->value.integer.min = 0;
1433 uinfo->value.integer.max = mask;
1434
1435 return 0;
1436}
1437
be9b7e8c
TI
1438static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1da177e4 1440{
be9b7e8c 1441 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1442 unsigned long flags;
1443 int left_reg = kcontrol->private_value & 0xff;
1444 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1445 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1446 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1447 int mask = (kcontrol->private_value >> 24) & 0xff;
1448 int invert = (kcontrol->private_value >> 22) & 1;
9e9abb4f 1449
1da177e4
LT
1450 spin_lock_irqsave(&chip->lock, flags);
1451
9e9abb4f
KH
1452 ucontrol->value.integer.value[0] =
1453 (chip->image[left_reg] >> shift_left) & mask;
1454 ucontrol->value.integer.value[1] =
1455 (chip->image[right_reg] >> shift_right) & mask;
1da177e4
LT
1456
1457 spin_unlock_irqrestore(&chip->lock, flags);
1458
1459 if (invert) {
1460 ucontrol->value.integer.value[0] =
1461 (mask - ucontrol->value.integer.value[0]);
1462 ucontrol->value.integer.value[1] =
1463 (mask - ucontrol->value.integer.value[1]);
1464 }
1465
1466 return 0;
1467}
1468
be9b7e8c
TI
1469static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1470 struct snd_ctl_elem_value *ucontrol)
1da177e4 1471{
be9b7e8c 1472 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
1473 unsigned long flags;
1474 int left_reg = kcontrol->private_value & 0xff;
1475 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1476 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1477 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1478 int mask = (kcontrol->private_value >> 24) & 0xff;
1479 int invert = (kcontrol->private_value >> 22) & 1;
1480 int change;
1481 unsigned short val1, val2;
9e9abb4f 1482
1da177e4
LT
1483 val1 = ucontrol->value.integer.value[0] & mask;
1484 val2 = ucontrol->value.integer.value[1] & mask;
1485 if (invert) {
1486 val1 = mask - val1;
1487 val2 = mask - val2;
1488 }
1489 val1 <<= shift_left;
1490 val2 <<= shift_right;
1491
1492 spin_lock_irqsave(&chip->lock, flags);
1493
1494 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1495 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
9e9abb4f
KH
1496 change = val1 != chip->image[left_reg];
1497 change |= val2 != chip->image[right_reg];
1da177e4
LT
1498 snd_cs4231_out(chip, left_reg, val1);
1499 snd_cs4231_out(chip, right_reg, val2);
1500
1501 spin_unlock_irqrestore(&chip->lock, flags);
1502
1503 return change;
1504}
1505
1506#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
9e9abb4f
KH
1507{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1508 .info = snd_cs4231_info_single, \
1509 .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1510 .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1511
1512#define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1513 shift_right, mask, invert) \
1514{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1515 .info = snd_cs4231_info_double, \
1516 .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1517 .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1518 ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1da177e4 1519
be9b7e8c 1520static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
9e9abb4f
KH
1521CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1522 CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1523CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1524 CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1525CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1526 CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1527CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1528 CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1529CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1530 CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1531CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1532 CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1533CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1534 CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1535CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1536 CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1da177e4
LT
1537CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1538CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1539CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1540CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
9e9abb4f
KH
1541CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1542 15, 0),
1da177e4
LT
1543{
1544 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1545 .name = "Capture Source",
1546 .info = snd_cs4231_info_mux,
1547 .get = snd_cs4231_get_mux,
1548 .put = snd_cs4231_put_mux,
1549},
9e9abb4f
KH
1550CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1551 1, 0),
1da177e4
LT
1552CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1553CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1554/* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1555CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1556CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1557};
9e9abb4f 1558
c6c2d57b 1559static int __init snd_cs4231_mixer(struct snd_card *card)
1da177e4 1560{
c6c2d57b 1561 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT
1562 int err, idx;
1563
1564 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1565
1da177e4
LT
1566 strcpy(card->mixername, chip->pcm->name);
1567
1568 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
c6c2d57b
KH
1569 err = snd_ctl_add(card,
1570 snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1571 if (err < 0)
1da177e4
LT
1572 return err;
1573 }
1574 return 0;
1575}
1576
1577static int dev;
1578
be9b7e8c 1579static int __init cs4231_attach_begin(struct snd_card **rcard)
1da177e4 1580{
be9b7e8c 1581 struct snd_card *card;
c6c2d57b 1582 struct snd_cs4231 *chip;
1da177e4
LT
1583
1584 *rcard = NULL;
1585
1586 if (dev >= SNDRV_CARDS)
1587 return -ENODEV;
1588
1589 if (!enable[dev]) {
1590 dev++;
1591 return -ENOENT;
1592 }
1593
c6c2d57b
KH
1594 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1595 sizeof(struct snd_cs4231));
1da177e4
LT
1596 if (card == NULL)
1597 return -ENOMEM;
1598
1599 strcpy(card->driver, "CS4231");
1600 strcpy(card->shortname, "Sun CS4231");
1601
c6c2d57b
KH
1602 chip = card->private_data;
1603 chip->card = card;
1604
1da177e4
LT
1605 *rcard = card;
1606 return 0;
1607}
1608
c6c2d57b 1609static int __init cs4231_attach_finish(struct snd_card *card)
1da177e4 1610{
c6c2d57b 1611 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT
1612 int err;
1613
c6c2d57b
KH
1614 err = snd_cs4231_pcm(card);
1615 if (err < 0)
1da177e4
LT
1616 goto out_err;
1617
c6c2d57b
KH
1618 err = snd_cs4231_mixer(card);
1619 if (err < 0)
1da177e4
LT
1620 goto out_err;
1621
c6c2d57b
KH
1622 err = snd_cs4231_timer(card);
1623 if (err < 0)
1da177e4
LT
1624 goto out_err;
1625
c6c2d57b
KH
1626 err = snd_card_register(card);
1627 if (err < 0)
1da177e4
LT
1628 goto out_err;
1629
1630 chip->next = cs4231_list;
1631 cs4231_list = chip;
1632
1633 dev++;
1634 return 0;
1635
1636out_err:
1637 snd_card_free(card);
1638 return err;
1639}
1640
1641#ifdef SBUS_SUPPORT
b128254f 1642
7d12e780 1643static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
b128254f
GC
1644{
1645 unsigned long flags;
1646 unsigned char status;
1647 u32 csr;
be9b7e8c 1648 struct snd_cs4231 *chip = dev_id;
b128254f
GC
1649
1650 /*This is IRQ is not raised by the cs4231*/
7e52f3da 1651 if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
b128254f
GC
1652 return IRQ_NONE;
1653
1654 /* ACK the APC interrupt. */
1655 csr = sbus_readl(chip->port + APCCSR);
1656
1657 sbus_writel(csr, chip->port + APCCSR);
1658
9e9abb4f
KH
1659 if ((csr & APC_PDMA_READY) &&
1660 (csr & APC_PLAY_INT) &&
b128254f
GC
1661 (csr & APC_XINT_PNVA) &&
1662 !(csr & APC_XINT_EMPT))
1663 snd_cs4231_play_callback(chip);
1664
9e9abb4f
KH
1665 if ((csr & APC_CDMA_READY) &&
1666 (csr & APC_CAPT_INT) &&
b128254f
GC
1667 (csr & APC_XINT_CNVA) &&
1668 !(csr & APC_XINT_EMPT))
1669 snd_cs4231_capture_callback(chip);
9e9abb4f 1670
b128254f
GC
1671 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1672
1673 if (status & CS4231_TIMER_IRQ) {
1674 if (chip->timer)
1675 snd_timer_interrupt(chip->timer, chip->timer->sticks);
9e9abb4f 1676 }
b128254f
GC
1677
1678 if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1679 snd_cs4231_overrange(chip);
1680
1681 /* ACK the CS4231 interrupt. */
1682 spin_lock_irqsave(&chip->lock, flags);
1683 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1684 spin_unlock_irqrestore(&chip->lock, flags);
1685
d35a1b9e 1686 return IRQ_HANDLED;
b128254f
GC
1687}
1688
1689/*
1690 * SBUS DMA routines
1691 */
1692
9e9abb4f
KH
1693static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1694 dma_addr_t bus_addr, size_t len)
b128254f
GC
1695{
1696 unsigned long flags;
1697 u32 test, csr;
1698 int err;
be9b7e8c 1699 struct sbus_dma_info *base = &dma_cont->sbus_info;
9e9abb4f 1700
b128254f
GC
1701 if (len >= (1 << 24))
1702 return -EINVAL;
1703 spin_lock_irqsave(&base->lock, flags);
1704 csr = sbus_readl(base->regs + APCCSR);
1705 err = -EINVAL;
1706 test = APC_CDMA_READY;
9e9abb4f 1707 if (base->dir == APC_PLAY)
b128254f
GC
1708 test = APC_PDMA_READY;
1709 if (!(csr & test))
1710 goto out;
1711 err = -EBUSY;
b128254f 1712 test = APC_XINT_CNVA;
9e9abb4f 1713 if (base->dir == APC_PLAY)
b128254f
GC
1714 test = APC_XINT_PNVA;
1715 if (!(csr & test))
1716 goto out;
1717 err = 0;
1718 sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1719 sbus_writel(len, base->regs + base->dir + APCNC);
1720out:
1721 spin_unlock_irqrestore(&base->lock, flags);
1722 return err;
1723}
1724
be9b7e8c 1725static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
b128254f
GC
1726{
1727 unsigned long flags;
1728 u32 csr, test;
be9b7e8c 1729 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f
GC
1730
1731 spin_lock_irqsave(&base->lock, flags);
1732 csr = sbus_readl(base->regs + APCCSR);
1733 test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1734 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1735 APC_XINT_PENA;
9e9abb4f 1736 if (base->dir == APC_RECORD)
b128254f
GC
1737 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1738 APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1739 csr |= test;
1740 sbus_writel(csr, base->regs + APCCSR);
1741 spin_unlock_irqrestore(&base->lock, flags);
1742}
1743
be9b7e8c 1744static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
b128254f
GC
1745{
1746 unsigned long flags;
1747 u32 csr, shift;
be9b7e8c 1748 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f
GC
1749
1750 spin_lock_irqsave(&base->lock, flags);
1751 if (!on) {
d35a1b9e
GC
1752 sbus_writel(0, base->regs + base->dir + APCNC);
1753 sbus_writel(0, base->regs + base->dir + APCNVA);
9e9abb4f 1754 if (base->dir == APC_PLAY) {
3daadf33
GC
1755 sbus_writel(0, base->regs + base->dir + APCC);
1756 sbus_writel(0, base->regs + base->dir + APCVA);
1757 }
d35a1b9e 1758
3daadf33 1759 udelay(1200);
9e9abb4f 1760 }
b128254f
GC
1761 csr = sbus_readl(base->regs + APCCSR);
1762 shift = 0;
9e9abb4f 1763 if (base->dir == APC_PLAY)
b128254f
GC
1764 shift = 1;
1765 if (on)
1766 csr &= ~(APC_CPAUSE << shift);
1767 else
9e9abb4f 1768 csr |= (APC_CPAUSE << shift);
b128254f
GC
1769 sbus_writel(csr, base->regs + APCCSR);
1770 if (on)
1771 csr |= (APC_CDMA_READY << shift);
1772 else
1773 csr &= ~(APC_CDMA_READY << shift);
1774 sbus_writel(csr, base->regs + APCCSR);
9e9abb4f 1775
b128254f
GC
1776 spin_unlock_irqrestore(&base->lock, flags);
1777}
1778
be9b7e8c 1779static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
b128254f 1780{
be9b7e8c 1781 struct sbus_dma_info *base = &dma_cont->sbus_info;
b128254f 1782
9e9abb4f 1783 return sbus_readl(base->regs + base->dir + APCVA);
b128254f
GC
1784}
1785
be9b7e8c 1786static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
b128254f 1787{
12b1c03d 1788 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
ae251031 1789 &chip->dev_u.op->dev,
12b1c03d 1790 64 * 1024, 128 * 1024);
b128254f
GC
1791}
1792
1793/*
1794 * Init and exit routines
1795 */
1796
be9b7e8c 1797static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1da177e4 1798{
ae251031
DM
1799 struct of_device *op = chip->dev_u.op;
1800
1da177e4
LT
1801 if (chip->irq[0])
1802 free_irq(chip->irq[0], chip);
1803
1804 if (chip->port)
ae251031 1805 of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1da177e4 1806
1da177e4
LT
1807 return 0;
1808}
1809
be9b7e8c 1810static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1da177e4 1811{
be9b7e8c 1812 struct snd_cs4231 *cp = device->device_data;
1da177e4
LT
1813
1814 return snd_cs4231_sbus_free(cp);
1815}
1816
be9b7e8c 1817static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1da177e4
LT
1818 .dev_free = snd_cs4231_sbus_dev_free,
1819};
1820
be9b7e8c 1821static int __init snd_cs4231_sbus_create(struct snd_card *card,
ae251031 1822 struct of_device *op,
c6c2d57b 1823 int dev)
1da177e4 1824{
c6c2d57b 1825 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT
1826 int err;
1827
1da177e4 1828 spin_lock_init(&chip->lock);
b128254f
GC
1829 spin_lock_init(&chip->c_dma.sbus_info.lock);
1830 spin_lock_init(&chip->p_dma.sbus_info.lock);
12aa7579
IM
1831 mutex_init(&chip->mce_mutex);
1832 mutex_init(&chip->open_mutex);
ae251031
DM
1833 chip->dev_u.op = op;
1834 chip->regs_size = resource_size(&op->resource[0]);
1da177e4
LT
1835 memcpy(&chip->image, &snd_cs4231_original_image,
1836 sizeof(snd_cs4231_original_image));
1837
ae251031
DM
1838 chip->port = of_ioremap(&op->resource[0], 0,
1839 chip->regs_size, "cs4231");
1da177e4 1840 if (!chip->port) {
a131430c 1841 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1da177e4
LT
1842 return -EIO;
1843 }
1844
b128254f
GC
1845 chip->c_dma.sbus_info.regs = chip->port;
1846 chip->p_dma.sbus_info.regs = chip->port;
1847 chip->c_dma.sbus_info.dir = APC_RECORD;
1848 chip->p_dma.sbus_info.dir = APC_PLAY;
1849
1850 chip->p_dma.prepare = sbus_dma_prepare;
1851 chip->p_dma.enable = sbus_dma_enable;
1852 chip->p_dma.request = sbus_dma_request;
1853 chip->p_dma.address = sbus_dma_addr;
b128254f
GC
1854 chip->p_dma.preallocate = sbus_dma_preallocate;
1855
1856 chip->c_dma.prepare = sbus_dma_prepare;
1857 chip->c_dma.enable = sbus_dma_enable;
1858 chip->c_dma.request = sbus_dma_request;
1859 chip->c_dma.address = sbus_dma_addr;
b128254f 1860 chip->c_dma.preallocate = sbus_dma_preallocate;
5a820fa7 1861
ae251031 1862 if (request_irq(op->irqs[0], snd_cs4231_sbus_interrupt,
65ca68b3 1863 IRQF_SHARED, "cs4231", chip)) {
c6387a48 1864 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
ae251031 1865 dev, op->irqs[0]);
1da177e4
LT
1866 snd_cs4231_sbus_free(chip);
1867 return -EBUSY;
1868 }
ae251031 1869 chip->irq[0] = op->irqs[0];
1da177e4
LT
1870
1871 if (snd_cs4231_probe(chip) < 0) {
1872 snd_cs4231_sbus_free(chip);
1873 return -ENODEV;
1874 }
1875 snd_cs4231_init(chip);
1876
1877 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1878 chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1879 snd_cs4231_sbus_free(chip);
1880 return err;
1881 }
1882
1da177e4
LT
1883 return 0;
1884}
1885
ae251031 1886static int __devinit cs4231_probe(struct of_device *op, const struct of_device_id *match)
1da177e4 1887{
ae251031 1888 struct resource *rp = &op->resource[0];
be9b7e8c 1889 struct snd_card *card;
1da177e4
LT
1890 int err;
1891
ae251031
DM
1892 if (strcmp(op->node->parent->name, "sbus") &&
1893 strcmp(op->node->parent->name, "sbi"))
1894 return -ENODEV;
1895
1da177e4
LT
1896 err = cs4231_attach_begin(&card);
1897 if (err)
1898 return err;
1899
5863aa65 1900 sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1da177e4
LT
1901 card->shortname,
1902 rp->flags & 0xffL,
aa0a2ddc 1903 (unsigned long long)rp->start,
ae251031 1904 op->irqs[0]);
1da177e4 1905
ae251031 1906 err = snd_cs4231_sbus_create(card, op, dev);
c6c2d57b 1907 if (err < 0) {
1da177e4
LT
1908 snd_card_free(card);
1909 return err;
1910 }
1911
c6c2d57b 1912 return cs4231_attach_finish(card);
1da177e4
LT
1913}
1914#endif
1915
1916#ifdef EBUS_SUPPORT
b128254f 1917
9e9abb4f
KH
1918static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1919 void *cookie)
b128254f 1920{
be9b7e8c 1921 struct snd_cs4231 *chip = cookie;
9e9abb4f 1922
b128254f
GC
1923 snd_cs4231_play_callback(chip);
1924}
1925
9e9abb4f
KH
1926static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1927 int event, void *cookie)
b128254f 1928{
be9b7e8c 1929 struct snd_cs4231 *chip = cookie;
b128254f
GC
1930
1931 snd_cs4231_capture_callback(chip);
1932}
1933
1934/*
1935 * EBUS DMA wrappers
1936 */
1937
9e9abb4f
KH
1938static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1939 dma_addr_t bus_addr, size_t len)
b128254f
GC
1940{
1941 return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1942}
1943
be9b7e8c 1944static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
b128254f
GC
1945{
1946 ebus_dma_enable(&dma_cont->ebus_info, on);
1947}
1948
be9b7e8c 1949static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
b128254f
GC
1950{
1951 ebus_dma_prepare(&dma_cont->ebus_info, dir);
1952}
1953
be9b7e8c 1954static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
b128254f
GC
1955{
1956 return ebus_dma_addr(&dma_cont->ebus_info);
1957}
1958
be9b7e8c 1959static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
b128254f
GC
1960{
1961 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1962 snd_dma_pci_data(chip->dev_u.pdev),
1963 64*1024, 128*1024);
1964}
1965
1966/*
1967 * Init and exit routines
1968 */
1969
be9b7e8c 1970static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1da177e4 1971{
b128254f
GC
1972 if (chip->c_dma.ebus_info.regs) {
1973 ebus_dma_unregister(&chip->c_dma.ebus_info);
1974 iounmap(chip->c_dma.ebus_info.regs);
1da177e4 1975 }
b128254f
GC
1976 if (chip->p_dma.ebus_info.regs) {
1977 ebus_dma_unregister(&chip->p_dma.ebus_info);
1978 iounmap(chip->p_dma.ebus_info.regs);
1da177e4
LT
1979 }
1980
1981 if (chip->port)
1982 iounmap(chip->port);
1da177e4 1983
1da177e4
LT
1984 return 0;
1985}
1986
be9b7e8c 1987static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1da177e4 1988{
be9b7e8c 1989 struct snd_cs4231 *cp = device->device_data;
1da177e4
LT
1990
1991 return snd_cs4231_ebus_free(cp);
1992}
1993
be9b7e8c 1994static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1da177e4
LT
1995 .dev_free = snd_cs4231_ebus_dev_free,
1996};
1997
be9b7e8c 1998static int __init snd_cs4231_ebus_create(struct snd_card *card,
1da177e4 1999 struct linux_ebus_device *edev,
c6c2d57b 2000 int dev)
1da177e4 2001{
c6c2d57b 2002 struct snd_cs4231 *chip = card->private_data;
1da177e4
LT
2003 int err;
2004
1da177e4 2005 spin_lock_init(&chip->lock);
b128254f
GC
2006 spin_lock_init(&chip->c_dma.ebus_info.lock);
2007 spin_lock_init(&chip->p_dma.ebus_info.lock);
12aa7579
IM
2008 mutex_init(&chip->mce_mutex);
2009 mutex_init(&chip->open_mutex);
1da177e4 2010 chip->flags |= CS4231_FLAG_EBUS;
1da177e4
LT
2011 chip->dev_u.pdev = edev->bus->self;
2012 memcpy(&chip->image, &snd_cs4231_original_image,
2013 sizeof(snd_cs4231_original_image));
b128254f
GC
2014 strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2015 chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2016 chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2017 chip->c_dma.ebus_info.client_cookie = chip;
2018 chip->c_dma.ebus_info.irq = edev->irqs[0];
2019 strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2020 chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2021 chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2022 chip->p_dma.ebus_info.client_cookie = chip;
2023 chip->p_dma.ebus_info.irq = edev->irqs[1];
2024
2025 chip->p_dma.prepare = _ebus_dma_prepare;
2026 chip->p_dma.enable = _ebus_dma_enable;
2027 chip->p_dma.request = _ebus_dma_request;
2028 chip->p_dma.address = _ebus_dma_addr;
b128254f
GC
2029 chip->p_dma.preallocate = _ebus_dma_preallocate;
2030
2031 chip->c_dma.prepare = _ebus_dma_prepare;
2032 chip->c_dma.enable = _ebus_dma_enable;
2033 chip->c_dma.request = _ebus_dma_request;
2034 chip->c_dma.address = _ebus_dma_addr;
b128254f 2035 chip->c_dma.preallocate = _ebus_dma_preallocate;
1da177e4
LT
2036
2037 chip->port = ioremap(edev->resource[0].start, 0x10);
b128254f
GC
2038 chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2039 chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
9e9abb4f
KH
2040 if (!chip->port || !chip->p_dma.ebus_info.regs ||
2041 !chip->c_dma.ebus_info.regs) {
1da177e4 2042 snd_cs4231_ebus_free(chip);
a131430c 2043 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1da177e4
LT
2044 return -EIO;
2045 }
2046
b128254f 2047 if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1da177e4 2048 snd_cs4231_ebus_free(chip);
9e9abb4f
KH
2049 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
2050 dev);
1da177e4
LT
2051 return -EBUSY;
2052 }
b128254f 2053 if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
1da177e4 2054 snd_cs4231_ebus_free(chip);
9e9abb4f
KH
2055 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2056 dev);
1da177e4
LT
2057 return -EBUSY;
2058 }
2059
b128254f 2060 if (ebus_dma_register(&chip->p_dma.ebus_info)) {
1da177e4 2061 snd_cs4231_ebus_free(chip);
9e9abb4f
KH
2062 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2063 dev);
1da177e4
LT
2064 return -EBUSY;
2065 }
b128254f 2066 if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
1da177e4 2067 snd_cs4231_ebus_free(chip);
a131430c 2068 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
1da177e4
LT
2069 return -EBUSY;
2070 }
2071
2072 if (snd_cs4231_probe(chip) < 0) {
2073 snd_cs4231_ebus_free(chip);
2074 return -ENODEV;
2075 }
2076 snd_cs4231_init(chip);
2077
2078 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2079 chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2080 snd_cs4231_ebus_free(chip);
2081 return err;
2082 }
2083
1da177e4
LT
2084 return 0;
2085}
2086
be9b7e8c 2087static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
1da177e4 2088{
be9b7e8c 2089 struct snd_card *card;
1da177e4
LT
2090 int err;
2091
2092 err = cs4231_attach_begin(&card);
2093 if (err)
2094 return err;
2095
c6387a48 2096 sprintf(card->longname, "%s at 0x%lx, irq %d",
1da177e4
LT
2097 card->shortname,
2098 edev->resource[0].start,
c6387a48 2099 edev->irqs[0]);
1da177e4 2100
c6c2d57b
KH
2101 err = snd_cs4231_ebus_create(card, edev, dev);
2102 if (err < 0) {
1da177e4
LT
2103 snd_card_free(card);
2104 return err;
2105 }
2106
c6c2d57b 2107 return cs4231_attach_finish(card);
1da177e4
LT
2108}
2109#endif
2110
1da177e4 2111#ifdef SBUS_SUPPORT
ae251031
DM
2112static struct of_device_id cs4231_match[] = {
2113 {
2114 .name = "SUNW,CS4231",
2115 },
2116 {},
2117};
2118
2119MODULE_DEVICE_TABLE(of, cs4231_match);
2120
2121static struct of_platform_driver cs4231_driver = {
2122 .name = "audio",
2123 .match_table = cs4231_match,
2124 .probe = cs4231_probe,
2125};
1da177e4 2126#endif
ae251031
DM
2127
2128static int __init cs4231_init(void)
2129{
1da177e4
LT
2130#ifdef EBUS_SUPPORT
2131 struct linux_ebus *ebus;
2132 struct linux_ebus_device *edev;
2133#endif
2134 int found;
2135
2136 found = 0;
2137
2138#ifdef SBUS_SUPPORT
ae251031
DM
2139 {
2140 int err = of_register_driver(&cs4231_driver, &of_bus_type);
2141 if (err)
2142 return err;
1da177e4
LT
2143 }
2144#endif
2145#ifdef EBUS_SUPPORT
2146 for_each_ebus(ebus) {
2147 for_each_ebusdev(edev, ebus) {
2148 int match = 0;
2149
690c8fd3 2150 if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
1da177e4 2151 match = 1;
690c8fd3 2152 } else if (!strcmp(edev->prom_node->name, "audio")) {
3198514d 2153 const char *compat;
1da177e4 2154
690c8fd3
DM
2155 compat = of_get_property(edev->prom_node,
2156 "compatible", NULL);
2157 if (compat && !strcmp(compat, "SUNW,CS4231"))
1da177e4
LT
2158 match = 1;
2159 }
2160
2161 if (match &&
2162 cs4231_ebus_attach(edev) == 0)
2163 found++;
2164 }
2165 }
2166#endif
2167
2168
ae251031 2169 return 0;
1da177e4
LT
2170}
2171
2172static void __exit cs4231_exit(void)
2173{
be9b7e8c 2174 struct snd_cs4231 *p = cs4231_list;
1da177e4 2175
ae251031
DM
2176#ifdef SBUS_SUPPORT
2177 of_unregister_driver(&cs4231_driver);
2178#endif
2179
1da177e4 2180 while (p != NULL) {
be9b7e8c 2181 struct snd_cs4231 *next = p->next;
1da177e4
LT
2182
2183 snd_card_free(p->card);
2184
2185 p = next;
2186 }
2187
2188 cs4231_list = NULL;
2189}
2190
2191module_init(cs4231_init);
2192module_exit(cs4231_exit);
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