| 1 | // arm.cc -- arm target support for gold. |
| 2 | |
| 3 | // Copyright (C) 2009-2016 Free Software Foundation, Inc. |
| 4 | // Written by Doug Kwan <dougkwan@google.com> based on the i386 code |
| 5 | // by Ian Lance Taylor <iant@google.com>. |
| 6 | // This file also contains borrowed and adapted code from |
| 7 | // bfd/elf32-arm.c. |
| 8 | |
| 9 | // This file is part of gold. |
| 10 | |
| 11 | // This program is free software; you can redistribute it and/or modify |
| 12 | // it under the terms of the GNU General Public License as published by |
| 13 | // the Free Software Foundation; either version 3 of the License, or |
| 14 | // (at your option) any later version. |
| 15 | |
| 16 | // This program is distributed in the hope that it will be useful, |
| 17 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | // GNU General Public License for more details. |
| 20 | |
| 21 | // You should have received a copy of the GNU General Public License |
| 22 | // along with this program; if not, write to the Free Software |
| 23 | // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 24 | // MA 02110-1301, USA. |
| 25 | |
| 26 | #include "gold.h" |
| 27 | |
| 28 | #include <cstring> |
| 29 | #include <limits> |
| 30 | #include <cstdio> |
| 31 | #include <string> |
| 32 | #include <algorithm> |
| 33 | #include <map> |
| 34 | #include <utility> |
| 35 | #include <set> |
| 36 | |
| 37 | #include "elfcpp.h" |
| 38 | #include "parameters.h" |
| 39 | #include "reloc.h" |
| 40 | #include "arm.h" |
| 41 | #include "object.h" |
| 42 | #include "symtab.h" |
| 43 | #include "layout.h" |
| 44 | #include "output.h" |
| 45 | #include "copy-relocs.h" |
| 46 | #include "target.h" |
| 47 | #include "target-reloc.h" |
| 48 | #include "target-select.h" |
| 49 | #include "tls.h" |
| 50 | #include "defstd.h" |
| 51 | #include "gc.h" |
| 52 | #include "attributes.h" |
| 53 | #include "arm-reloc-property.h" |
| 54 | #include "nacl.h" |
| 55 | |
| 56 | namespace |
| 57 | { |
| 58 | |
| 59 | using namespace gold; |
| 60 | |
| 61 | template<bool big_endian> |
| 62 | class Output_data_plt_arm; |
| 63 | |
| 64 | template<bool big_endian> |
| 65 | class Output_data_plt_arm_short; |
| 66 | |
| 67 | template<bool big_endian> |
| 68 | class Output_data_plt_arm_long; |
| 69 | |
| 70 | template<bool big_endian> |
| 71 | class Stub_table; |
| 72 | |
| 73 | template<bool big_endian> |
| 74 | class Arm_input_section; |
| 75 | |
| 76 | class Arm_exidx_cantunwind; |
| 77 | |
| 78 | class Arm_exidx_merged_section; |
| 79 | |
| 80 | class Arm_exidx_fixup; |
| 81 | |
| 82 | template<bool big_endian> |
| 83 | class Arm_output_section; |
| 84 | |
| 85 | class Arm_exidx_input_section; |
| 86 | |
| 87 | template<bool big_endian> |
| 88 | class Arm_relobj; |
| 89 | |
| 90 | template<bool big_endian> |
| 91 | class Arm_relocate_functions; |
| 92 | |
| 93 | template<bool big_endian> |
| 94 | class Arm_output_data_got; |
| 95 | |
| 96 | template<bool big_endian> |
| 97 | class Target_arm; |
| 98 | |
| 99 | // For convenience. |
| 100 | typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address; |
| 101 | |
| 102 | // Maximum branch offsets for ARM, THUMB and THUMB2. |
| 103 | const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8); |
| 104 | const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8); |
| 105 | const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4); |
| 106 | const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4); |
| 107 | const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4); |
| 108 | const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4); |
| 109 | |
| 110 | // Thread Control Block size. |
| 111 | const size_t ARM_TCB_SIZE = 8; |
| 112 | |
| 113 | // The arm target class. |
| 114 | // |
| 115 | // This is a very simple port of gold for ARM-EABI. It is intended for |
| 116 | // supporting Android only for the time being. |
| 117 | // |
| 118 | // TODOs: |
| 119 | // - Implement all static relocation types documented in arm-reloc.def. |
| 120 | // - Make PLTs more flexible for different architecture features like |
| 121 | // Thumb-2 and BE8. |
| 122 | // There are probably a lot more. |
| 123 | |
| 124 | // Ideally we would like to avoid using global variables but this is used |
| 125 | // very in many places and sometimes in loops. If we use a function |
| 126 | // returning a static instance of Arm_reloc_property_table, it will be very |
| 127 | // slow in an threaded environment since the static instance needs to be |
| 128 | // locked. The pointer is below initialized in the |
| 129 | // Target::do_select_as_default_target() hook so that we do not spend time |
| 130 | // building the table if we are not linking ARM objects. |
| 131 | // |
| 132 | // An alternative is to to process the information in arm-reloc.def in |
| 133 | // compilation time and generate a representation of it in PODs only. That |
| 134 | // way we can avoid initialization when the linker starts. |
| 135 | |
| 136 | Arm_reloc_property_table* arm_reloc_property_table = NULL; |
| 137 | |
| 138 | // Instruction template class. This class is similar to the insn_sequence |
| 139 | // struct in bfd/elf32-arm.c. |
| 140 | |
| 141 | class Insn_template |
| 142 | { |
| 143 | public: |
| 144 | // Types of instruction templates. |
| 145 | enum Type |
| 146 | { |
| 147 | THUMB16_TYPE = 1, |
| 148 | // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction |
| 149 | // templates with class-specific semantics. Currently this is used |
| 150 | // only by the Cortex_a8_stub class for handling condition codes in |
| 151 | // conditional branches. |
| 152 | THUMB16_SPECIAL_TYPE, |
| 153 | THUMB32_TYPE, |
| 154 | ARM_TYPE, |
| 155 | DATA_TYPE |
| 156 | }; |
| 157 | |
| 158 | // Factory methods to create instruction templates in different formats. |
| 159 | |
| 160 | static const Insn_template |
| 161 | thumb16_insn(uint32_t data) |
| 162 | { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); } |
| 163 | |
| 164 | // A Thumb conditional branch, in which the proper condition is inserted |
| 165 | // when we build the stub. |
| 166 | static const Insn_template |
| 167 | thumb16_bcond_insn(uint32_t data) |
| 168 | { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); } |
| 169 | |
| 170 | static const Insn_template |
| 171 | thumb32_insn(uint32_t data) |
| 172 | { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); } |
| 173 | |
| 174 | static const Insn_template |
| 175 | thumb32_b_insn(uint32_t data, int reloc_addend) |
| 176 | { |
| 177 | return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24, |
| 178 | reloc_addend); |
| 179 | } |
| 180 | |
| 181 | static const Insn_template |
| 182 | arm_insn(uint32_t data) |
| 183 | { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); } |
| 184 | |
| 185 | static const Insn_template |
| 186 | arm_rel_insn(unsigned data, int reloc_addend) |
| 187 | { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); } |
| 188 | |
| 189 | static const Insn_template |
| 190 | data_word(unsigned data, unsigned int r_type, int reloc_addend) |
| 191 | { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); } |
| 192 | |
| 193 | // Accessors. This class is used for read-only objects so no modifiers |
| 194 | // are provided. |
| 195 | |
| 196 | uint32_t |
| 197 | data() const |
| 198 | { return this->data_; } |
| 199 | |
| 200 | // Return the instruction sequence type of this. |
| 201 | Type |
| 202 | type() const |
| 203 | { return this->type_; } |
| 204 | |
| 205 | // Return the ARM relocation type of this. |
| 206 | unsigned int |
| 207 | r_type() const |
| 208 | { return this->r_type_; } |
| 209 | |
| 210 | int32_t |
| 211 | reloc_addend() const |
| 212 | { return this->reloc_addend_; } |
| 213 | |
| 214 | // Return size of instruction template in bytes. |
| 215 | size_t |
| 216 | size() const; |
| 217 | |
| 218 | // Return byte-alignment of instruction template. |
| 219 | unsigned |
| 220 | alignment() const; |
| 221 | |
| 222 | private: |
| 223 | // We make the constructor private to ensure that only the factory |
| 224 | // methods are used. |
| 225 | inline |
| 226 | Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend) |
| 227 | : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend) |
| 228 | { } |
| 229 | |
| 230 | // Instruction specific data. This is used to store information like |
| 231 | // some of the instruction bits. |
| 232 | uint32_t data_; |
| 233 | // Instruction template type. |
| 234 | Type type_; |
| 235 | // Relocation type if there is a relocation or R_ARM_NONE otherwise. |
| 236 | unsigned int r_type_; |
| 237 | // Relocation addend. |
| 238 | int32_t reloc_addend_; |
| 239 | }; |
| 240 | |
| 241 | // Macro for generating code to stub types. One entry per long/short |
| 242 | // branch stub |
| 243 | |
| 244 | #define DEF_STUBS \ |
| 245 | DEF_STUB(long_branch_any_any) \ |
| 246 | DEF_STUB(long_branch_v4t_arm_thumb) \ |
| 247 | DEF_STUB(long_branch_thumb_only) \ |
| 248 | DEF_STUB(long_branch_v4t_thumb_thumb) \ |
| 249 | DEF_STUB(long_branch_v4t_thumb_arm) \ |
| 250 | DEF_STUB(short_branch_v4t_thumb_arm) \ |
| 251 | DEF_STUB(long_branch_any_arm_pic) \ |
| 252 | DEF_STUB(long_branch_any_thumb_pic) \ |
| 253 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ |
| 254 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ |
| 255 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ |
| 256 | DEF_STUB(long_branch_thumb_only_pic) \ |
| 257 | DEF_STUB(a8_veneer_b_cond) \ |
| 258 | DEF_STUB(a8_veneer_b) \ |
| 259 | DEF_STUB(a8_veneer_bl) \ |
| 260 | DEF_STUB(a8_veneer_blx) \ |
| 261 | DEF_STUB(v4_veneer_bx) |
| 262 | |
| 263 | // Stub types. |
| 264 | |
| 265 | #define DEF_STUB(x) arm_stub_##x, |
| 266 | typedef enum |
| 267 | { |
| 268 | arm_stub_none, |
| 269 | DEF_STUBS |
| 270 | |
| 271 | // First reloc stub type. |
| 272 | arm_stub_reloc_first = arm_stub_long_branch_any_any, |
| 273 | // Last reloc stub type. |
| 274 | arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic, |
| 275 | |
| 276 | // First Cortex-A8 stub type. |
| 277 | arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond, |
| 278 | // Last Cortex-A8 stub type. |
| 279 | arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx, |
| 280 | |
| 281 | // Last stub type. |
| 282 | arm_stub_type_last = arm_stub_v4_veneer_bx |
| 283 | } Stub_type; |
| 284 | #undef DEF_STUB |
| 285 | |
| 286 | // Stub template class. Templates are meant to be read-only objects. |
| 287 | // A stub template for a stub type contains all read-only attributes |
| 288 | // common to all stubs of the same type. |
| 289 | |
| 290 | class Stub_template |
| 291 | { |
| 292 | public: |
| 293 | Stub_template(Stub_type, const Insn_template*, size_t); |
| 294 | |
| 295 | ~Stub_template() |
| 296 | { } |
| 297 | |
| 298 | // Return stub type. |
| 299 | Stub_type |
| 300 | type() const |
| 301 | { return this->type_; } |
| 302 | |
| 303 | // Return an array of instruction templates. |
| 304 | const Insn_template* |
| 305 | insns() const |
| 306 | { return this->insns_; } |
| 307 | |
| 308 | // Return size of template in number of instructions. |
| 309 | size_t |
| 310 | insn_count() const |
| 311 | { return this->insn_count_; } |
| 312 | |
| 313 | // Return size of template in bytes. |
| 314 | size_t |
| 315 | size() const |
| 316 | { return this->size_; } |
| 317 | |
| 318 | // Return alignment of the stub template. |
| 319 | unsigned |
| 320 | alignment() const |
| 321 | { return this->alignment_; } |
| 322 | |
| 323 | // Return whether entry point is in thumb mode. |
| 324 | bool |
| 325 | entry_in_thumb_mode() const |
| 326 | { return this->entry_in_thumb_mode_; } |
| 327 | |
| 328 | // Return number of relocations in this template. |
| 329 | size_t |
| 330 | reloc_count() const |
| 331 | { return this->relocs_.size(); } |
| 332 | |
| 333 | // Return index of the I-th instruction with relocation. |
| 334 | size_t |
| 335 | reloc_insn_index(size_t i) const |
| 336 | { |
| 337 | gold_assert(i < this->relocs_.size()); |
| 338 | return this->relocs_[i].first; |
| 339 | } |
| 340 | |
| 341 | // Return the offset of the I-th instruction with relocation from the |
| 342 | // beginning of the stub. |
| 343 | section_size_type |
| 344 | reloc_offset(size_t i) const |
| 345 | { |
| 346 | gold_assert(i < this->relocs_.size()); |
| 347 | return this->relocs_[i].second; |
| 348 | } |
| 349 | |
| 350 | private: |
| 351 | // This contains information about an instruction template with a relocation |
| 352 | // and its offset from start of stub. |
| 353 | typedef std::pair<size_t, section_size_type> Reloc; |
| 354 | |
| 355 | // A Stub_template may not be copied. We want to share templates as much |
| 356 | // as possible. |
| 357 | Stub_template(const Stub_template&); |
| 358 | Stub_template& operator=(const Stub_template&); |
| 359 | |
| 360 | // Stub type. |
| 361 | Stub_type type_; |
| 362 | // Points to an array of Insn_templates. |
| 363 | const Insn_template* insns_; |
| 364 | // Number of Insn_templates in insns_[]. |
| 365 | size_t insn_count_; |
| 366 | // Size of templated instructions in bytes. |
| 367 | size_t size_; |
| 368 | // Alignment of templated instructions. |
| 369 | unsigned alignment_; |
| 370 | // Flag to indicate if entry is in thumb mode. |
| 371 | bool entry_in_thumb_mode_; |
| 372 | // A table of reloc instruction indices and offsets. We can find these by |
| 373 | // looking at the instruction templates but we pre-compute and then stash |
| 374 | // them here for speed. |
| 375 | std::vector<Reloc> relocs_; |
| 376 | }; |
| 377 | |
| 378 | // |
| 379 | // A class for code stubs. This is a base class for different type of |
| 380 | // stubs used in the ARM target. |
| 381 | // |
| 382 | |
| 383 | class Stub |
| 384 | { |
| 385 | private: |
| 386 | static const section_offset_type invalid_offset = |
| 387 | static_cast<section_offset_type>(-1); |
| 388 | |
| 389 | public: |
| 390 | Stub(const Stub_template* stub_template) |
| 391 | : stub_template_(stub_template), offset_(invalid_offset) |
| 392 | { } |
| 393 | |
| 394 | virtual |
| 395 | ~Stub() |
| 396 | { } |
| 397 | |
| 398 | // Return the stub template. |
| 399 | const Stub_template* |
| 400 | stub_template() const |
| 401 | { return this->stub_template_; } |
| 402 | |
| 403 | // Return offset of code stub from beginning of its containing stub table. |
| 404 | section_offset_type |
| 405 | offset() const |
| 406 | { |
| 407 | gold_assert(this->offset_ != invalid_offset); |
| 408 | return this->offset_; |
| 409 | } |
| 410 | |
| 411 | // Set offset of code stub from beginning of its containing stub table. |
| 412 | void |
| 413 | set_offset(section_offset_type offset) |
| 414 | { this->offset_ = offset; } |
| 415 | |
| 416 | // Return the relocation target address of the i-th relocation in the |
| 417 | // stub. This must be defined in a child class. |
| 418 | Arm_address |
| 419 | reloc_target(size_t i) |
| 420 | { return this->do_reloc_target(i); } |
| 421 | |
| 422 | // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written. |
| 423 | void |
| 424 | write(unsigned char* view, section_size_type view_size, bool big_endian) |
| 425 | { this->do_write(view, view_size, big_endian); } |
| 426 | |
| 427 | // Return the instruction for THUMB16_SPECIAL_TYPE instruction template |
| 428 | // for the i-th instruction. |
| 429 | uint16_t |
| 430 | thumb16_special(size_t i) |
| 431 | { return this->do_thumb16_special(i); } |
| 432 | |
| 433 | protected: |
| 434 | // This must be defined in the child class. |
| 435 | virtual Arm_address |
| 436 | do_reloc_target(size_t) = 0; |
| 437 | |
| 438 | // This may be overridden in the child class. |
| 439 | virtual void |
| 440 | do_write(unsigned char* view, section_size_type view_size, bool big_endian) |
| 441 | { |
| 442 | if (big_endian) |
| 443 | this->do_fixed_endian_write<true>(view, view_size); |
| 444 | else |
| 445 | this->do_fixed_endian_write<false>(view, view_size); |
| 446 | } |
| 447 | |
| 448 | // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE |
| 449 | // instruction template. |
| 450 | virtual uint16_t |
| 451 | do_thumb16_special(size_t) |
| 452 | { gold_unreachable(); } |
| 453 | |
| 454 | private: |
| 455 | // A template to implement do_write. |
| 456 | template<bool big_endian> |
| 457 | void inline |
| 458 | do_fixed_endian_write(unsigned char*, section_size_type); |
| 459 | |
| 460 | // Its template. |
| 461 | const Stub_template* stub_template_; |
| 462 | // Offset within the section of containing this stub. |
| 463 | section_offset_type offset_; |
| 464 | }; |
| 465 | |
| 466 | // Reloc stub class. These are stubs we use to fix up relocation because |
| 467 | // of limited branch ranges. |
| 468 | |
| 469 | class Reloc_stub : public Stub |
| 470 | { |
| 471 | public: |
| 472 | static const unsigned int invalid_index = static_cast<unsigned int>(-1); |
| 473 | // We assume we never jump to this address. |
| 474 | static const Arm_address invalid_address = static_cast<Arm_address>(-1); |
| 475 | |
| 476 | // Return destination address. |
| 477 | Arm_address |
| 478 | destination_address() const |
| 479 | { |
| 480 | gold_assert(this->destination_address_ != this->invalid_address); |
| 481 | return this->destination_address_; |
| 482 | } |
| 483 | |
| 484 | // Set destination address. |
| 485 | void |
| 486 | set_destination_address(Arm_address address) |
| 487 | { |
| 488 | gold_assert(address != this->invalid_address); |
| 489 | this->destination_address_ = address; |
| 490 | } |
| 491 | |
| 492 | // Reset destination address. |
| 493 | void |
| 494 | reset_destination_address() |
| 495 | { this->destination_address_ = this->invalid_address; } |
| 496 | |
| 497 | // Determine stub type for a branch of a relocation of R_TYPE going |
| 498 | // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set, |
| 499 | // the branch target is a thumb instruction. TARGET is used for look |
| 500 | // up ARM-specific linker settings. |
| 501 | static Stub_type |
| 502 | stub_type_for_reloc(unsigned int r_type, Arm_address branch_address, |
| 503 | Arm_address branch_target, bool target_is_thumb); |
| 504 | |
| 505 | // Reloc_stub key. A key is logically a triplet of a stub type, a symbol |
| 506 | // and an addend. Since we treat global and local symbol differently, we |
| 507 | // use a Symbol object for a global symbol and a object-index pair for |
| 508 | // a local symbol. |
| 509 | class Key |
| 510 | { |
| 511 | public: |
| 512 | // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and |
| 513 | // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL |
| 514 | // and R_SYM must not be invalid_index. |
| 515 | Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj, |
| 516 | unsigned int r_sym, int32_t addend) |
| 517 | : stub_type_(stub_type), addend_(addend) |
| 518 | { |
| 519 | if (symbol != NULL) |
| 520 | { |
| 521 | this->r_sym_ = Reloc_stub::invalid_index; |
| 522 | this->u_.symbol = symbol; |
| 523 | } |
| 524 | else |
| 525 | { |
| 526 | gold_assert(relobj != NULL && r_sym != invalid_index); |
| 527 | this->r_sym_ = r_sym; |
| 528 | this->u_.relobj = relobj; |
| 529 | } |
| 530 | } |
| 531 | |
| 532 | ~Key() |
| 533 | { } |
| 534 | |
| 535 | // Accessors: Keys are meant to be read-only object so no modifiers are |
| 536 | // provided. |
| 537 | |
| 538 | // Return stub type. |
| 539 | Stub_type |
| 540 | stub_type() const |
| 541 | { return this->stub_type_; } |
| 542 | |
| 543 | // Return the local symbol index or invalid_index. |
| 544 | unsigned int |
| 545 | r_sym() const |
| 546 | { return this->r_sym_; } |
| 547 | |
| 548 | // Return the symbol if there is one. |
| 549 | const Symbol* |
| 550 | symbol() const |
| 551 | { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; } |
| 552 | |
| 553 | // Return the relobj if there is one. |
| 554 | const Relobj* |
| 555 | relobj() const |
| 556 | { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; } |
| 557 | |
| 558 | // Whether this equals to another key k. |
| 559 | bool |
| 560 | eq(const Key& k) const |
| 561 | { |
| 562 | return ((this->stub_type_ == k.stub_type_) |
| 563 | && (this->r_sym_ == k.r_sym_) |
| 564 | && ((this->r_sym_ != Reloc_stub::invalid_index) |
| 565 | ? (this->u_.relobj == k.u_.relobj) |
| 566 | : (this->u_.symbol == k.u_.symbol)) |
| 567 | && (this->addend_ == k.addend_)); |
| 568 | } |
| 569 | |
| 570 | // Return a hash value. |
| 571 | size_t |
| 572 | hash_value() const |
| 573 | { |
| 574 | return (this->stub_type_ |
| 575 | ^ this->r_sym_ |
| 576 | ^ gold::string_hash<char>( |
| 577 | (this->r_sym_ != Reloc_stub::invalid_index) |
| 578 | ? this->u_.relobj->name().c_str() |
| 579 | : this->u_.symbol->name()) |
| 580 | ^ this->addend_); |
| 581 | } |
| 582 | |
| 583 | // Functors for STL associative containers. |
| 584 | struct hash |
| 585 | { |
| 586 | size_t |
| 587 | operator()(const Key& k) const |
| 588 | { return k.hash_value(); } |
| 589 | }; |
| 590 | |
| 591 | struct equal_to |
| 592 | { |
| 593 | bool |
| 594 | operator()(const Key& k1, const Key& k2) const |
| 595 | { return k1.eq(k2); } |
| 596 | }; |
| 597 | |
| 598 | // Name of key. This is mainly for debugging. |
| 599 | std::string |
| 600 | name() const; |
| 601 | |
| 602 | private: |
| 603 | // Stub type. |
| 604 | Stub_type stub_type_; |
| 605 | // If this is a local symbol, this is the index in the defining object. |
| 606 | // Otherwise, it is invalid_index for a global symbol. |
| 607 | unsigned int r_sym_; |
| 608 | // If r_sym_ is an invalid index, this points to a global symbol. |
| 609 | // Otherwise, it points to a relobj. We used the unsized and target |
| 610 | // independent Symbol and Relobj classes instead of Sized_symbol<32> and |
| 611 | // Arm_relobj, in order to avoid making the stub class a template |
| 612 | // as most of the stub machinery is endianness-neutral. However, it |
| 613 | // may require a bit of casting done by users of this class. |
| 614 | union |
| 615 | { |
| 616 | const Symbol* symbol; |
| 617 | const Relobj* relobj; |
| 618 | } u_; |
| 619 | // Addend associated with a reloc. |
| 620 | int32_t addend_; |
| 621 | }; |
| 622 | |
| 623 | protected: |
| 624 | // Reloc_stubs are created via a stub factory. So these are protected. |
| 625 | Reloc_stub(const Stub_template* stub_template) |
| 626 | : Stub(stub_template), destination_address_(invalid_address) |
| 627 | { } |
| 628 | |
| 629 | ~Reloc_stub() |
| 630 | { } |
| 631 | |
| 632 | friend class Stub_factory; |
| 633 | |
| 634 | // Return the relocation target address of the i-th relocation in the |
| 635 | // stub. |
| 636 | Arm_address |
| 637 | do_reloc_target(size_t i) |
| 638 | { |
| 639 | // All reloc stub have only one relocation. |
| 640 | gold_assert(i == 0); |
| 641 | return this->destination_address_; |
| 642 | } |
| 643 | |
| 644 | private: |
| 645 | // Address of destination. |
| 646 | Arm_address destination_address_; |
| 647 | }; |
| 648 | |
| 649 | // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit |
| 650 | // THUMB branch that meets the following conditions: |
| 651 | // |
| 652 | // 1. The branch straddles across a page boundary. i.e. lower 12-bit of |
| 653 | // branch address is 0xffe. |
| 654 | // 2. The branch target address is in the same page as the first word of the |
| 655 | // branch. |
| 656 | // 3. The branch follows a 32-bit instruction which is not a branch. |
| 657 | // |
| 658 | // To do the fix up, we need to store the address of the branch instruction |
| 659 | // and its target at least. We also need to store the original branch |
| 660 | // instruction bits for the condition code in a conditional branch. The |
| 661 | // condition code is used in a special instruction template. We also want |
| 662 | // to identify input sections needing Cortex-A8 workaround quickly. We store |
| 663 | // extra information about object and section index of the code section |
| 664 | // containing a branch being fixed up. The information is used to mark |
| 665 | // the code section when we finalize the Cortex-A8 stubs. |
| 666 | // |
| 667 | |
| 668 | class Cortex_a8_stub : public Stub |
| 669 | { |
| 670 | public: |
| 671 | ~Cortex_a8_stub() |
| 672 | { } |
| 673 | |
| 674 | // Return the object of the code section containing the branch being fixed |
| 675 | // up. |
| 676 | Relobj* |
| 677 | relobj() const |
| 678 | { return this->relobj_; } |
| 679 | |
| 680 | // Return the section index of the code section containing the branch being |
| 681 | // fixed up. |
| 682 | unsigned int |
| 683 | shndx() const |
| 684 | { return this->shndx_; } |
| 685 | |
| 686 | // Return the source address of stub. This is the address of the original |
| 687 | // branch instruction. LSB is 1 always set to indicate that it is a THUMB |
| 688 | // instruction. |
| 689 | Arm_address |
| 690 | source_address() const |
| 691 | { return this->source_address_; } |
| 692 | |
| 693 | // Return the destination address of the stub. This is the branch taken |
| 694 | // address of the original branch instruction. LSB is 1 if it is a THUMB |
| 695 | // instruction address. |
| 696 | Arm_address |
| 697 | destination_address() const |
| 698 | { return this->destination_address_; } |
| 699 | |
| 700 | // Return the instruction being fixed up. |
| 701 | uint32_t |
| 702 | original_insn() const |
| 703 | { return this->original_insn_; } |
| 704 | |
| 705 | protected: |
| 706 | // Cortex_a8_stubs are created via a stub factory. So these are protected. |
| 707 | Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj, |
| 708 | unsigned int shndx, Arm_address source_address, |
| 709 | Arm_address destination_address, uint32_t original_insn) |
| 710 | : Stub(stub_template), relobj_(relobj), shndx_(shndx), |
| 711 | source_address_(source_address | 1U), |
| 712 | destination_address_(destination_address), |
| 713 | original_insn_(original_insn) |
| 714 | { } |
| 715 | |
| 716 | friend class Stub_factory; |
| 717 | |
| 718 | // Return the relocation target address of the i-th relocation in the |
| 719 | // stub. |
| 720 | Arm_address |
| 721 | do_reloc_target(size_t i) |
| 722 | { |
| 723 | if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond) |
| 724 | { |
| 725 | // The conditional branch veneer has two relocations. |
| 726 | gold_assert(i < 2); |
| 727 | return i == 0 ? this->source_address_ + 4 : this->destination_address_; |
| 728 | } |
| 729 | else |
| 730 | { |
| 731 | // All other Cortex-A8 stubs have only one relocation. |
| 732 | gold_assert(i == 0); |
| 733 | return this->destination_address_; |
| 734 | } |
| 735 | } |
| 736 | |
| 737 | // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template. |
| 738 | uint16_t |
| 739 | do_thumb16_special(size_t); |
| 740 | |
| 741 | private: |
| 742 | // Object of the code section containing the branch being fixed up. |
| 743 | Relobj* relobj_; |
| 744 | // Section index of the code section containing the branch begin fixed up. |
| 745 | unsigned int shndx_; |
| 746 | // Source address of original branch. |
| 747 | Arm_address source_address_; |
| 748 | // Destination address of the original branch. |
| 749 | Arm_address destination_address_; |
| 750 | // Original branch instruction. This is needed for copying the condition |
| 751 | // code from a condition branch to its stub. |
| 752 | uint32_t original_insn_; |
| 753 | }; |
| 754 | |
| 755 | // ARMv4 BX Rx branch relocation stub class. |
| 756 | class Arm_v4bx_stub : public Stub |
| 757 | { |
| 758 | public: |
| 759 | ~Arm_v4bx_stub() |
| 760 | { } |
| 761 | |
| 762 | // Return the associated register. |
| 763 | uint32_t |
| 764 | reg() const |
| 765 | { return this->reg_; } |
| 766 | |
| 767 | protected: |
| 768 | // Arm V4BX stubs are created via a stub factory. So these are protected. |
| 769 | Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg) |
| 770 | : Stub(stub_template), reg_(reg) |
| 771 | { } |
| 772 | |
| 773 | friend class Stub_factory; |
| 774 | |
| 775 | // Return the relocation target address of the i-th relocation in the |
| 776 | // stub. |
| 777 | Arm_address |
| 778 | do_reloc_target(size_t) |
| 779 | { gold_unreachable(); } |
| 780 | |
| 781 | // This may be overridden in the child class. |
| 782 | virtual void |
| 783 | do_write(unsigned char* view, section_size_type view_size, bool big_endian) |
| 784 | { |
| 785 | if (big_endian) |
| 786 | this->do_fixed_endian_v4bx_write<true>(view, view_size); |
| 787 | else |
| 788 | this->do_fixed_endian_v4bx_write<false>(view, view_size); |
| 789 | } |
| 790 | |
| 791 | private: |
| 792 | // A template to implement do_write. |
| 793 | template<bool big_endian> |
| 794 | void inline |
| 795 | do_fixed_endian_v4bx_write(unsigned char* view, section_size_type) |
| 796 | { |
| 797 | const Insn_template* insns = this->stub_template()->insns(); |
| 798 | elfcpp::Swap<32, big_endian>::writeval(view, |
| 799 | (insns[0].data() |
| 800 | + (this->reg_ << 16))); |
| 801 | view += insns[0].size(); |
| 802 | elfcpp::Swap<32, big_endian>::writeval(view, |
| 803 | (insns[1].data() + this->reg_)); |
| 804 | view += insns[1].size(); |
| 805 | elfcpp::Swap<32, big_endian>::writeval(view, |
| 806 | (insns[2].data() + this->reg_)); |
| 807 | } |
| 808 | |
| 809 | // A register index (r0-r14), which is associated with the stub. |
| 810 | uint32_t reg_; |
| 811 | }; |
| 812 | |
| 813 | // Stub factory class. |
| 814 | |
| 815 | class Stub_factory |
| 816 | { |
| 817 | public: |
| 818 | // Return the unique instance of this class. |
| 819 | static const Stub_factory& |
| 820 | get_instance() |
| 821 | { |
| 822 | static Stub_factory singleton; |
| 823 | return singleton; |
| 824 | } |
| 825 | |
| 826 | // Make a relocation stub. |
| 827 | Reloc_stub* |
| 828 | make_reloc_stub(Stub_type stub_type) const |
| 829 | { |
| 830 | gold_assert(stub_type >= arm_stub_reloc_first |
| 831 | && stub_type <= arm_stub_reloc_last); |
| 832 | return new Reloc_stub(this->stub_templates_[stub_type]); |
| 833 | } |
| 834 | |
| 835 | // Make a Cortex-A8 stub. |
| 836 | Cortex_a8_stub* |
| 837 | make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx, |
| 838 | Arm_address source, Arm_address destination, |
| 839 | uint32_t original_insn) const |
| 840 | { |
| 841 | gold_assert(stub_type >= arm_stub_cortex_a8_first |
| 842 | && stub_type <= arm_stub_cortex_a8_last); |
| 843 | return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx, |
| 844 | source, destination, original_insn); |
| 845 | } |
| 846 | |
| 847 | // Make an ARM V4BX relocation stub. |
| 848 | // This method creates a stub from the arm_stub_v4_veneer_bx template only. |
| 849 | Arm_v4bx_stub* |
| 850 | make_arm_v4bx_stub(uint32_t reg) const |
| 851 | { |
| 852 | gold_assert(reg < 0xf); |
| 853 | return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx], |
| 854 | reg); |
| 855 | } |
| 856 | |
| 857 | private: |
| 858 | // Constructor and destructor are protected since we only return a single |
| 859 | // instance created in Stub_factory::get_instance(). |
| 860 | |
| 861 | Stub_factory(); |
| 862 | |
| 863 | // A Stub_factory may not be copied since it is a singleton. |
| 864 | Stub_factory(const Stub_factory&); |
| 865 | Stub_factory& operator=(Stub_factory&); |
| 866 | |
| 867 | // Stub templates. These are initialized in the constructor. |
| 868 | const Stub_template* stub_templates_[arm_stub_type_last+1]; |
| 869 | }; |
| 870 | |
| 871 | // A class to hold stubs for the ARM target. |
| 872 | |
| 873 | template<bool big_endian> |
| 874 | class Stub_table : public Output_data |
| 875 | { |
| 876 | public: |
| 877 | Stub_table(Arm_input_section<big_endian>* owner) |
| 878 | : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0), |
| 879 | reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf), |
| 880 | prev_data_size_(0), prev_addralign_(1) |
| 881 | { } |
| 882 | |
| 883 | ~Stub_table() |
| 884 | { } |
| 885 | |
| 886 | // Owner of this stub table. |
| 887 | Arm_input_section<big_endian>* |
| 888 | owner() const |
| 889 | { return this->owner_; } |
| 890 | |
| 891 | // Whether this stub table is empty. |
| 892 | bool |
| 893 | empty() const |
| 894 | { |
| 895 | return (this->reloc_stubs_.empty() |
| 896 | && this->cortex_a8_stubs_.empty() |
| 897 | && this->arm_v4bx_stubs_.empty()); |
| 898 | } |
| 899 | |
| 900 | // Return the current data size. |
| 901 | off_t |
| 902 | current_data_size() const |
| 903 | { return this->current_data_size_for_child(); } |
| 904 | |
| 905 | // Add a STUB using KEY. The caller is responsible for avoiding addition |
| 906 | // if a STUB with the same key has already been added. |
| 907 | void |
| 908 | add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key) |
| 909 | { |
| 910 | const Stub_template* stub_template = stub->stub_template(); |
| 911 | gold_assert(stub_template->type() == key.stub_type()); |
| 912 | this->reloc_stubs_[key] = stub; |
| 913 | |
| 914 | // Assign stub offset early. We can do this because we never remove |
| 915 | // reloc stubs and they are in the beginning of the stub table. |
| 916 | uint64_t align = stub_template->alignment(); |
| 917 | this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align); |
| 918 | stub->set_offset(this->reloc_stubs_size_); |
| 919 | this->reloc_stubs_size_ += stub_template->size(); |
| 920 | this->reloc_stubs_addralign_ = |
| 921 | std::max(this->reloc_stubs_addralign_, align); |
| 922 | } |
| 923 | |
| 924 | // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS. |
| 925 | // The caller is responsible for avoiding addition if a STUB with the same |
| 926 | // address has already been added. |
| 927 | void |
| 928 | add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub) |
| 929 | { |
| 930 | std::pair<Arm_address, Cortex_a8_stub*> value(address, stub); |
| 931 | this->cortex_a8_stubs_.insert(value); |
| 932 | } |
| 933 | |
| 934 | // Add an ARM V4BX relocation stub. A register index will be retrieved |
| 935 | // from the stub. |
| 936 | void |
| 937 | add_arm_v4bx_stub(Arm_v4bx_stub* stub) |
| 938 | { |
| 939 | gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL); |
| 940 | this->arm_v4bx_stubs_[stub->reg()] = stub; |
| 941 | } |
| 942 | |
| 943 | // Remove all Cortex-A8 stubs. |
| 944 | void |
| 945 | remove_all_cortex_a8_stubs(); |
| 946 | |
| 947 | // Look up a relocation stub using KEY. Return NULL if there is none. |
| 948 | Reloc_stub* |
| 949 | find_reloc_stub(const Reloc_stub::Key& key) const |
| 950 | { |
| 951 | typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key); |
| 952 | return (p != this->reloc_stubs_.end()) ? p->second : NULL; |
| 953 | } |
| 954 | |
| 955 | // Look up an arm v4bx relocation stub using the register index. |
| 956 | // Return NULL if there is none. |
| 957 | Arm_v4bx_stub* |
| 958 | find_arm_v4bx_stub(const uint32_t reg) const |
| 959 | { |
| 960 | gold_assert(reg < 0xf); |
| 961 | return this->arm_v4bx_stubs_[reg]; |
| 962 | } |
| 963 | |
| 964 | // Relocate stubs in this stub table. |
| 965 | void |
| 966 | relocate_stubs(const Relocate_info<32, big_endian>*, |
| 967 | Target_arm<big_endian>*, Output_section*, |
| 968 | unsigned char*, Arm_address, section_size_type); |
| 969 | |
| 970 | // Update data size and alignment at the end of a relaxation pass. Return |
| 971 | // true if either data size or alignment is different from that of the |
| 972 | // previous relaxation pass. |
| 973 | bool |
| 974 | update_data_size_and_addralign(); |
| 975 | |
| 976 | // Finalize stubs. Set the offsets of all stubs and mark input sections |
| 977 | // needing the Cortex-A8 workaround. |
| 978 | void |
| 979 | finalize_stubs(); |
| 980 | |
| 981 | // Apply Cortex-A8 workaround to an address range. |
| 982 | void |
| 983 | apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*, |
| 984 | unsigned char*, Arm_address, |
| 985 | section_size_type); |
| 986 | |
| 987 | protected: |
| 988 | // Write out section contents. |
| 989 | void |
| 990 | do_write(Output_file*); |
| 991 | |
| 992 | // Return the required alignment. |
| 993 | uint64_t |
| 994 | do_addralign() const |
| 995 | { return this->prev_addralign_; } |
| 996 | |
| 997 | // Reset address and file offset. |
| 998 | void |
| 999 | do_reset_address_and_file_offset() |
| 1000 | { this->set_current_data_size_for_child(this->prev_data_size_); } |
| 1001 | |
| 1002 | // Set final data size. |
| 1003 | void |
| 1004 | set_final_data_size() |
| 1005 | { this->set_data_size(this->current_data_size()); } |
| 1006 | |
| 1007 | private: |
| 1008 | // Relocate one stub. |
| 1009 | void |
| 1010 | relocate_stub(Stub*, const Relocate_info<32, big_endian>*, |
| 1011 | Target_arm<big_endian>*, Output_section*, |
| 1012 | unsigned char*, Arm_address, section_size_type); |
| 1013 | |
| 1014 | // Unordered map of relocation stubs. |
| 1015 | typedef |
| 1016 | Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash, |
| 1017 | Reloc_stub::Key::equal_to> |
| 1018 | Reloc_stub_map; |
| 1019 | |
| 1020 | // List of Cortex-A8 stubs ordered by addresses of branches being |
| 1021 | // fixed up in output. |
| 1022 | typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list; |
| 1023 | // List of Arm V4BX relocation stubs ordered by associated registers. |
| 1024 | typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list; |
| 1025 | |
| 1026 | // Owner of this stub table. |
| 1027 | Arm_input_section<big_endian>* owner_; |
| 1028 | // The relocation stubs. |
| 1029 | Reloc_stub_map reloc_stubs_; |
| 1030 | // Size of reloc stubs. |
| 1031 | off_t reloc_stubs_size_; |
| 1032 | // Maximum address alignment of reloc stubs. |
| 1033 | uint64_t reloc_stubs_addralign_; |
| 1034 | // The cortex_a8_stubs. |
| 1035 | Cortex_a8_stub_list cortex_a8_stubs_; |
| 1036 | // The Arm V4BX relocation stubs. |
| 1037 | Arm_v4bx_stub_list arm_v4bx_stubs_; |
| 1038 | // data size of this in the previous pass. |
| 1039 | off_t prev_data_size_; |
| 1040 | // address alignment of this in the previous pass. |
| 1041 | uint64_t prev_addralign_; |
| 1042 | }; |
| 1043 | |
| 1044 | // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry |
| 1045 | // we add to the end of an EXIDX input section that goes into the output. |
| 1046 | |
| 1047 | class Arm_exidx_cantunwind : public Output_section_data |
| 1048 | { |
| 1049 | public: |
| 1050 | Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx) |
| 1051 | : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx) |
| 1052 | { } |
| 1053 | |
| 1054 | // Return the object containing the section pointed by this. |
| 1055 | Relobj* |
| 1056 | relobj() const |
| 1057 | { return this->relobj_; } |
| 1058 | |
| 1059 | // Return the section index of the section pointed by this. |
| 1060 | unsigned int |
| 1061 | shndx() const |
| 1062 | { return this->shndx_; } |
| 1063 | |
| 1064 | protected: |
| 1065 | void |
| 1066 | do_write(Output_file* of) |
| 1067 | { |
| 1068 | if (parameters->target().is_big_endian()) |
| 1069 | this->do_fixed_endian_write<true>(of); |
| 1070 | else |
| 1071 | this->do_fixed_endian_write<false>(of); |
| 1072 | } |
| 1073 | |
| 1074 | // Write to a map file. |
| 1075 | void |
| 1076 | do_print_to_mapfile(Mapfile* mapfile) const |
| 1077 | { mapfile->print_output_data(this, _("** ARM cantunwind")); } |
| 1078 | |
| 1079 | private: |
| 1080 | // Implement do_write for a given endianness. |
| 1081 | template<bool big_endian> |
| 1082 | void inline |
| 1083 | do_fixed_endian_write(Output_file*); |
| 1084 | |
| 1085 | // The object containing the section pointed by this. |
| 1086 | Relobj* relobj_; |
| 1087 | // The section index of the section pointed by this. |
| 1088 | unsigned int shndx_; |
| 1089 | }; |
| 1090 | |
| 1091 | // During EXIDX coverage fix-up, we compact an EXIDX section. The |
| 1092 | // Offset map is used to map input section offset within the EXIDX section |
| 1093 | // to the output offset from the start of this EXIDX section. |
| 1094 | |
| 1095 | typedef std::map<section_offset_type, section_offset_type> |
| 1096 | Arm_exidx_section_offset_map; |
| 1097 | |
| 1098 | // Arm_exidx_merged_section class. This represents an EXIDX input section |
| 1099 | // with some of its entries merged. |
| 1100 | |
| 1101 | class Arm_exidx_merged_section : public Output_relaxed_input_section |
| 1102 | { |
| 1103 | public: |
| 1104 | // Constructor for Arm_exidx_merged_section. |
| 1105 | // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. |
| 1106 | // SECTION_OFFSET_MAP points to a section offset map describing how |
| 1107 | // parts of the input section are mapped to output. DELETED_BYTES is |
| 1108 | // the number of bytes deleted from the EXIDX input section. |
| 1109 | Arm_exidx_merged_section( |
| 1110 | const Arm_exidx_input_section& exidx_input_section, |
| 1111 | const Arm_exidx_section_offset_map& section_offset_map, |
| 1112 | uint32_t deleted_bytes); |
| 1113 | |
| 1114 | // Build output contents. |
| 1115 | void |
| 1116 | build_contents(const unsigned char*, section_size_type); |
| 1117 | |
| 1118 | // Return the original EXIDX input section. |
| 1119 | const Arm_exidx_input_section& |
| 1120 | exidx_input_section() const |
| 1121 | { return this->exidx_input_section_; } |
| 1122 | |
| 1123 | // Return the section offset map. |
| 1124 | const Arm_exidx_section_offset_map& |
| 1125 | section_offset_map() const |
| 1126 | { return this->section_offset_map_; } |
| 1127 | |
| 1128 | protected: |
| 1129 | // Write merged section into file OF. |
| 1130 | void |
| 1131 | do_write(Output_file* of); |
| 1132 | |
| 1133 | bool |
| 1134 | do_output_offset(const Relobj*, unsigned int, section_offset_type, |
| 1135 | section_offset_type*) const; |
| 1136 | |
| 1137 | private: |
| 1138 | // Original EXIDX input section. |
| 1139 | const Arm_exidx_input_section& exidx_input_section_; |
| 1140 | // Section offset map. |
| 1141 | const Arm_exidx_section_offset_map& section_offset_map_; |
| 1142 | // Merged section contents. We need to keep build the merged section |
| 1143 | // and save it here to avoid accessing the original EXIDX section when |
| 1144 | // we cannot lock the sections' object. |
| 1145 | unsigned char* section_contents_; |
| 1146 | }; |
| 1147 | |
| 1148 | // A class to wrap an ordinary input section containing executable code. |
| 1149 | |
| 1150 | template<bool big_endian> |
| 1151 | class Arm_input_section : public Output_relaxed_input_section |
| 1152 | { |
| 1153 | public: |
| 1154 | Arm_input_section(Relobj* relobj, unsigned int shndx) |
| 1155 | : Output_relaxed_input_section(relobj, shndx, 1), |
| 1156 | original_addralign_(1), original_size_(0), stub_table_(NULL), |
| 1157 | original_contents_(NULL) |
| 1158 | { } |
| 1159 | |
| 1160 | ~Arm_input_section() |
| 1161 | { delete[] this->original_contents_; } |
| 1162 | |
| 1163 | // Initialize. |
| 1164 | void |
| 1165 | init(); |
| 1166 | |
| 1167 | // Whether this is a stub table owner. |
| 1168 | bool |
| 1169 | is_stub_table_owner() const |
| 1170 | { return this->stub_table_ != NULL && this->stub_table_->owner() == this; } |
| 1171 | |
| 1172 | // Return the stub table. |
| 1173 | Stub_table<big_endian>* |
| 1174 | stub_table() const |
| 1175 | { return this->stub_table_; } |
| 1176 | |
| 1177 | // Set the stub_table. |
| 1178 | void |
| 1179 | set_stub_table(Stub_table<big_endian>* stub_table) |
| 1180 | { this->stub_table_ = stub_table; } |
| 1181 | |
| 1182 | // Downcast a base pointer to an Arm_input_section pointer. This is |
| 1183 | // not type-safe but we only use Arm_input_section not the base class. |
| 1184 | static Arm_input_section<big_endian>* |
| 1185 | as_arm_input_section(Output_relaxed_input_section* poris) |
| 1186 | { return static_cast<Arm_input_section<big_endian>*>(poris); } |
| 1187 | |
| 1188 | // Return the original size of the section. |
| 1189 | uint32_t |
| 1190 | original_size() const |
| 1191 | { return this->original_size_; } |
| 1192 | |
| 1193 | protected: |
| 1194 | // Write data to output file. |
| 1195 | void |
| 1196 | do_write(Output_file*); |
| 1197 | |
| 1198 | // Return required alignment of this. |
| 1199 | uint64_t |
| 1200 | do_addralign() const |
| 1201 | { |
| 1202 | if (this->is_stub_table_owner()) |
| 1203 | return std::max(this->stub_table_->addralign(), |
| 1204 | static_cast<uint64_t>(this->original_addralign_)); |
| 1205 | else |
| 1206 | return this->original_addralign_; |
| 1207 | } |
| 1208 | |
| 1209 | // Finalize data size. |
| 1210 | void |
| 1211 | set_final_data_size(); |
| 1212 | |
| 1213 | // Reset address and file offset. |
| 1214 | void |
| 1215 | do_reset_address_and_file_offset(); |
| 1216 | |
| 1217 | // Output offset. |
| 1218 | bool |
| 1219 | do_output_offset(const Relobj* object, unsigned int shndx, |
| 1220 | section_offset_type offset, |
| 1221 | section_offset_type* poutput) const |
| 1222 | { |
| 1223 | if ((object == this->relobj()) |
| 1224 | && (shndx == this->shndx()) |
| 1225 | && (offset >= 0) |
| 1226 | && (offset <= |
| 1227 | convert_types<section_offset_type, uint32_t>(this->original_size_))) |
| 1228 | { |
| 1229 | *poutput = offset; |
| 1230 | return true; |
| 1231 | } |
| 1232 | else |
| 1233 | return false; |
| 1234 | } |
| 1235 | |
| 1236 | private: |
| 1237 | // Copying is not allowed. |
| 1238 | Arm_input_section(const Arm_input_section&); |
| 1239 | Arm_input_section& operator=(const Arm_input_section&); |
| 1240 | |
| 1241 | // Address alignment of the original input section. |
| 1242 | uint32_t original_addralign_; |
| 1243 | // Section size of the original input section. |
| 1244 | uint32_t original_size_; |
| 1245 | // Stub table. |
| 1246 | Stub_table<big_endian>* stub_table_; |
| 1247 | // Original section contents. We have to make a copy here since the file |
| 1248 | // containing the original section may not be locked when we need to access |
| 1249 | // the contents. |
| 1250 | unsigned char* original_contents_; |
| 1251 | }; |
| 1252 | |
| 1253 | // Arm_exidx_fixup class. This is used to define a number of methods |
| 1254 | // and keep states for fixing up EXIDX coverage. |
| 1255 | |
| 1256 | class Arm_exidx_fixup |
| 1257 | { |
| 1258 | public: |
| 1259 | Arm_exidx_fixup(Output_section* exidx_output_section, |
| 1260 | bool merge_exidx_entries = true) |
| 1261 | : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE), |
| 1262 | last_inlined_entry_(0), last_input_section_(NULL), |
| 1263 | section_offset_map_(NULL), first_output_text_section_(NULL), |
| 1264 | merge_exidx_entries_(merge_exidx_entries) |
| 1265 | { } |
| 1266 | |
| 1267 | ~Arm_exidx_fixup() |
| 1268 | { delete this->section_offset_map_; } |
| 1269 | |
| 1270 | // Process an EXIDX section for entry merging. SECTION_CONTENTS points |
| 1271 | // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return |
| 1272 | // number of bytes to be deleted in output. If parts of the input EXIDX |
| 1273 | // section are merged a heap allocated Arm_exidx_section_offset_map is store |
| 1274 | // in the located PSECTION_OFFSET_MAP. The caller owns the map and is |
| 1275 | // responsible for releasing it. |
| 1276 | template<bool big_endian> |
| 1277 | uint32_t |
| 1278 | process_exidx_section(const Arm_exidx_input_section* exidx_input_section, |
| 1279 | const unsigned char* section_contents, |
| 1280 | section_size_type section_size, |
| 1281 | Arm_exidx_section_offset_map** psection_offset_map); |
| 1282 | |
| 1283 | // Append an EXIDX_CANTUNWIND entry pointing at the end of the last |
| 1284 | // input section, if there is not one already. |
| 1285 | void |
| 1286 | add_exidx_cantunwind_as_needed(); |
| 1287 | |
| 1288 | // Return the output section for the text section which is linked to the |
| 1289 | // first exidx input in output. |
| 1290 | Output_section* |
| 1291 | first_output_text_section() const |
| 1292 | { return this->first_output_text_section_; } |
| 1293 | |
| 1294 | private: |
| 1295 | // Copying is not allowed. |
| 1296 | Arm_exidx_fixup(const Arm_exidx_fixup&); |
| 1297 | Arm_exidx_fixup& operator=(const Arm_exidx_fixup&); |
| 1298 | |
| 1299 | // Type of EXIDX unwind entry. |
| 1300 | enum Unwind_type |
| 1301 | { |
| 1302 | // No type. |
| 1303 | UT_NONE, |
| 1304 | // EXIDX_CANTUNWIND. |
| 1305 | UT_EXIDX_CANTUNWIND, |
| 1306 | // Inlined entry. |
| 1307 | UT_INLINED_ENTRY, |
| 1308 | // Normal entry. |
| 1309 | UT_NORMAL_ENTRY, |
| 1310 | }; |
| 1311 | |
| 1312 | // Process an EXIDX entry. We only care about the second word of the |
| 1313 | // entry. Return true if the entry can be deleted. |
| 1314 | bool |
| 1315 | process_exidx_entry(uint32_t second_word); |
| 1316 | |
| 1317 | // Update the current section offset map during EXIDX section fix-up. |
| 1318 | // If there is no map, create one. INPUT_OFFSET is the offset of a |
| 1319 | // reference point, DELETED_BYTES is the number of deleted by in the |
| 1320 | // section so far. If DELETE_ENTRY is true, the reference point and |
| 1321 | // all offsets after the previous reference point are discarded. |
| 1322 | void |
| 1323 | update_offset_map(section_offset_type input_offset, |
| 1324 | section_size_type deleted_bytes, bool delete_entry); |
| 1325 | |
| 1326 | // EXIDX output section. |
| 1327 | Output_section* exidx_output_section_; |
| 1328 | // Unwind type of the last EXIDX entry processed. |
| 1329 | Unwind_type last_unwind_type_; |
| 1330 | // Last seen inlined EXIDX entry. |
| 1331 | uint32_t last_inlined_entry_; |
| 1332 | // Last processed EXIDX input section. |
| 1333 | const Arm_exidx_input_section* last_input_section_; |
| 1334 | // Section offset map created in process_exidx_section. |
| 1335 | Arm_exidx_section_offset_map* section_offset_map_; |
| 1336 | // Output section for the text section which is linked to the first exidx |
| 1337 | // input in output. |
| 1338 | Output_section* first_output_text_section_; |
| 1339 | |
| 1340 | bool merge_exidx_entries_; |
| 1341 | }; |
| 1342 | |
| 1343 | // Arm output section class. This is defined mainly to add a number of |
| 1344 | // stub generation methods. |
| 1345 | |
| 1346 | template<bool big_endian> |
| 1347 | class Arm_output_section : public Output_section |
| 1348 | { |
| 1349 | public: |
| 1350 | typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list; |
| 1351 | |
| 1352 | // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section. |
| 1353 | Arm_output_section(const char* name, elfcpp::Elf_Word type, |
| 1354 | elfcpp::Elf_Xword flags) |
| 1355 | : Output_section(name, type, |
| 1356 | (type == elfcpp::SHT_ARM_EXIDX |
| 1357 | ? flags | elfcpp::SHF_LINK_ORDER |
| 1358 | : flags)) |
| 1359 | { |
| 1360 | if (type == elfcpp::SHT_ARM_EXIDX) |
| 1361 | this->set_always_keeps_input_sections(); |
| 1362 | } |
| 1363 | |
| 1364 | ~Arm_output_section() |
| 1365 | { } |
| 1366 | |
| 1367 | // Group input sections for stub generation. |
| 1368 | void |
| 1369 | group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*); |
| 1370 | |
| 1371 | // Downcast a base pointer to an Arm_output_section pointer. This is |
| 1372 | // not type-safe but we only use Arm_output_section not the base class. |
| 1373 | static Arm_output_section<big_endian>* |
| 1374 | as_arm_output_section(Output_section* os) |
| 1375 | { return static_cast<Arm_output_section<big_endian>*>(os); } |
| 1376 | |
| 1377 | // Append all input text sections in this into LIST. |
| 1378 | void |
| 1379 | append_text_sections_to_list(Text_section_list* list); |
| 1380 | |
| 1381 | // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION |
| 1382 | // is a list of text input sections sorted in ascending order of their |
| 1383 | // output addresses. |
| 1384 | void |
| 1385 | fix_exidx_coverage(Layout* layout, |
| 1386 | const Text_section_list& sorted_text_section, |
| 1387 | Symbol_table* symtab, |
| 1388 | bool merge_exidx_entries, |
| 1389 | const Task* task); |
| 1390 | |
| 1391 | // Link an EXIDX section into its corresponding text section. |
| 1392 | void |
| 1393 | set_exidx_section_link(); |
| 1394 | |
| 1395 | private: |
| 1396 | // For convenience. |
| 1397 | typedef Output_section::Input_section Input_section; |
| 1398 | typedef Output_section::Input_section_list Input_section_list; |
| 1399 | |
| 1400 | // Create a stub group. |
| 1401 | void create_stub_group(Input_section_list::const_iterator, |
| 1402 | Input_section_list::const_iterator, |
| 1403 | Input_section_list::const_iterator, |
| 1404 | Target_arm<big_endian>*, |
| 1405 | std::vector<Output_relaxed_input_section*>*, |
| 1406 | const Task* task); |
| 1407 | }; |
| 1408 | |
| 1409 | // Arm_exidx_input_section class. This represents an EXIDX input section. |
| 1410 | |
| 1411 | class Arm_exidx_input_section |
| 1412 | { |
| 1413 | public: |
| 1414 | static const section_offset_type invalid_offset = |
| 1415 | static_cast<section_offset_type>(-1); |
| 1416 | |
| 1417 | Arm_exidx_input_section(Relobj* relobj, unsigned int shndx, |
| 1418 | unsigned int link, uint32_t size, |
| 1419 | uint32_t addralign, uint32_t text_size) |
| 1420 | : relobj_(relobj), shndx_(shndx), link_(link), size_(size), |
| 1421 | addralign_(addralign), text_size_(text_size), has_errors_(false) |
| 1422 | { } |
| 1423 | |
| 1424 | ~Arm_exidx_input_section() |
| 1425 | { } |
| 1426 | |
| 1427 | // Accessors: This is a read-only class. |
| 1428 | |
| 1429 | // Return the object containing this EXIDX input section. |
| 1430 | Relobj* |
| 1431 | relobj() const |
| 1432 | { return this->relobj_; } |
| 1433 | |
| 1434 | // Return the section index of this EXIDX input section. |
| 1435 | unsigned int |
| 1436 | shndx() const |
| 1437 | { return this->shndx_; } |
| 1438 | |
| 1439 | // Return the section index of linked text section in the same object. |
| 1440 | unsigned int |
| 1441 | link() const |
| 1442 | { return this->link_; } |
| 1443 | |
| 1444 | // Return size of the EXIDX input section. |
| 1445 | uint32_t |
| 1446 | size() const |
| 1447 | { return this->size_; } |
| 1448 | |
| 1449 | // Return address alignment of EXIDX input section. |
| 1450 | uint32_t |
| 1451 | addralign() const |
| 1452 | { return this->addralign_; } |
| 1453 | |
| 1454 | // Return size of the associated text input section. |
| 1455 | uint32_t |
| 1456 | text_size() const |
| 1457 | { return this->text_size_; } |
| 1458 | |
| 1459 | // Whether there are any errors in the EXIDX input section. |
| 1460 | bool |
| 1461 | has_errors() const |
| 1462 | { return this->has_errors_; } |
| 1463 | |
| 1464 | // Set has-errors flag. |
| 1465 | void |
| 1466 | set_has_errors() |
| 1467 | { this->has_errors_ = true; } |
| 1468 | |
| 1469 | private: |
| 1470 | // Object containing this. |
| 1471 | Relobj* relobj_; |
| 1472 | // Section index of this. |
| 1473 | unsigned int shndx_; |
| 1474 | // text section linked to this in the same object. |
| 1475 | unsigned int link_; |
| 1476 | // Size of this. For ARM 32-bit is sufficient. |
| 1477 | uint32_t size_; |
| 1478 | // Address alignment of this. For ARM 32-bit is sufficient. |
| 1479 | uint32_t addralign_; |
| 1480 | // Size of associated text section. |
| 1481 | uint32_t text_size_; |
| 1482 | // Whether this has any errors. |
| 1483 | bool has_errors_; |
| 1484 | }; |
| 1485 | |
| 1486 | // Arm_relobj class. |
| 1487 | |
| 1488 | template<bool big_endian> |
| 1489 | class Arm_relobj : public Sized_relobj_file<32, big_endian> |
| 1490 | { |
| 1491 | public: |
| 1492 | static const Arm_address invalid_address = static_cast<Arm_address>(-1); |
| 1493 | |
| 1494 | Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, |
| 1495 | const typename elfcpp::Ehdr<32, big_endian>& ehdr) |
| 1496 | : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr), |
| 1497 | stub_tables_(), local_symbol_is_thumb_function_(), |
| 1498 | attributes_section_data_(NULL), mapping_symbols_info_(), |
| 1499 | section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), |
| 1500 | output_local_symbol_count_needs_update_(false), |
| 1501 | merge_flags_and_attributes_(true) |
| 1502 | { } |
| 1503 | |
| 1504 | ~Arm_relobj() |
| 1505 | { delete this->attributes_section_data_; } |
| 1506 | |
| 1507 | // Return the stub table of the SHNDX-th section if there is one. |
| 1508 | Stub_table<big_endian>* |
| 1509 | stub_table(unsigned int shndx) const |
| 1510 | { |
| 1511 | gold_assert(shndx < this->stub_tables_.size()); |
| 1512 | return this->stub_tables_[shndx]; |
| 1513 | } |
| 1514 | |
| 1515 | // Set STUB_TABLE to be the stub_table of the SHNDX-th section. |
| 1516 | void |
| 1517 | set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table) |
| 1518 | { |
| 1519 | gold_assert(shndx < this->stub_tables_.size()); |
| 1520 | this->stub_tables_[shndx] = stub_table; |
| 1521 | } |
| 1522 | |
| 1523 | // Whether a local symbol is a THUMB function. R_SYM is the symbol table |
| 1524 | // index. This is only valid after do_count_local_symbol is called. |
| 1525 | bool |
| 1526 | local_symbol_is_thumb_function(unsigned int r_sym) const |
| 1527 | { |
| 1528 | gold_assert(r_sym < this->local_symbol_is_thumb_function_.size()); |
| 1529 | return this->local_symbol_is_thumb_function_[r_sym]; |
| 1530 | } |
| 1531 | |
| 1532 | // Scan all relocation sections for stub generation. |
| 1533 | void |
| 1534 | scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*, |
| 1535 | const Layout*); |
| 1536 | |
| 1537 | // Convert regular input section with index SHNDX to a relaxed section. |
| 1538 | void |
| 1539 | convert_input_section_to_relaxed_section(unsigned shndx) |
| 1540 | { |
| 1541 | // The stubs have relocations and we need to process them after writing |
| 1542 | // out the stubs. So relocation now must follow section write. |
| 1543 | this->set_section_offset(shndx, -1ULL); |
| 1544 | this->set_relocs_must_follow_section_writes(); |
| 1545 | } |
| 1546 | |
| 1547 | // Downcast a base pointer to an Arm_relobj pointer. This is |
| 1548 | // not type-safe but we only use Arm_relobj not the base class. |
| 1549 | static Arm_relobj<big_endian>* |
| 1550 | as_arm_relobj(Relobj* relobj) |
| 1551 | { return static_cast<Arm_relobj<big_endian>*>(relobj); } |
| 1552 | |
| 1553 | // Processor-specific flags in ELF file header. This is valid only after |
| 1554 | // reading symbols. |
| 1555 | elfcpp::Elf_Word |
| 1556 | processor_specific_flags() const |
| 1557 | { return this->processor_specific_flags_; } |
| 1558 | |
| 1559 | // Attribute section data This is the contents of the .ARM.attribute section |
| 1560 | // if there is one. |
| 1561 | const Attributes_section_data* |
| 1562 | attributes_section_data() const |
| 1563 | { return this->attributes_section_data_; } |
| 1564 | |
| 1565 | // Mapping symbol location. |
| 1566 | typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position; |
| 1567 | |
| 1568 | // Functor for STL container. |
| 1569 | struct Mapping_symbol_position_less |
| 1570 | { |
| 1571 | bool |
| 1572 | operator()(const Mapping_symbol_position& p1, |
| 1573 | const Mapping_symbol_position& p2) const |
| 1574 | { |
| 1575 | return (p1.first < p2.first |
| 1576 | || (p1.first == p2.first && p1.second < p2.second)); |
| 1577 | } |
| 1578 | }; |
| 1579 | |
| 1580 | // We only care about the first character of a mapping symbol, so |
| 1581 | // we only store that instead of the whole symbol name. |
| 1582 | typedef std::map<Mapping_symbol_position, char, |
| 1583 | Mapping_symbol_position_less> Mapping_symbols_info; |
| 1584 | |
| 1585 | // Whether a section contains any Cortex-A8 workaround. |
| 1586 | bool |
| 1587 | section_has_cortex_a8_workaround(unsigned int shndx) const |
| 1588 | { |
| 1589 | return (this->section_has_cortex_a8_workaround_ != NULL |
| 1590 | && (*this->section_has_cortex_a8_workaround_)[shndx]); |
| 1591 | } |
| 1592 | |
| 1593 | // Mark a section that has Cortex-A8 workaround. |
| 1594 | void |
| 1595 | mark_section_for_cortex_a8_workaround(unsigned int shndx) |
| 1596 | { |
| 1597 | if (this->section_has_cortex_a8_workaround_ == NULL) |
| 1598 | this->section_has_cortex_a8_workaround_ = |
| 1599 | new std::vector<bool>(this->shnum(), false); |
| 1600 | (*this->section_has_cortex_a8_workaround_)[shndx] = true; |
| 1601 | } |
| 1602 | |
| 1603 | // Return the EXIDX section of an text section with index SHNDX or NULL |
| 1604 | // if the text section has no associated EXIDX section. |
| 1605 | const Arm_exidx_input_section* |
| 1606 | exidx_input_section_by_link(unsigned int shndx) const |
| 1607 | { |
| 1608 | Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); |
| 1609 | return ((p != this->exidx_section_map_.end() |
| 1610 | && p->second->link() == shndx) |
| 1611 | ? p->second |
| 1612 | : NULL); |
| 1613 | } |
| 1614 | |
| 1615 | // Return the EXIDX section with index SHNDX or NULL if there is none. |
| 1616 | const Arm_exidx_input_section* |
| 1617 | exidx_input_section_by_shndx(unsigned shndx) const |
| 1618 | { |
| 1619 | Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); |
| 1620 | return ((p != this->exidx_section_map_.end() |
| 1621 | && p->second->shndx() == shndx) |
| 1622 | ? p->second |
| 1623 | : NULL); |
| 1624 | } |
| 1625 | |
| 1626 | // Whether output local symbol count needs updating. |
| 1627 | bool |
| 1628 | output_local_symbol_count_needs_update() const |
| 1629 | { return this->output_local_symbol_count_needs_update_; } |
| 1630 | |
| 1631 | // Set output_local_symbol_count_needs_update flag to be true. |
| 1632 | void |
| 1633 | set_output_local_symbol_count_needs_update() |
| 1634 | { this->output_local_symbol_count_needs_update_ = true; } |
| 1635 | |
| 1636 | // Update output local symbol count at the end of relaxation. |
| 1637 | void |
| 1638 | update_output_local_symbol_count(); |
| 1639 | |
| 1640 | // Whether we want to merge processor-specific flags and attributes. |
| 1641 | bool |
| 1642 | merge_flags_and_attributes() const |
| 1643 | { return this->merge_flags_and_attributes_; } |
| 1644 | |
| 1645 | // Export list of EXIDX section indices. |
| 1646 | void |
| 1647 | get_exidx_shndx_list(std::vector<unsigned int>* list) const |
| 1648 | { |
| 1649 | list->clear(); |
| 1650 | for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin(); |
| 1651 | p != this->exidx_section_map_.end(); |
| 1652 | ++p) |
| 1653 | { |
| 1654 | if (p->second->shndx() == p->first) |
| 1655 | list->push_back(p->first); |
| 1656 | } |
| 1657 | // Sort list to make result independent of implementation of map. |
| 1658 | std::sort(list->begin(), list->end()); |
| 1659 | } |
| 1660 | |
| 1661 | protected: |
| 1662 | // Post constructor setup. |
| 1663 | void |
| 1664 | do_setup() |
| 1665 | { |
| 1666 | // Call parent's setup method. |
| 1667 | Sized_relobj_file<32, big_endian>::do_setup(); |
| 1668 | |
| 1669 | // Initialize look-up tables. |
| 1670 | Stub_table_list empty_stub_table_list(this->shnum(), NULL); |
| 1671 | this->stub_tables_.swap(empty_stub_table_list); |
| 1672 | } |
| 1673 | |
| 1674 | // Count the local symbols. |
| 1675 | void |
| 1676 | do_count_local_symbols(Stringpool_template<char>*, |
| 1677 | Stringpool_template<char>*); |
| 1678 | |
| 1679 | void |
| 1680 | do_relocate_sections( |
| 1681 | const Symbol_table* symtab, const Layout* layout, |
| 1682 | const unsigned char* pshdrs, Output_file* of, |
| 1683 | typename Sized_relobj_file<32, big_endian>::Views* pivews); |
| 1684 | |
| 1685 | // Read the symbol information. |
| 1686 | void |
| 1687 | do_read_symbols(Read_symbols_data* sd); |
| 1688 | |
| 1689 | // Process relocs for garbage collection. |
| 1690 | void |
| 1691 | do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*); |
| 1692 | |
| 1693 | private: |
| 1694 | |
| 1695 | // Whether a section needs to be scanned for relocation stubs. |
| 1696 | bool |
| 1697 | section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&, |
| 1698 | const Relobj::Output_sections&, |
| 1699 | const Symbol_table*, const unsigned char*); |
| 1700 | |
| 1701 | // Whether a section is a scannable text section. |
| 1702 | bool |
| 1703 | section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int, |
| 1704 | const Output_section*, const Symbol_table*); |
| 1705 | |
| 1706 | // Whether a section needs to be scanned for the Cortex-A8 erratum. |
| 1707 | bool |
| 1708 | section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&, |
| 1709 | unsigned int, Output_section*, |
| 1710 | const Symbol_table*); |
| 1711 | |
| 1712 | // Scan a section for the Cortex-A8 erratum. |
| 1713 | void |
| 1714 | scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&, |
| 1715 | unsigned int, Output_section*, |
| 1716 | Target_arm<big_endian>*); |
| 1717 | |
| 1718 | // Find the linked text section of an EXIDX section by looking at the |
| 1719 | // first relocation of the EXIDX section. PSHDR points to the section |
| 1720 | // headers of a relocation section and PSYMS points to the local symbols. |
| 1721 | // PSHNDX points to a location storing the text section index if found. |
| 1722 | // Return whether we can find the linked section. |
| 1723 | bool |
| 1724 | find_linked_text_section(const unsigned char* pshdr, |
| 1725 | const unsigned char* psyms, unsigned int* pshndx); |
| 1726 | |
| 1727 | // |
| 1728 | // Make a new Arm_exidx_input_section object for EXIDX section with |
| 1729 | // index SHNDX and section header SHDR. TEXT_SHNDX is the section |
| 1730 | // index of the linked text section. |
| 1731 | void |
| 1732 | make_exidx_input_section(unsigned int shndx, |
| 1733 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 1734 | unsigned int text_shndx, |
| 1735 | const elfcpp::Shdr<32, big_endian>& text_shdr); |
| 1736 | |
| 1737 | // Return the output address of either a plain input section or a |
| 1738 | // relaxed input section. SHNDX is the section index. |
| 1739 | Arm_address |
| 1740 | simple_input_section_output_address(unsigned int, Output_section*); |
| 1741 | |
| 1742 | typedef std::vector<Stub_table<big_endian>*> Stub_table_list; |
| 1743 | typedef Unordered_map<unsigned int, const Arm_exidx_input_section*> |
| 1744 | Exidx_section_map; |
| 1745 | |
| 1746 | // List of stub tables. |
| 1747 | Stub_table_list stub_tables_; |
| 1748 | // Bit vector to tell if a local symbol is a thumb function or not. |
| 1749 | // This is only valid after do_count_local_symbol is called. |
| 1750 | std::vector<bool> local_symbol_is_thumb_function_; |
| 1751 | // processor-specific flags in ELF file header. |
| 1752 | elfcpp::Elf_Word processor_specific_flags_; |
| 1753 | // Object attributes if there is an .ARM.attributes section or NULL. |
| 1754 | Attributes_section_data* attributes_section_data_; |
| 1755 | // Mapping symbols information. |
| 1756 | Mapping_symbols_info mapping_symbols_info_; |
| 1757 | // Bitmap to indicate sections with Cortex-A8 workaround or NULL. |
| 1758 | std::vector<bool>* section_has_cortex_a8_workaround_; |
| 1759 | // Map a text section to its associated .ARM.exidx section, if there is one. |
| 1760 | Exidx_section_map exidx_section_map_; |
| 1761 | // Whether output local symbol count needs updating. |
| 1762 | bool output_local_symbol_count_needs_update_; |
| 1763 | // Whether we merge processor flags and attributes of this object to |
| 1764 | // output. |
| 1765 | bool merge_flags_and_attributes_; |
| 1766 | }; |
| 1767 | |
| 1768 | // Arm_dynobj class. |
| 1769 | |
| 1770 | template<bool big_endian> |
| 1771 | class Arm_dynobj : public Sized_dynobj<32, big_endian> |
| 1772 | { |
| 1773 | public: |
| 1774 | Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset, |
| 1775 | const elfcpp::Ehdr<32, big_endian>& ehdr) |
| 1776 | : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr), |
| 1777 | processor_specific_flags_(0), attributes_section_data_(NULL) |
| 1778 | { } |
| 1779 | |
| 1780 | ~Arm_dynobj() |
| 1781 | { delete this->attributes_section_data_; } |
| 1782 | |
| 1783 | // Downcast a base pointer to an Arm_relobj pointer. This is |
| 1784 | // not type-safe but we only use Arm_relobj not the base class. |
| 1785 | static Arm_dynobj<big_endian>* |
| 1786 | as_arm_dynobj(Dynobj* dynobj) |
| 1787 | { return static_cast<Arm_dynobj<big_endian>*>(dynobj); } |
| 1788 | |
| 1789 | // Processor-specific flags in ELF file header. This is valid only after |
| 1790 | // reading symbols. |
| 1791 | elfcpp::Elf_Word |
| 1792 | processor_specific_flags() const |
| 1793 | { return this->processor_specific_flags_; } |
| 1794 | |
| 1795 | // Attributes section data. |
| 1796 | const Attributes_section_data* |
| 1797 | attributes_section_data() const |
| 1798 | { return this->attributes_section_data_; } |
| 1799 | |
| 1800 | protected: |
| 1801 | // Read the symbol information. |
| 1802 | void |
| 1803 | do_read_symbols(Read_symbols_data* sd); |
| 1804 | |
| 1805 | private: |
| 1806 | // processor-specific flags in ELF file header. |
| 1807 | elfcpp::Elf_Word processor_specific_flags_; |
| 1808 | // Object attributes if there is an .ARM.attributes section or NULL. |
| 1809 | Attributes_section_data* attributes_section_data_; |
| 1810 | }; |
| 1811 | |
| 1812 | // Functor to read reloc addends during stub generation. |
| 1813 | |
| 1814 | template<int sh_type, bool big_endian> |
| 1815 | struct Stub_addend_reader |
| 1816 | { |
| 1817 | // Return the addend for a relocation of a particular type. Depending |
| 1818 | // on whether this is a REL or RELA relocation, read the addend from a |
| 1819 | // view or from a Reloc object. |
| 1820 | elfcpp::Elf_types<32>::Elf_Swxword |
| 1821 | operator()( |
| 1822 | unsigned int /* r_type */, |
| 1823 | const unsigned char* /* view */, |
| 1824 | const typename Reloc_types<sh_type, |
| 1825 | 32, big_endian>::Reloc& /* reloc */) const; |
| 1826 | }; |
| 1827 | |
| 1828 | // Specialized Stub_addend_reader for SHT_REL type relocation sections. |
| 1829 | |
| 1830 | template<bool big_endian> |
| 1831 | struct Stub_addend_reader<elfcpp::SHT_REL, big_endian> |
| 1832 | { |
| 1833 | elfcpp::Elf_types<32>::Elf_Swxword |
| 1834 | operator()( |
| 1835 | unsigned int, |
| 1836 | const unsigned char*, |
| 1837 | const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const; |
| 1838 | }; |
| 1839 | |
| 1840 | // Specialized Stub_addend_reader for RELA type relocation sections. |
| 1841 | // We currently do not handle RELA type relocation sections but it is trivial |
| 1842 | // to implement the addend reader. This is provided for completeness and to |
| 1843 | // make it easier to add support for RELA relocation sections in the future. |
| 1844 | |
| 1845 | template<bool big_endian> |
| 1846 | struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian> |
| 1847 | { |
| 1848 | elfcpp::Elf_types<32>::Elf_Swxword |
| 1849 | operator()( |
| 1850 | unsigned int, |
| 1851 | const unsigned char*, |
| 1852 | const typename Reloc_types<elfcpp::SHT_RELA, 32, |
| 1853 | big_endian>::Reloc& reloc) const |
| 1854 | { return reloc.get_r_addend(); } |
| 1855 | }; |
| 1856 | |
| 1857 | // Cortex_a8_reloc class. We keep record of relocation that may need |
| 1858 | // the Cortex-A8 erratum workaround. |
| 1859 | |
| 1860 | class Cortex_a8_reloc |
| 1861 | { |
| 1862 | public: |
| 1863 | Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type, |
| 1864 | Arm_address destination) |
| 1865 | : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination) |
| 1866 | { } |
| 1867 | |
| 1868 | ~Cortex_a8_reloc() |
| 1869 | { } |
| 1870 | |
| 1871 | // Accessors: This is a read-only class. |
| 1872 | |
| 1873 | // Return the relocation stub associated with this relocation if there is |
| 1874 | // one. |
| 1875 | const Reloc_stub* |
| 1876 | reloc_stub() const |
| 1877 | { return this->reloc_stub_; } |
| 1878 | |
| 1879 | // Return the relocation type. |
| 1880 | unsigned int |
| 1881 | r_type() const |
| 1882 | { return this->r_type_; } |
| 1883 | |
| 1884 | // Return the destination address of the relocation. LSB stores the THUMB |
| 1885 | // bit. |
| 1886 | Arm_address |
| 1887 | destination() const |
| 1888 | { return this->destination_; } |
| 1889 | |
| 1890 | private: |
| 1891 | // Associated relocation stub if there is one, or NULL. |
| 1892 | const Reloc_stub* reloc_stub_; |
| 1893 | // Relocation type. |
| 1894 | unsigned int r_type_; |
| 1895 | // Destination address of this relocation. LSB is used to distinguish |
| 1896 | // ARM/THUMB mode. |
| 1897 | Arm_address destination_; |
| 1898 | }; |
| 1899 | |
| 1900 | // Arm_output_data_got class. We derive this from Output_data_got to add |
| 1901 | // extra methods to handle TLS relocations in a static link. |
| 1902 | |
| 1903 | template<bool big_endian> |
| 1904 | class Arm_output_data_got : public Output_data_got<32, big_endian> |
| 1905 | { |
| 1906 | public: |
| 1907 | Arm_output_data_got(Symbol_table* symtab, Layout* layout) |
| 1908 | : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout) |
| 1909 | { } |
| 1910 | |
| 1911 | // Add a static entry for the GOT entry at OFFSET. GSYM is a global |
| 1912 | // symbol and R_TYPE is the code of a dynamic relocation that needs to be |
| 1913 | // applied in a static link. |
| 1914 | void |
| 1915 | add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) |
| 1916 | { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); } |
| 1917 | |
| 1918 | // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object |
| 1919 | // defining a local symbol with INDEX. R_TYPE is the code of a dynamic |
| 1920 | // relocation that needs to be applied in a static link. |
| 1921 | void |
| 1922 | add_static_reloc(unsigned int got_offset, unsigned int r_type, |
| 1923 | Sized_relobj_file<32, big_endian>* relobj, |
| 1924 | unsigned int index) |
| 1925 | { |
| 1926 | this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj, |
| 1927 | index)); |
| 1928 | } |
| 1929 | |
| 1930 | // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. |
| 1931 | // The first one is initialized to be 1, which is the module index for |
| 1932 | // the main executable and the second one 0. A reloc of the type |
| 1933 | // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will |
| 1934 | // be applied by gold. GSYM is a global symbol. |
| 1935 | void |
| 1936 | add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym); |
| 1937 | |
| 1938 | // Same as the above but for a local symbol in OBJECT with INDEX. |
| 1939 | void |
| 1940 | add_tls_gd32_with_static_reloc(unsigned int got_type, |
| 1941 | Sized_relobj_file<32, big_endian>* object, |
| 1942 | unsigned int index); |
| 1943 | |
| 1944 | protected: |
| 1945 | // Write out the GOT table. |
| 1946 | void |
| 1947 | do_write(Output_file*); |
| 1948 | |
| 1949 | private: |
| 1950 | // This class represent dynamic relocations that need to be applied by |
| 1951 | // gold because we are using TLS relocations in a static link. |
| 1952 | class Static_reloc |
| 1953 | { |
| 1954 | public: |
| 1955 | Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) |
| 1956 | : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true) |
| 1957 | { this->u_.global.symbol = gsym; } |
| 1958 | |
| 1959 | Static_reloc(unsigned int got_offset, unsigned int r_type, |
| 1960 | Sized_relobj_file<32, big_endian>* relobj, unsigned int index) |
| 1961 | : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false) |
| 1962 | { |
| 1963 | this->u_.local.relobj = relobj; |
| 1964 | this->u_.local.index = index; |
| 1965 | } |
| 1966 | |
| 1967 | // Return the GOT offset. |
| 1968 | unsigned int |
| 1969 | got_offset() const |
| 1970 | { return this->got_offset_; } |
| 1971 | |
| 1972 | // Relocation type. |
| 1973 | unsigned int |
| 1974 | r_type() const |
| 1975 | { return this->r_type_; } |
| 1976 | |
| 1977 | // Whether the symbol is global or not. |
| 1978 | bool |
| 1979 | symbol_is_global() const |
| 1980 | { return this->symbol_is_global_; } |
| 1981 | |
| 1982 | // For a relocation against a global symbol, the global symbol. |
| 1983 | Symbol* |
| 1984 | symbol() const |
| 1985 | { |
| 1986 | gold_assert(this->symbol_is_global_); |
| 1987 | return this->u_.global.symbol; |
| 1988 | } |
| 1989 | |
| 1990 | // For a relocation against a local symbol, the defining object. |
| 1991 | Sized_relobj_file<32, big_endian>* |
| 1992 | relobj() const |
| 1993 | { |
| 1994 | gold_assert(!this->symbol_is_global_); |
| 1995 | return this->u_.local.relobj; |
| 1996 | } |
| 1997 | |
| 1998 | // For a relocation against a local symbol, the local symbol index. |
| 1999 | unsigned int |
| 2000 | index() const |
| 2001 | { |
| 2002 | gold_assert(!this->symbol_is_global_); |
| 2003 | return this->u_.local.index; |
| 2004 | } |
| 2005 | |
| 2006 | private: |
| 2007 | // GOT offset of the entry to which this relocation is applied. |
| 2008 | unsigned int got_offset_; |
| 2009 | // Type of relocation. |
| 2010 | unsigned int r_type_; |
| 2011 | // Whether this relocation is against a global symbol. |
| 2012 | bool symbol_is_global_; |
| 2013 | // A global or local symbol. |
| 2014 | union |
| 2015 | { |
| 2016 | struct |
| 2017 | { |
| 2018 | // For a global symbol, the symbol itself. |
| 2019 | Symbol* symbol; |
| 2020 | } global; |
| 2021 | struct |
| 2022 | { |
| 2023 | // For a local symbol, the object defining object. |
| 2024 | Sized_relobj_file<32, big_endian>* relobj; |
| 2025 | // For a local symbol, the symbol index. |
| 2026 | unsigned int index; |
| 2027 | } local; |
| 2028 | } u_; |
| 2029 | }; |
| 2030 | |
| 2031 | // Symbol table of the output object. |
| 2032 | Symbol_table* symbol_table_; |
| 2033 | // Layout of the output object. |
| 2034 | Layout* layout_; |
| 2035 | // Static relocs to be applied to the GOT. |
| 2036 | std::vector<Static_reloc> static_relocs_; |
| 2037 | }; |
| 2038 | |
| 2039 | // The ARM target has many relocation types with odd-sizes or noncontiguous |
| 2040 | // bits. The default handling of relocatable relocation cannot process these |
| 2041 | // relocations. So we have to extend the default code. |
| 2042 | |
| 2043 | template<bool big_endian, typename Classify_reloc> |
| 2044 | class Arm_scan_relocatable_relocs : |
| 2045 | public Default_scan_relocatable_relocs<Classify_reloc> |
| 2046 | { |
| 2047 | public: |
| 2048 | // Return the strategy to use for a local symbol which is a section |
| 2049 | // symbol, given the relocation type. |
| 2050 | inline Relocatable_relocs::Reloc_strategy |
| 2051 | local_section_strategy(unsigned int r_type, Relobj*) |
| 2052 | { |
| 2053 | if (Classify_reloc::sh_type == elfcpp::SHT_RELA) |
| 2054 | return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA; |
| 2055 | else |
| 2056 | { |
| 2057 | if (r_type == elfcpp::R_ARM_TARGET1 |
| 2058 | || r_type == elfcpp::R_ARM_TARGET2) |
| 2059 | { |
| 2060 | const Target_arm<big_endian>* arm_target = |
| 2061 | Target_arm<big_endian>::default_target(); |
| 2062 | r_type = arm_target->get_real_reloc_type(r_type); |
| 2063 | } |
| 2064 | |
| 2065 | switch(r_type) |
| 2066 | { |
| 2067 | // Relocations that write nothing. These exclude R_ARM_TARGET1 |
| 2068 | // and R_ARM_TARGET2. |
| 2069 | case elfcpp::R_ARM_NONE: |
| 2070 | case elfcpp::R_ARM_V4BX: |
| 2071 | case elfcpp::R_ARM_TLS_GOTDESC: |
| 2072 | case elfcpp::R_ARM_TLS_CALL: |
| 2073 | case elfcpp::R_ARM_TLS_DESCSEQ: |
| 2074 | case elfcpp::R_ARM_THM_TLS_CALL: |
| 2075 | case elfcpp::R_ARM_GOTRELAX: |
| 2076 | case elfcpp::R_ARM_GNU_VTENTRY: |
| 2077 | case elfcpp::R_ARM_GNU_VTINHERIT: |
| 2078 | case elfcpp::R_ARM_THM_TLS_DESCSEQ16: |
| 2079 | case elfcpp::R_ARM_THM_TLS_DESCSEQ32: |
| 2080 | return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0; |
| 2081 | // These should have been converted to something else above. |
| 2082 | case elfcpp::R_ARM_TARGET1: |
| 2083 | case elfcpp::R_ARM_TARGET2: |
| 2084 | gold_unreachable(); |
| 2085 | // Relocations that write full 32 bits and |
| 2086 | // have alignment of 1. |
| 2087 | case elfcpp::R_ARM_ABS32: |
| 2088 | case elfcpp::R_ARM_REL32: |
| 2089 | case elfcpp::R_ARM_SBREL32: |
| 2090 | case elfcpp::R_ARM_GOTOFF32: |
| 2091 | case elfcpp::R_ARM_BASE_PREL: |
| 2092 | case elfcpp::R_ARM_GOT_BREL: |
| 2093 | case elfcpp::R_ARM_BASE_ABS: |
| 2094 | case elfcpp::R_ARM_ABS32_NOI: |
| 2095 | case elfcpp::R_ARM_REL32_NOI: |
| 2096 | case elfcpp::R_ARM_PLT32_ABS: |
| 2097 | case elfcpp::R_ARM_GOT_ABS: |
| 2098 | case elfcpp::R_ARM_GOT_PREL: |
| 2099 | case elfcpp::R_ARM_TLS_GD32: |
| 2100 | case elfcpp::R_ARM_TLS_LDM32: |
| 2101 | case elfcpp::R_ARM_TLS_LDO32: |
| 2102 | case elfcpp::R_ARM_TLS_IE32: |
| 2103 | case elfcpp::R_ARM_TLS_LE32: |
| 2104 | return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED; |
| 2105 | default: |
| 2106 | // For all other static relocations, return RELOC_SPECIAL. |
| 2107 | return Relocatable_relocs::RELOC_SPECIAL; |
| 2108 | } |
| 2109 | } |
| 2110 | } |
| 2111 | }; |
| 2112 | |
| 2113 | template<bool big_endian> |
| 2114 | class Target_arm : public Sized_target<32, big_endian> |
| 2115 | { |
| 2116 | public: |
| 2117 | typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> |
| 2118 | Reloc_section; |
| 2119 | |
| 2120 | // When were are relocating a stub, we pass this as the relocation number. |
| 2121 | static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1); |
| 2122 | |
| 2123 | Target_arm(const Target::Target_info* info = &arm_info) |
| 2124 | : Sized_target<32, big_endian>(info), |
| 2125 | got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), |
| 2126 | rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY), |
| 2127 | got_mod_index_offset_(-1U), tls_base_symbol_defined_(false), |
| 2128 | stub_tables_(), stub_factory_(Stub_factory::get_instance()), |
| 2129 | should_force_pic_veneer_(false), |
| 2130 | arm_input_section_map_(), attributes_section_data_(NULL), |
| 2131 | fix_cortex_a8_(false), cortex_a8_relocs_info_() |
| 2132 | { } |
| 2133 | |
| 2134 | // Whether we force PCI branch veneers. |
| 2135 | bool |
| 2136 | should_force_pic_veneer() const |
| 2137 | { return this->should_force_pic_veneer_; } |
| 2138 | |
| 2139 | // Set PIC veneer flag. |
| 2140 | void |
| 2141 | set_should_force_pic_veneer(bool value) |
| 2142 | { this->should_force_pic_veneer_ = value; } |
| 2143 | |
| 2144 | // Whether we use THUMB-2 instructions. |
| 2145 | bool |
| 2146 | using_thumb2() const |
| 2147 | { |
| 2148 | Object_attribute* attr = |
| 2149 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2150 | int arch = attr->int_value(); |
| 2151 | return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7; |
| 2152 | } |
| 2153 | |
| 2154 | // Whether we use THUMB/THUMB-2 instructions only. |
| 2155 | bool |
| 2156 | using_thumb_only() const |
| 2157 | { |
| 2158 | Object_attribute* attr = |
| 2159 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2160 | |
| 2161 | if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M |
| 2162 | || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M) |
| 2163 | return true; |
| 2164 | if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7 |
| 2165 | && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M) |
| 2166 | return false; |
| 2167 | attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); |
| 2168 | return attr->int_value() == 'M'; |
| 2169 | } |
| 2170 | |
| 2171 | // Whether we have an NOP instruction. If not, use mov r0, r0 instead. |
| 2172 | bool |
| 2173 | may_use_arm_nop() const |
| 2174 | { |
| 2175 | Object_attribute* attr = |
| 2176 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2177 | int arch = attr->int_value(); |
| 2178 | return (arch == elfcpp::TAG_CPU_ARCH_V6T2 |
| 2179 | || arch == elfcpp::TAG_CPU_ARCH_V6K |
| 2180 | || arch == elfcpp::TAG_CPU_ARCH_V7 |
| 2181 | || arch == elfcpp::TAG_CPU_ARCH_V7E_M); |
| 2182 | } |
| 2183 | |
| 2184 | // Whether we have THUMB-2 NOP.W instruction. |
| 2185 | bool |
| 2186 | may_use_thumb2_nop() const |
| 2187 | { |
| 2188 | Object_attribute* attr = |
| 2189 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2190 | int arch = attr->int_value(); |
| 2191 | return (arch == elfcpp::TAG_CPU_ARCH_V6T2 |
| 2192 | || arch == elfcpp::TAG_CPU_ARCH_V7 |
| 2193 | || arch == elfcpp::TAG_CPU_ARCH_V7E_M); |
| 2194 | } |
| 2195 | |
| 2196 | // Whether we have v4T interworking instructions available. |
| 2197 | bool |
| 2198 | may_use_v4t_interworking() const |
| 2199 | { |
| 2200 | Object_attribute* attr = |
| 2201 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2202 | int arch = attr->int_value(); |
| 2203 | return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 |
| 2204 | && arch != elfcpp::TAG_CPU_ARCH_V4); |
| 2205 | } |
| 2206 | |
| 2207 | // Whether we have v5T interworking instructions available. |
| 2208 | bool |
| 2209 | may_use_v5t_interworking() const |
| 2210 | { |
| 2211 | Object_attribute* attr = |
| 2212 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 2213 | int arch = attr->int_value(); |
| 2214 | if (parameters->options().fix_arm1176()) |
| 2215 | return (arch == elfcpp::TAG_CPU_ARCH_V6T2 |
| 2216 | || arch == elfcpp::TAG_CPU_ARCH_V7 |
| 2217 | || arch == elfcpp::TAG_CPU_ARCH_V6_M |
| 2218 | || arch == elfcpp::TAG_CPU_ARCH_V6S_M |
| 2219 | || arch == elfcpp::TAG_CPU_ARCH_V7E_M); |
| 2220 | else |
| 2221 | return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 |
| 2222 | && arch != elfcpp::TAG_CPU_ARCH_V4 |
| 2223 | && arch != elfcpp::TAG_CPU_ARCH_V4T); |
| 2224 | } |
| 2225 | |
| 2226 | // Process the relocations to determine unreferenced sections for |
| 2227 | // garbage collection. |
| 2228 | void |
| 2229 | gc_process_relocs(Symbol_table* symtab, |
| 2230 | Layout* layout, |
| 2231 | Sized_relobj_file<32, big_endian>* object, |
| 2232 | unsigned int data_shndx, |
| 2233 | unsigned int sh_type, |
| 2234 | const unsigned char* prelocs, |
| 2235 | size_t reloc_count, |
| 2236 | Output_section* output_section, |
| 2237 | bool needs_special_offset_handling, |
| 2238 | size_t local_symbol_count, |
| 2239 | const unsigned char* plocal_symbols); |
| 2240 | |
| 2241 | // Scan the relocations to look for symbol adjustments. |
| 2242 | void |
| 2243 | scan_relocs(Symbol_table* symtab, |
| 2244 | Layout* layout, |
| 2245 | Sized_relobj_file<32, big_endian>* object, |
| 2246 | unsigned int data_shndx, |
| 2247 | unsigned int sh_type, |
| 2248 | const unsigned char* prelocs, |
| 2249 | size_t reloc_count, |
| 2250 | Output_section* output_section, |
| 2251 | bool needs_special_offset_handling, |
| 2252 | size_t local_symbol_count, |
| 2253 | const unsigned char* plocal_symbols); |
| 2254 | |
| 2255 | // Finalize the sections. |
| 2256 | void |
| 2257 | do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); |
| 2258 | |
| 2259 | // Return the value to use for a dynamic symbol which requires special |
| 2260 | // treatment. |
| 2261 | uint64_t |
| 2262 | do_dynsym_value(const Symbol*) const; |
| 2263 | |
| 2264 | // Return the plt address for globals. Since we have irelative plt entries, |
| 2265 | // address calculation is not as straightforward as plt_address + plt_offset. |
| 2266 | uint64_t |
| 2267 | do_plt_address_for_global(const Symbol* gsym) const |
| 2268 | { return this->plt_section()->address_for_global(gsym); } |
| 2269 | |
| 2270 | // Return the plt address for locals. Since we have irelative plt entries, |
| 2271 | // address calculation is not as straightforward as plt_address + plt_offset. |
| 2272 | uint64_t |
| 2273 | do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const |
| 2274 | { return this->plt_section()->address_for_local(relobj, symndx); } |
| 2275 | |
| 2276 | // Relocate a section. |
| 2277 | void |
| 2278 | relocate_section(const Relocate_info<32, big_endian>*, |
| 2279 | unsigned int sh_type, |
| 2280 | const unsigned char* prelocs, |
| 2281 | size_t reloc_count, |
| 2282 | Output_section* output_section, |
| 2283 | bool needs_special_offset_handling, |
| 2284 | unsigned char* view, |
| 2285 | Arm_address view_address, |
| 2286 | section_size_type view_size, |
| 2287 | const Reloc_symbol_changes*); |
| 2288 | |
| 2289 | // Scan the relocs during a relocatable link. |
| 2290 | void |
| 2291 | scan_relocatable_relocs(Symbol_table* symtab, |
| 2292 | Layout* layout, |
| 2293 | Sized_relobj_file<32, big_endian>* object, |
| 2294 | unsigned int data_shndx, |
| 2295 | unsigned int sh_type, |
| 2296 | const unsigned char* prelocs, |
| 2297 | size_t reloc_count, |
| 2298 | Output_section* output_section, |
| 2299 | bool needs_special_offset_handling, |
| 2300 | size_t local_symbol_count, |
| 2301 | const unsigned char* plocal_symbols, |
| 2302 | Relocatable_relocs*); |
| 2303 | |
| 2304 | // Scan the relocs for --emit-relocs. |
| 2305 | void |
| 2306 | emit_relocs_scan(Symbol_table* symtab, |
| 2307 | Layout* layout, |
| 2308 | Sized_relobj_file<32, big_endian>* object, |
| 2309 | unsigned int data_shndx, |
| 2310 | unsigned int sh_type, |
| 2311 | const unsigned char* prelocs, |
| 2312 | size_t reloc_count, |
| 2313 | Output_section* output_section, |
| 2314 | bool needs_special_offset_handling, |
| 2315 | size_t local_symbol_count, |
| 2316 | const unsigned char* plocal_syms, |
| 2317 | Relocatable_relocs* rr); |
| 2318 | |
| 2319 | // Emit relocations for a section. |
| 2320 | void |
| 2321 | relocate_relocs(const Relocate_info<32, big_endian>*, |
| 2322 | unsigned int sh_type, |
| 2323 | const unsigned char* prelocs, |
| 2324 | size_t reloc_count, |
| 2325 | Output_section* output_section, |
| 2326 | typename elfcpp::Elf_types<32>::Elf_Off |
| 2327 | offset_in_output_section, |
| 2328 | unsigned char* view, |
| 2329 | Arm_address view_address, |
| 2330 | section_size_type view_size, |
| 2331 | unsigned char* reloc_view, |
| 2332 | section_size_type reloc_view_size); |
| 2333 | |
| 2334 | // Perform target-specific processing in a relocatable link. This is |
| 2335 | // only used if we use the relocation strategy RELOC_SPECIAL. |
| 2336 | void |
| 2337 | relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo, |
| 2338 | unsigned int sh_type, |
| 2339 | const unsigned char* preloc_in, |
| 2340 | size_t relnum, |
| 2341 | Output_section* output_section, |
| 2342 | typename elfcpp::Elf_types<32>::Elf_Off |
| 2343 | offset_in_output_section, |
| 2344 | unsigned char* view, |
| 2345 | typename elfcpp::Elf_types<32>::Elf_Addr |
| 2346 | view_address, |
| 2347 | section_size_type view_size, |
| 2348 | unsigned char* preloc_out); |
| 2349 | |
| 2350 | // Return whether SYM is defined by the ABI. |
| 2351 | bool |
| 2352 | do_is_defined_by_abi(const Symbol* sym) const |
| 2353 | { return strcmp(sym->name(), "__tls_get_addr") == 0; } |
| 2354 | |
| 2355 | // Return whether there is a GOT section. |
| 2356 | bool |
| 2357 | has_got_section() const |
| 2358 | { return this->got_ != NULL; } |
| 2359 | |
| 2360 | // Return the size of the GOT section. |
| 2361 | section_size_type |
| 2362 | got_size() const |
| 2363 | { |
| 2364 | gold_assert(this->got_ != NULL); |
| 2365 | return this->got_->data_size(); |
| 2366 | } |
| 2367 | |
| 2368 | // Return the number of entries in the GOT. |
| 2369 | unsigned int |
| 2370 | got_entry_count() const |
| 2371 | { |
| 2372 | if (!this->has_got_section()) |
| 2373 | return 0; |
| 2374 | return this->got_size() / 4; |
| 2375 | } |
| 2376 | |
| 2377 | // Return the number of entries in the PLT. |
| 2378 | unsigned int |
| 2379 | plt_entry_count() const; |
| 2380 | |
| 2381 | // Return the offset of the first non-reserved PLT entry. |
| 2382 | unsigned int |
| 2383 | first_plt_entry_offset() const; |
| 2384 | |
| 2385 | // Return the size of each PLT entry. |
| 2386 | unsigned int |
| 2387 | plt_entry_size() const; |
| 2388 | |
| 2389 | // Get the section to use for IRELATIVE relocations, create it if necessary. |
| 2390 | Reloc_section* |
| 2391 | rel_irelative_section(Layout*); |
| 2392 | |
| 2393 | // Map platform-specific reloc types |
| 2394 | static unsigned int |
| 2395 | get_real_reloc_type(unsigned int r_type); |
| 2396 | |
| 2397 | // |
| 2398 | // Methods to support stub-generations. |
| 2399 | // |
| 2400 | |
| 2401 | // Return the stub factory |
| 2402 | const Stub_factory& |
| 2403 | stub_factory() const |
| 2404 | { return this->stub_factory_; } |
| 2405 | |
| 2406 | // Make a new Arm_input_section object. |
| 2407 | Arm_input_section<big_endian>* |
| 2408 | new_arm_input_section(Relobj*, unsigned int); |
| 2409 | |
| 2410 | // Find the Arm_input_section object corresponding to the SHNDX-th input |
| 2411 | // section of RELOBJ. |
| 2412 | Arm_input_section<big_endian>* |
| 2413 | find_arm_input_section(Relobj* relobj, unsigned int shndx) const; |
| 2414 | |
| 2415 | // Make a new Stub_table |
| 2416 | Stub_table<big_endian>* |
| 2417 | new_stub_table(Arm_input_section<big_endian>*); |
| 2418 | |
| 2419 | // Scan a section for stub generation. |
| 2420 | void |
| 2421 | scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int, |
| 2422 | const unsigned char*, size_t, Output_section*, |
| 2423 | bool, const unsigned char*, Arm_address, |
| 2424 | section_size_type); |
| 2425 | |
| 2426 | // Relocate a stub. |
| 2427 | void |
| 2428 | relocate_stub(Stub*, const Relocate_info<32, big_endian>*, |
| 2429 | Output_section*, unsigned char*, Arm_address, |
| 2430 | section_size_type); |
| 2431 | |
| 2432 | // Get the default ARM target. |
| 2433 | static Target_arm<big_endian>* |
| 2434 | default_target() |
| 2435 | { |
| 2436 | gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM |
| 2437 | && parameters->target().is_big_endian() == big_endian); |
| 2438 | return static_cast<Target_arm<big_endian>*>( |
| 2439 | parameters->sized_target<32, big_endian>()); |
| 2440 | } |
| 2441 | |
| 2442 | // Whether NAME belongs to a mapping symbol. |
| 2443 | static bool |
| 2444 | is_mapping_symbol_name(const char* name) |
| 2445 | { |
| 2446 | return (name |
| 2447 | && name[0] == '$' |
| 2448 | && (name[1] == 'a' || name[1] == 't' || name[1] == 'd') |
| 2449 | && (name[2] == '\0' || name[2] == '.')); |
| 2450 | } |
| 2451 | |
| 2452 | // Whether we work around the Cortex-A8 erratum. |
| 2453 | bool |
| 2454 | fix_cortex_a8() const |
| 2455 | { return this->fix_cortex_a8_; } |
| 2456 | |
| 2457 | // Whether we merge exidx entries in debuginfo. |
| 2458 | bool |
| 2459 | merge_exidx_entries() const |
| 2460 | { return parameters->options().merge_exidx_entries(); } |
| 2461 | |
| 2462 | // Whether we fix R_ARM_V4BX relocation. |
| 2463 | // 0 - do not fix |
| 2464 | // 1 - replace with MOV instruction (armv4 target) |
| 2465 | // 2 - make interworking veneer (>= armv4t targets only) |
| 2466 | General_options::Fix_v4bx |
| 2467 | fix_v4bx() const |
| 2468 | { return parameters->options().fix_v4bx(); } |
| 2469 | |
| 2470 | // Scan a span of THUMB code section for Cortex-A8 erratum. |
| 2471 | void |
| 2472 | scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int, |
| 2473 | section_size_type, section_size_type, |
| 2474 | const unsigned char*, Arm_address); |
| 2475 | |
| 2476 | // Apply Cortex-A8 workaround to a branch. |
| 2477 | void |
| 2478 | apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address, |
| 2479 | unsigned char*, Arm_address); |
| 2480 | |
| 2481 | protected: |
| 2482 | // Make the PLT-generator object. |
| 2483 | Output_data_plt_arm<big_endian>* |
| 2484 | make_data_plt(Layout* layout, |
| 2485 | Arm_output_data_got<big_endian>* got, |
| 2486 | Output_data_space* got_plt, |
| 2487 | Output_data_space* got_irelative) |
| 2488 | { return this->do_make_data_plt(layout, got, got_plt, got_irelative); } |
| 2489 | |
| 2490 | // Make an ELF object. |
| 2491 | Object* |
| 2492 | do_make_elf_object(const std::string&, Input_file*, off_t, |
| 2493 | const elfcpp::Ehdr<32, big_endian>& ehdr); |
| 2494 | |
| 2495 | Object* |
| 2496 | do_make_elf_object(const std::string&, Input_file*, off_t, |
| 2497 | const elfcpp::Ehdr<32, !big_endian>&) |
| 2498 | { gold_unreachable(); } |
| 2499 | |
| 2500 | Object* |
| 2501 | do_make_elf_object(const std::string&, Input_file*, off_t, |
| 2502 | const elfcpp::Ehdr<64, false>&) |
| 2503 | { gold_unreachable(); } |
| 2504 | |
| 2505 | Object* |
| 2506 | do_make_elf_object(const std::string&, Input_file*, off_t, |
| 2507 | const elfcpp::Ehdr<64, true>&) |
| 2508 | { gold_unreachable(); } |
| 2509 | |
| 2510 | // Make an output section. |
| 2511 | Output_section* |
| 2512 | do_make_output_section(const char* name, elfcpp::Elf_Word type, |
| 2513 | elfcpp::Elf_Xword flags) |
| 2514 | { return new Arm_output_section<big_endian>(name, type, flags); } |
| 2515 | |
| 2516 | void |
| 2517 | do_adjust_elf_header(unsigned char* view, int len); |
| 2518 | |
| 2519 | // We only need to generate stubs, and hence perform relaxation if we are |
| 2520 | // not doing relocatable linking. |
| 2521 | bool |
| 2522 | do_may_relax() const |
| 2523 | { return !parameters->options().relocatable(); } |
| 2524 | |
| 2525 | bool |
| 2526 | do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*); |
| 2527 | |
| 2528 | // Determine whether an object attribute tag takes an integer, a |
| 2529 | // string or both. |
| 2530 | int |
| 2531 | do_attribute_arg_type(int tag) const; |
| 2532 | |
| 2533 | // Reorder tags during output. |
| 2534 | int |
| 2535 | do_attributes_order(int num) const; |
| 2536 | |
| 2537 | // This is called when the target is selected as the default. |
| 2538 | void |
| 2539 | do_select_as_default_target() |
| 2540 | { |
| 2541 | // No locking is required since there should only be one default target. |
| 2542 | // We cannot have both the big-endian and little-endian ARM targets |
| 2543 | // as the default. |
| 2544 | gold_assert(arm_reloc_property_table == NULL); |
| 2545 | arm_reloc_property_table = new Arm_reloc_property_table(); |
| 2546 | } |
| 2547 | |
| 2548 | // Virtual function which is set to return true by a target if |
| 2549 | // it can use relocation types to determine if a function's |
| 2550 | // pointer is taken. |
| 2551 | virtual bool |
| 2552 | do_can_check_for_function_pointers() const |
| 2553 | { return true; } |
| 2554 | |
| 2555 | // Whether a section called SECTION_NAME may have function pointers to |
| 2556 | // sections not eligible for safe ICF folding. |
| 2557 | virtual bool |
| 2558 | do_section_may_have_icf_unsafe_pointers(const char* section_name) const |
| 2559 | { |
| 2560 | return (!is_prefix_of(".ARM.exidx", section_name) |
| 2561 | && !is_prefix_of(".ARM.extab", section_name) |
| 2562 | && Target::do_section_may_have_icf_unsafe_pointers(section_name)); |
| 2563 | } |
| 2564 | |
| 2565 | virtual void |
| 2566 | do_define_standard_symbols(Symbol_table*, Layout*); |
| 2567 | |
| 2568 | virtual Output_data_plt_arm<big_endian>* |
| 2569 | do_make_data_plt(Layout* layout, |
| 2570 | Arm_output_data_got<big_endian>* got, |
| 2571 | Output_data_space* got_plt, |
| 2572 | Output_data_space* got_irelative) |
| 2573 | { |
| 2574 | gold_assert(got_plt != NULL && got_irelative != NULL); |
| 2575 | if (parameters->options().long_plt()) |
| 2576 | return new Output_data_plt_arm_long<big_endian>( |
| 2577 | layout, got, got_plt, got_irelative); |
| 2578 | else |
| 2579 | return new Output_data_plt_arm_short<big_endian>( |
| 2580 | layout, got, got_plt, got_irelative); |
| 2581 | } |
| 2582 | |
| 2583 | private: |
| 2584 | // The class which scans relocations. |
| 2585 | class Scan |
| 2586 | { |
| 2587 | public: |
| 2588 | Scan() |
| 2589 | : issued_non_pic_error_(false) |
| 2590 | { } |
| 2591 | |
| 2592 | static inline int |
| 2593 | get_reference_flags(unsigned int r_type); |
| 2594 | |
| 2595 | inline void |
| 2596 | local(Symbol_table* symtab, Layout* layout, Target_arm* target, |
| 2597 | Sized_relobj_file<32, big_endian>* object, |
| 2598 | unsigned int data_shndx, |
| 2599 | Output_section* output_section, |
| 2600 | const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, |
| 2601 | const elfcpp::Sym<32, big_endian>& lsym, |
| 2602 | bool is_discarded); |
| 2603 | |
| 2604 | inline void |
| 2605 | global(Symbol_table* symtab, Layout* layout, Target_arm* target, |
| 2606 | Sized_relobj_file<32, big_endian>* object, |
| 2607 | unsigned int data_shndx, |
| 2608 | Output_section* output_section, |
| 2609 | const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, |
| 2610 | Symbol* gsym); |
| 2611 | |
| 2612 | inline bool |
| 2613 | local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , |
| 2614 | Sized_relobj_file<32, big_endian>* , |
| 2615 | unsigned int , |
| 2616 | Output_section* , |
| 2617 | const elfcpp::Rel<32, big_endian>& , |
| 2618 | unsigned int , |
| 2619 | const elfcpp::Sym<32, big_endian>&); |
| 2620 | |
| 2621 | inline bool |
| 2622 | global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , |
| 2623 | Sized_relobj_file<32, big_endian>* , |
| 2624 | unsigned int , |
| 2625 | Output_section* , |
| 2626 | const elfcpp::Rel<32, big_endian>& , |
| 2627 | unsigned int , Symbol*); |
| 2628 | |
| 2629 | private: |
| 2630 | static void |
| 2631 | unsupported_reloc_local(Sized_relobj_file<32, big_endian>*, |
| 2632 | unsigned int r_type); |
| 2633 | |
| 2634 | static void |
| 2635 | unsupported_reloc_global(Sized_relobj_file<32, big_endian>*, |
| 2636 | unsigned int r_type, Symbol*); |
| 2637 | |
| 2638 | void |
| 2639 | check_non_pic(Relobj*, unsigned int r_type); |
| 2640 | |
| 2641 | // Almost identical to Symbol::needs_plt_entry except that it also |
| 2642 | // handles STT_ARM_TFUNC. |
| 2643 | static bool |
| 2644 | symbol_needs_plt_entry(const Symbol* sym) |
| 2645 | { |
| 2646 | // An undefined symbol from an executable does not need a PLT entry. |
| 2647 | if (sym->is_undefined() && !parameters->options().shared()) |
| 2648 | return false; |
| 2649 | |
| 2650 | if (sym->type() == elfcpp::STT_GNU_IFUNC) |
| 2651 | return true; |
| 2652 | |
| 2653 | return (!parameters->doing_static_link() |
| 2654 | && (sym->type() == elfcpp::STT_FUNC |
| 2655 | || sym->type() == elfcpp::STT_ARM_TFUNC) |
| 2656 | && (sym->is_from_dynobj() |
| 2657 | || sym->is_undefined() |
| 2658 | || sym->is_preemptible())); |
| 2659 | } |
| 2660 | |
| 2661 | inline bool |
| 2662 | possible_function_pointer_reloc(unsigned int r_type); |
| 2663 | |
| 2664 | // Whether a plt entry is needed for ifunc. |
| 2665 | bool |
| 2666 | reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*, |
| 2667 | unsigned int r_type); |
| 2668 | |
| 2669 | // Whether we have issued an error about a non-PIC compilation. |
| 2670 | bool issued_non_pic_error_; |
| 2671 | }; |
| 2672 | |
| 2673 | // The class which implements relocation. |
| 2674 | class Relocate |
| 2675 | { |
| 2676 | public: |
| 2677 | Relocate() |
| 2678 | { } |
| 2679 | |
| 2680 | ~Relocate() |
| 2681 | { } |
| 2682 | |
| 2683 | // Return whether the static relocation needs to be applied. |
| 2684 | inline bool |
| 2685 | should_apply_static_reloc(const Sized_symbol<32>* gsym, |
| 2686 | unsigned int r_type, |
| 2687 | bool is_32bit, |
| 2688 | Output_section* output_section); |
| 2689 | |
| 2690 | // Do a relocation. Return false if the caller should not issue |
| 2691 | // any warnings about this relocation. |
| 2692 | inline bool |
| 2693 | relocate(const Relocate_info<32, big_endian>*, unsigned int, |
| 2694 | Target_arm*, Output_section*, size_t, const unsigned char*, |
| 2695 | const Sized_symbol<32>*, const Symbol_value<32>*, |
| 2696 | unsigned char*, Arm_address, section_size_type); |
| 2697 | |
| 2698 | // Return whether we want to pass flag NON_PIC_REF for this |
| 2699 | // reloc. This means the relocation type accesses a symbol not via |
| 2700 | // GOT or PLT. |
| 2701 | static inline bool |
| 2702 | reloc_is_non_pic(unsigned int r_type) |
| 2703 | { |
| 2704 | switch (r_type) |
| 2705 | { |
| 2706 | // These relocation types reference GOT or PLT entries explicitly. |
| 2707 | case elfcpp::R_ARM_GOT_BREL: |
| 2708 | case elfcpp::R_ARM_GOT_ABS: |
| 2709 | case elfcpp::R_ARM_GOT_PREL: |
| 2710 | case elfcpp::R_ARM_GOT_BREL12: |
| 2711 | case elfcpp::R_ARM_PLT32_ABS: |
| 2712 | case elfcpp::R_ARM_TLS_GD32: |
| 2713 | case elfcpp::R_ARM_TLS_LDM32: |
| 2714 | case elfcpp::R_ARM_TLS_IE32: |
| 2715 | case elfcpp::R_ARM_TLS_IE12GP: |
| 2716 | |
| 2717 | // These relocate types may use PLT entries. |
| 2718 | case elfcpp::R_ARM_CALL: |
| 2719 | case elfcpp::R_ARM_THM_CALL: |
| 2720 | case elfcpp::R_ARM_JUMP24: |
| 2721 | case elfcpp::R_ARM_THM_JUMP24: |
| 2722 | case elfcpp::R_ARM_THM_JUMP19: |
| 2723 | case elfcpp::R_ARM_PLT32: |
| 2724 | case elfcpp::R_ARM_THM_XPC22: |
| 2725 | case elfcpp::R_ARM_PREL31: |
| 2726 | case elfcpp::R_ARM_SBREL31: |
| 2727 | return false; |
| 2728 | |
| 2729 | default: |
| 2730 | return true; |
| 2731 | } |
| 2732 | } |
| 2733 | |
| 2734 | private: |
| 2735 | // Do a TLS relocation. |
| 2736 | inline typename Arm_relocate_functions<big_endian>::Status |
| 2737 | relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*, |
| 2738 | size_t, const elfcpp::Rel<32, big_endian>&, unsigned int, |
| 2739 | const Sized_symbol<32>*, const Symbol_value<32>*, |
| 2740 | unsigned char*, elfcpp::Elf_types<32>::Elf_Addr, |
| 2741 | section_size_type); |
| 2742 | |
| 2743 | }; |
| 2744 | |
| 2745 | // A class for inquiring about properties of a relocation, |
| 2746 | // used while scanning relocs during a relocatable link and |
| 2747 | // garbage collection. |
| 2748 | class Classify_reloc : |
| 2749 | public gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> |
| 2750 | { |
| 2751 | public: |
| 2752 | typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc |
| 2753 | Reltype; |
| 2754 | |
| 2755 | // Return the explicit addend of the relocation (return 0 for SHT_REL). |
| 2756 | static typename elfcpp::Elf_types<32>::Elf_Swxword |
| 2757 | get_r_addend(const Reltype*) |
| 2758 | { return 0; } |
| 2759 | |
| 2760 | // Return the size of the addend of the relocation (only used for SHT_REL). |
| 2761 | static unsigned int |
| 2762 | get_size_for_reloc(unsigned int, Relobj*); |
| 2763 | }; |
| 2764 | |
| 2765 | // Adjust TLS relocation type based on the options and whether this |
| 2766 | // is a local symbol. |
| 2767 | static tls::Tls_optimization |
| 2768 | optimize_tls_reloc(bool is_final, int r_type); |
| 2769 | |
| 2770 | // Get the GOT section, creating it if necessary. |
| 2771 | Arm_output_data_got<big_endian>* |
| 2772 | got_section(Symbol_table*, Layout*); |
| 2773 | |
| 2774 | // Get the GOT PLT section. |
| 2775 | Output_data_space* |
| 2776 | got_plt_section() const |
| 2777 | { |
| 2778 | gold_assert(this->got_plt_ != NULL); |
| 2779 | return this->got_plt_; |
| 2780 | } |
| 2781 | |
| 2782 | // Create the PLT section. |
| 2783 | void |
| 2784 | make_plt_section(Symbol_table* symtab, Layout* layout); |
| 2785 | |
| 2786 | // Create a PLT entry for a global symbol. |
| 2787 | void |
| 2788 | make_plt_entry(Symbol_table*, Layout*, Symbol*); |
| 2789 | |
| 2790 | // Create a PLT entry for a local STT_GNU_IFUNC symbol. |
| 2791 | void |
| 2792 | make_local_ifunc_plt_entry(Symbol_table*, Layout*, |
| 2793 | Sized_relobj_file<32, big_endian>* relobj, |
| 2794 | unsigned int local_sym_index); |
| 2795 | |
| 2796 | // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. |
| 2797 | void |
| 2798 | define_tls_base_symbol(Symbol_table*, Layout*); |
| 2799 | |
| 2800 | // Create a GOT entry for the TLS module index. |
| 2801 | unsigned int |
| 2802 | got_mod_index_entry(Symbol_table* symtab, Layout* layout, |
| 2803 | Sized_relobj_file<32, big_endian>* object); |
| 2804 | |
| 2805 | // Get the PLT section. |
| 2806 | const Output_data_plt_arm<big_endian>* |
| 2807 | plt_section() const |
| 2808 | { |
| 2809 | gold_assert(this->plt_ != NULL); |
| 2810 | return this->plt_; |
| 2811 | } |
| 2812 | |
| 2813 | // Get the dynamic reloc section, creating it if necessary. |
| 2814 | Reloc_section* |
| 2815 | rel_dyn_section(Layout*); |
| 2816 | |
| 2817 | // Get the section to use for TLS_DESC relocations. |
| 2818 | Reloc_section* |
| 2819 | rel_tls_desc_section(Layout*) const; |
| 2820 | |
| 2821 | // Return true if the symbol may need a COPY relocation. |
| 2822 | // References from an executable object to non-function symbols |
| 2823 | // defined in a dynamic object may need a COPY relocation. |
| 2824 | bool |
| 2825 | may_need_copy_reloc(Symbol* gsym) |
| 2826 | { |
| 2827 | return (gsym->type() != elfcpp::STT_ARM_TFUNC |
| 2828 | && gsym->may_need_copy_reloc()); |
| 2829 | } |
| 2830 | |
| 2831 | // Add a potential copy relocation. |
| 2832 | void |
| 2833 | copy_reloc(Symbol_table* symtab, Layout* layout, |
| 2834 | Sized_relobj_file<32, big_endian>* object, |
| 2835 | unsigned int shndx, Output_section* output_section, |
| 2836 | Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) |
| 2837 | { |
| 2838 | unsigned int r_type = elfcpp::elf_r_type<32>(reloc.get_r_info()); |
| 2839 | this->copy_relocs_.copy_reloc(symtab, layout, |
| 2840 | symtab->get_sized_symbol<32>(sym), |
| 2841 | object, shndx, output_section, |
| 2842 | r_type, reloc.get_r_offset(), 0, |
| 2843 | this->rel_dyn_section(layout)); |
| 2844 | } |
| 2845 | |
| 2846 | // Whether two EABI versions are compatible. |
| 2847 | static bool |
| 2848 | are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2); |
| 2849 | |
| 2850 | // Merge processor-specific flags from input object and those in the ELF |
| 2851 | // header of the output. |
| 2852 | void |
| 2853 | merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word); |
| 2854 | |
| 2855 | // Get the secondary compatible architecture. |
| 2856 | static int |
| 2857 | get_secondary_compatible_arch(const Attributes_section_data*); |
| 2858 | |
| 2859 | // Set the secondary compatible architecture. |
| 2860 | static void |
| 2861 | set_secondary_compatible_arch(Attributes_section_data*, int); |
| 2862 | |
| 2863 | static int |
| 2864 | tag_cpu_arch_combine(const char*, int, int*, int, int); |
| 2865 | |
| 2866 | // Helper to print AEABI enum tag value. |
| 2867 | static std::string |
| 2868 | aeabi_enum_name(unsigned int); |
| 2869 | |
| 2870 | // Return string value for TAG_CPU_name. |
| 2871 | static std::string |
| 2872 | tag_cpu_name_value(unsigned int); |
| 2873 | |
| 2874 | // Query attributes object to see if integer divide instructions may be |
| 2875 | // present in an object. |
| 2876 | static bool |
| 2877 | attributes_accept_div(int arch, int profile, |
| 2878 | const Object_attribute* div_attr); |
| 2879 | |
| 2880 | // Query attributes object to see if integer divide instructions are |
| 2881 | // forbidden to be in the object. This is not the inverse of |
| 2882 | // attributes_accept_div. |
| 2883 | static bool |
| 2884 | attributes_forbid_div(const Object_attribute* div_attr); |
| 2885 | |
| 2886 | // Merge object attributes from input object and those in the output. |
| 2887 | void |
| 2888 | merge_object_attributes(const char*, const Attributes_section_data*); |
| 2889 | |
| 2890 | // Helper to get an AEABI object attribute |
| 2891 | Object_attribute* |
| 2892 | get_aeabi_object_attribute(int tag) const |
| 2893 | { |
| 2894 | Attributes_section_data* pasd = this->attributes_section_data_; |
| 2895 | gold_assert(pasd != NULL); |
| 2896 | Object_attribute* attr = |
| 2897 | pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag); |
| 2898 | gold_assert(attr != NULL); |
| 2899 | return attr; |
| 2900 | } |
| 2901 | |
| 2902 | // |
| 2903 | // Methods to support stub-generations. |
| 2904 | // |
| 2905 | |
| 2906 | // Group input sections for stub generation. |
| 2907 | void |
| 2908 | group_sections(Layout*, section_size_type, bool, const Task*); |
| 2909 | |
| 2910 | // Scan a relocation for stub generation. |
| 2911 | void |
| 2912 | scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int, |
| 2913 | const Sized_symbol<32>*, unsigned int, |
| 2914 | const Symbol_value<32>*, |
| 2915 | elfcpp::Elf_types<32>::Elf_Swxword, Arm_address); |
| 2916 | |
| 2917 | // Scan a relocation section for stub. |
| 2918 | template<int sh_type> |
| 2919 | void |
| 2920 | scan_reloc_section_for_stubs( |
| 2921 | const Relocate_info<32, big_endian>* relinfo, |
| 2922 | const unsigned char* prelocs, |
| 2923 | size_t reloc_count, |
| 2924 | Output_section* output_section, |
| 2925 | bool needs_special_offset_handling, |
| 2926 | const unsigned char* view, |
| 2927 | elfcpp::Elf_types<32>::Elf_Addr view_address, |
| 2928 | section_size_type); |
| 2929 | |
| 2930 | // Fix .ARM.exidx section coverage. |
| 2931 | void |
| 2932 | fix_exidx_coverage(Layout*, const Input_objects*, |
| 2933 | Arm_output_section<big_endian>*, Symbol_table*, |
| 2934 | const Task*); |
| 2935 | |
| 2936 | // Functors for STL set. |
| 2937 | struct output_section_address_less_than |
| 2938 | { |
| 2939 | bool |
| 2940 | operator()(const Output_section* s1, const Output_section* s2) const |
| 2941 | { return s1->address() < s2->address(); } |
| 2942 | }; |
| 2943 | |
| 2944 | // Information about this specific target which we pass to the |
| 2945 | // general Target structure. |
| 2946 | static const Target::Target_info arm_info; |
| 2947 | |
| 2948 | // The types of GOT entries needed for this platform. |
| 2949 | // These values are exposed to the ABI in an incremental link. |
| 2950 | // Do not renumber existing values without changing the version |
| 2951 | // number of the .gnu_incremental_inputs section. |
| 2952 | enum Got_type |
| 2953 | { |
| 2954 | GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol |
| 2955 | GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset |
| 2956 | GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset |
| 2957 | GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair |
| 2958 | GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair |
| 2959 | }; |
| 2960 | |
| 2961 | typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list; |
| 2962 | |
| 2963 | // Map input section to Arm_input_section. |
| 2964 | typedef Unordered_map<Section_id, |
| 2965 | Arm_input_section<big_endian>*, |
| 2966 | Section_id_hash> |
| 2967 | Arm_input_section_map; |
| 2968 | |
| 2969 | // Map output addresses to relocs for Cortex-A8 erratum. |
| 2970 | typedef Unordered_map<Arm_address, const Cortex_a8_reloc*> |
| 2971 | Cortex_a8_relocs_info; |
| 2972 | |
| 2973 | // The GOT section. |
| 2974 | Arm_output_data_got<big_endian>* got_; |
| 2975 | // The PLT section. |
| 2976 | Output_data_plt_arm<big_endian>* plt_; |
| 2977 | // The GOT PLT section. |
| 2978 | Output_data_space* got_plt_; |
| 2979 | // The GOT section for IRELATIVE relocations. |
| 2980 | Output_data_space* got_irelative_; |
| 2981 | // The dynamic reloc section. |
| 2982 | Reloc_section* rel_dyn_; |
| 2983 | // The section to use for IRELATIVE relocs. |
| 2984 | Reloc_section* rel_irelative_; |
| 2985 | // Relocs saved to avoid a COPY reloc. |
| 2986 | Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_; |
| 2987 | // Offset of the GOT entry for the TLS module index. |
| 2988 | unsigned int got_mod_index_offset_; |
| 2989 | // True if the _TLS_MODULE_BASE_ symbol has been defined. |
| 2990 | bool tls_base_symbol_defined_; |
| 2991 | // Vector of Stub_tables created. |
| 2992 | Stub_table_list stub_tables_; |
| 2993 | // Stub factory. |
| 2994 | const Stub_factory &stub_factory_; |
| 2995 | // Whether we force PIC branch veneers. |
| 2996 | bool should_force_pic_veneer_; |
| 2997 | // Map for locating Arm_input_sections. |
| 2998 | Arm_input_section_map arm_input_section_map_; |
| 2999 | // Attributes section data in output. |
| 3000 | Attributes_section_data* attributes_section_data_; |
| 3001 | // Whether we want to fix code for Cortex-A8 erratum. |
| 3002 | bool fix_cortex_a8_; |
| 3003 | // Map addresses to relocs for Cortex-A8 erratum. |
| 3004 | Cortex_a8_relocs_info cortex_a8_relocs_info_; |
| 3005 | }; |
| 3006 | |
| 3007 | template<bool big_endian> |
| 3008 | const Target::Target_info Target_arm<big_endian>::arm_info = |
| 3009 | { |
| 3010 | 32, // size |
| 3011 | big_endian, // is_big_endian |
| 3012 | elfcpp::EM_ARM, // machine_code |
| 3013 | false, // has_make_symbol |
| 3014 | false, // has_resolve |
| 3015 | false, // has_code_fill |
| 3016 | true, // is_default_stack_executable |
| 3017 | false, // can_icf_inline_merge_sections |
| 3018 | '\0', // wrap_char |
| 3019 | "/usr/lib/libc.so.1", // dynamic_linker |
| 3020 | 0x8000, // default_text_segment_address |
| 3021 | 0x1000, // abi_pagesize (overridable by -z max-page-size) |
| 3022 | 0x1000, // common_pagesize (overridable by -z common-page-size) |
| 3023 | false, // isolate_execinstr |
| 3024 | 0, // rosegment_gap |
| 3025 | elfcpp::SHN_UNDEF, // small_common_shndx |
| 3026 | elfcpp::SHN_UNDEF, // large_common_shndx |
| 3027 | 0, // small_common_section_flags |
| 3028 | 0, // large_common_section_flags |
| 3029 | ".ARM.attributes", // attributes_section |
| 3030 | "aeabi", // attributes_vendor |
| 3031 | "_start", // entry_symbol_name |
| 3032 | 32, // hash_entry_size |
| 3033 | }; |
| 3034 | |
| 3035 | // Arm relocate functions class |
| 3036 | // |
| 3037 | |
| 3038 | template<bool big_endian> |
| 3039 | class Arm_relocate_functions : public Relocate_functions<32, big_endian> |
| 3040 | { |
| 3041 | public: |
| 3042 | typedef enum |
| 3043 | { |
| 3044 | STATUS_OKAY, // No error during relocation. |
| 3045 | STATUS_OVERFLOW, // Relocation overflow. |
| 3046 | STATUS_BAD_RELOC // Relocation cannot be applied. |
| 3047 | } Status; |
| 3048 | |
| 3049 | private: |
| 3050 | typedef Relocate_functions<32, big_endian> Base; |
| 3051 | typedef Arm_relocate_functions<big_endian> This; |
| 3052 | |
| 3053 | // Encoding of imm16 argument for movt and movw ARM instructions |
| 3054 | // from ARM ARM: |
| 3055 | // |
| 3056 | // imm16 := imm4 | imm12 |
| 3057 | // |
| 3058 | // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 |
| 3059 | // +-------+---------------+-------+-------+-----------------------+ |
| 3060 | // | | |imm4 | |imm12 | |
| 3061 | // +-------+---------------+-------+-------+-----------------------+ |
| 3062 | |
| 3063 | // Extract the relocation addend from VAL based on the ARM |
| 3064 | // instruction encoding described above. |
| 3065 | static inline typename elfcpp::Swap<32, big_endian>::Valtype |
| 3066 | extract_arm_movw_movt_addend( |
| 3067 | typename elfcpp::Swap<32, big_endian>::Valtype val) |
| 3068 | { |
| 3069 | // According to the Elf ABI for ARM Architecture the immediate |
| 3070 | // field is sign-extended to form the addend. |
| 3071 | return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff)); |
| 3072 | } |
| 3073 | |
| 3074 | // Insert X into VAL based on the ARM instruction encoding described |
| 3075 | // above. |
| 3076 | static inline typename elfcpp::Swap<32, big_endian>::Valtype |
| 3077 | insert_val_arm_movw_movt( |
| 3078 | typename elfcpp::Swap<32, big_endian>::Valtype val, |
| 3079 | typename elfcpp::Swap<32, big_endian>::Valtype x) |
| 3080 | { |
| 3081 | val &= 0xfff0f000; |
| 3082 | val |= x & 0x0fff; |
| 3083 | val |= (x & 0xf000) << 4; |
| 3084 | return val; |
| 3085 | } |
| 3086 | |
| 3087 | // Encoding of imm16 argument for movt and movw Thumb2 instructions |
| 3088 | // from ARM ARM: |
| 3089 | // |
| 3090 | // imm16 := imm4 | i | imm3 | imm8 |
| 3091 | // |
| 3092 | // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 |
| 3093 | // +---------+-+-----------+-------++-+-----+-------+---------------+ |
| 3094 | // | |i| |imm4 || |imm3 | |imm8 | |
| 3095 | // +---------+-+-----------+-------++-+-----+-------+---------------+ |
| 3096 | |
| 3097 | // Extract the relocation addend from VAL based on the Thumb2 |
| 3098 | // instruction encoding described above. |
| 3099 | static inline typename elfcpp::Swap<32, big_endian>::Valtype |
| 3100 | extract_thumb_movw_movt_addend( |
| 3101 | typename elfcpp::Swap<32, big_endian>::Valtype val) |
| 3102 | { |
| 3103 | // According to the Elf ABI for ARM Architecture the immediate |
| 3104 | // field is sign-extended to form the addend. |
| 3105 | return Bits<16>::sign_extend32(((val >> 4) & 0xf000) |
| 3106 | | ((val >> 15) & 0x0800) |
| 3107 | | ((val >> 4) & 0x0700) |
| 3108 | | (val & 0x00ff)); |
| 3109 | } |
| 3110 | |
| 3111 | // Insert X into VAL based on the Thumb2 instruction encoding |
| 3112 | // described above. |
| 3113 | static inline typename elfcpp::Swap<32, big_endian>::Valtype |
| 3114 | insert_val_thumb_movw_movt( |
| 3115 | typename elfcpp::Swap<32, big_endian>::Valtype val, |
| 3116 | typename elfcpp::Swap<32, big_endian>::Valtype x) |
| 3117 | { |
| 3118 | val &= 0xfbf08f00; |
| 3119 | val |= (x & 0xf000) << 4; |
| 3120 | val |= (x & 0x0800) << 15; |
| 3121 | val |= (x & 0x0700) << 4; |
| 3122 | val |= (x & 0x00ff); |
| 3123 | return val; |
| 3124 | } |
| 3125 | |
| 3126 | // Calculate the smallest constant Kn for the specified residual. |
| 3127 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) |
| 3128 | static uint32_t |
| 3129 | calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual) |
| 3130 | { |
| 3131 | int32_t msb; |
| 3132 | |
| 3133 | if (residual == 0) |
| 3134 | return 0; |
| 3135 | // Determine the most significant bit in the residual and |
| 3136 | // align the resulting value to a 2-bit boundary. |
| 3137 | for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2) |
| 3138 | ; |
| 3139 | // The desired shift is now (msb - 6), or zero, whichever |
| 3140 | // is the greater. |
| 3141 | return (((msb - 6) < 0) ? 0 : (msb - 6)); |
| 3142 | } |
| 3143 | |
| 3144 | // Calculate the final residual for the specified group index. |
| 3145 | // If the passed group index is less than zero, the method will return |
| 3146 | // the value of the specified residual without any change. |
| 3147 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) |
| 3148 | static typename elfcpp::Swap<32, big_endian>::Valtype |
| 3149 | calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual, |
| 3150 | const int group) |
| 3151 | { |
| 3152 | for (int n = 0; n <= group; n++) |
| 3153 | { |
| 3154 | // Calculate which part of the value to mask. |
| 3155 | uint32_t shift = calc_grp_kn(residual); |
| 3156 | // Calculate the residual for the next time around. |
| 3157 | residual &= ~(residual & (0xff << shift)); |
| 3158 | } |
| 3159 | |
| 3160 | return residual; |
| 3161 | } |
| 3162 | |
| 3163 | // Calculate the value of Gn for the specified group index. |
| 3164 | // We return it in the form of an encoded constant-and-rotation. |
| 3165 | // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) |
| 3166 | static typename elfcpp::Swap<32, big_endian>::Valtype |
| 3167 | calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual, |
| 3168 | const int group) |
| 3169 | { |
| 3170 | typename elfcpp::Swap<32, big_endian>::Valtype gn = 0; |
| 3171 | uint32_t shift = 0; |
| 3172 | |
| 3173 | for (int n = 0; n <= group; n++) |
| 3174 | { |
| 3175 | // Calculate which part of the value to mask. |
| 3176 | shift = calc_grp_kn(residual); |
| 3177 | // Calculate Gn in 32-bit as well as encoded constant-and-rotation form. |
| 3178 | gn = residual & (0xff << shift); |
| 3179 | // Calculate the residual for the next time around. |
| 3180 | residual &= ~gn; |
| 3181 | } |
| 3182 | // Return Gn in the form of an encoded constant-and-rotation. |
| 3183 | return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8)); |
| 3184 | } |
| 3185 | |
| 3186 | public: |
| 3187 | // Handle ARM long branches. |
| 3188 | static typename This::Status |
| 3189 | arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*, |
| 3190 | unsigned char*, const Sized_symbol<32>*, |
| 3191 | const Arm_relobj<big_endian>*, unsigned int, |
| 3192 | const Symbol_value<32>*, Arm_address, Arm_address, bool); |
| 3193 | |
| 3194 | // Handle THUMB long branches. |
| 3195 | static typename This::Status |
| 3196 | thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*, |
| 3197 | unsigned char*, const Sized_symbol<32>*, |
| 3198 | const Arm_relobj<big_endian>*, unsigned int, |
| 3199 | const Symbol_value<32>*, Arm_address, Arm_address, bool); |
| 3200 | |
| 3201 | |
| 3202 | // Return the branch offset of a 32-bit THUMB branch. |
| 3203 | static inline int32_t |
| 3204 | thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn) |
| 3205 | { |
| 3206 | // We use the Thumb-2 encoding (backwards compatible with Thumb-1) |
| 3207 | // involving the J1 and J2 bits. |
| 3208 | uint32_t s = (upper_insn & (1U << 10)) >> 10; |
| 3209 | uint32_t upper = upper_insn & 0x3ffU; |
| 3210 | uint32_t lower = lower_insn & 0x7ffU; |
| 3211 | uint32_t j1 = (lower_insn & (1U << 13)) >> 13; |
| 3212 | uint32_t j2 = (lower_insn & (1U << 11)) >> 11; |
| 3213 | uint32_t i1 = j1 ^ s ? 0 : 1; |
| 3214 | uint32_t i2 = j2 ^ s ? 0 : 1; |
| 3215 | |
| 3216 | return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22) |
| 3217 | | (upper << 12) | (lower << 1)); |
| 3218 | } |
| 3219 | |
| 3220 | // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction. |
| 3221 | // UPPER_INSN is the original upper instruction of the branch. Caller is |
| 3222 | // responsible for overflow checking and BLX offset adjustment. |
| 3223 | static inline uint16_t |
| 3224 | thumb32_branch_upper(uint16_t upper_insn, int32_t offset) |
| 3225 | { |
| 3226 | uint32_t s = offset < 0 ? 1 : 0; |
| 3227 | uint32_t bits = static_cast<uint32_t>(offset); |
| 3228 | return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10); |
| 3229 | } |
| 3230 | |
| 3231 | // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction. |
| 3232 | // LOWER_INSN is the original lower instruction of the branch. Caller is |
| 3233 | // responsible for overflow checking and BLX offset adjustment. |
| 3234 | static inline uint16_t |
| 3235 | thumb32_branch_lower(uint16_t lower_insn, int32_t offset) |
| 3236 | { |
| 3237 | uint32_t s = offset < 0 ? 1 : 0; |
| 3238 | uint32_t bits = static_cast<uint32_t>(offset); |
| 3239 | return ((lower_insn & ~0x2fffU) |
| 3240 | | ((((bits >> 23) & 1) ^ !s) << 13) |
| 3241 | | ((((bits >> 22) & 1) ^ !s) << 11) |
| 3242 | | ((bits >> 1) & 0x7ffU)); |
| 3243 | } |
| 3244 | |
| 3245 | // Return the branch offset of a 32-bit THUMB conditional branch. |
| 3246 | static inline int32_t |
| 3247 | thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn) |
| 3248 | { |
| 3249 | uint32_t s = (upper_insn & 0x0400U) >> 10; |
| 3250 | uint32_t j1 = (lower_insn & 0x2000U) >> 13; |
| 3251 | uint32_t j2 = (lower_insn & 0x0800U) >> 11; |
| 3252 | uint32_t lower = (lower_insn & 0x07ffU); |
| 3253 | uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU); |
| 3254 | |
| 3255 | return Bits<21>::sign_extend32((upper << 12) | (lower << 1)); |
| 3256 | } |
| 3257 | |
| 3258 | // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper |
| 3259 | // instruction. UPPER_INSN is the original upper instruction of the branch. |
| 3260 | // Caller is responsible for overflow checking. |
| 3261 | static inline uint16_t |
| 3262 | thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset) |
| 3263 | { |
| 3264 | uint32_t s = offset < 0 ? 1 : 0; |
| 3265 | uint32_t bits = static_cast<uint32_t>(offset); |
| 3266 | return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12); |
| 3267 | } |
| 3268 | |
| 3269 | // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower |
| 3270 | // instruction. LOWER_INSN is the original lower instruction of the branch. |
| 3271 | // The caller is responsible for overflow checking. |
| 3272 | static inline uint16_t |
| 3273 | thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset) |
| 3274 | { |
| 3275 | uint32_t bits = static_cast<uint32_t>(offset); |
| 3276 | uint32_t j2 = (bits & 0x00080000U) >> 19; |
| 3277 | uint32_t j1 = (bits & 0x00040000U) >> 18; |
| 3278 | uint32_t lo = (bits & 0x00000ffeU) >> 1; |
| 3279 | |
| 3280 | return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo; |
| 3281 | } |
| 3282 | |
| 3283 | // R_ARM_ABS8: S + A |
| 3284 | static inline typename This::Status |
| 3285 | abs8(unsigned char* view, |
| 3286 | const Sized_relobj_file<32, big_endian>* object, |
| 3287 | const Symbol_value<32>* psymval) |
| 3288 | { |
| 3289 | typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; |
| 3290 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3291 | Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); |
| 3292 | int32_t addend = Bits<8>::sign_extend32(val); |
| 3293 | Arm_address x = psymval->value(object, addend); |
| 3294 | val = Bits<32>::bit_select32(val, x, 0xffU); |
| 3295 | elfcpp::Swap<8, big_endian>::writeval(wv, val); |
| 3296 | |
| 3297 | // R_ARM_ABS8 permits signed or unsigned results. |
| 3298 | return (Bits<8>::has_signed_unsigned_overflow32(x) |
| 3299 | ? This::STATUS_OVERFLOW |
| 3300 | : This::STATUS_OKAY); |
| 3301 | } |
| 3302 | |
| 3303 | // R_ARM_THM_ABS5: S + A |
| 3304 | static inline typename This::Status |
| 3305 | thm_abs5(unsigned char* view, |
| 3306 | const Sized_relobj_file<32, big_endian>* object, |
| 3307 | const Symbol_value<32>* psymval) |
| 3308 | { |
| 3309 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3310 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3311 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3312 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); |
| 3313 | Reltype addend = (val & 0x7e0U) >> 6; |
| 3314 | Reltype x = psymval->value(object, addend); |
| 3315 | val = Bits<32>::bit_select32(val, x << 6, 0x7e0U); |
| 3316 | elfcpp::Swap<16, big_endian>::writeval(wv, val); |
| 3317 | return (Bits<5>::has_overflow32(x) |
| 3318 | ? This::STATUS_OVERFLOW |
| 3319 | : This::STATUS_OKAY); |
| 3320 | } |
| 3321 | |
| 3322 | // R_ARM_ABS12: S + A |
| 3323 | static inline typename This::Status |
| 3324 | abs12(unsigned char* view, |
| 3325 | const Sized_relobj_file<32, big_endian>* object, |
| 3326 | const Symbol_value<32>* psymval) |
| 3327 | { |
| 3328 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3329 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3330 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3331 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3332 | Reltype addend = val & 0x0fffU; |
| 3333 | Reltype x = psymval->value(object, addend); |
| 3334 | val = Bits<32>::bit_select32(val, x, 0x0fffU); |
| 3335 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 3336 | return (Bits<12>::has_overflow32(x) |
| 3337 | ? This::STATUS_OVERFLOW |
| 3338 | : This::STATUS_OKAY); |
| 3339 | } |
| 3340 | |
| 3341 | // R_ARM_ABS16: S + A |
| 3342 | static inline typename This::Status |
| 3343 | abs16(unsigned char* view, |
| 3344 | const Sized_relobj_file<32, big_endian>* object, |
| 3345 | const Symbol_value<32>* psymval) |
| 3346 | { |
| 3347 | typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype; |
| 3348 | Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view); |
| 3349 | int32_t addend = Bits<16>::sign_extend32(val); |
| 3350 | Arm_address x = psymval->value(object, addend); |
| 3351 | val = Bits<32>::bit_select32(val, x, 0xffffU); |
| 3352 | elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val); |
| 3353 | |
| 3354 | // R_ARM_ABS16 permits signed or unsigned results. |
| 3355 | return (Bits<16>::has_signed_unsigned_overflow32(x) |
| 3356 | ? This::STATUS_OVERFLOW |
| 3357 | : This::STATUS_OKAY); |
| 3358 | } |
| 3359 | |
| 3360 | // R_ARM_ABS32: (S + A) | T |
| 3361 | static inline typename This::Status |
| 3362 | abs32(unsigned char* view, |
| 3363 | const Sized_relobj_file<32, big_endian>* object, |
| 3364 | const Symbol_value<32>* psymval, |
| 3365 | Arm_address thumb_bit) |
| 3366 | { |
| 3367 | typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; |
| 3368 | Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); |
| 3369 | Valtype x = psymval->value(object, addend) | thumb_bit; |
| 3370 | elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); |
| 3371 | return This::STATUS_OKAY; |
| 3372 | } |
| 3373 | |
| 3374 | // R_ARM_REL32: (S + A) | T - P |
| 3375 | static inline typename This::Status |
| 3376 | rel32(unsigned char* view, |
| 3377 | const Sized_relobj_file<32, big_endian>* object, |
| 3378 | const Symbol_value<32>* psymval, |
| 3379 | Arm_address address, |
| 3380 | Arm_address thumb_bit) |
| 3381 | { |
| 3382 | typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; |
| 3383 | Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); |
| 3384 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; |
| 3385 | elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); |
| 3386 | return This::STATUS_OKAY; |
| 3387 | } |
| 3388 | |
| 3389 | // R_ARM_THM_JUMP24: (S + A) | T - P |
| 3390 | static typename This::Status |
| 3391 | thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object, |
| 3392 | const Symbol_value<32>* psymval, Arm_address address, |
| 3393 | Arm_address thumb_bit); |
| 3394 | |
| 3395 | // R_ARM_THM_JUMP6: S + A – P |
| 3396 | static inline typename This::Status |
| 3397 | thm_jump6(unsigned char* view, |
| 3398 | const Sized_relobj_file<32, big_endian>* object, |
| 3399 | const Symbol_value<32>* psymval, |
| 3400 | Arm_address address) |
| 3401 | { |
| 3402 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3403 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; |
| 3404 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3405 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); |
| 3406 | // bit[9]:bit[7:3]:’0’ (mask: 0x02f8) |
| 3407 | Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2)); |
| 3408 | Reltype x = (psymval->value(object, addend) - address); |
| 3409 | val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2); |
| 3410 | elfcpp::Swap<16, big_endian>::writeval(wv, val); |
| 3411 | // CZB does only forward jumps. |
| 3412 | return ((x > 0x007e) |
| 3413 | ? This::STATUS_OVERFLOW |
| 3414 | : This::STATUS_OKAY); |
| 3415 | } |
| 3416 | |
| 3417 | // R_ARM_THM_JUMP8: S + A – P |
| 3418 | static inline typename This::Status |
| 3419 | thm_jump8(unsigned char* view, |
| 3420 | const Sized_relobj_file<32, big_endian>* object, |
| 3421 | const Symbol_value<32>* psymval, |
| 3422 | Arm_address address) |
| 3423 | { |
| 3424 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3425 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3426 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); |
| 3427 | int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1); |
| 3428 | int32_t x = (psymval->value(object, addend) - address); |
| 3429 | elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00) |
| 3430 | | ((x & 0x01fe) >> 1))); |
| 3431 | // We do a 9-bit overflow check because x is right-shifted by 1 bit. |
| 3432 | return (Bits<9>::has_overflow32(x) |
| 3433 | ? This::STATUS_OVERFLOW |
| 3434 | : This::STATUS_OKAY); |
| 3435 | } |
| 3436 | |
| 3437 | // R_ARM_THM_JUMP11: S + A – P |
| 3438 | static inline typename This::Status |
| 3439 | thm_jump11(unsigned char* view, |
| 3440 | const Sized_relobj_file<32, big_endian>* object, |
| 3441 | const Symbol_value<32>* psymval, |
| 3442 | Arm_address address) |
| 3443 | { |
| 3444 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3445 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3446 | Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); |
| 3447 | int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1); |
| 3448 | int32_t x = (psymval->value(object, addend) - address); |
| 3449 | elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800) |
| 3450 | | ((x & 0x0ffe) >> 1))); |
| 3451 | // We do a 12-bit overflow check because x is right-shifted by 1 bit. |
| 3452 | return (Bits<12>::has_overflow32(x) |
| 3453 | ? This::STATUS_OVERFLOW |
| 3454 | : This::STATUS_OKAY); |
| 3455 | } |
| 3456 | |
| 3457 | // R_ARM_BASE_PREL: B(S) + A - P |
| 3458 | static inline typename This::Status |
| 3459 | base_prel(unsigned char* view, |
| 3460 | Arm_address origin, |
| 3461 | Arm_address address) |
| 3462 | { |
| 3463 | Base::rel32(view, origin - address); |
| 3464 | return STATUS_OKAY; |
| 3465 | } |
| 3466 | |
| 3467 | // R_ARM_BASE_ABS: B(S) + A |
| 3468 | static inline typename This::Status |
| 3469 | base_abs(unsigned char* view, |
| 3470 | Arm_address origin) |
| 3471 | { |
| 3472 | Base::rel32(view, origin); |
| 3473 | return STATUS_OKAY; |
| 3474 | } |
| 3475 | |
| 3476 | // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG |
| 3477 | static inline typename This::Status |
| 3478 | got_brel(unsigned char* view, |
| 3479 | typename elfcpp::Swap<32, big_endian>::Valtype got_offset) |
| 3480 | { |
| 3481 | Base::rel32(view, got_offset); |
| 3482 | return This::STATUS_OKAY; |
| 3483 | } |
| 3484 | |
| 3485 | // R_ARM_GOT_PREL: GOT(S) + A - P |
| 3486 | static inline typename This::Status |
| 3487 | got_prel(unsigned char* view, |
| 3488 | Arm_address got_entry, |
| 3489 | Arm_address address) |
| 3490 | { |
| 3491 | Base::rel32(view, got_entry - address); |
| 3492 | return This::STATUS_OKAY; |
| 3493 | } |
| 3494 | |
| 3495 | // R_ARM_PREL: (S + A) | T - P |
| 3496 | static inline typename This::Status |
| 3497 | prel31(unsigned char* view, |
| 3498 | const Sized_relobj_file<32, big_endian>* object, |
| 3499 | const Symbol_value<32>* psymval, |
| 3500 | Arm_address address, |
| 3501 | Arm_address thumb_bit) |
| 3502 | { |
| 3503 | typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; |
| 3504 | Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view); |
| 3505 | Valtype addend = Bits<31>::sign_extend32(val); |
| 3506 | Valtype x = (psymval->value(object, addend) | thumb_bit) - address; |
| 3507 | val = Bits<32>::bit_select32(val, x, 0x7fffffffU); |
| 3508 | elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val); |
| 3509 | return (Bits<31>::has_overflow32(x) |
| 3510 | ? This::STATUS_OVERFLOW |
| 3511 | : This::STATUS_OKAY); |
| 3512 | } |
| 3513 | |
| 3514 | // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is ) |
| 3515 | // R_ARM_MOVW_PREL_NC: (S + A) | T - P |
| 3516 | // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S) |
| 3517 | // R_ARM_MOVW_BREL: ((S + A) | T) - B(S) |
| 3518 | static inline typename This::Status |
| 3519 | movw(unsigned char* view, |
| 3520 | const Sized_relobj_file<32, big_endian>* object, |
| 3521 | const Symbol_value<32>* psymval, |
| 3522 | Arm_address relative_address_base, |
| 3523 | Arm_address thumb_bit, |
| 3524 | bool check_overflow) |
| 3525 | { |
| 3526 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3527 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3528 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3529 | Valtype addend = This::extract_arm_movw_movt_addend(val); |
| 3530 | Valtype x = ((psymval->value(object, addend) | thumb_bit) |
| 3531 | - relative_address_base); |
| 3532 | val = This::insert_val_arm_movw_movt(val, x); |
| 3533 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 3534 | return ((check_overflow && Bits<16>::has_overflow32(x)) |
| 3535 | ? This::STATUS_OVERFLOW |
| 3536 | : This::STATUS_OKAY); |
| 3537 | } |
| 3538 | |
| 3539 | // R_ARM_MOVT_ABS: S + A (relative address base is 0) |
| 3540 | // R_ARM_MOVT_PREL: S + A - P |
| 3541 | // R_ARM_MOVT_BREL: S + A - B(S) |
| 3542 | static inline typename This::Status |
| 3543 | movt(unsigned char* view, |
| 3544 | const Sized_relobj_file<32, big_endian>* object, |
| 3545 | const Symbol_value<32>* psymval, |
| 3546 | Arm_address relative_address_base) |
| 3547 | { |
| 3548 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3549 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3550 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3551 | Valtype addend = This::extract_arm_movw_movt_addend(val); |
| 3552 | Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16; |
| 3553 | val = This::insert_val_arm_movw_movt(val, x); |
| 3554 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 3555 | // FIXME: IHI0044D says that we should check for overflow. |
| 3556 | return This::STATUS_OKAY; |
| 3557 | } |
| 3558 | |
| 3559 | // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0) |
| 3560 | // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P |
| 3561 | // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S) |
| 3562 | // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S) |
| 3563 | static inline typename This::Status |
| 3564 | thm_movw(unsigned char* view, |
| 3565 | const Sized_relobj_file<32, big_endian>* object, |
| 3566 | const Symbol_value<32>* psymval, |
| 3567 | Arm_address relative_address_base, |
| 3568 | Arm_address thumb_bit, |
| 3569 | bool check_overflow) |
| 3570 | { |
| 3571 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3572 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3573 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3574 | Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) |
| 3575 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 3576 | Reltype addend = This::extract_thumb_movw_movt_addend(val); |
| 3577 | Reltype x = |
| 3578 | (psymval->value(object, addend) | thumb_bit) - relative_address_base; |
| 3579 | val = This::insert_val_thumb_movw_movt(val, x); |
| 3580 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); |
| 3581 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); |
| 3582 | return ((check_overflow && Bits<16>::has_overflow32(x)) |
| 3583 | ? This::STATUS_OVERFLOW |
| 3584 | : This::STATUS_OKAY); |
| 3585 | } |
| 3586 | |
| 3587 | // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0) |
| 3588 | // R_ARM_THM_MOVT_PREL: S + A - P |
| 3589 | // R_ARM_THM_MOVT_BREL: S + A - B(S) |
| 3590 | static inline typename This::Status |
| 3591 | thm_movt(unsigned char* view, |
| 3592 | const Sized_relobj_file<32, big_endian>* object, |
| 3593 | const Symbol_value<32>* psymval, |
| 3594 | Arm_address relative_address_base) |
| 3595 | { |
| 3596 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3597 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3598 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3599 | Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) |
| 3600 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 3601 | Reltype addend = This::extract_thumb_movw_movt_addend(val); |
| 3602 | Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16; |
| 3603 | val = This::insert_val_thumb_movw_movt(val, x); |
| 3604 | elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); |
| 3605 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); |
| 3606 | return This::STATUS_OKAY; |
| 3607 | } |
| 3608 | |
| 3609 | // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32) |
| 3610 | static inline typename This::Status |
| 3611 | thm_alu11(unsigned char* view, |
| 3612 | const Sized_relobj_file<32, big_endian>* object, |
| 3613 | const Symbol_value<32>* psymval, |
| 3614 | Arm_address address, |
| 3615 | Arm_address thumb_bit) |
| 3616 | { |
| 3617 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3618 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3619 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3620 | Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) |
| 3621 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 3622 | |
| 3623 | // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0 |
| 3624 | // ----------------------------------------------------------------------- |
| 3625 | // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8 |
| 3626 | // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8 |
| 3627 | // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8 |
| 3628 | // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8 |
| 3629 | // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8 |
| 3630 | // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8 |
| 3631 | |
| 3632 | // Determine a sign for the addend. |
| 3633 | const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000 |
| 3634 | || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1; |
| 3635 | // Thumb2 addend encoding: |
| 3636 | // imm12 := i | imm3 | imm8 |
| 3637 | int32_t addend = (insn & 0xff) |
| 3638 | | ((insn & 0x00007000) >> 4) |
| 3639 | | ((insn & 0x04000000) >> 15); |
| 3640 | // Apply a sign to the added. |
| 3641 | addend *= sign; |
| 3642 | |
| 3643 | int32_t x = (psymval->value(object, addend) | thumb_bit) |
| 3644 | - (address & 0xfffffffc); |
| 3645 | Reltype val = abs(x); |
| 3646 | // Mask out the value and a distinct part of the ADD/SUB opcode |
| 3647 | // (bits 7:5 of opword). |
| 3648 | insn = (insn & 0xfb0f8f00) |
| 3649 | | (val & 0xff) |
| 3650 | | ((val & 0x700) << 4) |
| 3651 | | ((val & 0x800) << 15); |
| 3652 | // Set the opcode according to whether the value to go in the |
| 3653 | // place is negative. |
| 3654 | if (x < 0) |
| 3655 | insn |= 0x00a00000; |
| 3656 | |
| 3657 | elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); |
| 3658 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); |
| 3659 | return ((val > 0xfff) ? |
| 3660 | This::STATUS_OVERFLOW : This::STATUS_OKAY); |
| 3661 | } |
| 3662 | |
| 3663 | // R_ARM_THM_PC8: S + A - Pa (Thumb) |
| 3664 | static inline typename This::Status |
| 3665 | thm_pc8(unsigned char* view, |
| 3666 | const Sized_relobj_file<32, big_endian>* object, |
| 3667 | const Symbol_value<32>* psymval, |
| 3668 | Arm_address address) |
| 3669 | { |
| 3670 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3671 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; |
| 3672 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3673 | Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 3674 | Reltype addend = ((insn & 0x00ff) << 2); |
| 3675 | int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); |
| 3676 | Reltype val = abs(x); |
| 3677 | insn = (insn & 0xff00) | ((val & 0x03fc) >> 2); |
| 3678 | |
| 3679 | elfcpp::Swap<16, big_endian>::writeval(wv, insn); |
| 3680 | return ((val > 0x03fc) |
| 3681 | ? This::STATUS_OVERFLOW |
| 3682 | : This::STATUS_OKAY); |
| 3683 | } |
| 3684 | |
| 3685 | // R_ARM_THM_PC12: S + A - Pa (Thumb32) |
| 3686 | static inline typename This::Status |
| 3687 | thm_pc12(unsigned char* view, |
| 3688 | const Sized_relobj_file<32, big_endian>* object, |
| 3689 | const Symbol_value<32>* psymval, |
| 3690 | Arm_address address) |
| 3691 | { |
| 3692 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 3693 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; |
| 3694 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3695 | Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) |
| 3696 | | elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 3697 | // Determine a sign for the addend (positive if the U bit is 1). |
| 3698 | const int sign = (insn & 0x00800000) ? 1 : -1; |
| 3699 | int32_t addend = (insn & 0xfff); |
| 3700 | // Apply a sign to the added. |
| 3701 | addend *= sign; |
| 3702 | |
| 3703 | int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); |
| 3704 | Reltype val = abs(x); |
| 3705 | // Mask out and apply the value and the U bit. |
| 3706 | insn = (insn & 0xff7ff000) | (val & 0xfff); |
| 3707 | // Set the U bit according to whether the value to go in the |
| 3708 | // place is positive. |
| 3709 | if (x >= 0) |
| 3710 | insn |= 0x00800000; |
| 3711 | |
| 3712 | elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); |
| 3713 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); |
| 3714 | return ((val > 0xfff) ? |
| 3715 | This::STATUS_OVERFLOW : This::STATUS_OKAY); |
| 3716 | } |
| 3717 | |
| 3718 | // R_ARM_V4BX |
| 3719 | static inline typename This::Status |
| 3720 | v4bx(const Relocate_info<32, big_endian>* relinfo, |
| 3721 | unsigned char* view, |
| 3722 | const Arm_relobj<big_endian>* object, |
| 3723 | const Arm_address address, |
| 3724 | const bool is_interworking) |
| 3725 | { |
| 3726 | |
| 3727 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3728 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3729 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3730 | |
| 3731 | // Ensure that we have a BX instruction. |
| 3732 | gold_assert((val & 0x0ffffff0) == 0x012fff10); |
| 3733 | const uint32_t reg = (val & 0xf); |
| 3734 | if (is_interworking && reg != 0xf) |
| 3735 | { |
| 3736 | Stub_table<big_endian>* stub_table = |
| 3737 | object->stub_table(relinfo->data_shndx); |
| 3738 | gold_assert(stub_table != NULL); |
| 3739 | |
| 3740 | Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg); |
| 3741 | gold_assert(stub != NULL); |
| 3742 | |
| 3743 | int32_t veneer_address = |
| 3744 | stub_table->address() + stub->offset() - 8 - address; |
| 3745 | gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET) |
| 3746 | && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET)); |
| 3747 | // Replace with a branch to veneer (B <addr>) |
| 3748 | val = (val & 0xf0000000) | 0x0a000000 |
| 3749 | | ((veneer_address >> 2) & 0x00ffffff); |
| 3750 | } |
| 3751 | else |
| 3752 | { |
| 3753 | // Preserve Rm (lowest four bits) and the condition code |
| 3754 | // (highest four bits). Other bits encode MOV PC,Rm. |
| 3755 | val = (val & 0xf000000f) | 0x01a0f000; |
| 3756 | } |
| 3757 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 3758 | return This::STATUS_OKAY; |
| 3759 | } |
| 3760 | |
| 3761 | // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P |
| 3762 | // R_ARM_ALU_PC_G0: ((S + A) | T) - P |
| 3763 | // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P |
| 3764 | // R_ARM_ALU_PC_G1: ((S + A) | T) - P |
| 3765 | // R_ARM_ALU_PC_G2: ((S + A) | T) - P |
| 3766 | // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S) |
| 3767 | // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S) |
| 3768 | // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S) |
| 3769 | // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S) |
| 3770 | // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) |
| 3771 | static inline typename This::Status |
| 3772 | arm_grp_alu(unsigned char* view, |
| 3773 | const Sized_relobj_file<32, big_endian>* object, |
| 3774 | const Symbol_value<32>* psymval, |
| 3775 | const int group, |
| 3776 | Arm_address address, |
| 3777 | Arm_address thumb_bit, |
| 3778 | bool check_overflow) |
| 3779 | { |
| 3780 | gold_assert(group >= 0 && group < 3); |
| 3781 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3782 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3783 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3784 | |
| 3785 | // ALU group relocations are allowed only for the ADD/SUB instructions. |
| 3786 | // (0x00800000 - ADD, 0x00400000 - SUB) |
| 3787 | const Valtype opcode = insn & 0x01e00000; |
| 3788 | if (opcode != 0x00800000 && opcode != 0x00400000) |
| 3789 | return This::STATUS_BAD_RELOC; |
| 3790 | |
| 3791 | // Determine a sign for the addend. |
| 3792 | const int sign = (opcode == 0x00800000) ? 1 : -1; |
| 3793 | // shifter = rotate_imm * 2 |
| 3794 | const uint32_t shifter = (insn & 0xf00) >> 7; |
| 3795 | // Initial addend value. |
| 3796 | int32_t addend = insn & 0xff; |
| 3797 | // Rotate addend right by shifter. |
| 3798 | addend = (addend >> shifter) | (addend << (32 - shifter)); |
| 3799 | // Apply a sign to the added. |
| 3800 | addend *= sign; |
| 3801 | |
| 3802 | int32_t x = ((psymval->value(object, addend) | thumb_bit) - address); |
| 3803 | Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group); |
| 3804 | // Check for overflow if required |
| 3805 | if (check_overflow |
| 3806 | && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0)) |
| 3807 | return This::STATUS_OVERFLOW; |
| 3808 | |
| 3809 | // Mask out the value and the ADD/SUB part of the opcode; take care |
| 3810 | // not to destroy the S bit. |
| 3811 | insn &= 0xff1ff000; |
| 3812 | // Set the opcode according to whether the value to go in the |
| 3813 | // place is negative. |
| 3814 | insn |= ((x < 0) ? 0x00400000 : 0x00800000); |
| 3815 | // Encode the offset (encoded Gn). |
| 3816 | insn |= gn; |
| 3817 | |
| 3818 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); |
| 3819 | return This::STATUS_OKAY; |
| 3820 | } |
| 3821 | |
| 3822 | // R_ARM_LDR_PC_G0: S + A - P |
| 3823 | // R_ARM_LDR_PC_G1: S + A - P |
| 3824 | // R_ARM_LDR_PC_G2: S + A - P |
| 3825 | // R_ARM_LDR_SB_G0: S + A - B(S) |
| 3826 | // R_ARM_LDR_SB_G1: S + A - B(S) |
| 3827 | // R_ARM_LDR_SB_G2: S + A - B(S) |
| 3828 | static inline typename This::Status |
| 3829 | arm_grp_ldr(unsigned char* view, |
| 3830 | const Sized_relobj_file<32, big_endian>* object, |
| 3831 | const Symbol_value<32>* psymval, |
| 3832 | const int group, |
| 3833 | Arm_address address) |
| 3834 | { |
| 3835 | gold_assert(group >= 0 && group < 3); |
| 3836 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3837 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3838 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3839 | |
| 3840 | const int sign = (insn & 0x00800000) ? 1 : -1; |
| 3841 | int32_t addend = (insn & 0xfff) * sign; |
| 3842 | int32_t x = (psymval->value(object, addend) - address); |
| 3843 | // Calculate the relevant G(n-1) value to obtain this stage residual. |
| 3844 | Valtype residual = |
| 3845 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); |
| 3846 | if (residual >= 0x1000) |
| 3847 | return This::STATUS_OVERFLOW; |
| 3848 | |
| 3849 | // Mask out the value and U bit. |
| 3850 | insn &= 0xff7ff000; |
| 3851 | // Set the U bit for non-negative values. |
| 3852 | if (x >= 0) |
| 3853 | insn |= 0x00800000; |
| 3854 | insn |= residual; |
| 3855 | |
| 3856 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); |
| 3857 | return This::STATUS_OKAY; |
| 3858 | } |
| 3859 | |
| 3860 | // R_ARM_LDRS_PC_G0: S + A - P |
| 3861 | // R_ARM_LDRS_PC_G1: S + A - P |
| 3862 | // R_ARM_LDRS_PC_G2: S + A - P |
| 3863 | // R_ARM_LDRS_SB_G0: S + A - B(S) |
| 3864 | // R_ARM_LDRS_SB_G1: S + A - B(S) |
| 3865 | // R_ARM_LDRS_SB_G2: S + A - B(S) |
| 3866 | static inline typename This::Status |
| 3867 | arm_grp_ldrs(unsigned char* view, |
| 3868 | const Sized_relobj_file<32, big_endian>* object, |
| 3869 | const Symbol_value<32>* psymval, |
| 3870 | const int group, |
| 3871 | Arm_address address) |
| 3872 | { |
| 3873 | gold_assert(group >= 0 && group < 3); |
| 3874 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3875 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3876 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3877 | |
| 3878 | const int sign = (insn & 0x00800000) ? 1 : -1; |
| 3879 | int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign; |
| 3880 | int32_t x = (psymval->value(object, addend) - address); |
| 3881 | // Calculate the relevant G(n-1) value to obtain this stage residual. |
| 3882 | Valtype residual = |
| 3883 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); |
| 3884 | if (residual >= 0x100) |
| 3885 | return This::STATUS_OVERFLOW; |
| 3886 | |
| 3887 | // Mask out the value and U bit. |
| 3888 | insn &= 0xff7ff0f0; |
| 3889 | // Set the U bit for non-negative values. |
| 3890 | if (x >= 0) |
| 3891 | insn |= 0x00800000; |
| 3892 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); |
| 3893 | |
| 3894 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); |
| 3895 | return This::STATUS_OKAY; |
| 3896 | } |
| 3897 | |
| 3898 | // R_ARM_LDC_PC_G0: S + A - P |
| 3899 | // R_ARM_LDC_PC_G1: S + A - P |
| 3900 | // R_ARM_LDC_PC_G2: S + A - P |
| 3901 | // R_ARM_LDC_SB_G0: S + A - B(S) |
| 3902 | // R_ARM_LDC_SB_G1: S + A - B(S) |
| 3903 | // R_ARM_LDC_SB_G2: S + A - B(S) |
| 3904 | static inline typename This::Status |
| 3905 | arm_grp_ldc(unsigned char* view, |
| 3906 | const Sized_relobj_file<32, big_endian>* object, |
| 3907 | const Symbol_value<32>* psymval, |
| 3908 | const int group, |
| 3909 | Arm_address address) |
| 3910 | { |
| 3911 | gold_assert(group >= 0 && group < 3); |
| 3912 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3913 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3914 | Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3915 | |
| 3916 | const int sign = (insn & 0x00800000) ? 1 : -1; |
| 3917 | int32_t addend = ((insn & 0xff) << 2) * sign; |
| 3918 | int32_t x = (psymval->value(object, addend) - address); |
| 3919 | // Calculate the relevant G(n-1) value to obtain this stage residual. |
| 3920 | Valtype residual = |
| 3921 | Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); |
| 3922 | if ((residual & 0x3) != 0 || residual >= 0x400) |
| 3923 | return This::STATUS_OVERFLOW; |
| 3924 | |
| 3925 | // Mask out the value and U bit. |
| 3926 | insn &= 0xff7fff00; |
| 3927 | // Set the U bit for non-negative values. |
| 3928 | if (x >= 0) |
| 3929 | insn |= 0x00800000; |
| 3930 | insn |= (residual >> 2); |
| 3931 | |
| 3932 | elfcpp::Swap<32, big_endian>::writeval(wv, insn); |
| 3933 | return This::STATUS_OKAY; |
| 3934 | } |
| 3935 | }; |
| 3936 | |
| 3937 | // Relocate ARM long branches. This handles relocation types |
| 3938 | // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25. |
| 3939 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly |
| 3940 | // undefined and we do not use PLT in this relocation. In such a case, |
| 3941 | // the branch is converted into an NOP. |
| 3942 | |
| 3943 | template<bool big_endian> |
| 3944 | typename Arm_relocate_functions<big_endian>::Status |
| 3945 | Arm_relocate_functions<big_endian>::arm_branch_common( |
| 3946 | unsigned int r_type, |
| 3947 | const Relocate_info<32, big_endian>* relinfo, |
| 3948 | unsigned char* view, |
| 3949 | const Sized_symbol<32>* gsym, |
| 3950 | const Arm_relobj<big_endian>* object, |
| 3951 | unsigned int r_sym, |
| 3952 | const Symbol_value<32>* psymval, |
| 3953 | Arm_address address, |
| 3954 | Arm_address thumb_bit, |
| 3955 | bool is_weakly_undefined_without_plt) |
| 3956 | { |
| 3957 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 3958 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 3959 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 3960 | |
| 3961 | bool insn_is_b = (((val >> 28) & 0xf) <= 0xe) |
| 3962 | && ((val & 0x0f000000UL) == 0x0a000000UL); |
| 3963 | bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL; |
| 3964 | bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe) |
| 3965 | && ((val & 0x0f000000UL) == 0x0b000000UL); |
| 3966 | bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL; |
| 3967 | bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL; |
| 3968 | |
| 3969 | // Check that the instruction is valid. |
| 3970 | if (r_type == elfcpp::R_ARM_CALL) |
| 3971 | { |
| 3972 | if (!insn_is_uncond_bl && !insn_is_blx) |
| 3973 | return This::STATUS_BAD_RELOC; |
| 3974 | } |
| 3975 | else if (r_type == elfcpp::R_ARM_JUMP24) |
| 3976 | { |
| 3977 | if (!insn_is_b && !insn_is_cond_bl) |
| 3978 | return This::STATUS_BAD_RELOC; |
| 3979 | } |
| 3980 | else if (r_type == elfcpp::R_ARM_PLT32) |
| 3981 | { |
| 3982 | if (!insn_is_any_branch) |
| 3983 | return This::STATUS_BAD_RELOC; |
| 3984 | } |
| 3985 | else if (r_type == elfcpp::R_ARM_XPC25) |
| 3986 | { |
| 3987 | // FIXME: AAELF document IH0044C does not say much about it other |
| 3988 | // than it being obsolete. |
| 3989 | if (!insn_is_any_branch) |
| 3990 | return This::STATUS_BAD_RELOC; |
| 3991 | } |
| 3992 | else |
| 3993 | gold_unreachable(); |
| 3994 | |
| 3995 | // A branch to an undefined weak symbol is turned into a jump to |
| 3996 | // the next instruction unless a PLT entry will be created. |
| 3997 | // Do the same for local undefined symbols. |
| 3998 | // The jump to the next instruction is optimized as a NOP depending |
| 3999 | // on the architecture. |
| 4000 | const Target_arm<big_endian>* arm_target = |
| 4001 | Target_arm<big_endian>::default_target(); |
| 4002 | if (is_weakly_undefined_without_plt) |
| 4003 | { |
| 4004 | gold_assert(!parameters->options().relocatable()); |
| 4005 | Valtype cond = val & 0xf0000000U; |
| 4006 | if (arm_target->may_use_arm_nop()) |
| 4007 | val = cond | 0x0320f000; |
| 4008 | else |
| 4009 | val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0. |
| 4010 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 4011 | return This::STATUS_OKAY; |
| 4012 | } |
| 4013 | |
| 4014 | Valtype addend = Bits<26>::sign_extend32(val << 2); |
| 4015 | Valtype branch_target = psymval->value(object, addend); |
| 4016 | int32_t branch_offset = branch_target - address; |
| 4017 | |
| 4018 | // We need a stub if the branch offset is too large or if we need |
| 4019 | // to switch mode. |
| 4020 | bool may_use_blx = arm_target->may_use_v5t_interworking(); |
| 4021 | Reloc_stub* stub = NULL; |
| 4022 | |
| 4023 | if (!parameters->options().relocatable() |
| 4024 | && (Bits<26>::has_overflow32(branch_offset) |
| 4025 | || ((thumb_bit != 0) |
| 4026 | && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))) |
| 4027 | { |
| 4028 | Valtype unadjusted_branch_target = psymval->value(object, 0); |
| 4029 | |
| 4030 | Stub_type stub_type = |
| 4031 | Reloc_stub::stub_type_for_reloc(r_type, address, |
| 4032 | unadjusted_branch_target, |
| 4033 | (thumb_bit != 0)); |
| 4034 | if (stub_type != arm_stub_none) |
| 4035 | { |
| 4036 | Stub_table<big_endian>* stub_table = |
| 4037 | object->stub_table(relinfo->data_shndx); |
| 4038 | gold_assert(stub_table != NULL); |
| 4039 | |
| 4040 | Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); |
| 4041 | stub = stub_table->find_reloc_stub(stub_key); |
| 4042 | gold_assert(stub != NULL); |
| 4043 | thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; |
| 4044 | branch_target = stub_table->address() + stub->offset() + addend; |
| 4045 | branch_offset = branch_target - address; |
| 4046 | gold_assert(!Bits<26>::has_overflow32(branch_offset)); |
| 4047 | } |
| 4048 | } |
| 4049 | |
| 4050 | // At this point, if we still need to switch mode, the instruction |
| 4051 | // must either be a BLX or a BL that can be converted to a BLX. |
| 4052 | if (thumb_bit != 0) |
| 4053 | { |
| 4054 | // Turn BL to BLX. |
| 4055 | gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL); |
| 4056 | val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23); |
| 4057 | } |
| 4058 | |
| 4059 | val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL); |
| 4060 | elfcpp::Swap<32, big_endian>::writeval(wv, val); |
| 4061 | return (Bits<26>::has_overflow32(branch_offset) |
| 4062 | ? This::STATUS_OVERFLOW |
| 4063 | : This::STATUS_OKAY); |
| 4064 | } |
| 4065 | |
| 4066 | // Relocate THUMB long branches. This handles relocation types |
| 4067 | // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22. |
| 4068 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly |
| 4069 | // undefined and we do not use PLT in this relocation. In such a case, |
| 4070 | // the branch is converted into an NOP. |
| 4071 | |
| 4072 | template<bool big_endian> |
| 4073 | typename Arm_relocate_functions<big_endian>::Status |
| 4074 | Arm_relocate_functions<big_endian>::thumb_branch_common( |
| 4075 | unsigned int r_type, |
| 4076 | const Relocate_info<32, big_endian>* relinfo, |
| 4077 | unsigned char* view, |
| 4078 | const Sized_symbol<32>* gsym, |
| 4079 | const Arm_relobj<big_endian>* object, |
| 4080 | unsigned int r_sym, |
| 4081 | const Symbol_value<32>* psymval, |
| 4082 | Arm_address address, |
| 4083 | Arm_address thumb_bit, |
| 4084 | bool is_weakly_undefined_without_plt) |
| 4085 | { |
| 4086 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 4087 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 4088 | uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 4089 | uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 4090 | |
| 4091 | // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference |
| 4092 | // into account. |
| 4093 | bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U; |
| 4094 | bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U; |
| 4095 | |
| 4096 | // Check that the instruction is valid. |
| 4097 | if (r_type == elfcpp::R_ARM_THM_CALL) |
| 4098 | { |
| 4099 | if (!is_bl_insn && !is_blx_insn) |
| 4100 | return This::STATUS_BAD_RELOC; |
| 4101 | } |
| 4102 | else if (r_type == elfcpp::R_ARM_THM_JUMP24) |
| 4103 | { |
| 4104 | // This cannot be a BLX. |
| 4105 | if (!is_bl_insn) |
| 4106 | return This::STATUS_BAD_RELOC; |
| 4107 | } |
| 4108 | else if (r_type == elfcpp::R_ARM_THM_XPC22) |
| 4109 | { |
| 4110 | // Check for Thumb to Thumb call. |
| 4111 | if (!is_blx_insn) |
| 4112 | return This::STATUS_BAD_RELOC; |
| 4113 | if (thumb_bit != 0) |
| 4114 | { |
| 4115 | gold_warning(_("%s: Thumb BLX instruction targets " |
| 4116 | "thumb function '%s'."), |
| 4117 | object->name().c_str(), |
| 4118 | (gsym ? gsym->name() : "(local)")); |
| 4119 | // Convert BLX to BL. |
| 4120 | lower_insn |= 0x1000U; |
| 4121 | } |
| 4122 | } |
| 4123 | else |
| 4124 | gold_unreachable(); |
| 4125 | |
| 4126 | // A branch to an undefined weak symbol is turned into a jump to |
| 4127 | // the next instruction unless a PLT entry will be created. |
| 4128 | // The jump to the next instruction is optimized as a NOP.W for |
| 4129 | // Thumb-2 enabled architectures. |
| 4130 | const Target_arm<big_endian>* arm_target = |
| 4131 | Target_arm<big_endian>::default_target(); |
| 4132 | if (is_weakly_undefined_without_plt) |
| 4133 | { |
| 4134 | gold_assert(!parameters->options().relocatable()); |
| 4135 | if (arm_target->may_use_thumb2_nop()) |
| 4136 | { |
| 4137 | elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af); |
| 4138 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000); |
| 4139 | } |
| 4140 | else |
| 4141 | { |
| 4142 | elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000); |
| 4143 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00); |
| 4144 | } |
| 4145 | return This::STATUS_OKAY; |
| 4146 | } |
| 4147 | |
| 4148 | int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn); |
| 4149 | Arm_address branch_target = psymval->value(object, addend); |
| 4150 | |
| 4151 | // For BLX, bit 1 of target address comes from bit 1 of base address. |
| 4152 | bool may_use_blx = arm_target->may_use_v5t_interworking(); |
| 4153 | if (thumb_bit == 0 && may_use_blx) |
| 4154 | branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); |
| 4155 | |
| 4156 | int32_t branch_offset = branch_target - address; |
| 4157 | |
| 4158 | // We need a stub if the branch offset is too large or if we need |
| 4159 | // to switch mode. |
| 4160 | bool thumb2 = arm_target->using_thumb2(); |
| 4161 | if (!parameters->options().relocatable() |
| 4162 | && ((!thumb2 && Bits<23>::has_overflow32(branch_offset)) |
| 4163 | || (thumb2 && Bits<25>::has_overflow32(branch_offset)) |
| 4164 | || ((thumb_bit == 0) |
| 4165 | && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) |
| 4166 | || r_type == elfcpp::R_ARM_THM_JUMP24)))) |
| 4167 | { |
| 4168 | Arm_address unadjusted_branch_target = psymval->value(object, 0); |
| 4169 | |
| 4170 | Stub_type stub_type = |
| 4171 | Reloc_stub::stub_type_for_reloc(r_type, address, |
| 4172 | unadjusted_branch_target, |
| 4173 | (thumb_bit != 0)); |
| 4174 | |
| 4175 | if (stub_type != arm_stub_none) |
| 4176 | { |
| 4177 | Stub_table<big_endian>* stub_table = |
| 4178 | object->stub_table(relinfo->data_shndx); |
| 4179 | gold_assert(stub_table != NULL); |
| 4180 | |
| 4181 | Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); |
| 4182 | Reloc_stub* stub = stub_table->find_reloc_stub(stub_key); |
| 4183 | gold_assert(stub != NULL); |
| 4184 | thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; |
| 4185 | branch_target = stub_table->address() + stub->offset() + addend; |
| 4186 | if (thumb_bit == 0 && may_use_blx) |
| 4187 | branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); |
| 4188 | branch_offset = branch_target - address; |
| 4189 | } |
| 4190 | } |
| 4191 | |
| 4192 | // At this point, if we still need to switch mode, the instruction |
| 4193 | // must either be a BLX or a BL that can be converted to a BLX. |
| 4194 | if (thumb_bit == 0) |
| 4195 | { |
| 4196 | gold_assert(may_use_blx |
| 4197 | && (r_type == elfcpp::R_ARM_THM_CALL |
| 4198 | || r_type == elfcpp::R_ARM_THM_XPC22)); |
| 4199 | // Make sure this is a BLX. |
| 4200 | lower_insn &= ~0x1000U; |
| 4201 | } |
| 4202 | else |
| 4203 | { |
| 4204 | // Make sure this is a BL. |
| 4205 | lower_insn |= 0x1000U; |
| 4206 | } |
| 4207 | |
| 4208 | // For a BLX instruction, make sure that the relocation is rounded up |
| 4209 | // to a word boundary. This follows the semantics of the instruction |
| 4210 | // which specifies that bit 1 of the target address will come from bit |
| 4211 | // 1 of the base address. |
| 4212 | if ((lower_insn & 0x5000U) == 0x4000U) |
| 4213 | gold_assert((branch_offset & 3) == 0); |
| 4214 | |
| 4215 | // Put BRANCH_OFFSET back into the insn. Assumes two's complement. |
| 4216 | // We use the Thumb-2 encoding, which is safe even if dealing with |
| 4217 | // a Thumb-1 instruction by virtue of our overflow check above. */ |
| 4218 | upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset); |
| 4219 | lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset); |
| 4220 | |
| 4221 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); |
| 4222 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); |
| 4223 | |
| 4224 | gold_assert(!Bits<25>::has_overflow32(branch_offset)); |
| 4225 | |
| 4226 | return ((thumb2 |
| 4227 | ? Bits<25>::has_overflow32(branch_offset) |
| 4228 | : Bits<23>::has_overflow32(branch_offset)) |
| 4229 | ? This::STATUS_OVERFLOW |
| 4230 | : This::STATUS_OKAY); |
| 4231 | } |
| 4232 | |
| 4233 | // Relocate THUMB-2 long conditional branches. |
| 4234 | // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly |
| 4235 | // undefined and we do not use PLT in this relocation. In such a case, |
| 4236 | // the branch is converted into an NOP. |
| 4237 | |
| 4238 | template<bool big_endian> |
| 4239 | typename Arm_relocate_functions<big_endian>::Status |
| 4240 | Arm_relocate_functions<big_endian>::thm_jump19( |
| 4241 | unsigned char* view, |
| 4242 | const Arm_relobj<big_endian>* object, |
| 4243 | const Symbol_value<32>* psymval, |
| 4244 | Arm_address address, |
| 4245 | Arm_address thumb_bit) |
| 4246 | { |
| 4247 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 4248 | Valtype* wv = reinterpret_cast<Valtype*>(view); |
| 4249 | uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 4250 | uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 4251 | int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn); |
| 4252 | |
| 4253 | Arm_address branch_target = psymval->value(object, addend); |
| 4254 | int32_t branch_offset = branch_target - address; |
| 4255 | |
| 4256 | // ??? Should handle interworking? GCC might someday try to |
| 4257 | // use this for tail calls. |
| 4258 | // FIXME: We do support thumb entry to PLT yet. |
| 4259 | if (thumb_bit == 0) |
| 4260 | { |
| 4261 | gold_error(_("conditional branch to PLT in THUMB-2 not supported yet.")); |
| 4262 | return This::STATUS_BAD_RELOC; |
| 4263 | } |
| 4264 | |
| 4265 | // Put RELOCATION back into the insn. |
| 4266 | upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset); |
| 4267 | lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset); |
| 4268 | |
| 4269 | // Put the relocated value back in the object file: |
| 4270 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); |
| 4271 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); |
| 4272 | |
| 4273 | return (Bits<21>::has_overflow32(branch_offset) |
| 4274 | ? This::STATUS_OVERFLOW |
| 4275 | : This::STATUS_OKAY); |
| 4276 | } |
| 4277 | |
| 4278 | // Get the GOT section, creating it if necessary. |
| 4279 | |
| 4280 | template<bool big_endian> |
| 4281 | Arm_output_data_got<big_endian>* |
| 4282 | Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout) |
| 4283 | { |
| 4284 | if (this->got_ == NULL) |
| 4285 | { |
| 4286 | gold_assert(symtab != NULL && layout != NULL); |
| 4287 | |
| 4288 | // When using -z now, we can treat .got as a relro section. |
| 4289 | // Without -z now, it is modified after program startup by lazy |
| 4290 | // PLT relocations. |
| 4291 | bool is_got_relro = parameters->options().now(); |
| 4292 | Output_section_order got_order = (is_got_relro |
| 4293 | ? ORDER_RELRO_LAST |
| 4294 | : ORDER_DATA); |
| 4295 | |
| 4296 | // Unlike some targets (.e.g x86), ARM does not use separate .got and |
| 4297 | // .got.plt sections in output. The output .got section contains both |
| 4298 | // PLT and non-PLT GOT entries. |
| 4299 | this->got_ = new Arm_output_data_got<big_endian>(symtab, layout); |
| 4300 | |
| 4301 | layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, |
| 4302 | (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), |
| 4303 | this->got_, got_order, is_got_relro); |
| 4304 | |
| 4305 | // The old GNU linker creates a .got.plt section. We just |
| 4306 | // create another set of data in the .got section. Note that we |
| 4307 | // always create a PLT if we create a GOT, although the PLT |
| 4308 | // might be empty. |
| 4309 | this->got_plt_ = new Output_data_space(4, "** GOT PLT"); |
| 4310 | layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, |
| 4311 | (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), |
| 4312 | this->got_plt_, got_order, is_got_relro); |
| 4313 | |
| 4314 | // The first three entries are reserved. |
| 4315 | this->got_plt_->set_current_data_size(3 * 4); |
| 4316 | |
| 4317 | // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. |
| 4318 | symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, |
| 4319 | Symbol_table::PREDEFINED, |
| 4320 | this->got_plt_, |
| 4321 | 0, 0, elfcpp::STT_OBJECT, |
| 4322 | elfcpp::STB_LOCAL, |
| 4323 | elfcpp::STV_HIDDEN, 0, |
| 4324 | false, false); |
| 4325 | |
| 4326 | // If there are any IRELATIVE relocations, they get GOT entries |
| 4327 | // in .got.plt after the jump slot entries. |
| 4328 | this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT"); |
| 4329 | layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, |
| 4330 | (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), |
| 4331 | this->got_irelative_, |
| 4332 | got_order, is_got_relro); |
| 4333 | |
| 4334 | } |
| 4335 | return this->got_; |
| 4336 | } |
| 4337 | |
| 4338 | // Get the dynamic reloc section, creating it if necessary. |
| 4339 | |
| 4340 | template<bool big_endian> |
| 4341 | typename Target_arm<big_endian>::Reloc_section* |
| 4342 | Target_arm<big_endian>::rel_dyn_section(Layout* layout) |
| 4343 | { |
| 4344 | if (this->rel_dyn_ == NULL) |
| 4345 | { |
| 4346 | gold_assert(layout != NULL); |
| 4347 | // Create both relocation sections in the same place, so as to ensure |
| 4348 | // their relative order in the output section. |
| 4349 | this->rel_dyn_ = new Reloc_section(parameters->options().combreloc()); |
| 4350 | this->rel_irelative_ = new Reloc_section(false); |
| 4351 | layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, |
| 4352 | elfcpp::SHF_ALLOC, this->rel_dyn_, |
| 4353 | ORDER_DYNAMIC_RELOCS, false); |
| 4354 | layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, |
| 4355 | elfcpp::SHF_ALLOC, this->rel_irelative_, |
| 4356 | ORDER_DYNAMIC_RELOCS, false); |
| 4357 | } |
| 4358 | return this->rel_dyn_; |
| 4359 | } |
| 4360 | |
| 4361 | |
| 4362 | // Get the section to use for IRELATIVE relocs, creating it if necessary. These |
| 4363 | // go in .rela.dyn, but only after all other dynamic relocations. They need to |
| 4364 | // follow the other dynamic relocations so that they can refer to global |
| 4365 | // variables initialized by those relocs. |
| 4366 | |
| 4367 | template<bool big_endian> |
| 4368 | typename Target_arm<big_endian>::Reloc_section* |
| 4369 | Target_arm<big_endian>::rel_irelative_section(Layout* layout) |
| 4370 | { |
| 4371 | if (this->rel_irelative_ == NULL) |
| 4372 | { |
| 4373 | // Delegate the creation to rel_dyn_section so as to ensure their order in |
| 4374 | // the output section. |
| 4375 | this->rel_dyn_section(layout); |
| 4376 | gold_assert(this->rel_irelative_ != NULL |
| 4377 | && (this->rel_dyn_->output_section() |
| 4378 | == this->rel_irelative_->output_section())); |
| 4379 | } |
| 4380 | return this->rel_irelative_; |
| 4381 | } |
| 4382 | |
| 4383 | |
| 4384 | // Insn_template methods. |
| 4385 | |
| 4386 | // Return byte size of an instruction template. |
| 4387 | |
| 4388 | size_t |
| 4389 | Insn_template::size() const |
| 4390 | { |
| 4391 | switch (this->type()) |
| 4392 | { |
| 4393 | case THUMB16_TYPE: |
| 4394 | case THUMB16_SPECIAL_TYPE: |
| 4395 | return 2; |
| 4396 | case ARM_TYPE: |
| 4397 | case THUMB32_TYPE: |
| 4398 | case DATA_TYPE: |
| 4399 | return 4; |
| 4400 | default: |
| 4401 | gold_unreachable(); |
| 4402 | } |
| 4403 | } |
| 4404 | |
| 4405 | // Return alignment of an instruction template. |
| 4406 | |
| 4407 | unsigned |
| 4408 | Insn_template::alignment() const |
| 4409 | { |
| 4410 | switch (this->type()) |
| 4411 | { |
| 4412 | case THUMB16_TYPE: |
| 4413 | case THUMB16_SPECIAL_TYPE: |
| 4414 | case THUMB32_TYPE: |
| 4415 | return 2; |
| 4416 | case ARM_TYPE: |
| 4417 | case DATA_TYPE: |
| 4418 | return 4; |
| 4419 | default: |
| 4420 | gold_unreachable(); |
| 4421 | } |
| 4422 | } |
| 4423 | |
| 4424 | // Stub_template methods. |
| 4425 | |
| 4426 | Stub_template::Stub_template( |
| 4427 | Stub_type type, const Insn_template* insns, |
| 4428 | size_t insn_count) |
| 4429 | : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1), |
| 4430 | entry_in_thumb_mode_(false), relocs_() |
| 4431 | { |
| 4432 | off_t offset = 0; |
| 4433 | |
| 4434 | // Compute byte size and alignment of stub template. |
| 4435 | for (size_t i = 0; i < insn_count; i++) |
| 4436 | { |
| 4437 | unsigned insn_alignment = insns[i].alignment(); |
| 4438 | size_t insn_size = insns[i].size(); |
| 4439 | gold_assert((offset & (insn_alignment - 1)) == 0); |
| 4440 | this->alignment_ = std::max(this->alignment_, insn_alignment); |
| 4441 | switch (insns[i].type()) |
| 4442 | { |
| 4443 | case Insn_template::THUMB16_TYPE: |
| 4444 | case Insn_template::THUMB16_SPECIAL_TYPE: |
| 4445 | if (i == 0) |
| 4446 | this->entry_in_thumb_mode_ = true; |
| 4447 | break; |
| 4448 | |
| 4449 | case Insn_template::THUMB32_TYPE: |
| 4450 | if (insns[i].r_type() != elfcpp::R_ARM_NONE) |
| 4451 | this->relocs_.push_back(Reloc(i, offset)); |
| 4452 | if (i == 0) |
| 4453 | this->entry_in_thumb_mode_ = true; |
| 4454 | break; |
| 4455 | |
| 4456 | case Insn_template::ARM_TYPE: |
| 4457 | // Handle cases where the target is encoded within the |
| 4458 | // instruction. |
| 4459 | if (insns[i].r_type() == elfcpp::R_ARM_JUMP24) |
| 4460 | this->relocs_.push_back(Reloc(i, offset)); |
| 4461 | break; |
| 4462 | |
| 4463 | case Insn_template::DATA_TYPE: |
| 4464 | // Entry point cannot be data. |
| 4465 | gold_assert(i != 0); |
| 4466 | this->relocs_.push_back(Reloc(i, offset)); |
| 4467 | break; |
| 4468 | |
| 4469 | default: |
| 4470 | gold_unreachable(); |
| 4471 | } |
| 4472 | offset += insn_size; |
| 4473 | } |
| 4474 | this->size_ = offset; |
| 4475 | } |
| 4476 | |
| 4477 | // Stub methods. |
| 4478 | |
| 4479 | // Template to implement do_write for a specific target endianness. |
| 4480 | |
| 4481 | template<bool big_endian> |
| 4482 | void inline |
| 4483 | Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size) |
| 4484 | { |
| 4485 | const Stub_template* stub_template = this->stub_template(); |
| 4486 | const Insn_template* insns = stub_template->insns(); |
| 4487 | |
| 4488 | // FIXME: We do not handle BE8 encoding yet. |
| 4489 | unsigned char* pov = view; |
| 4490 | for (size_t i = 0; i < stub_template->insn_count(); i++) |
| 4491 | { |
| 4492 | switch (insns[i].type()) |
| 4493 | { |
| 4494 | case Insn_template::THUMB16_TYPE: |
| 4495 | elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff); |
| 4496 | break; |
| 4497 | case Insn_template::THUMB16_SPECIAL_TYPE: |
| 4498 | elfcpp::Swap<16, big_endian>::writeval( |
| 4499 | pov, |
| 4500 | this->thumb16_special(i)); |
| 4501 | break; |
| 4502 | case Insn_template::THUMB32_TYPE: |
| 4503 | { |
| 4504 | uint32_t hi = (insns[i].data() >> 16) & 0xffff; |
| 4505 | uint32_t lo = insns[i].data() & 0xffff; |
| 4506 | elfcpp::Swap<16, big_endian>::writeval(pov, hi); |
| 4507 | elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo); |
| 4508 | } |
| 4509 | break; |
| 4510 | case Insn_template::ARM_TYPE: |
| 4511 | case Insn_template::DATA_TYPE: |
| 4512 | elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data()); |
| 4513 | break; |
| 4514 | default: |
| 4515 | gold_unreachable(); |
| 4516 | } |
| 4517 | pov += insns[i].size(); |
| 4518 | } |
| 4519 | gold_assert(static_cast<section_size_type>(pov - view) == view_size); |
| 4520 | } |
| 4521 | |
| 4522 | // Reloc_stub::Key methods. |
| 4523 | |
| 4524 | // Dump a Key as a string for debugging. |
| 4525 | |
| 4526 | std::string |
| 4527 | Reloc_stub::Key::name() const |
| 4528 | { |
| 4529 | if (this->r_sym_ == invalid_index) |
| 4530 | { |
| 4531 | // Global symbol key name |
| 4532 | // <stub-type>:<symbol name>:<addend>. |
| 4533 | const std::string sym_name = this->u_.symbol->name(); |
| 4534 | // We need to print two hex number and two colons. So just add 100 bytes |
| 4535 | // to the symbol name size. |
| 4536 | size_t len = sym_name.size() + 100; |
| 4537 | char* buffer = new char[len]; |
| 4538 | int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_, |
| 4539 | sym_name.c_str(), this->addend_); |
| 4540 | gold_assert(c > 0 && c < static_cast<int>(len)); |
| 4541 | delete[] buffer; |
| 4542 | return std::string(buffer); |
| 4543 | } |
| 4544 | else |
| 4545 | { |
| 4546 | // local symbol key name |
| 4547 | // <stub-type>:<object>:<r_sym>:<addend>. |
| 4548 | const size_t len = 200; |
| 4549 | char buffer[len]; |
| 4550 | int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_, |
| 4551 | this->u_.relobj, this->r_sym_, this->addend_); |
| 4552 | gold_assert(c > 0 && c < static_cast<int>(len)); |
| 4553 | return std::string(buffer); |
| 4554 | } |
| 4555 | } |
| 4556 | |
| 4557 | // Reloc_stub methods. |
| 4558 | |
| 4559 | // Determine the type of stub needed, if any, for a relocation of R_TYPE at |
| 4560 | // LOCATION to DESTINATION. |
| 4561 | // This code is based on the arm_type_of_stub function in |
| 4562 | // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub |
| 4563 | // class simple. |
| 4564 | |
| 4565 | Stub_type |
| 4566 | Reloc_stub::stub_type_for_reloc( |
| 4567 | unsigned int r_type, |
| 4568 | Arm_address location, |
| 4569 | Arm_address destination, |
| 4570 | bool target_is_thumb) |
| 4571 | { |
| 4572 | Stub_type stub_type = arm_stub_none; |
| 4573 | |
| 4574 | // This is a bit ugly but we want to avoid using a templated class for |
| 4575 | // big and little endianities. |
| 4576 | bool may_use_blx; |
| 4577 | bool should_force_pic_veneer = parameters->options().pic_veneer(); |
| 4578 | bool thumb2; |
| 4579 | bool thumb_only; |
| 4580 | if (parameters->target().is_big_endian()) |
| 4581 | { |
| 4582 | const Target_arm<true>* big_endian_target = |
| 4583 | Target_arm<true>::default_target(); |
| 4584 | may_use_blx = big_endian_target->may_use_v5t_interworking(); |
| 4585 | should_force_pic_veneer |= big_endian_target->should_force_pic_veneer(); |
| 4586 | thumb2 = big_endian_target->using_thumb2(); |
| 4587 | thumb_only = big_endian_target->using_thumb_only(); |
| 4588 | } |
| 4589 | else |
| 4590 | { |
| 4591 | const Target_arm<false>* little_endian_target = |
| 4592 | Target_arm<false>::default_target(); |
| 4593 | may_use_blx = little_endian_target->may_use_v5t_interworking(); |
| 4594 | should_force_pic_veneer |= |
| 4595 | little_endian_target->should_force_pic_veneer(); |
| 4596 | thumb2 = little_endian_target->using_thumb2(); |
| 4597 | thumb_only = little_endian_target->using_thumb_only(); |
| 4598 | } |
| 4599 | |
| 4600 | int64_t branch_offset; |
| 4601 | bool output_is_position_independent = |
| 4602 | parameters->options().output_is_position_independent(); |
| 4603 | if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24) |
| 4604 | { |
| 4605 | // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the |
| 4606 | // base address (instruction address + 4). |
| 4607 | if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb) |
| 4608 | destination = Bits<32>::bit_select32(destination, location, 0x2); |
| 4609 | branch_offset = static_cast<int64_t>(destination) - location; |
| 4610 | |
| 4611 | // Handle cases where: |
| 4612 | // - this call goes too far (different Thumb/Thumb2 max |
| 4613 | // distance) |
| 4614 | // - it's a Thumb->Arm call and blx is not available, or it's a |
| 4615 | // Thumb->Arm branch (not bl). A stub is needed in this case. |
| 4616 | if ((!thumb2 |
| 4617 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET |
| 4618 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) |
| 4619 | || (thumb2 |
| 4620 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET |
| 4621 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) |
| 4622 | || ((!target_is_thumb) |
| 4623 | && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) |
| 4624 | || (r_type == elfcpp::R_ARM_THM_JUMP24)))) |
| 4625 | { |
| 4626 | if (target_is_thumb) |
| 4627 | { |
| 4628 | // Thumb to thumb. |
| 4629 | if (!thumb_only) |
| 4630 | { |
| 4631 | stub_type = (output_is_position_independent |
| 4632 | || should_force_pic_veneer) |
| 4633 | // PIC stubs. |
| 4634 | ? ((may_use_blx |
| 4635 | && (r_type == elfcpp::R_ARM_THM_CALL)) |
| 4636 | // V5T and above. Stub starts with ARM code, so |
| 4637 | // we must be able to switch mode before |
| 4638 | // reaching it, which is only possible for 'bl' |
| 4639 | // (ie R_ARM_THM_CALL relocation). |
| 4640 | ? arm_stub_long_branch_any_thumb_pic |
| 4641 | // On V4T, use Thumb code only. |
| 4642 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
| 4643 | |
| 4644 | // non-PIC stubs. |
| 4645 | : ((may_use_blx |
| 4646 | && (r_type == elfcpp::R_ARM_THM_CALL)) |
| 4647 | ? arm_stub_long_branch_any_any // V5T and above. |
| 4648 | : arm_stub_long_branch_v4t_thumb_thumb); // V4T. |
| 4649 | } |
| 4650 | else |
| 4651 | { |
| 4652 | stub_type = (output_is_position_independent |
| 4653 | || should_force_pic_veneer) |
| 4654 | ? arm_stub_long_branch_thumb_only_pic // PIC stub. |
| 4655 | : arm_stub_long_branch_thumb_only; // non-PIC stub. |
| 4656 | } |
| 4657 | } |
| 4658 | else |
| 4659 | { |
| 4660 | // Thumb to arm. |
| 4661 | |
| 4662 | // FIXME: We should check that the input section is from an |
| 4663 | // object that has interwork enabled. |
| 4664 | |
| 4665 | stub_type = (output_is_position_independent |
| 4666 | || should_force_pic_veneer) |
| 4667 | // PIC stubs. |
| 4668 | ? ((may_use_blx |
| 4669 | && (r_type == elfcpp::R_ARM_THM_CALL)) |
| 4670 | ? arm_stub_long_branch_any_arm_pic // V5T and above. |
| 4671 | : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T. |
| 4672 | |
| 4673 | // non-PIC stubs. |
| 4674 | : ((may_use_blx |
| 4675 | && (r_type == elfcpp::R_ARM_THM_CALL)) |
| 4676 | ? arm_stub_long_branch_any_any // V5T and above. |
| 4677 | : arm_stub_long_branch_v4t_thumb_arm); // V4T. |
| 4678 | |
| 4679 | // Handle v4t short branches. |
| 4680 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
| 4681 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
| 4682 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) |
| 4683 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
| 4684 | } |
| 4685 | } |
| 4686 | } |
| 4687 | else if (r_type == elfcpp::R_ARM_CALL |
| 4688 | || r_type == elfcpp::R_ARM_JUMP24 |
| 4689 | || r_type == elfcpp::R_ARM_PLT32) |
| 4690 | { |
| 4691 | branch_offset = static_cast<int64_t>(destination) - location; |
| 4692 | if (target_is_thumb) |
| 4693 | { |
| 4694 | // Arm to thumb. |
| 4695 | |
| 4696 | // FIXME: We should check that the input section is from an |
| 4697 | // object that has interwork enabled. |
| 4698 | |
| 4699 | // We have an extra 2-bytes reach because of |
| 4700 | // the mode change (bit 24 (H) of BLX encoding). |
| 4701 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
| 4702 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) |
| 4703 | || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx) |
| 4704 | || (r_type == elfcpp::R_ARM_JUMP24) |
| 4705 | || (r_type == elfcpp::R_ARM_PLT32)) |
| 4706 | { |
| 4707 | stub_type = (output_is_position_independent |
| 4708 | || should_force_pic_veneer) |
| 4709 | // PIC stubs. |
| 4710 | ? (may_use_blx |
| 4711 | ? arm_stub_long_branch_any_thumb_pic// V5T and above. |
| 4712 | : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub. |
| 4713 | |
| 4714 | // non-PIC stubs. |
| 4715 | : (may_use_blx |
| 4716 | ? arm_stub_long_branch_any_any // V5T and above. |
| 4717 | : arm_stub_long_branch_v4t_arm_thumb); // V4T. |
| 4718 | } |
| 4719 | } |
| 4720 | else |
| 4721 | { |
| 4722 | // Arm to arm. |
| 4723 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET |
| 4724 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) |
| 4725 | { |
| 4726 | stub_type = (output_is_position_independent |
| 4727 | || should_force_pic_veneer) |
| 4728 | ? arm_stub_long_branch_any_arm_pic // PIC stubs. |
| 4729 | : arm_stub_long_branch_any_any; /// non-PIC. |
| 4730 | } |
| 4731 | } |
| 4732 | } |
| 4733 | |
| 4734 | return stub_type; |
| 4735 | } |
| 4736 | |
| 4737 | // Cortex_a8_stub methods. |
| 4738 | |
| 4739 | // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template. |
| 4740 | // I is the position of the instruction template in the stub template. |
| 4741 | |
| 4742 | uint16_t |
| 4743 | Cortex_a8_stub::do_thumb16_special(size_t i) |
| 4744 | { |
| 4745 | // The only use of this is to copy condition code from a conditional |
| 4746 | // branch being worked around to the corresponding conditional branch in |
| 4747 | // to the stub. |
| 4748 | gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond |
| 4749 | && i == 0); |
| 4750 | uint16_t data = this->stub_template()->insns()[i].data(); |
| 4751 | gold_assert((data & 0xff00U) == 0xd000U); |
| 4752 | data |= ((this->original_insn_ >> 22) & 0xf) << 8; |
| 4753 | return data; |
| 4754 | } |
| 4755 | |
| 4756 | // Stub_factory methods. |
| 4757 | |
| 4758 | Stub_factory::Stub_factory() |
| 4759 | { |
| 4760 | // The instruction template sequences are declared as static |
| 4761 | // objects and initialized first time the constructor runs. |
| 4762 | |
| 4763 | // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
| 4764 | // to reach the stub if necessary. |
| 4765 | static const Insn_template elf32_arm_stub_long_branch_any_any[] = |
| 4766 | { |
| 4767 | Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] |
| 4768 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), |
| 4769 | // dcd R_ARM_ABS32(X) |
| 4770 | }; |
| 4771 | |
| 4772 | // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
| 4773 | // available. |
| 4774 | static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
| 4775 | { |
| 4776 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] |
| 4777 | Insn_template::arm_insn(0xe12fff1c), // bx ip |
| 4778 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), |
| 4779 | // dcd R_ARM_ABS32(X) |
| 4780 | }; |
| 4781 | |
| 4782 | // Thumb -> Thumb long branch stub. Used on M-profile architectures. |
| 4783 | static const Insn_template elf32_arm_stub_long_branch_thumb_only[] = |
| 4784 | { |
| 4785 | Insn_template::thumb16_insn(0xb401), // push {r0} |
| 4786 | Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] |
| 4787 | Insn_template::thumb16_insn(0x4684), // mov ip, r0 |
| 4788 | Insn_template::thumb16_insn(0xbc01), // pop {r0} |
| 4789 | Insn_template::thumb16_insn(0x4760), // bx ip |
| 4790 | Insn_template::thumb16_insn(0xbf00), // nop |
| 4791 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), |
| 4792 | // dcd R_ARM_ABS32(X) |
| 4793 | }; |
| 4794 | |
| 4795 | // V4T Thumb -> Thumb long branch stub. Using the stack is not |
| 4796 | // allowed. |
| 4797 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] = |
| 4798 | { |
| 4799 | Insn_template::thumb16_insn(0x4778), // bx pc |
| 4800 | Insn_template::thumb16_insn(0x46c0), // nop |
| 4801 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] |
| 4802 | Insn_template::arm_insn(0xe12fff1c), // bx ip |
| 4803 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), |
| 4804 | // dcd R_ARM_ABS32(X) |
| 4805 | }; |
| 4806 | |
| 4807 | // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
| 4808 | // available. |
| 4809 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
| 4810 | { |
| 4811 | Insn_template::thumb16_insn(0x4778), // bx pc |
| 4812 | Insn_template::thumb16_insn(0x46c0), // nop |
| 4813 | Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] |
| 4814 | Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), |
| 4815 | // dcd R_ARM_ABS32(X) |
| 4816 | }; |
| 4817 | |
| 4818 | // V4T Thumb -> ARM short branch stub. Shorter variant of the above |
| 4819 | // one, when the destination is close enough. |
| 4820 | static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
| 4821 | { |
| 4822 | Insn_template::thumb16_insn(0x4778), // bx pc |
| 4823 | Insn_template::thumb16_insn(0x46c0), // nop |
| 4824 | Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8) |
| 4825 | }; |
| 4826 | |
| 4827 | // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
| 4828 | // blx to reach the stub if necessary. |
| 4829 | static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] = |
| 4830 | { |
| 4831 | Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc] |
| 4832 | Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip |
| 4833 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), |
| 4834 | // dcd R_ARM_REL32(X-4) |
| 4835 | }; |
| 4836 | |
| 4837 | // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
| 4838 | // blx to reach the stub if necessary. We can not add into pc; |
| 4839 | // it is not guaranteed to mode switch (different in ARMv6 and |
| 4840 | // ARMv7). |
| 4841 | static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] = |
| 4842 | { |
| 4843 | Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4] |
| 4844 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip |
| 4845 | Insn_template::arm_insn(0xe12fff1c), // bx ip |
| 4846 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), |
| 4847 | // dcd R_ARM_REL32(X) |
| 4848 | }; |
| 4849 | |
| 4850 | // V4T ARM -> ARM long branch stub, PIC. |
| 4851 | static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = |
| 4852 | { |
| 4853 | Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] |
| 4854 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip |
| 4855 | Insn_template::arm_insn(0xe12fff1c), // bx ip |
| 4856 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), |
| 4857 | // dcd R_ARM_REL32(X) |
| 4858 | }; |
| 4859 | |
| 4860 | // V4T Thumb -> ARM long branch stub, PIC. |
| 4861 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = |
| 4862 | { |
| 4863 | Insn_template::thumb16_insn(0x4778), // bx pc |
| 4864 | Insn_template::thumb16_insn(0x46c0), // nop |
| 4865 | Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] |
| 4866 | Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc |
| 4867 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), |
| 4868 | // dcd R_ARM_REL32(X) |
| 4869 | }; |
| 4870 | |
| 4871 | // Thumb -> Thumb long branch stub, PIC. Used on M-profile |
| 4872 | // architectures. |
| 4873 | static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] = |
| 4874 | { |
| 4875 | Insn_template::thumb16_insn(0xb401), // push {r0} |
| 4876 | Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] |
| 4877 | Insn_template::thumb16_insn(0x46fc), // mov ip, pc |
| 4878 | Insn_template::thumb16_insn(0x4484), // add ip, r0 |
| 4879 | Insn_template::thumb16_insn(0xbc01), // pop {r0} |
| 4880 | Insn_template::thumb16_insn(0x4760), // bx ip |
| 4881 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4), |
| 4882 | // dcd R_ARM_REL32(X) |
| 4883 | }; |
| 4884 | |
| 4885 | // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
| 4886 | // allowed. |
| 4887 | static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = |
| 4888 | { |
| 4889 | Insn_template::thumb16_insn(0x4778), // bx pc |
| 4890 | Insn_template::thumb16_insn(0x46c0), // nop |
| 4891 | Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] |
| 4892 | Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip |
| 4893 | Insn_template::arm_insn(0xe12fff1c), // bx ip |
| 4894 | Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), |
| 4895 | // dcd R_ARM_REL32(X) |
| 4896 | }; |
| 4897 | |
| 4898 | // Cortex-A8 erratum-workaround stubs. |
| 4899 | |
| 4900 | // Stub used for conditional branches (which may be beyond +/-1MB away, |
| 4901 | // so we can't use a conditional branch to reach this stub). |
| 4902 | |
| 4903 | // original code: |
| 4904 | // |
| 4905 | // b<cond> X |
| 4906 | // after: |
| 4907 | // |
| 4908 | static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] = |
| 4909 | { |
| 4910 | Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true |
| 4911 | Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after |
| 4912 | Insn_template::thumb32_b_insn(0xf000b800, -4) // true: |
| 4913 | // b.w X |
| 4914 | }; |
| 4915 | |
| 4916 | // Stub used for b.w and bl.w instructions. |
| 4917 | |
| 4918 | static const Insn_template elf32_arm_stub_a8_veneer_b[] = |
| 4919 | { |
| 4920 | Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest |
| 4921 | }; |
| 4922 | |
| 4923 | static const Insn_template elf32_arm_stub_a8_veneer_bl[] = |
| 4924 | { |
| 4925 | Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest |
| 4926 | }; |
| 4927 | |
| 4928 | // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w |
| 4929 | // instruction (which switches to ARM mode) to point to this stub. Jump to |
| 4930 | // the real destination using an ARM-mode branch. |
| 4931 | static const Insn_template elf32_arm_stub_a8_veneer_blx[] = |
| 4932 | { |
| 4933 | Insn_template::arm_rel_insn(0xea000000, -8) // b dest |
| 4934 | }; |
| 4935 | |
| 4936 | // Stub used to provide an interworking for R_ARM_V4BX relocation |
| 4937 | // (bx r[n] instruction). |
| 4938 | static const Insn_template elf32_arm_stub_v4_veneer_bx[] = |
| 4939 | { |
| 4940 | Insn_template::arm_insn(0xe3100001), // tst r<n>, #1 |
| 4941 | Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n> |
| 4942 | Insn_template::arm_insn(0xe12fff10) // bx r<n> |
| 4943 | }; |
| 4944 | |
| 4945 | // Fill in the stub template look-up table. Stub templates are constructed |
| 4946 | // per instance of Stub_factory for fast look-up without locking |
| 4947 | // in a thread-enabled environment. |
| 4948 | |
| 4949 | this->stub_templates_[arm_stub_none] = |
| 4950 | new Stub_template(arm_stub_none, NULL, 0); |
| 4951 | |
| 4952 | #define DEF_STUB(x) \ |
| 4953 | do \ |
| 4954 | { \ |
| 4955 | size_t array_size \ |
| 4956 | = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \ |
| 4957 | Stub_type type = arm_stub_##x; \ |
| 4958 | this->stub_templates_[type] = \ |
| 4959 | new Stub_template(type, elf32_arm_stub_##x, array_size); \ |
| 4960 | } \ |
| 4961 | while (0); |
| 4962 | |
| 4963 | DEF_STUBS |
| 4964 | #undef DEF_STUB |
| 4965 | } |
| 4966 | |
| 4967 | // Stub_table methods. |
| 4968 | |
| 4969 | // Remove all Cortex-A8 stub. |
| 4970 | |
| 4971 | template<bool big_endian> |
| 4972 | void |
| 4973 | Stub_table<big_endian>::remove_all_cortex_a8_stubs() |
| 4974 | { |
| 4975 | for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); |
| 4976 | p != this->cortex_a8_stubs_.end(); |
| 4977 | ++p) |
| 4978 | delete p->second; |
| 4979 | this->cortex_a8_stubs_.clear(); |
| 4980 | } |
| 4981 | |
| 4982 | // Relocate one stub. This is a helper for Stub_table::relocate_stubs(). |
| 4983 | |
| 4984 | template<bool big_endian> |
| 4985 | void |
| 4986 | Stub_table<big_endian>::relocate_stub( |
| 4987 | Stub* stub, |
| 4988 | const Relocate_info<32, big_endian>* relinfo, |
| 4989 | Target_arm<big_endian>* arm_target, |
| 4990 | Output_section* output_section, |
| 4991 | unsigned char* view, |
| 4992 | Arm_address address, |
| 4993 | section_size_type view_size) |
| 4994 | { |
| 4995 | const Stub_template* stub_template = stub->stub_template(); |
| 4996 | if (stub_template->reloc_count() != 0) |
| 4997 | { |
| 4998 | // Adjust view to cover the stub only. |
| 4999 | section_size_type offset = stub->offset(); |
| 5000 | section_size_type stub_size = stub_template->size(); |
| 5001 | gold_assert(offset + stub_size <= view_size); |
| 5002 | |
| 5003 | arm_target->relocate_stub(stub, relinfo, output_section, view + offset, |
| 5004 | address + offset, stub_size); |
| 5005 | } |
| 5006 | } |
| 5007 | |
| 5008 | // Relocate all stubs in this stub table. |
| 5009 | |
| 5010 | template<bool big_endian> |
| 5011 | void |
| 5012 | Stub_table<big_endian>::relocate_stubs( |
| 5013 | const Relocate_info<32, big_endian>* relinfo, |
| 5014 | Target_arm<big_endian>* arm_target, |
| 5015 | Output_section* output_section, |
| 5016 | unsigned char* view, |
| 5017 | Arm_address address, |
| 5018 | section_size_type view_size) |
| 5019 | { |
| 5020 | // If we are passed a view bigger than the stub table's. we need to |
| 5021 | // adjust the view. |
| 5022 | gold_assert(address == this->address() |
| 5023 | && (view_size |
| 5024 | == static_cast<section_size_type>(this->data_size()))); |
| 5025 | |
| 5026 | // Relocate all relocation stubs. |
| 5027 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); |
| 5028 | p != this->reloc_stubs_.end(); |
| 5029 | ++p) |
| 5030 | this->relocate_stub(p->second, relinfo, arm_target, output_section, view, |
| 5031 | address, view_size); |
| 5032 | |
| 5033 | // Relocate all Cortex-A8 stubs. |
| 5034 | for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); |
| 5035 | p != this->cortex_a8_stubs_.end(); |
| 5036 | ++p) |
| 5037 | this->relocate_stub(p->second, relinfo, arm_target, output_section, view, |
| 5038 | address, view_size); |
| 5039 | |
| 5040 | // Relocate all ARM V4BX stubs. |
| 5041 | for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin(); |
| 5042 | p != this->arm_v4bx_stubs_.end(); |
| 5043 | ++p) |
| 5044 | { |
| 5045 | if (*p != NULL) |
| 5046 | this->relocate_stub(*p, relinfo, arm_target, output_section, view, |
| 5047 | address, view_size); |
| 5048 | } |
| 5049 | } |
| 5050 | |
| 5051 | // Write out the stubs to file. |
| 5052 | |
| 5053 | template<bool big_endian> |
| 5054 | void |
| 5055 | Stub_table<big_endian>::do_write(Output_file* of) |
| 5056 | { |
| 5057 | off_t offset = this->offset(); |
| 5058 | const section_size_type oview_size = |
| 5059 | convert_to_section_size_type(this->data_size()); |
| 5060 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
| 5061 | |
| 5062 | // Write relocation stubs. |
| 5063 | for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); |
| 5064 | p != this->reloc_stubs_.end(); |
| 5065 | ++p) |
| 5066 | { |
| 5067 | Reloc_stub* stub = p->second; |
| 5068 | Arm_address address = this->address() + stub->offset(); |
| 5069 | gold_assert(address |
| 5070 | == align_address(address, |
| 5071 | stub->stub_template()->alignment())); |
| 5072 | stub->write(oview + stub->offset(), stub->stub_template()->size(), |
| 5073 | big_endian); |
| 5074 | } |
| 5075 | |
| 5076 | // Write Cortex-A8 stubs. |
| 5077 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); |
| 5078 | p != this->cortex_a8_stubs_.end(); |
| 5079 | ++p) |
| 5080 | { |
| 5081 | Cortex_a8_stub* stub = p->second; |
| 5082 | Arm_address address = this->address() + stub->offset(); |
| 5083 | gold_assert(address |
| 5084 | == align_address(address, |
| 5085 | stub->stub_template()->alignment())); |
| 5086 | stub->write(oview + stub->offset(), stub->stub_template()->size(), |
| 5087 | big_endian); |
| 5088 | } |
| 5089 | |
| 5090 | // Write ARM V4BX relocation stubs. |
| 5091 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); |
| 5092 | p != this->arm_v4bx_stubs_.end(); |
| 5093 | ++p) |
| 5094 | { |
| 5095 | if (*p == NULL) |
| 5096 | continue; |
| 5097 | |
| 5098 | Arm_address address = this->address() + (*p)->offset(); |
| 5099 | gold_assert(address |
| 5100 | == align_address(address, |
| 5101 | (*p)->stub_template()->alignment())); |
| 5102 | (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(), |
| 5103 | big_endian); |
| 5104 | } |
| 5105 | |
| 5106 | of->write_output_view(this->offset(), oview_size, oview); |
| 5107 | } |
| 5108 | |
| 5109 | // Update the data size and address alignment of the stub table at the end |
| 5110 | // of a relaxation pass. Return true if either the data size or the |
| 5111 | // alignment changed in this relaxation pass. |
| 5112 | |
| 5113 | template<bool big_endian> |
| 5114 | bool |
| 5115 | Stub_table<big_endian>::update_data_size_and_addralign() |
| 5116 | { |
| 5117 | // Go over all stubs in table to compute data size and address alignment. |
| 5118 | off_t size = this->reloc_stubs_size_; |
| 5119 | unsigned addralign = this->reloc_stubs_addralign_; |
| 5120 | |
| 5121 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); |
| 5122 | p != this->cortex_a8_stubs_.end(); |
| 5123 | ++p) |
| 5124 | { |
| 5125 | const Stub_template* stub_template = p->second->stub_template(); |
| 5126 | addralign = std::max(addralign, stub_template->alignment()); |
| 5127 | size = (align_address(size, stub_template->alignment()) |
| 5128 | + stub_template->size()); |
| 5129 | } |
| 5130 | |
| 5131 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); |
| 5132 | p != this->arm_v4bx_stubs_.end(); |
| 5133 | ++p) |
| 5134 | { |
| 5135 | if (*p == NULL) |
| 5136 | continue; |
| 5137 | |
| 5138 | const Stub_template* stub_template = (*p)->stub_template(); |
| 5139 | addralign = std::max(addralign, stub_template->alignment()); |
| 5140 | size = (align_address(size, stub_template->alignment()) |
| 5141 | + stub_template->size()); |
| 5142 | } |
| 5143 | |
| 5144 | // Check if either data size or alignment changed in this pass. |
| 5145 | // Update prev_data_size_ and prev_addralign_. These will be used |
| 5146 | // as the current data size and address alignment for the next pass. |
| 5147 | bool changed = size != this->prev_data_size_; |
| 5148 | this->prev_data_size_ = size; |
| 5149 | |
| 5150 | if (addralign != this->prev_addralign_) |
| 5151 | changed = true; |
| 5152 | this->prev_addralign_ = addralign; |
| 5153 | |
| 5154 | return changed; |
| 5155 | } |
| 5156 | |
| 5157 | // Finalize the stubs. This sets the offsets of the stubs within the stub |
| 5158 | // table. It also marks all input sections needing Cortex-A8 workaround. |
| 5159 | |
| 5160 | template<bool big_endian> |
| 5161 | void |
| 5162 | Stub_table<big_endian>::finalize_stubs() |
| 5163 | { |
| 5164 | off_t off = this->reloc_stubs_size_; |
| 5165 | for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); |
| 5166 | p != this->cortex_a8_stubs_.end(); |
| 5167 | ++p) |
| 5168 | { |
| 5169 | Cortex_a8_stub* stub = p->second; |
| 5170 | const Stub_template* stub_template = stub->stub_template(); |
| 5171 | uint64_t stub_addralign = stub_template->alignment(); |
| 5172 | off = align_address(off, stub_addralign); |
| 5173 | stub->set_offset(off); |
| 5174 | off += stub_template->size(); |
| 5175 | |
| 5176 | // Mark input section so that we can determine later if a code section |
| 5177 | // needs the Cortex-A8 workaround quickly. |
| 5178 | Arm_relobj<big_endian>* arm_relobj = |
| 5179 | Arm_relobj<big_endian>::as_arm_relobj(stub->relobj()); |
| 5180 | arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx()); |
| 5181 | } |
| 5182 | |
| 5183 | for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); |
| 5184 | p != this->arm_v4bx_stubs_.end(); |
| 5185 | ++p) |
| 5186 | { |
| 5187 | if (*p == NULL) |
| 5188 | continue; |
| 5189 | |
| 5190 | const Stub_template* stub_template = (*p)->stub_template(); |
| 5191 | uint64_t stub_addralign = stub_template->alignment(); |
| 5192 | off = align_address(off, stub_addralign); |
| 5193 | (*p)->set_offset(off); |
| 5194 | off += stub_template->size(); |
| 5195 | } |
| 5196 | |
| 5197 | gold_assert(off <= this->prev_data_size_); |
| 5198 | } |
| 5199 | |
| 5200 | // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS |
| 5201 | // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address |
| 5202 | // of the address range seen by the linker. |
| 5203 | |
| 5204 | template<bool big_endian> |
| 5205 | void |
| 5206 | Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range( |
| 5207 | Target_arm<big_endian>* arm_target, |
| 5208 | unsigned char* view, |
| 5209 | Arm_address view_address, |
| 5210 | section_size_type view_size) |
| 5211 | { |
| 5212 | // Cortex-A8 stubs are sorted by addresses of branches being fixed up. |
| 5213 | for (Cortex_a8_stub_list::const_iterator p = |
| 5214 | this->cortex_a8_stubs_.lower_bound(view_address); |
| 5215 | ((p != this->cortex_a8_stubs_.end()) |
| 5216 | && (p->first < (view_address + view_size))); |
| 5217 | ++p) |
| 5218 | { |
| 5219 | // We do not store the THUMB bit in the LSB of either the branch address |
| 5220 | // or the stub offset. There is no need to strip the LSB. |
| 5221 | Arm_address branch_address = p->first; |
| 5222 | const Cortex_a8_stub* stub = p->second; |
| 5223 | Arm_address stub_address = this->address() + stub->offset(); |
| 5224 | |
| 5225 | // Offset of the branch instruction relative to this view. |
| 5226 | section_size_type offset = |
| 5227 | convert_to_section_size_type(branch_address - view_address); |
| 5228 | gold_assert((offset + 4) <= view_size); |
| 5229 | |
| 5230 | arm_target->apply_cortex_a8_workaround(stub, stub_address, |
| 5231 | view + offset, branch_address); |
| 5232 | } |
| 5233 | } |
| 5234 | |
| 5235 | // Arm_input_section methods. |
| 5236 | |
| 5237 | // Initialize an Arm_input_section. |
| 5238 | |
| 5239 | template<bool big_endian> |
| 5240 | void |
| 5241 | Arm_input_section<big_endian>::init() |
| 5242 | { |
| 5243 | Relobj* relobj = this->relobj(); |
| 5244 | unsigned int shndx = this->shndx(); |
| 5245 | |
| 5246 | // We have to cache original size, alignment and contents to avoid locking |
| 5247 | // the original file. |
| 5248 | this->original_addralign_ = |
| 5249 | convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx)); |
| 5250 | |
| 5251 | // This is not efficient but we expect only a small number of relaxed |
| 5252 | // input sections for stubs. |
| 5253 | section_size_type section_size; |
| 5254 | const unsigned char* section_contents = |
| 5255 | relobj->section_contents(shndx, §ion_size, false); |
| 5256 | this->original_size_ = |
| 5257 | convert_types<uint32_t, uint64_t>(relobj->section_size(shndx)); |
| 5258 | |
| 5259 | gold_assert(this->original_contents_ == NULL); |
| 5260 | this->original_contents_ = new unsigned char[section_size]; |
| 5261 | memcpy(this->original_contents_, section_contents, section_size); |
| 5262 | |
| 5263 | // We want to make this look like the original input section after |
| 5264 | // output sections are finalized. |
| 5265 | Output_section* os = relobj->output_section(shndx); |
| 5266 | off_t offset = relobj->output_section_offset(shndx); |
| 5267 | gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx)); |
| 5268 | this->set_address(os->address() + offset); |
| 5269 | this->set_file_offset(os->offset() + offset); |
| 5270 | |
| 5271 | this->set_current_data_size(this->original_size_); |
| 5272 | this->finalize_data_size(); |
| 5273 | } |
| 5274 | |
| 5275 | template<bool big_endian> |
| 5276 | void |
| 5277 | Arm_input_section<big_endian>::do_write(Output_file* of) |
| 5278 | { |
| 5279 | // We have to write out the original section content. |
| 5280 | gold_assert(this->original_contents_ != NULL); |
| 5281 | of->write(this->offset(), this->original_contents_, |
| 5282 | this->original_size_); |
| 5283 | |
| 5284 | // If this owns a stub table and it is not empty, write it. |
| 5285 | if (this->is_stub_table_owner() && !this->stub_table_->empty()) |
| 5286 | this->stub_table_->write(of); |
| 5287 | } |
| 5288 | |
| 5289 | // Finalize data size. |
| 5290 | |
| 5291 | template<bool big_endian> |
| 5292 | void |
| 5293 | Arm_input_section<big_endian>::set_final_data_size() |
| 5294 | { |
| 5295 | off_t off = convert_types<off_t, uint64_t>(this->original_size_); |
| 5296 | |
| 5297 | if (this->is_stub_table_owner()) |
| 5298 | { |
| 5299 | this->stub_table_->finalize_data_size(); |
| 5300 | off = align_address(off, this->stub_table_->addralign()); |
| 5301 | off += this->stub_table_->data_size(); |
| 5302 | } |
| 5303 | this->set_data_size(off); |
| 5304 | } |
| 5305 | |
| 5306 | // Reset address and file offset. |
| 5307 | |
| 5308 | template<bool big_endian> |
| 5309 | void |
| 5310 | Arm_input_section<big_endian>::do_reset_address_and_file_offset() |
| 5311 | { |
| 5312 | // Size of the original input section contents. |
| 5313 | off_t off = convert_types<off_t, uint64_t>(this->original_size_); |
| 5314 | |
| 5315 | // If this is a stub table owner, account for the stub table size. |
| 5316 | if (this->is_stub_table_owner()) |
| 5317 | { |
| 5318 | Stub_table<big_endian>* stub_table = this->stub_table_; |
| 5319 | |
| 5320 | // Reset the stub table's address and file offset. The |
| 5321 | // current data size for child will be updated after that. |
| 5322 | stub_table_->reset_address_and_file_offset(); |
| 5323 | off = align_address(off, stub_table_->addralign()); |
| 5324 | off += stub_table->current_data_size(); |
| 5325 | } |
| 5326 | |
| 5327 | this->set_current_data_size(off); |
| 5328 | } |
| 5329 | |
| 5330 | // Arm_exidx_cantunwind methods. |
| 5331 | |
| 5332 | // Write this to Output file OF for a fixed endianness. |
| 5333 | |
| 5334 | template<bool big_endian> |
| 5335 | void |
| 5336 | Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) |
| 5337 | { |
| 5338 | off_t offset = this->offset(); |
| 5339 | const section_size_type oview_size = 8; |
| 5340 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
| 5341 | |
| 5342 | Output_section* os = this->relobj_->output_section(this->shndx_); |
| 5343 | gold_assert(os != NULL); |
| 5344 | |
| 5345 | Arm_relobj<big_endian>* arm_relobj = |
| 5346 | Arm_relobj<big_endian>::as_arm_relobj(this->relobj_); |
| 5347 | Arm_address output_offset = |
| 5348 | arm_relobj->get_output_section_offset(this->shndx_); |
| 5349 | Arm_address section_start; |
| 5350 | section_size_type section_size; |
| 5351 | |
| 5352 | // Find out the end of the text section referred by this. |
| 5353 | if (output_offset != Arm_relobj<big_endian>::invalid_address) |
| 5354 | { |
| 5355 | section_start = os->address() + output_offset; |
| 5356 | const Arm_exidx_input_section* exidx_input_section = |
| 5357 | arm_relobj->exidx_input_section_by_link(this->shndx_); |
| 5358 | gold_assert(exidx_input_section != NULL); |
| 5359 | section_size = |
| 5360 | convert_to_section_size_type(exidx_input_section->text_size()); |
| 5361 | } |
| 5362 | else |
| 5363 | { |
| 5364 | // Currently this only happens for a relaxed section. |
| 5365 | const Output_relaxed_input_section* poris = |
| 5366 | os->find_relaxed_input_section(this->relobj_, this->shndx_); |
| 5367 | gold_assert(poris != NULL); |
| 5368 | section_start = poris->address(); |
| 5369 | section_size = convert_to_section_size_type(poris->data_size()); |
| 5370 | } |
| 5371 | |
| 5372 | // We always append this to the end of an EXIDX section. |
| 5373 | Arm_address output_address = section_start + section_size; |
| 5374 | |
| 5375 | // Write out the entry. The first word either points to the beginning |
| 5376 | // or after the end of a text section. The second word is the special |
| 5377 | // EXIDX_CANTUNWIND value. |
| 5378 | uint32_t prel31_offset = output_address - this->address(); |
| 5379 | if (Bits<31>::has_overflow32(offset)) |
| 5380 | gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); |
| 5381 | elfcpp::Swap_unaligned<32, big_endian>::writeval(oview, |
| 5382 | prel31_offset & 0x7fffffffU); |
| 5383 | elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4, |
| 5384 | elfcpp::EXIDX_CANTUNWIND); |
| 5385 | |
| 5386 | of->write_output_view(this->offset(), oview_size, oview); |
| 5387 | } |
| 5388 | |
| 5389 | // Arm_exidx_merged_section methods. |
| 5390 | |
| 5391 | // Constructor for Arm_exidx_merged_section. |
| 5392 | // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. |
| 5393 | // SECTION_OFFSET_MAP points to a section offset map describing how |
| 5394 | // parts of the input section are mapped to output. DELETED_BYTES is |
| 5395 | // the number of bytes deleted from the EXIDX input section. |
| 5396 | |
| 5397 | Arm_exidx_merged_section::Arm_exidx_merged_section( |
| 5398 | const Arm_exidx_input_section& exidx_input_section, |
| 5399 | const Arm_exidx_section_offset_map& section_offset_map, |
| 5400 | uint32_t deleted_bytes) |
| 5401 | : Output_relaxed_input_section(exidx_input_section.relobj(), |
| 5402 | exidx_input_section.shndx(), |
| 5403 | exidx_input_section.addralign()), |
| 5404 | exidx_input_section_(exidx_input_section), |
| 5405 | section_offset_map_(section_offset_map) |
| 5406 | { |
| 5407 | // If we retain or discard the whole EXIDX input section, we would |
| 5408 | // not be here. |
| 5409 | gold_assert(deleted_bytes != 0 |
| 5410 | && deleted_bytes != this->exidx_input_section_.size()); |
| 5411 | |
| 5412 | // Fix size here so that we do not need to implement set_final_data_size. |
| 5413 | uint32_t size = exidx_input_section.size() - deleted_bytes; |
| 5414 | this->set_data_size(size); |
| 5415 | this->fix_data_size(); |
| 5416 | |
| 5417 | // Allocate buffer for section contents and build contents. |
| 5418 | this->section_contents_ = new unsigned char[size]; |
| 5419 | } |
| 5420 | |
| 5421 | // Build the contents of a merged EXIDX output section. |
| 5422 | |
| 5423 | void |
| 5424 | Arm_exidx_merged_section::build_contents( |
| 5425 | const unsigned char* original_contents, |
| 5426 | section_size_type original_size) |
| 5427 | { |
| 5428 | // Go over spans of input offsets and write only those that are not |
| 5429 | // discarded. |
| 5430 | section_offset_type in_start = 0; |
| 5431 | section_offset_type out_start = 0; |
| 5432 | section_offset_type in_max = |
| 5433 | convert_types<section_offset_type>(original_size); |
| 5434 | section_offset_type out_max = |
| 5435 | convert_types<section_offset_type>(this->data_size()); |
| 5436 | for (Arm_exidx_section_offset_map::const_iterator p = |
| 5437 | this->section_offset_map_.begin(); |
| 5438 | p != this->section_offset_map_.end(); |
| 5439 | ++p) |
| 5440 | { |
| 5441 | section_offset_type in_end = p->first; |
| 5442 | gold_assert(in_end >= in_start); |
| 5443 | section_offset_type out_end = p->second; |
| 5444 | size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1); |
| 5445 | if (out_end != -1) |
| 5446 | { |
| 5447 | size_t out_chunk_size = |
| 5448 | convert_types<size_t>(out_end - out_start + 1); |
| 5449 | |
| 5450 | gold_assert(out_chunk_size == in_chunk_size |
| 5451 | && in_end < in_max && out_end < out_max); |
| 5452 | |
| 5453 | memcpy(this->section_contents_ + out_start, |
| 5454 | original_contents + in_start, |
| 5455 | out_chunk_size); |
| 5456 | out_start += out_chunk_size; |
| 5457 | } |
| 5458 | in_start += in_chunk_size; |
| 5459 | } |
| 5460 | } |
| 5461 | |
| 5462 | // Given an input OBJECT, an input section index SHNDX within that |
| 5463 | // object, and an OFFSET relative to the start of that input |
| 5464 | // section, return whether or not the corresponding offset within |
| 5465 | // the output section is known. If this function returns true, it |
| 5466 | // sets *POUTPUT to the output offset. The value -1 indicates that |
| 5467 | // this input offset is being discarded. |
| 5468 | |
| 5469 | bool |
| 5470 | Arm_exidx_merged_section::do_output_offset( |
| 5471 | const Relobj* relobj, |
| 5472 | unsigned int shndx, |
| 5473 | section_offset_type offset, |
| 5474 | section_offset_type* poutput) const |
| 5475 | { |
| 5476 | // We only handle offsets for the original EXIDX input section. |
| 5477 | if (relobj != this->exidx_input_section_.relobj() |
| 5478 | || shndx != this->exidx_input_section_.shndx()) |
| 5479 | return false; |
| 5480 | |
| 5481 | section_offset_type section_size = |
| 5482 | convert_types<section_offset_type>(this->exidx_input_section_.size()); |
| 5483 | if (offset < 0 || offset >= section_size) |
| 5484 | // Input offset is out of valid range. |
| 5485 | *poutput = -1; |
| 5486 | else |
| 5487 | { |
| 5488 | // We need to look up the section offset map to determine the output |
| 5489 | // offset. Find the reference point in map that is first offset |
| 5490 | // bigger than or equal to this offset. |
| 5491 | Arm_exidx_section_offset_map::const_iterator p = |
| 5492 | this->section_offset_map_.lower_bound(offset); |
| 5493 | |
| 5494 | // The section offset maps are build such that this should not happen if |
| 5495 | // input offset is in the valid range. |
| 5496 | gold_assert(p != this->section_offset_map_.end()); |
| 5497 | |
| 5498 | // We need to check if this is dropped. |
| 5499 | section_offset_type ref = p->first; |
| 5500 | section_offset_type mapped_ref = p->second; |
| 5501 | |
| 5502 | if (mapped_ref != Arm_exidx_input_section::invalid_offset) |
| 5503 | // Offset is present in output. |
| 5504 | *poutput = mapped_ref + (offset - ref); |
| 5505 | else |
| 5506 | // Offset is discarded owing to EXIDX entry merging. |
| 5507 | *poutput = -1; |
| 5508 | } |
| 5509 | |
| 5510 | return true; |
| 5511 | } |
| 5512 | |
| 5513 | // Write this to output file OF. |
| 5514 | |
| 5515 | void |
| 5516 | Arm_exidx_merged_section::do_write(Output_file* of) |
| 5517 | { |
| 5518 | off_t offset = this->offset(); |
| 5519 | const section_size_type oview_size = this->data_size(); |
| 5520 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
| 5521 | |
| 5522 | Output_section* os = this->relobj()->output_section(this->shndx()); |
| 5523 | gold_assert(os != NULL); |
| 5524 | |
| 5525 | memcpy(oview, this->section_contents_, oview_size); |
| 5526 | of->write_output_view(this->offset(), oview_size, oview); |
| 5527 | } |
| 5528 | |
| 5529 | // Arm_exidx_fixup methods. |
| 5530 | |
| 5531 | // Append an EXIDX_CANTUNWIND in the current output section if the last entry |
| 5532 | // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry |
| 5533 | // points to the end of the last seen EXIDX section. |
| 5534 | |
| 5535 | void |
| 5536 | Arm_exidx_fixup::add_exidx_cantunwind_as_needed() |
| 5537 | { |
| 5538 | if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND |
| 5539 | && this->last_input_section_ != NULL) |
| 5540 | { |
| 5541 | Relobj* relobj = this->last_input_section_->relobj(); |
| 5542 | unsigned int text_shndx = this->last_input_section_->link(); |
| 5543 | Arm_exidx_cantunwind* cantunwind = |
| 5544 | new Arm_exidx_cantunwind(relobj, text_shndx); |
| 5545 | this->exidx_output_section_->add_output_section_data(cantunwind); |
| 5546 | this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; |
| 5547 | } |
| 5548 | } |
| 5549 | |
| 5550 | // Process an EXIDX section entry in input. Return whether this entry |
| 5551 | // can be deleted in the output. SECOND_WORD in the second word of the |
| 5552 | // EXIDX entry. |
| 5553 | |
| 5554 | bool |
| 5555 | Arm_exidx_fixup::process_exidx_entry(uint32_t second_word) |
| 5556 | { |
| 5557 | bool delete_entry; |
| 5558 | if (second_word == elfcpp::EXIDX_CANTUNWIND) |
| 5559 | { |
| 5560 | // Merge if previous entry is also an EXIDX_CANTUNWIND. |
| 5561 | delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND; |
| 5562 | this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; |
| 5563 | } |
| 5564 | else if ((second_word & 0x80000000) != 0) |
| 5565 | { |
| 5566 | // Inlined unwinding data. Merge if equal to previous. |
| 5567 | delete_entry = (merge_exidx_entries_ |
| 5568 | && this->last_unwind_type_ == UT_INLINED_ENTRY |
| 5569 | && this->last_inlined_entry_ == second_word); |
| 5570 | this->last_unwind_type_ = UT_INLINED_ENTRY; |
| 5571 | this->last_inlined_entry_ = second_word; |
| 5572 | } |
| 5573 | else |
| 5574 | { |
| 5575 | // Normal table entry. In theory we could merge these too, |
| 5576 | // but duplicate entries are likely to be much less common. |
| 5577 | delete_entry = false; |
| 5578 | this->last_unwind_type_ = UT_NORMAL_ENTRY; |
| 5579 | } |
| 5580 | return delete_entry; |
| 5581 | } |
| 5582 | |
| 5583 | // Update the current section offset map during EXIDX section fix-up. |
| 5584 | // If there is no map, create one. INPUT_OFFSET is the offset of a |
| 5585 | // reference point, DELETED_BYTES is the number of deleted by in the |
| 5586 | // section so far. If DELETE_ENTRY is true, the reference point and |
| 5587 | // all offsets after the previous reference point are discarded. |
| 5588 | |
| 5589 | void |
| 5590 | Arm_exidx_fixup::update_offset_map( |
| 5591 | section_offset_type input_offset, |
| 5592 | section_size_type deleted_bytes, |
| 5593 | bool delete_entry) |
| 5594 | { |
| 5595 | if (this->section_offset_map_ == NULL) |
| 5596 | this->section_offset_map_ = new Arm_exidx_section_offset_map(); |
| 5597 | section_offset_type output_offset; |
| 5598 | if (delete_entry) |
| 5599 | output_offset = Arm_exidx_input_section::invalid_offset; |
| 5600 | else |
| 5601 | output_offset = input_offset - deleted_bytes; |
| 5602 | (*this->section_offset_map_)[input_offset] = output_offset; |
| 5603 | } |
| 5604 | |
| 5605 | // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of |
| 5606 | // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX |
| 5607 | // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS. |
| 5608 | // If some entries are merged, also store a pointer to a newly created |
| 5609 | // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller |
| 5610 | // owns the map and is responsible for releasing it after use. |
| 5611 | |
| 5612 | template<bool big_endian> |
| 5613 | uint32_t |
| 5614 | Arm_exidx_fixup::process_exidx_section( |
| 5615 | const Arm_exidx_input_section* exidx_input_section, |
| 5616 | const unsigned char* section_contents, |
| 5617 | section_size_type section_size, |
| 5618 | Arm_exidx_section_offset_map** psection_offset_map) |
| 5619 | { |
| 5620 | Relobj* relobj = exidx_input_section->relobj(); |
| 5621 | unsigned shndx = exidx_input_section->shndx(); |
| 5622 | |
| 5623 | if ((section_size % 8) != 0) |
| 5624 | { |
| 5625 | // Something is wrong with this section. Better not touch it. |
| 5626 | gold_error(_("uneven .ARM.exidx section size in %s section %u"), |
| 5627 | relobj->name().c_str(), shndx); |
| 5628 | this->last_input_section_ = exidx_input_section; |
| 5629 | this->last_unwind_type_ = UT_NONE; |
| 5630 | return 0; |
| 5631 | } |
| 5632 | |
| 5633 | uint32_t deleted_bytes = 0; |
| 5634 | bool prev_delete_entry = false; |
| 5635 | gold_assert(this->section_offset_map_ == NULL); |
| 5636 | |
| 5637 | for (section_size_type i = 0; i < section_size; i += 8) |
| 5638 | { |
| 5639 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 5640 | const Valtype* wv = |
| 5641 | reinterpret_cast<const Valtype*>(section_contents + i + 4); |
| 5642 | uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv); |
| 5643 | |
| 5644 | bool delete_entry = this->process_exidx_entry(second_word); |
| 5645 | |
| 5646 | // Entry deletion causes changes in output offsets. We use a std::map |
| 5647 | // to record these. And entry (x, y) means input offset x |
| 5648 | // is mapped to output offset y. If y is invalid_offset, then x is |
| 5649 | // dropped in the output. Because of the way std::map::lower_bound |
| 5650 | // works, we record the last offset in a region w.r.t to keeping or |
| 5651 | // dropping. If there is no entry (x0, y0) for an input offset x0, |
| 5652 | // the output offset y0 of it is determined by the output offset y1 of |
| 5653 | // the smallest input offset x1 > x0 that there is an (x1, y1) entry |
| 5654 | // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1 |
| 5655 | // y0 is also -1. |
| 5656 | if (delete_entry != prev_delete_entry && i != 0) |
| 5657 | this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry); |
| 5658 | |
| 5659 | // Update total deleted bytes for this entry. |
| 5660 | if (delete_entry) |
| 5661 | deleted_bytes += 8; |
| 5662 | |
| 5663 | prev_delete_entry = delete_entry; |
| 5664 | } |
| 5665 | |
| 5666 | // If section offset map is not NULL, make an entry for the end of |
| 5667 | // section. |
| 5668 | if (this->section_offset_map_ != NULL) |
| 5669 | update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry); |
| 5670 | |
| 5671 | *psection_offset_map = this->section_offset_map_; |
| 5672 | this->section_offset_map_ = NULL; |
| 5673 | this->last_input_section_ = exidx_input_section; |
| 5674 | |
| 5675 | // Set the first output text section so that we can link the EXIDX output |
| 5676 | // section to it. Ignore any EXIDX input section that is completely merged. |
| 5677 | if (this->first_output_text_section_ == NULL |
| 5678 | && deleted_bytes != section_size) |
| 5679 | { |
| 5680 | unsigned int link = exidx_input_section->link(); |
| 5681 | Output_section* os = relobj->output_section(link); |
| 5682 | gold_assert(os != NULL); |
| 5683 | this->first_output_text_section_ = os; |
| 5684 | } |
| 5685 | |
| 5686 | return deleted_bytes; |
| 5687 | } |
| 5688 | |
| 5689 | // Arm_output_section methods. |
| 5690 | |
| 5691 | // Create a stub group for input sections from BEGIN to END. OWNER |
| 5692 | // points to the input section to be the owner a new stub table. |
| 5693 | |
| 5694 | template<bool big_endian> |
| 5695 | void |
| 5696 | Arm_output_section<big_endian>::create_stub_group( |
| 5697 | Input_section_list::const_iterator begin, |
| 5698 | Input_section_list::const_iterator end, |
| 5699 | Input_section_list::const_iterator owner, |
| 5700 | Target_arm<big_endian>* target, |
| 5701 | std::vector<Output_relaxed_input_section*>* new_relaxed_sections, |
| 5702 | const Task* task) |
| 5703 | { |
| 5704 | // We use a different kind of relaxed section in an EXIDX section. |
| 5705 | // The static casting from Output_relaxed_input_section to |
| 5706 | // Arm_input_section is invalid in an EXIDX section. We are okay |
| 5707 | // because we should not be calling this for an EXIDX section. |
| 5708 | gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX); |
| 5709 | |
| 5710 | // Currently we convert ordinary input sections into relaxed sections only |
| 5711 | // at this point but we may want to support creating relaxed input section |
| 5712 | // very early. So we check here to see if owner is already a relaxed |
| 5713 | // section. |
| 5714 | |
| 5715 | Arm_input_section<big_endian>* arm_input_section; |
| 5716 | if (owner->is_relaxed_input_section()) |
| 5717 | { |
| 5718 | arm_input_section = |
| 5719 | Arm_input_section<big_endian>::as_arm_input_section( |
| 5720 | owner->relaxed_input_section()); |
| 5721 | } |
| 5722 | else |
| 5723 | { |
| 5724 | gold_assert(owner->is_input_section()); |
| 5725 | // Create a new relaxed input section. We need to lock the original |
| 5726 | // file. |
| 5727 | Task_lock_obj<Object> tl(task, owner->relobj()); |
| 5728 | arm_input_section = |
| 5729 | target->new_arm_input_section(owner->relobj(), owner->shndx()); |
| 5730 | new_relaxed_sections->push_back(arm_input_section); |
| 5731 | } |
| 5732 | |
| 5733 | // Create a stub table. |
| 5734 | Stub_table<big_endian>* stub_table = |
| 5735 | target->new_stub_table(arm_input_section); |
| 5736 | |
| 5737 | arm_input_section->set_stub_table(stub_table); |
| 5738 | |
| 5739 | Input_section_list::const_iterator p = begin; |
| 5740 | Input_section_list::const_iterator prev_p; |
| 5741 | |
| 5742 | // Look for input sections or relaxed input sections in [begin ... end]. |
| 5743 | do |
| 5744 | { |
| 5745 | if (p->is_input_section() || p->is_relaxed_input_section()) |
| 5746 | { |
| 5747 | // The stub table information for input sections live |
| 5748 | // in their objects. |
| 5749 | Arm_relobj<big_endian>* arm_relobj = |
| 5750 | Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); |
| 5751 | arm_relobj->set_stub_table(p->shndx(), stub_table); |
| 5752 | } |
| 5753 | prev_p = p++; |
| 5754 | } |
| 5755 | while (prev_p != end); |
| 5756 | } |
| 5757 | |
| 5758 | // Group input sections for stub generation. GROUP_SIZE is roughly the limit |
| 5759 | // of stub groups. We grow a stub group by adding input section until the |
| 5760 | // size is just below GROUP_SIZE. The last input section will be converted |
| 5761 | // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add |
| 5762 | // input section after the stub table, effectively double the group size. |
| 5763 | // |
| 5764 | // This is similar to the group_sections() function in elf32-arm.c but is |
| 5765 | // implemented differently. |
| 5766 | |
| 5767 | template<bool big_endian> |
| 5768 | void |
| 5769 | Arm_output_section<big_endian>::group_sections( |
| 5770 | section_size_type group_size, |
| 5771 | bool stubs_always_after_branch, |
| 5772 | Target_arm<big_endian>* target, |
| 5773 | const Task* task) |
| 5774 | { |
| 5775 | // States for grouping. |
| 5776 | typedef enum |
| 5777 | { |
| 5778 | // No group is being built. |
| 5779 | NO_GROUP, |
| 5780 | // A group is being built but the stub table is not found yet. |
| 5781 | // We keep group a stub group until the size is just under GROUP_SIZE. |
| 5782 | // The last input section in the group will be used as the stub table. |
| 5783 | FINDING_STUB_SECTION, |
| 5784 | // A group is being built and we have already found a stub table. |
| 5785 | // We enter this state to grow a stub group by adding input section |
| 5786 | // after the stub table. This effectively doubles the group size. |
| 5787 | HAS_STUB_SECTION |
| 5788 | } State; |
| 5789 | |
| 5790 | // Any newly created relaxed sections are stored here. |
| 5791 | std::vector<Output_relaxed_input_section*> new_relaxed_sections; |
| 5792 | |
| 5793 | State state = NO_GROUP; |
| 5794 | section_size_type off = 0; |
| 5795 | section_size_type group_begin_offset = 0; |
| 5796 | section_size_type group_end_offset = 0; |
| 5797 | section_size_type stub_table_end_offset = 0; |
| 5798 | Input_section_list::const_iterator group_begin = |
| 5799 | this->input_sections().end(); |
| 5800 | Input_section_list::const_iterator stub_table = |
| 5801 | this->input_sections().end(); |
| 5802 | Input_section_list::const_iterator group_end = this->input_sections().end(); |
| 5803 | for (Input_section_list::const_iterator p = this->input_sections().begin(); |
| 5804 | p != this->input_sections().end(); |
| 5805 | ++p) |
| 5806 | { |
| 5807 | section_size_type section_begin_offset = |
| 5808 | align_address(off, p->addralign()); |
| 5809 | section_size_type section_end_offset = |
| 5810 | section_begin_offset + p->data_size(); |
| 5811 | |
| 5812 | // Check to see if we should group the previously seen sections. |
| 5813 | switch (state) |
| 5814 | { |
| 5815 | case NO_GROUP: |
| 5816 | break; |
| 5817 | |
| 5818 | case FINDING_STUB_SECTION: |
| 5819 | // Adding this section makes the group larger than GROUP_SIZE. |
| 5820 | if (section_end_offset - group_begin_offset >= group_size) |
| 5821 | { |
| 5822 | if (stubs_always_after_branch) |
| 5823 | { |
| 5824 | gold_assert(group_end != this->input_sections().end()); |
| 5825 | this->create_stub_group(group_begin, group_end, group_end, |
| 5826 | target, &new_relaxed_sections, |
| 5827 | task); |
| 5828 | state = NO_GROUP; |
| 5829 | } |
| 5830 | else |
| 5831 | { |
| 5832 | // But wait, there's more! Input sections up to |
| 5833 | // stub_group_size bytes after the stub table can be |
| 5834 | // handled by it too. |
| 5835 | state = HAS_STUB_SECTION; |
| 5836 | stub_table = group_end; |
| 5837 | stub_table_end_offset = group_end_offset; |
| 5838 | } |
| 5839 | } |
| 5840 | break; |
| 5841 | |
| 5842 | case HAS_STUB_SECTION: |
| 5843 | // Adding this section makes the post stub-section group larger |
| 5844 | // than GROUP_SIZE. |
| 5845 | if (section_end_offset - stub_table_end_offset >= group_size) |
| 5846 | { |
| 5847 | gold_assert(group_end != this->input_sections().end()); |
| 5848 | this->create_stub_group(group_begin, group_end, stub_table, |
| 5849 | target, &new_relaxed_sections, task); |
| 5850 | state = NO_GROUP; |
| 5851 | } |
| 5852 | break; |
| 5853 | |
| 5854 | default: |
| 5855 | gold_unreachable(); |
| 5856 | } |
| 5857 | |
| 5858 | // If we see an input section and currently there is no group, start |
| 5859 | // a new one. Skip any empty sections. We look at the data size |
| 5860 | // instead of calling p->relobj()->section_size() to avoid locking. |
| 5861 | if ((p->is_input_section() || p->is_relaxed_input_section()) |
| 5862 | && (p->data_size() != 0)) |
| 5863 | { |
| 5864 | if (state == NO_GROUP) |
| 5865 | { |
| 5866 | state = FINDING_STUB_SECTION; |
| 5867 | group_begin = p; |
| 5868 | group_begin_offset = section_begin_offset; |
| 5869 | } |
| 5870 | |
| 5871 | // Keep track of the last input section seen. |
| 5872 | group_end = p; |
| 5873 | group_end_offset = section_end_offset; |
| 5874 | } |
| 5875 | |
| 5876 | off = section_end_offset; |
| 5877 | } |
| 5878 | |
| 5879 | // Create a stub group for any ungrouped sections. |
| 5880 | if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION) |
| 5881 | { |
| 5882 | gold_assert(group_end != this->input_sections().end()); |
| 5883 | this->create_stub_group(group_begin, group_end, |
| 5884 | (state == FINDING_STUB_SECTION |
| 5885 | ? group_end |
| 5886 | : stub_table), |
| 5887 | target, &new_relaxed_sections, task); |
| 5888 | } |
| 5889 | |
| 5890 | // Convert input section into relaxed input section in a batch. |
| 5891 | if (!new_relaxed_sections.empty()) |
| 5892 | this->convert_input_sections_to_relaxed_sections(new_relaxed_sections); |
| 5893 | |
| 5894 | // Update the section offsets |
| 5895 | for (size_t i = 0; i < new_relaxed_sections.size(); ++i) |
| 5896 | { |
| 5897 | Arm_relobj<big_endian>* arm_relobj = |
| 5898 | Arm_relobj<big_endian>::as_arm_relobj( |
| 5899 | new_relaxed_sections[i]->relobj()); |
| 5900 | unsigned int shndx = new_relaxed_sections[i]->shndx(); |
| 5901 | // Tell Arm_relobj that this input section is converted. |
| 5902 | arm_relobj->convert_input_section_to_relaxed_section(shndx); |
| 5903 | } |
| 5904 | } |
| 5905 | |
| 5906 | // Append non empty text sections in this to LIST in ascending |
| 5907 | // order of their position in this. |
| 5908 | |
| 5909 | template<bool big_endian> |
| 5910 | void |
| 5911 | Arm_output_section<big_endian>::append_text_sections_to_list( |
| 5912 | Text_section_list* list) |
| 5913 | { |
| 5914 | gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0); |
| 5915 | |
| 5916 | for (Input_section_list::const_iterator p = this->input_sections().begin(); |
| 5917 | p != this->input_sections().end(); |
| 5918 | ++p) |
| 5919 | { |
| 5920 | // We only care about plain or relaxed input sections. We also |
| 5921 | // ignore any merged sections. |
| 5922 | if (p->is_input_section() || p->is_relaxed_input_section()) |
| 5923 | list->push_back(Text_section_list::value_type(p->relobj(), |
| 5924 | p->shndx())); |
| 5925 | } |
| 5926 | } |
| 5927 | |
| 5928 | template<bool big_endian> |
| 5929 | void |
| 5930 | Arm_output_section<big_endian>::fix_exidx_coverage( |
| 5931 | Layout* layout, |
| 5932 | const Text_section_list& sorted_text_sections, |
| 5933 | Symbol_table* symtab, |
| 5934 | bool merge_exidx_entries, |
| 5935 | const Task* task) |
| 5936 | { |
| 5937 | // We should only do this for the EXIDX output section. |
| 5938 | gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); |
| 5939 | |
| 5940 | // We don't want the relaxation loop to undo these changes, so we discard |
| 5941 | // the current saved states and take another one after the fix-up. |
| 5942 | this->discard_states(); |
| 5943 | |
| 5944 | // Remove all input sections. |
| 5945 | uint64_t address = this->address(); |
| 5946 | typedef std::list<Output_section::Input_section> Input_section_list; |
| 5947 | Input_section_list input_sections; |
| 5948 | this->reset_address_and_file_offset(); |
| 5949 | this->get_input_sections(address, std::string(""), &input_sections); |
| 5950 | |
| 5951 | if (!this->input_sections().empty()) |
| 5952 | gold_error(_("Found non-EXIDX input sections in EXIDX output section")); |
| 5953 | |
| 5954 | // Go through all the known input sections and record them. |
| 5955 | typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; |
| 5956 | typedef Unordered_map<Section_id, const Output_section::Input_section*, |
| 5957 | Section_id_hash> Text_to_exidx_map; |
| 5958 | Text_to_exidx_map text_to_exidx_map; |
| 5959 | for (Input_section_list::const_iterator p = input_sections.begin(); |
| 5960 | p != input_sections.end(); |
| 5961 | ++p) |
| 5962 | { |
| 5963 | // This should never happen. At this point, we should only see |
| 5964 | // plain EXIDX input sections. |
| 5965 | gold_assert(!p->is_relaxed_input_section()); |
| 5966 | text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p); |
| 5967 | } |
| 5968 | |
| 5969 | Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries); |
| 5970 | |
| 5971 | // Go over the sorted text sections. |
| 5972 | typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; |
| 5973 | Section_id_set processed_input_sections; |
| 5974 | for (Text_section_list::const_iterator p = sorted_text_sections.begin(); |
| 5975 | p != sorted_text_sections.end(); |
| 5976 | ++p) |
| 5977 | { |
| 5978 | Relobj* relobj = p->first; |
| 5979 | unsigned int shndx = p->second; |
| 5980 | |
| 5981 | Arm_relobj<big_endian>* arm_relobj = |
| 5982 | Arm_relobj<big_endian>::as_arm_relobj(relobj); |
| 5983 | const Arm_exidx_input_section* exidx_input_section = |
| 5984 | arm_relobj->exidx_input_section_by_link(shndx); |
| 5985 | |
| 5986 | // If this text section has no EXIDX section or if the EXIDX section |
| 5987 | // has errors, force an EXIDX_CANTUNWIND entry pointing to the end |
| 5988 | // of the last seen EXIDX section. |
| 5989 | if (exidx_input_section == NULL || exidx_input_section->has_errors()) |
| 5990 | { |
| 5991 | exidx_fixup.add_exidx_cantunwind_as_needed(); |
| 5992 | continue; |
| 5993 | } |
| 5994 | |
| 5995 | Relobj* exidx_relobj = exidx_input_section->relobj(); |
| 5996 | unsigned int exidx_shndx = exidx_input_section->shndx(); |
| 5997 | Section_id sid(exidx_relobj, exidx_shndx); |
| 5998 | Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid); |
| 5999 | if (iter == text_to_exidx_map.end()) |
| 6000 | { |
| 6001 | // This is odd. We have not seen this EXIDX input section before. |
| 6002 | // We cannot do fix-up. If we saw a SECTIONS clause in a script, |
| 6003 | // issue a warning instead. We assume the user knows what he |
| 6004 | // or she is doing. Otherwise, this is an error. |
| 6005 | if (layout->script_options()->saw_sections_clause()) |
| 6006 | gold_warning(_("unwinding may not work because EXIDX input section" |
| 6007 | " %u of %s is not in EXIDX output section"), |
| 6008 | exidx_shndx, exidx_relobj->name().c_str()); |
| 6009 | else |
| 6010 | gold_error(_("unwinding may not work because EXIDX input section" |
| 6011 | " %u of %s is not in EXIDX output section"), |
| 6012 | exidx_shndx, exidx_relobj->name().c_str()); |
| 6013 | |
| 6014 | exidx_fixup.add_exidx_cantunwind_as_needed(); |
| 6015 | continue; |
| 6016 | } |
| 6017 | |
| 6018 | // We need to access the contents of the EXIDX section, lock the |
| 6019 | // object here. |
| 6020 | Task_lock_obj<Object> tl(task, exidx_relobj); |
| 6021 | section_size_type exidx_size; |
| 6022 | const unsigned char* exidx_contents = |
| 6023 | exidx_relobj->section_contents(exidx_shndx, &exidx_size, false); |
| 6024 | |
| 6025 | // Fix up coverage and append input section to output data list. |
| 6026 | Arm_exidx_section_offset_map* section_offset_map = NULL; |
| 6027 | uint32_t deleted_bytes = |
| 6028 | exidx_fixup.process_exidx_section<big_endian>(exidx_input_section, |
| 6029 | exidx_contents, |
| 6030 | exidx_size, |
| 6031 | §ion_offset_map); |
| 6032 | |
| 6033 | if (deleted_bytes == exidx_input_section->size()) |
| 6034 | { |
| 6035 | // The whole EXIDX section got merged. Remove it from output. |
| 6036 | gold_assert(section_offset_map == NULL); |
| 6037 | exidx_relobj->set_output_section(exidx_shndx, NULL); |
| 6038 | |
| 6039 | // All local symbols defined in this input section will be dropped. |
| 6040 | // We need to adjust output local symbol count. |
| 6041 | arm_relobj->set_output_local_symbol_count_needs_update(); |
| 6042 | } |
| 6043 | else if (deleted_bytes > 0) |
| 6044 | { |
| 6045 | // Some entries are merged. We need to convert this EXIDX input |
| 6046 | // section into a relaxed section. |
| 6047 | gold_assert(section_offset_map != NULL); |
| 6048 | |
| 6049 | Arm_exidx_merged_section* merged_section = |
| 6050 | new Arm_exidx_merged_section(*exidx_input_section, |
| 6051 | *section_offset_map, deleted_bytes); |
| 6052 | merged_section->build_contents(exidx_contents, exidx_size); |
| 6053 | |
| 6054 | const std::string secname = exidx_relobj->section_name(exidx_shndx); |
| 6055 | this->add_relaxed_input_section(layout, merged_section, secname); |
| 6056 | arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx); |
| 6057 | |
| 6058 | // All local symbols defined in discarded portions of this input |
| 6059 | // section will be dropped. We need to adjust output local symbol |
| 6060 | // count. |
| 6061 | arm_relobj->set_output_local_symbol_count_needs_update(); |
| 6062 | } |
| 6063 | else |
| 6064 | { |
| 6065 | // Just add back the EXIDX input section. |
| 6066 | gold_assert(section_offset_map == NULL); |
| 6067 | const Output_section::Input_section* pis = iter->second; |
| 6068 | gold_assert(pis->is_input_section()); |
| 6069 | this->add_script_input_section(*pis); |
| 6070 | } |
| 6071 | |
| 6072 | processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx)); |
| 6073 | } |
| 6074 | |
| 6075 | // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary. |
| 6076 | exidx_fixup.add_exidx_cantunwind_as_needed(); |
| 6077 | |
| 6078 | // Remove any known EXIDX input sections that are not processed. |
| 6079 | for (Input_section_list::const_iterator p = input_sections.begin(); |
| 6080 | p != input_sections.end(); |
| 6081 | ++p) |
| 6082 | { |
| 6083 | if (processed_input_sections.find(Section_id(p->relobj(), p->shndx())) |
| 6084 | == processed_input_sections.end()) |
| 6085 | { |
| 6086 | // We discard a known EXIDX section because its linked |
| 6087 | // text section has been folded by ICF. We also discard an |
| 6088 | // EXIDX section with error, the output does not matter in this |
| 6089 | // case. We do this to avoid triggering asserts. |
| 6090 | Arm_relobj<big_endian>* arm_relobj = |
| 6091 | Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); |
| 6092 | const Arm_exidx_input_section* exidx_input_section = |
| 6093 | arm_relobj->exidx_input_section_by_shndx(p->shndx()); |
| 6094 | gold_assert(exidx_input_section != NULL); |
| 6095 | if (!exidx_input_section->has_errors()) |
| 6096 | { |
| 6097 | unsigned int text_shndx = exidx_input_section->link(); |
| 6098 | gold_assert(symtab->is_section_folded(p->relobj(), text_shndx)); |
| 6099 | } |
| 6100 | |
| 6101 | // Remove this from link. We also need to recount the |
| 6102 | // local symbols. |
| 6103 | p->relobj()->set_output_section(p->shndx(), NULL); |
| 6104 | arm_relobj->set_output_local_symbol_count_needs_update(); |
| 6105 | } |
| 6106 | } |
| 6107 | |
| 6108 | // Link exidx output section to the first seen output section and |
| 6109 | // set correct entry size. |
| 6110 | this->set_link_section(exidx_fixup.first_output_text_section()); |
| 6111 | this->set_entsize(8); |
| 6112 | |
| 6113 | // Make changes permanent. |
| 6114 | this->save_states(); |
| 6115 | this->set_section_offsets_need_adjustment(); |
| 6116 | } |
| 6117 | |
| 6118 | // Link EXIDX output sections to text output sections. |
| 6119 | |
| 6120 | template<bool big_endian> |
| 6121 | void |
| 6122 | Arm_output_section<big_endian>::set_exidx_section_link() |
| 6123 | { |
| 6124 | gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); |
| 6125 | if (!this->input_sections().empty()) |
| 6126 | { |
| 6127 | Input_section_list::const_iterator p = this->input_sections().begin(); |
| 6128 | Arm_relobj<big_endian>* arm_relobj = |
| 6129 | Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); |
| 6130 | unsigned exidx_shndx = p->shndx(); |
| 6131 | const Arm_exidx_input_section* exidx_input_section = |
| 6132 | arm_relobj->exidx_input_section_by_shndx(exidx_shndx); |
| 6133 | gold_assert(exidx_input_section != NULL); |
| 6134 | unsigned int text_shndx = exidx_input_section->link(); |
| 6135 | Output_section* os = arm_relobj->output_section(text_shndx); |
| 6136 | this->set_link_section(os); |
| 6137 | } |
| 6138 | } |
| 6139 | |
| 6140 | // Arm_relobj methods. |
| 6141 | |
| 6142 | // Determine if an input section is scannable for stub processing. SHDR is |
| 6143 | // the header of the section and SHNDX is the section index. OS is the output |
| 6144 | // section for the input section and SYMTAB is the global symbol table used to |
| 6145 | // look up ICF information. |
| 6146 | |
| 6147 | template<bool big_endian> |
| 6148 | bool |
| 6149 | Arm_relobj<big_endian>::section_is_scannable( |
| 6150 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 6151 | unsigned int shndx, |
| 6152 | const Output_section* os, |
| 6153 | const Symbol_table* symtab) |
| 6154 | { |
| 6155 | // Skip any empty sections, unallocated sections or sections whose |
| 6156 | // type are not SHT_PROGBITS. |
| 6157 | if (shdr.get_sh_size() == 0 |
| 6158 | || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0 |
| 6159 | || shdr.get_sh_type() != elfcpp::SHT_PROGBITS) |
| 6160 | return false; |
| 6161 | |
| 6162 | // Skip any discarded or ICF'ed sections. |
| 6163 | if (os == NULL || symtab->is_section_folded(this, shndx)) |
| 6164 | return false; |
| 6165 | |
| 6166 | // If this requires special offset handling, check to see if it is |
| 6167 | // a relaxed section. If this is not, then it is a merged section that |
| 6168 | // we cannot handle. |
| 6169 | if (this->is_output_section_offset_invalid(shndx)) |
| 6170 | { |
| 6171 | const Output_relaxed_input_section* poris = |
| 6172 | os->find_relaxed_input_section(this, shndx); |
| 6173 | if (poris == NULL) |
| 6174 | return false; |
| 6175 | } |
| 6176 | |
| 6177 | return true; |
| 6178 | } |
| 6179 | |
| 6180 | // Determine if we want to scan the SHNDX-th section for relocation stubs. |
| 6181 | // This is a helper for Arm_relobj::scan_sections_for_stubs() below. |
| 6182 | |
| 6183 | template<bool big_endian> |
| 6184 | bool |
| 6185 | Arm_relobj<big_endian>::section_needs_reloc_stub_scanning( |
| 6186 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 6187 | const Relobj::Output_sections& out_sections, |
| 6188 | const Symbol_table* symtab, |
| 6189 | const unsigned char* pshdrs) |
| 6190 | { |
| 6191 | unsigned int sh_type = shdr.get_sh_type(); |
| 6192 | if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA) |
| 6193 | return false; |
| 6194 | |
| 6195 | // Ignore empty section. |
| 6196 | off_t sh_size = shdr.get_sh_size(); |
| 6197 | if (sh_size == 0) |
| 6198 | return false; |
| 6199 | |
| 6200 | // Ignore reloc section with unexpected symbol table. The |
| 6201 | // error will be reported in the final link. |
| 6202 | if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx()) |
| 6203 | return false; |
| 6204 | |
| 6205 | unsigned int reloc_size; |
| 6206 | if (sh_type == elfcpp::SHT_REL) |
| 6207 | reloc_size = elfcpp::Elf_sizes<32>::rel_size; |
| 6208 | else |
| 6209 | reloc_size = elfcpp::Elf_sizes<32>::rela_size; |
| 6210 | |
| 6211 | // Ignore reloc section with unexpected entsize or uneven size. |
| 6212 | // The error will be reported in the final link. |
| 6213 | if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0) |
| 6214 | return false; |
| 6215 | |
| 6216 | // Ignore reloc section with bad info. This error will be |
| 6217 | // reported in the final link. |
| 6218 | unsigned int index = this->adjust_shndx(shdr.get_sh_info()); |
| 6219 | if (index >= this->shnum()) |
| 6220 | return false; |
| 6221 | |
| 6222 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; |
| 6223 | const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size); |
| 6224 | return this->section_is_scannable(text_shdr, index, |
| 6225 | out_sections[index], symtab); |
| 6226 | } |
| 6227 | |
| 6228 | // Return the output address of either a plain input section or a relaxed |
| 6229 | // input section. SHNDX is the section index. We define and use this |
| 6230 | // instead of calling Output_section::output_address because that is slow |
| 6231 | // for large output. |
| 6232 | |
| 6233 | template<bool big_endian> |
| 6234 | Arm_address |
| 6235 | Arm_relobj<big_endian>::simple_input_section_output_address( |
| 6236 | unsigned int shndx, |
| 6237 | Output_section* os) |
| 6238 | { |
| 6239 | if (this->is_output_section_offset_invalid(shndx)) |
| 6240 | { |
| 6241 | const Output_relaxed_input_section* poris = |
| 6242 | os->find_relaxed_input_section(this, shndx); |
| 6243 | // We do not handle merged sections here. |
| 6244 | gold_assert(poris != NULL); |
| 6245 | return poris->address(); |
| 6246 | } |
| 6247 | else |
| 6248 | return os->address() + this->get_output_section_offset(shndx); |
| 6249 | } |
| 6250 | |
| 6251 | // Determine if we want to scan the SHNDX-th section for non-relocation stubs. |
| 6252 | // This is a helper for Arm_relobj::scan_sections_for_stubs() below. |
| 6253 | |
| 6254 | template<bool big_endian> |
| 6255 | bool |
| 6256 | Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning( |
| 6257 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 6258 | unsigned int shndx, |
| 6259 | Output_section* os, |
| 6260 | const Symbol_table* symtab) |
| 6261 | { |
| 6262 | if (!this->section_is_scannable(shdr, shndx, os, symtab)) |
| 6263 | return false; |
| 6264 | |
| 6265 | // If the section does not cross any 4K-boundaries, it does not need to |
| 6266 | // be scanned. |
| 6267 | Arm_address address = this->simple_input_section_output_address(shndx, os); |
| 6268 | if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU)) |
| 6269 | return false; |
| 6270 | |
| 6271 | return true; |
| 6272 | } |
| 6273 | |
| 6274 | // Scan a section for Cortex-A8 workaround. |
| 6275 | |
| 6276 | template<bool big_endian> |
| 6277 | void |
| 6278 | Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum( |
| 6279 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 6280 | unsigned int shndx, |
| 6281 | Output_section* os, |
| 6282 | Target_arm<big_endian>* arm_target) |
| 6283 | { |
| 6284 | // Look for the first mapping symbol in this section. It should be |
| 6285 | // at (shndx, 0). |
| 6286 | Mapping_symbol_position section_start(shndx, 0); |
| 6287 | typename Mapping_symbols_info::const_iterator p = |
| 6288 | this->mapping_symbols_info_.lower_bound(section_start); |
| 6289 | |
| 6290 | // There are no mapping symbols for this section. Treat it as a data-only |
| 6291 | // section. |
| 6292 | if (p == this->mapping_symbols_info_.end() || p->first.first != shndx) |
| 6293 | return; |
| 6294 | |
| 6295 | Arm_address output_address = |
| 6296 | this->simple_input_section_output_address(shndx, os); |
| 6297 | |
| 6298 | // Get the section contents. |
| 6299 | section_size_type input_view_size = 0; |
| 6300 | const unsigned char* input_view = |
| 6301 | this->section_contents(shndx, &input_view_size, false); |
| 6302 | |
| 6303 | // We need to go through the mapping symbols to determine what to |
| 6304 | // scan. There are two reasons. First, we should look at THUMB code and |
| 6305 | // THUMB code only. Second, we only want to look at the 4K-page boundary |
| 6306 | // to speed up the scanning. |
| 6307 | |
| 6308 | while (p != this->mapping_symbols_info_.end() |
| 6309 | && p->first.first == shndx) |
| 6310 | { |
| 6311 | typename Mapping_symbols_info::const_iterator next = |
| 6312 | this->mapping_symbols_info_.upper_bound(p->first); |
| 6313 | |
| 6314 | // Only scan part of a section with THUMB code. |
| 6315 | if (p->second == 't') |
| 6316 | { |
| 6317 | // Determine the end of this range. |
| 6318 | section_size_type span_start = |
| 6319 | convert_to_section_size_type(p->first.second); |
| 6320 | section_size_type span_end; |
| 6321 | if (next != this->mapping_symbols_info_.end() |
| 6322 | && next->first.first == shndx) |
| 6323 | span_end = convert_to_section_size_type(next->first.second); |
| 6324 | else |
| 6325 | span_end = convert_to_section_size_type(shdr.get_sh_size()); |
| 6326 | |
| 6327 | if (((span_start + output_address) & ~0xfffUL) |
| 6328 | != ((span_end + output_address - 1) & ~0xfffUL)) |
| 6329 | { |
| 6330 | arm_target->scan_span_for_cortex_a8_erratum(this, shndx, |
| 6331 | span_start, span_end, |
| 6332 | input_view, |
| 6333 | output_address); |
| 6334 | } |
| 6335 | } |
| 6336 | |
| 6337 | p = next; |
| 6338 | } |
| 6339 | } |
| 6340 | |
| 6341 | // Scan relocations for stub generation. |
| 6342 | |
| 6343 | template<bool big_endian> |
| 6344 | void |
| 6345 | Arm_relobj<big_endian>::scan_sections_for_stubs( |
| 6346 | Target_arm<big_endian>* arm_target, |
| 6347 | const Symbol_table* symtab, |
| 6348 | const Layout* layout) |
| 6349 | { |
| 6350 | unsigned int shnum = this->shnum(); |
| 6351 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; |
| 6352 | |
| 6353 | // Read the section headers. |
| 6354 | const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), |
| 6355 | shnum * shdr_size, |
| 6356 | true, true); |
| 6357 | |
| 6358 | // To speed up processing, we set up hash tables for fast lookup of |
| 6359 | // input offsets to output addresses. |
| 6360 | this->initialize_input_to_output_maps(); |
| 6361 | |
| 6362 | const Relobj::Output_sections& out_sections(this->output_sections()); |
| 6363 | |
| 6364 | Relocate_info<32, big_endian> relinfo; |
| 6365 | relinfo.symtab = symtab; |
| 6366 | relinfo.layout = layout; |
| 6367 | relinfo.object = this; |
| 6368 | |
| 6369 | // Do relocation stubs scanning. |
| 6370 | const unsigned char* p = pshdrs + shdr_size; |
| 6371 | for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) |
| 6372 | { |
| 6373 | const elfcpp::Shdr<32, big_endian> shdr(p); |
| 6374 | if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab, |
| 6375 | pshdrs)) |
| 6376 | { |
| 6377 | unsigned int index = this->adjust_shndx(shdr.get_sh_info()); |
| 6378 | Arm_address output_offset = this->get_output_section_offset(index); |
| 6379 | Arm_address output_address; |
| 6380 | if (output_offset != invalid_address) |
| 6381 | output_address = out_sections[index]->address() + output_offset; |
| 6382 | else |
| 6383 | { |
| 6384 | // Currently this only happens for a relaxed section. |
| 6385 | const Output_relaxed_input_section* poris = |
| 6386 | out_sections[index]->find_relaxed_input_section(this, index); |
| 6387 | gold_assert(poris != NULL); |
| 6388 | output_address = poris->address(); |
| 6389 | } |
| 6390 | |
| 6391 | // Get the relocations. |
| 6392 | const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(), |
| 6393 | shdr.get_sh_size(), |
| 6394 | true, false); |
| 6395 | |
| 6396 | // Get the section contents. This does work for the case in which |
| 6397 | // we modify the contents of an input section. We need to pass the |
| 6398 | // output view under such circumstances. |
| 6399 | section_size_type input_view_size = 0; |
| 6400 | const unsigned char* input_view = |
| 6401 | this->section_contents(index, &input_view_size, false); |
| 6402 | |
| 6403 | relinfo.reloc_shndx = i; |
| 6404 | relinfo.data_shndx = index; |
| 6405 | unsigned int sh_type = shdr.get_sh_type(); |
| 6406 | unsigned int reloc_size; |
| 6407 | if (sh_type == elfcpp::SHT_REL) |
| 6408 | reloc_size = elfcpp::Elf_sizes<32>::rel_size; |
| 6409 | else |
| 6410 | reloc_size = elfcpp::Elf_sizes<32>::rela_size; |
| 6411 | |
| 6412 | Output_section* os = out_sections[index]; |
| 6413 | arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs, |
| 6414 | shdr.get_sh_size() / reloc_size, |
| 6415 | os, |
| 6416 | output_offset == invalid_address, |
| 6417 | input_view, output_address, |
| 6418 | input_view_size); |
| 6419 | } |
| 6420 | } |
| 6421 | |
| 6422 | // Do Cortex-A8 erratum stubs scanning. This has to be done for a section |
| 6423 | // after its relocation section, if there is one, is processed for |
| 6424 | // relocation stubs. Merging this loop with the one above would have been |
| 6425 | // complicated since we would have had to make sure that relocation stub |
| 6426 | // scanning is done first. |
| 6427 | if (arm_target->fix_cortex_a8()) |
| 6428 | { |
| 6429 | const unsigned char* p = pshdrs + shdr_size; |
| 6430 | for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) |
| 6431 | { |
| 6432 | const elfcpp::Shdr<32, big_endian> shdr(p); |
| 6433 | if (this->section_needs_cortex_a8_stub_scanning(shdr, i, |
| 6434 | out_sections[i], |
| 6435 | symtab)) |
| 6436 | this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i], |
| 6437 | arm_target); |
| 6438 | } |
| 6439 | } |
| 6440 | |
| 6441 | // After we've done the relocations, we release the hash tables, |
| 6442 | // since we no longer need them. |
| 6443 | this->free_input_to_output_maps(); |
| 6444 | } |
| 6445 | |
| 6446 | // Count the local symbols. The ARM backend needs to know if a symbol |
| 6447 | // is a THUMB function or not. For global symbols, it is easy because |
| 6448 | // the Symbol object keeps the ELF symbol type. For local symbol it is |
| 6449 | // harder because we cannot access this information. So we override the |
| 6450 | // do_count_local_symbol in parent and scan local symbols to mark |
| 6451 | // THUMB functions. This is not the most efficient way but I do not want to |
| 6452 | // slow down other ports by calling a per symbol target hook inside |
| 6453 | // Sized_relobj_file<size, big_endian>::do_count_local_symbols. |
| 6454 | |
| 6455 | template<bool big_endian> |
| 6456 | void |
| 6457 | Arm_relobj<big_endian>::do_count_local_symbols( |
| 6458 | Stringpool_template<char>* pool, |
| 6459 | Stringpool_template<char>* dynpool) |
| 6460 | { |
| 6461 | // We need to fix-up the values of any local symbols whose type are |
| 6462 | // STT_ARM_TFUNC. |
| 6463 | |
| 6464 | // Ask parent to count the local symbols. |
| 6465 | Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool); |
| 6466 | const unsigned int loccount = this->local_symbol_count(); |
| 6467 | if (loccount == 0) |
| 6468 | return; |
| 6469 | |
| 6470 | // Initialize the thumb function bit-vector. |
| 6471 | std::vector<bool> empty_vector(loccount, false); |
| 6472 | this->local_symbol_is_thumb_function_.swap(empty_vector); |
| 6473 | |
| 6474 | // Read the symbol table section header. |
| 6475 | const unsigned int symtab_shndx = this->symtab_shndx(); |
| 6476 | elfcpp::Shdr<32, big_endian> |
| 6477 | symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); |
| 6478 | gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); |
| 6479 | |
| 6480 | // Read the local symbols. |
| 6481 | const int sym_size =elfcpp::Elf_sizes<32>::sym_size; |
| 6482 | gold_assert(loccount == symtabshdr.get_sh_info()); |
| 6483 | off_t locsize = loccount * sym_size; |
| 6484 | const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), |
| 6485 | locsize, true, true); |
| 6486 | |
| 6487 | // For mapping symbol processing, we need to read the symbol names. |
| 6488 | unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link()); |
| 6489 | if (strtab_shndx >= this->shnum()) |
| 6490 | { |
| 6491 | this->error(_("invalid symbol table name index: %u"), strtab_shndx); |
| 6492 | return; |
| 6493 | } |
| 6494 | |
| 6495 | elfcpp::Shdr<32, big_endian> |
| 6496 | strtabshdr(this, this->elf_file()->section_header(strtab_shndx)); |
| 6497 | if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB) |
| 6498 | { |
| 6499 | this->error(_("symbol table name section has wrong type: %u"), |
| 6500 | static_cast<unsigned int>(strtabshdr.get_sh_type())); |
| 6501 | return; |
| 6502 | } |
| 6503 | const char* pnames = |
| 6504 | reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(), |
| 6505 | strtabshdr.get_sh_size(), |
| 6506 | false, false)); |
| 6507 | |
| 6508 | // Loop over the local symbols and mark any local symbols pointing |
| 6509 | // to THUMB functions. |
| 6510 | |
| 6511 | // Skip the first dummy symbol. |
| 6512 | psyms += sym_size; |
| 6513 | typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values = |
| 6514 | this->local_values(); |
| 6515 | for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) |
| 6516 | { |
| 6517 | elfcpp::Sym<32, big_endian> sym(psyms); |
| 6518 | elfcpp::STT st_type = sym.get_st_type(); |
| 6519 | Symbol_value<32>& lv((*plocal_values)[i]); |
| 6520 | Arm_address input_value = lv.input_value(); |
| 6521 | |
| 6522 | // Check to see if this is a mapping symbol. |
| 6523 | const char* sym_name = pnames + sym.get_st_name(); |
| 6524 | if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name)) |
| 6525 | { |
| 6526 | bool is_ordinary; |
| 6527 | unsigned int input_shndx = |
| 6528 | this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary); |
| 6529 | gold_assert(is_ordinary); |
| 6530 | |
| 6531 | // Strip of LSB in case this is a THUMB symbol. |
| 6532 | Mapping_symbol_position msp(input_shndx, input_value & ~1U); |
| 6533 | this->mapping_symbols_info_[msp] = sym_name[1]; |
| 6534 | } |
| 6535 | |
| 6536 | if (st_type == elfcpp::STT_ARM_TFUNC |
| 6537 | || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0))) |
| 6538 | { |
| 6539 | // This is a THUMB function. Mark this and canonicalize the |
| 6540 | // symbol value by setting LSB. |
| 6541 | this->local_symbol_is_thumb_function_[i] = true; |
| 6542 | if ((input_value & 1) == 0) |
| 6543 | lv.set_input_value(input_value | 1); |
| 6544 | } |
| 6545 | } |
| 6546 | } |
| 6547 | |
| 6548 | // Relocate sections. |
| 6549 | template<bool big_endian> |
| 6550 | void |
| 6551 | Arm_relobj<big_endian>::do_relocate_sections( |
| 6552 | const Symbol_table* symtab, |
| 6553 | const Layout* layout, |
| 6554 | const unsigned char* pshdrs, |
| 6555 | Output_file* of, |
| 6556 | typename Sized_relobj_file<32, big_endian>::Views* pviews) |
| 6557 | { |
| 6558 | // Call parent to relocate sections. |
| 6559 | Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout, |
| 6560 | pshdrs, of, pviews); |
| 6561 | |
| 6562 | // We do not generate stubs if doing a relocatable link. |
| 6563 | if (parameters->options().relocatable()) |
| 6564 | return; |
| 6565 | |
| 6566 | // Relocate stub tables. |
| 6567 | unsigned int shnum = this->shnum(); |
| 6568 | |
| 6569 | Target_arm<big_endian>* arm_target = |
| 6570 | Target_arm<big_endian>::default_target(); |
| 6571 | |
| 6572 | Relocate_info<32, big_endian> relinfo; |
| 6573 | relinfo.symtab = symtab; |
| 6574 | relinfo.layout = layout; |
| 6575 | relinfo.object = this; |
| 6576 | |
| 6577 | for (unsigned int i = 1; i < shnum; ++i) |
| 6578 | { |
| 6579 | Arm_input_section<big_endian>* arm_input_section = |
| 6580 | arm_target->find_arm_input_section(this, i); |
| 6581 | |
| 6582 | if (arm_input_section != NULL |
| 6583 | && arm_input_section->is_stub_table_owner() |
| 6584 | && !arm_input_section->stub_table()->empty()) |
| 6585 | { |
| 6586 | // We cannot discard a section if it owns a stub table. |
| 6587 | Output_section* os = this->output_section(i); |
| 6588 | gold_assert(os != NULL); |
| 6589 | |
| 6590 | relinfo.reloc_shndx = elfcpp::SHN_UNDEF; |
| 6591 | relinfo.reloc_shdr = NULL; |
| 6592 | relinfo.data_shndx = i; |
| 6593 | relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size; |
| 6594 | |
| 6595 | gold_assert((*pviews)[i].view != NULL); |
| 6596 | |
| 6597 | // We are passed the output section view. Adjust it to cover the |
| 6598 | // stub table only. |
| 6599 | Stub_table<big_endian>* stub_table = arm_input_section->stub_table(); |
| 6600 | gold_assert((stub_table->address() >= (*pviews)[i].address) |
| 6601 | && ((stub_table->address() + stub_table->data_size()) |
| 6602 | <= (*pviews)[i].address + (*pviews)[i].view_size)); |
| 6603 | |
| 6604 | off_t offset = stub_table->address() - (*pviews)[i].address; |
| 6605 | unsigned char* view = (*pviews)[i].view + offset; |
| 6606 | Arm_address address = stub_table->address(); |
| 6607 | section_size_type view_size = stub_table->data_size(); |
| 6608 | |
| 6609 | stub_table->relocate_stubs(&relinfo, arm_target, os, view, address, |
| 6610 | view_size); |
| 6611 | } |
| 6612 | |
| 6613 | // Apply Cortex A8 workaround if applicable. |
| 6614 | if (this->section_has_cortex_a8_workaround(i)) |
| 6615 | { |
| 6616 | unsigned char* view = (*pviews)[i].view; |
| 6617 | Arm_address view_address = (*pviews)[i].address; |
| 6618 | section_size_type view_size = (*pviews)[i].view_size; |
| 6619 | Stub_table<big_endian>* stub_table = this->stub_tables_[i]; |
| 6620 | |
| 6621 | // Adjust view to cover section. |
| 6622 | Output_section* os = this->output_section(i); |
| 6623 | gold_assert(os != NULL); |
| 6624 | Arm_address section_address = |
| 6625 | this->simple_input_section_output_address(i, os); |
| 6626 | uint64_t section_size = this->section_size(i); |
| 6627 | |
| 6628 | gold_assert(section_address >= view_address |
| 6629 | && ((section_address + section_size) |
| 6630 | <= (view_address + view_size))); |
| 6631 | |
| 6632 | unsigned char* section_view = view + (section_address - view_address); |
| 6633 | |
| 6634 | // Apply the Cortex-A8 workaround to the output address range |
| 6635 | // corresponding to this input section. |
| 6636 | stub_table->apply_cortex_a8_workaround_to_address_range( |
| 6637 | arm_target, |
| 6638 | section_view, |
| 6639 | section_address, |
| 6640 | section_size); |
| 6641 | } |
| 6642 | } |
| 6643 | } |
| 6644 | |
| 6645 | // Find the linked text section of an EXIDX section by looking at the first |
| 6646 | // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section |
| 6647 | // must be linked to its associated code section via the sh_link field of |
| 6648 | // its section header. However, some tools are broken and the link is not |
| 6649 | // always set. LD just drops such an EXIDX section silently, causing the |
| 6650 | // associated code not unwindabled. Here we try a little bit harder to |
| 6651 | // discover the linked code section. |
| 6652 | // |
| 6653 | // PSHDR points to the section header of a relocation section of an EXIDX |
| 6654 | // section. If we can find a linked text section, return true and |
| 6655 | // store the text section index in the location PSHNDX. Otherwise |
| 6656 | // return false. |
| 6657 | |
| 6658 | template<bool big_endian> |
| 6659 | bool |
| 6660 | Arm_relobj<big_endian>::find_linked_text_section( |
| 6661 | const unsigned char* pshdr, |
| 6662 | const unsigned char* psyms, |
| 6663 | unsigned int* pshndx) |
| 6664 | { |
| 6665 | elfcpp::Shdr<32, big_endian> shdr(pshdr); |
| 6666 | |
| 6667 | // If there is no relocation, we cannot find the linked text section. |
| 6668 | size_t reloc_size; |
| 6669 | if (shdr.get_sh_type() == elfcpp::SHT_REL) |
| 6670 | reloc_size = elfcpp::Elf_sizes<32>::rel_size; |
| 6671 | else |
| 6672 | reloc_size = elfcpp::Elf_sizes<32>::rela_size; |
| 6673 | size_t reloc_count = shdr.get_sh_size() / reloc_size; |
| 6674 | |
| 6675 | // Get the relocations. |
| 6676 | const unsigned char* prelocs = |
| 6677 | this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false); |
| 6678 | |
| 6679 | // Find the REL31 relocation for the first word of the first EXIDX entry. |
| 6680 | for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) |
| 6681 | { |
| 6682 | Arm_address r_offset; |
| 6683 | typename elfcpp::Elf_types<32>::Elf_WXword r_info; |
| 6684 | if (shdr.get_sh_type() == elfcpp::SHT_REL) |
| 6685 | { |
| 6686 | typename elfcpp::Rel<32, big_endian> reloc(prelocs); |
| 6687 | r_info = reloc.get_r_info(); |
| 6688 | r_offset = reloc.get_r_offset(); |
| 6689 | } |
| 6690 | else |
| 6691 | { |
| 6692 | typename elfcpp::Rela<32, big_endian> reloc(prelocs); |
| 6693 | r_info = reloc.get_r_info(); |
| 6694 | r_offset = reloc.get_r_offset(); |
| 6695 | } |
| 6696 | |
| 6697 | unsigned int r_type = elfcpp::elf_r_type<32>(r_info); |
| 6698 | if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31) |
| 6699 | continue; |
| 6700 | |
| 6701 | unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); |
| 6702 | if (r_sym == 0 |
| 6703 | || r_sym >= this->local_symbol_count() |
| 6704 | || r_offset != 0) |
| 6705 | continue; |
| 6706 | |
| 6707 | // This is the relocation for the first word of the first EXIDX entry. |
| 6708 | // We expect to see a local section symbol. |
| 6709 | const int sym_size = elfcpp::Elf_sizes<32>::sym_size; |
| 6710 | elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size); |
| 6711 | if (sym.get_st_type() == elfcpp::STT_SECTION) |
| 6712 | { |
| 6713 | bool is_ordinary; |
| 6714 | *pshndx = |
| 6715 | this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary); |
| 6716 | gold_assert(is_ordinary); |
| 6717 | return true; |
| 6718 | } |
| 6719 | else |
| 6720 | return false; |
| 6721 | } |
| 6722 | |
| 6723 | return false; |
| 6724 | } |
| 6725 | |
| 6726 | // Make an EXIDX input section object for an EXIDX section whose index is |
| 6727 | // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX |
| 6728 | // is the section index of the linked text section. |
| 6729 | |
| 6730 | template<bool big_endian> |
| 6731 | void |
| 6732 | Arm_relobj<big_endian>::make_exidx_input_section( |
| 6733 | unsigned int shndx, |
| 6734 | const elfcpp::Shdr<32, big_endian>& shdr, |
| 6735 | unsigned int text_shndx, |
| 6736 | const elfcpp::Shdr<32, big_endian>& text_shdr) |
| 6737 | { |
| 6738 | // Create an Arm_exidx_input_section object for this EXIDX section. |
| 6739 | Arm_exidx_input_section* exidx_input_section = |
| 6740 | new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(), |
| 6741 | shdr.get_sh_addralign(), |
| 6742 | text_shdr.get_sh_size()); |
| 6743 | |
| 6744 | gold_assert(this->exidx_section_map_[shndx] == NULL); |
| 6745 | this->exidx_section_map_[shndx] = exidx_input_section; |
| 6746 | |
| 6747 | if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum()) |
| 6748 | { |
| 6749 | gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"), |
| 6750 | this->section_name(shndx).c_str(), shndx, text_shndx, |
| 6751 | this->name().c_str()); |
| 6752 | exidx_input_section->set_has_errors(); |
| 6753 | } |
| 6754 | else if (this->exidx_section_map_[text_shndx] != NULL) |
| 6755 | { |
| 6756 | unsigned other_exidx_shndx = |
| 6757 | this->exidx_section_map_[text_shndx]->shndx(); |
| 6758 | gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section" |
| 6759 | "%s(%u) in %s"), |
| 6760 | this->section_name(shndx).c_str(), shndx, |
| 6761 | this->section_name(other_exidx_shndx).c_str(), |
| 6762 | other_exidx_shndx, this->section_name(text_shndx).c_str(), |
| 6763 | text_shndx, this->name().c_str()); |
| 6764 | exidx_input_section->set_has_errors(); |
| 6765 | } |
| 6766 | else |
| 6767 | this->exidx_section_map_[text_shndx] = exidx_input_section; |
| 6768 | |
| 6769 | // Check section flags of text section. |
| 6770 | if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0) |
| 6771 | { |
| 6772 | gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) " |
| 6773 | " in %s"), |
| 6774 | this->section_name(shndx).c_str(), shndx, |
| 6775 | this->section_name(text_shndx).c_str(), text_shndx, |
| 6776 | this->name().c_str()); |
| 6777 | exidx_input_section->set_has_errors(); |
| 6778 | } |
| 6779 | else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0) |
| 6780 | // I would like to make this an error but currently ld just ignores |
| 6781 | // this. |
| 6782 | gold_warning(_("EXIDX section %s(%u) links to non-executable section " |
| 6783 | "%s(%u) in %s"), |
| 6784 | this->section_name(shndx).c_str(), shndx, |
| 6785 | this->section_name(text_shndx).c_str(), text_shndx, |
| 6786 | this->name().c_str()); |
| 6787 | } |
| 6788 | |
| 6789 | // Read the symbol information. |
| 6790 | |
| 6791 | template<bool big_endian> |
| 6792 | void |
| 6793 | Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd) |
| 6794 | { |
| 6795 | // Call parent class to read symbol information. |
| 6796 | this->base_read_symbols(sd); |
| 6797 | |
| 6798 | // If this input file is a binary file, it has no processor |
| 6799 | // specific flags and attributes section. |
| 6800 | Input_file::Format format = this->input_file()->format(); |
| 6801 | if (format != Input_file::FORMAT_ELF) |
| 6802 | { |
| 6803 | gold_assert(format == Input_file::FORMAT_BINARY); |
| 6804 | this->merge_flags_and_attributes_ = false; |
| 6805 | return; |
| 6806 | } |
| 6807 | |
| 6808 | // Read processor-specific flags in ELF file header. |
| 6809 | const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, |
| 6810 | elfcpp::Elf_sizes<32>::ehdr_size, |
| 6811 | true, false); |
| 6812 | elfcpp::Ehdr<32, big_endian> ehdr(pehdr); |
| 6813 | this->processor_specific_flags_ = ehdr.get_e_flags(); |
| 6814 | |
| 6815 | // Go over the section headers and look for .ARM.attributes and .ARM.exidx |
| 6816 | // sections. |
| 6817 | std::vector<unsigned int> deferred_exidx_sections; |
| 6818 | const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; |
| 6819 | const unsigned char* pshdrs = sd->section_headers->data(); |
| 6820 | const unsigned char* ps = pshdrs + shdr_size; |
| 6821 | bool must_merge_flags_and_attributes = false; |
| 6822 | for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) |
| 6823 | { |
| 6824 | elfcpp::Shdr<32, big_endian> shdr(ps); |
| 6825 | |
| 6826 | // Sometimes an object has no contents except the section name string |
| 6827 | // table and an empty symbol table with the undefined symbol. We |
| 6828 | // don't want to merge processor-specific flags from such an object. |
| 6829 | if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB) |
| 6830 | { |
| 6831 | // Symbol table is not empty. |
| 6832 | const elfcpp::Elf_types<32>::Elf_WXword sym_size = |
| 6833 | elfcpp::Elf_sizes<32>::sym_size; |
| 6834 | if (shdr.get_sh_size() > sym_size) |
| 6835 | must_merge_flags_and_attributes = true; |
| 6836 | } |
| 6837 | else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB) |
| 6838 | // If this is neither an empty symbol table nor a string table, |
| 6839 | // be conservative. |
| 6840 | must_merge_flags_and_attributes = true; |
| 6841 | |
| 6842 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) |
| 6843 | { |
| 6844 | gold_assert(this->attributes_section_data_ == NULL); |
| 6845 | section_offset_type section_offset = shdr.get_sh_offset(); |
| 6846 | section_size_type section_size = |
| 6847 | convert_to_section_size_type(shdr.get_sh_size()); |
| 6848 | const unsigned char* view = |
| 6849 | this->get_view(section_offset, section_size, true, false); |
| 6850 | this->attributes_section_data_ = |
| 6851 | new Attributes_section_data(view, section_size); |
| 6852 | } |
| 6853 | else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) |
| 6854 | { |
| 6855 | unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); |
| 6856 | if (text_shndx == elfcpp::SHN_UNDEF) |
| 6857 | deferred_exidx_sections.push_back(i); |
| 6858 | else |
| 6859 | { |
| 6860 | elfcpp::Shdr<32, big_endian> text_shdr(pshdrs |
| 6861 | + text_shndx * shdr_size); |
| 6862 | this->make_exidx_input_section(i, shdr, text_shndx, text_shdr); |
| 6863 | } |
| 6864 | // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set. |
| 6865 | if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0) |
| 6866 | gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"), |
| 6867 | this->section_name(i).c_str(), this->name().c_str()); |
| 6868 | } |
| 6869 | } |
| 6870 | |
| 6871 | // This is rare. |
| 6872 | if (!must_merge_flags_and_attributes) |
| 6873 | { |
| 6874 | gold_assert(deferred_exidx_sections.empty()); |
| 6875 | this->merge_flags_and_attributes_ = false; |
| 6876 | return; |
| 6877 | } |
| 6878 | |
| 6879 | // Some tools are broken and they do not set the link of EXIDX sections. |
| 6880 | // We look at the first relocation to figure out the linked sections. |
| 6881 | if (!deferred_exidx_sections.empty()) |
| 6882 | { |
| 6883 | // We need to go over the section headers again to find the mapping |
| 6884 | // from sections being relocated to their relocation sections. This is |
| 6885 | // a bit inefficient as we could do that in the loop above. However, |
| 6886 | // we do not expect any deferred EXIDX sections normally. So we do not |
| 6887 | // want to slow down the most common path. |
| 6888 | typedef Unordered_map<unsigned int, unsigned int> Reloc_map; |
| 6889 | Reloc_map reloc_map; |
| 6890 | ps = pshdrs + shdr_size; |
| 6891 | for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) |
| 6892 | { |
| 6893 | elfcpp::Shdr<32, big_endian> shdr(ps); |
| 6894 | elfcpp::Elf_Word sh_type = shdr.get_sh_type(); |
| 6895 | if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA) |
| 6896 | { |
| 6897 | unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info()); |
| 6898 | if (info_shndx >= this->shnum()) |
| 6899 | gold_error(_("relocation section %u has invalid info %u"), |
| 6900 | i, info_shndx); |
| 6901 | Reloc_map::value_type value(info_shndx, i); |
| 6902 | std::pair<Reloc_map::iterator, bool> result = |
| 6903 | reloc_map.insert(value); |
| 6904 | if (!result.second) |
| 6905 | gold_error(_("section %u has multiple relocation sections " |
| 6906 | "%u and %u"), |
| 6907 | info_shndx, i, reloc_map[info_shndx]); |
| 6908 | } |
| 6909 | } |
| 6910 | |
| 6911 | // Read the symbol table section header. |
| 6912 | const unsigned int symtab_shndx = this->symtab_shndx(); |
| 6913 | elfcpp::Shdr<32, big_endian> |
| 6914 | symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); |
| 6915 | gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); |
| 6916 | |
| 6917 | // Read the local symbols. |
| 6918 | const int sym_size =elfcpp::Elf_sizes<32>::sym_size; |
| 6919 | const unsigned int loccount = this->local_symbol_count(); |
| 6920 | gold_assert(loccount == symtabshdr.get_sh_info()); |
| 6921 | off_t locsize = loccount * sym_size; |
| 6922 | const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), |
| 6923 | locsize, true, true); |
| 6924 | |
| 6925 | // Process the deferred EXIDX sections. |
| 6926 | for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i) |
| 6927 | { |
| 6928 | unsigned int shndx = deferred_exidx_sections[i]; |
| 6929 | elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size); |
| 6930 | unsigned int text_shndx = elfcpp::SHN_UNDEF; |
| 6931 | Reloc_map::const_iterator it = reloc_map.find(shndx); |
| 6932 | if (it != reloc_map.end()) |
| 6933 | find_linked_text_section(pshdrs + it->second * shdr_size, |
| 6934 | psyms, &text_shndx); |
| 6935 | elfcpp::Shdr<32, big_endian> text_shdr(pshdrs |
| 6936 | + text_shndx * shdr_size); |
| 6937 | this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr); |
| 6938 | } |
| 6939 | } |
| 6940 | } |
| 6941 | |
| 6942 | // Process relocations for garbage collection. The ARM target uses .ARM.exidx |
| 6943 | // sections for unwinding. These sections are referenced implicitly by |
| 6944 | // text sections linked in the section headers. If we ignore these implicit |
| 6945 | // references, the .ARM.exidx sections and any .ARM.extab sections they use |
| 6946 | // will be garbage-collected incorrectly. Hence we override the same function |
| 6947 | // in the base class to handle these implicit references. |
| 6948 | |
| 6949 | template<bool big_endian> |
| 6950 | void |
| 6951 | Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab, |
| 6952 | Layout* layout, |
| 6953 | Read_relocs_data* rd) |
| 6954 | { |
| 6955 | // First, call base class method to process relocations in this object. |
| 6956 | Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); |
| 6957 | |
| 6958 | // If --gc-sections is not specified, there is nothing more to do. |
| 6959 | // This happens when --icf is used but --gc-sections is not. |
| 6960 | if (!parameters->options().gc_sections()) |
| 6961 | return; |
| 6962 | |
| 6963 | unsigned int shnum = this->shnum(); |
| 6964 | const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; |
| 6965 | const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), |
| 6966 | shnum * shdr_size, |
| 6967 | true, true); |
| 6968 | |
| 6969 | // Scan section headers for sections of type SHT_ARM_EXIDX. Add references |
| 6970 | // to these from the linked text sections. |
| 6971 | const unsigned char* ps = pshdrs + shdr_size; |
| 6972 | for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size) |
| 6973 | { |
| 6974 | elfcpp::Shdr<32, big_endian> shdr(ps); |
| 6975 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) |
| 6976 | { |
| 6977 | // Found an .ARM.exidx section, add it to the set of reachable |
| 6978 | // sections from its linked text section. |
| 6979 | unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); |
| 6980 | symtab->gc()->add_reference(this, text_shndx, this, i); |
| 6981 | } |
| 6982 | } |
| 6983 | } |
| 6984 | |
| 6985 | // Update output local symbol count. Owing to EXIDX entry merging, some local |
| 6986 | // symbols will be removed in output. Adjust output local symbol count |
| 6987 | // accordingly. We can only changed the static output local symbol count. It |
| 6988 | // is too late to change the dynamic symbols. |
| 6989 | |
| 6990 | template<bool big_endian> |
| 6991 | void |
| 6992 | Arm_relobj<big_endian>::update_output_local_symbol_count() |
| 6993 | { |
| 6994 | // Caller should check that this needs updating. We want caller checking |
| 6995 | // because output_local_symbol_count_needs_update() is most likely inlined. |
| 6996 | gold_assert(this->output_local_symbol_count_needs_update_); |
| 6997 | |
| 6998 | gold_assert(this->symtab_shndx() != -1U); |
| 6999 | if (this->symtab_shndx() == 0) |
| 7000 | { |
| 7001 | // This object has no symbols. Weird but legal. |
| 7002 | return; |
| 7003 | } |
| 7004 | |
| 7005 | // Read the symbol table section header. |
| 7006 | const unsigned int symtab_shndx = this->symtab_shndx(); |
| 7007 | elfcpp::Shdr<32, big_endian> |
| 7008 | symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); |
| 7009 | gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); |
| 7010 | |
| 7011 | // Read the local symbols. |
| 7012 | const int sym_size = elfcpp::Elf_sizes<32>::sym_size; |
| 7013 | const unsigned int loccount = this->local_symbol_count(); |
| 7014 | gold_assert(loccount == symtabshdr.get_sh_info()); |
| 7015 | off_t locsize = loccount * sym_size; |
| 7016 | const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), |
| 7017 | locsize, true, true); |
| 7018 | |
| 7019 | // Loop over the local symbols. |
| 7020 | |
| 7021 | typedef typename Sized_relobj_file<32, big_endian>::Output_sections |
| 7022 | Output_sections; |
| 7023 | const Output_sections& out_sections(this->output_sections()); |
| 7024 | unsigned int shnum = this->shnum(); |
| 7025 | unsigned int count = 0; |
| 7026 | // Skip the first, dummy, symbol. |
| 7027 | psyms += sym_size; |
| 7028 | for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) |
| 7029 | { |
| 7030 | elfcpp::Sym<32, big_endian> sym(psyms); |
| 7031 | |
| 7032 | Symbol_value<32>& lv((*this->local_values())[i]); |
| 7033 | |
| 7034 | // This local symbol was already discarded by do_count_local_symbols. |
| 7035 | if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry()) |
| 7036 | continue; |
| 7037 | |
| 7038 | bool is_ordinary; |
| 7039 | unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(), |
| 7040 | &is_ordinary); |
| 7041 | |
| 7042 | if (shndx < shnum) |
| 7043 | { |
| 7044 | Output_section* os = out_sections[shndx]; |
| 7045 | |
| 7046 | // This local symbol no longer has an output section. Discard it. |
| 7047 | if (os == NULL) |
| 7048 | { |
| 7049 | lv.set_no_output_symtab_entry(); |
| 7050 | continue; |
| 7051 | } |
| 7052 | |
| 7053 | // Currently we only discard parts of EXIDX input sections. |
| 7054 | // We explicitly check for a merged EXIDX input section to avoid |
| 7055 | // calling Output_section_data::output_offset unless necessary. |
| 7056 | if ((this->get_output_section_offset(shndx) == invalid_address) |
| 7057 | && (this->exidx_input_section_by_shndx(shndx) != NULL)) |
| 7058 | { |
| 7059 | section_offset_type output_offset = |
| 7060 | os->output_offset(this, shndx, lv.input_value()); |
| 7061 | if (output_offset == -1) |
| 7062 | { |
| 7063 | // This symbol is defined in a part of an EXIDX input section |
| 7064 | // that is discarded due to entry merging. |
| 7065 | lv.set_no_output_symtab_entry(); |
| 7066 | continue; |
| 7067 | } |
| 7068 | } |
| 7069 | } |
| 7070 | |
| 7071 | ++count; |
| 7072 | } |
| 7073 | |
| 7074 | this->set_output_local_symbol_count(count); |
| 7075 | this->output_local_symbol_count_needs_update_ = false; |
| 7076 | } |
| 7077 | |
| 7078 | // Arm_dynobj methods. |
| 7079 | |
| 7080 | // Read the symbol information. |
| 7081 | |
| 7082 | template<bool big_endian> |
| 7083 | void |
| 7084 | Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd) |
| 7085 | { |
| 7086 | // Call parent class to read symbol information. |
| 7087 | this->base_read_symbols(sd); |
| 7088 | |
| 7089 | // Read processor-specific flags in ELF file header. |
| 7090 | const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, |
| 7091 | elfcpp::Elf_sizes<32>::ehdr_size, |
| 7092 | true, false); |
| 7093 | elfcpp::Ehdr<32, big_endian> ehdr(pehdr); |
| 7094 | this->processor_specific_flags_ = ehdr.get_e_flags(); |
| 7095 | |
| 7096 | // Read the attributes section if there is one. |
| 7097 | // We read from the end because gas seems to put it near the end of |
| 7098 | // the section headers. |
| 7099 | const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; |
| 7100 | const unsigned char* ps = |
| 7101 | sd->section_headers->data() + shdr_size * (this->shnum() - 1); |
| 7102 | for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size) |
| 7103 | { |
| 7104 | elfcpp::Shdr<32, big_endian> shdr(ps); |
| 7105 | if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) |
| 7106 | { |
| 7107 | section_offset_type section_offset = shdr.get_sh_offset(); |
| 7108 | section_size_type section_size = |
| 7109 | convert_to_section_size_type(shdr.get_sh_size()); |
| 7110 | const unsigned char* view = |
| 7111 | this->get_view(section_offset, section_size, true, false); |
| 7112 | this->attributes_section_data_ = |
| 7113 | new Attributes_section_data(view, section_size); |
| 7114 | break; |
| 7115 | } |
| 7116 | } |
| 7117 | } |
| 7118 | |
| 7119 | // Stub_addend_reader methods. |
| 7120 | |
| 7121 | // Read the addend of a REL relocation of type R_TYPE at VIEW. |
| 7122 | |
| 7123 | template<bool big_endian> |
| 7124 | elfcpp::Elf_types<32>::Elf_Swxword |
| 7125 | Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()( |
| 7126 | unsigned int r_type, |
| 7127 | const unsigned char* view, |
| 7128 | const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const |
| 7129 | { |
| 7130 | typedef class Arm_relocate_functions<big_endian> RelocFuncs; |
| 7131 | |
| 7132 | switch (r_type) |
| 7133 | { |
| 7134 | case elfcpp::R_ARM_CALL: |
| 7135 | case elfcpp::R_ARM_JUMP24: |
| 7136 | case elfcpp::R_ARM_PLT32: |
| 7137 | { |
| 7138 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 7139 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); |
| 7140 | Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); |
| 7141 | return Bits<26>::sign_extend32(val << 2); |
| 7142 | } |
| 7143 | |
| 7144 | case elfcpp::R_ARM_THM_CALL: |
| 7145 | case elfcpp::R_ARM_THM_JUMP24: |
| 7146 | case elfcpp::R_ARM_THM_XPC22: |
| 7147 | { |
| 7148 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 7149 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); |
| 7150 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 7151 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 7152 | return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn); |
| 7153 | } |
| 7154 | |
| 7155 | case elfcpp::R_ARM_THM_JUMP19: |
| 7156 | { |
| 7157 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 7158 | const Valtype* wv = reinterpret_cast<const Valtype*>(view); |
| 7159 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 7160 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 7161 | return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn); |
| 7162 | } |
| 7163 | |
| 7164 | default: |
| 7165 | gold_unreachable(); |
| 7166 | } |
| 7167 | } |
| 7168 | |
| 7169 | // Arm_output_data_got methods. |
| 7170 | |
| 7171 | // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. |
| 7172 | // The first one is initialized to be 1, which is the module index for |
| 7173 | // the main executable and the second one 0. A reloc of the type |
| 7174 | // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will |
| 7175 | // be applied by gold. GSYM is a global symbol. |
| 7176 | // |
| 7177 | template<bool big_endian> |
| 7178 | void |
| 7179 | Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( |
| 7180 | unsigned int got_type, |
| 7181 | Symbol* gsym) |
| 7182 | { |
| 7183 | if (gsym->has_got_offset(got_type)) |
| 7184 | return; |
| 7185 | |
| 7186 | // We are doing a static link. Just mark it as belong to module 1, |
| 7187 | // the executable. |
| 7188 | unsigned int got_offset = this->add_constant(1); |
| 7189 | gsym->set_got_offset(got_type, got_offset); |
| 7190 | got_offset = this->add_constant(0); |
| 7191 | this->static_relocs_.push_back(Static_reloc(got_offset, |
| 7192 | elfcpp::R_ARM_TLS_DTPOFF32, |
| 7193 | gsym)); |
| 7194 | } |
| 7195 | |
| 7196 | // Same as the above but for a local symbol. |
| 7197 | |
| 7198 | template<bool big_endian> |
| 7199 | void |
| 7200 | Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( |
| 7201 | unsigned int got_type, |
| 7202 | Sized_relobj_file<32, big_endian>* object, |
| 7203 | unsigned int index) |
| 7204 | { |
| 7205 | if (object->local_has_got_offset(index, got_type)) |
| 7206 | return; |
| 7207 | |
| 7208 | // We are doing a static link. Just mark it as belong to module 1, |
| 7209 | // the executable. |
| 7210 | unsigned int got_offset = this->add_constant(1); |
| 7211 | object->set_local_got_offset(index, got_type, got_offset); |
| 7212 | got_offset = this->add_constant(0); |
| 7213 | this->static_relocs_.push_back(Static_reloc(got_offset, |
| 7214 | elfcpp::R_ARM_TLS_DTPOFF32, |
| 7215 | object, index)); |
| 7216 | } |
| 7217 | |
| 7218 | template<bool big_endian> |
| 7219 | void |
| 7220 | Arm_output_data_got<big_endian>::do_write(Output_file* of) |
| 7221 | { |
| 7222 | // Call parent to write out GOT. |
| 7223 | Output_data_got<32, big_endian>::do_write(of); |
| 7224 | |
| 7225 | // We are done if there is no fix up. |
| 7226 | if (this->static_relocs_.empty()) |
| 7227 | return; |
| 7228 | |
| 7229 | gold_assert(parameters->doing_static_link()); |
| 7230 | |
| 7231 | const off_t offset = this->offset(); |
| 7232 | const section_size_type oview_size = |
| 7233 | convert_to_section_size_type(this->data_size()); |
| 7234 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
| 7235 | |
| 7236 | Output_segment* tls_segment = this->layout_->tls_segment(); |
| 7237 | gold_assert(tls_segment != NULL); |
| 7238 | |
| 7239 | // The thread pointer $tp points to the TCB, which is followed by the |
| 7240 | // TLS. So we need to adjust $tp relative addressing by this amount. |
| 7241 | Arm_address aligned_tcb_size = |
| 7242 | align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); |
| 7243 | |
| 7244 | for (size_t i = 0; i < this->static_relocs_.size(); ++i) |
| 7245 | { |
| 7246 | Static_reloc& reloc(this->static_relocs_[i]); |
| 7247 | |
| 7248 | Arm_address value; |
| 7249 | if (!reloc.symbol_is_global()) |
| 7250 | { |
| 7251 | Sized_relobj_file<32, big_endian>* object = reloc.relobj(); |
| 7252 | const Symbol_value<32>* psymval = |
| 7253 | reloc.relobj()->local_symbol(reloc.index()); |
| 7254 | |
| 7255 | // We are doing static linking. Issue an error and skip this |
| 7256 | // relocation if the symbol is undefined or in a discarded_section. |
| 7257 | bool is_ordinary; |
| 7258 | unsigned int shndx = psymval->input_shndx(&is_ordinary); |
| 7259 | if ((shndx == elfcpp::SHN_UNDEF) |
| 7260 | || (is_ordinary |
| 7261 | && shndx != elfcpp::SHN_UNDEF |
| 7262 | && !object->is_section_included(shndx) |
| 7263 | && !this->symbol_table_->is_section_folded(object, shndx))) |
| 7264 | { |
| 7265 | gold_error(_("undefined or discarded local symbol %u from " |
| 7266 | " object %s in GOT"), |
| 7267 | reloc.index(), reloc.relobj()->name().c_str()); |
| 7268 | continue; |
| 7269 | } |
| 7270 | |
| 7271 | value = psymval->value(object, 0); |
| 7272 | } |
| 7273 | else |
| 7274 | { |
| 7275 | const Symbol* gsym = reloc.symbol(); |
| 7276 | gold_assert(gsym != NULL); |
| 7277 | if (gsym->is_forwarder()) |
| 7278 | gsym = this->symbol_table_->resolve_forwards(gsym); |
| 7279 | |
| 7280 | // We are doing static linking. Issue an error and skip this |
| 7281 | // relocation if the symbol is undefined or in a discarded_section |
| 7282 | // unless it is a weakly_undefined symbol. |
| 7283 | if ((gsym->is_defined_in_discarded_section() |
| 7284 | || gsym->is_undefined()) |
| 7285 | && !gsym->is_weak_undefined()) |
| 7286 | { |
| 7287 | gold_error(_("undefined or discarded symbol %s in GOT"), |
| 7288 | gsym->name()); |
| 7289 | continue; |
| 7290 | } |
| 7291 | |
| 7292 | if (!gsym->is_weak_undefined()) |
| 7293 | { |
| 7294 | const Sized_symbol<32>* sym = |
| 7295 | static_cast<const Sized_symbol<32>*>(gsym); |
| 7296 | value = sym->value(); |
| 7297 | } |
| 7298 | else |
| 7299 | value = 0; |
| 7300 | } |
| 7301 | |
| 7302 | unsigned got_offset = reloc.got_offset(); |
| 7303 | gold_assert(got_offset < oview_size); |
| 7304 | |
| 7305 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 7306 | Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset); |
| 7307 | Valtype x; |
| 7308 | switch (reloc.r_type()) |
| 7309 | { |
| 7310 | case elfcpp::R_ARM_TLS_DTPOFF32: |
| 7311 | x = value; |
| 7312 | break; |
| 7313 | case elfcpp::R_ARM_TLS_TPOFF32: |
| 7314 | x = value + aligned_tcb_size; |
| 7315 | break; |
| 7316 | default: |
| 7317 | gold_unreachable(); |
| 7318 | } |
| 7319 | elfcpp::Swap<32, big_endian>::writeval(wv, x); |
| 7320 | } |
| 7321 | |
| 7322 | of->write_output_view(offset, oview_size, oview); |
| 7323 | } |
| 7324 | |
| 7325 | // A class to handle the PLT data. |
| 7326 | // This is an abstract base class that handles most of the linker details |
| 7327 | // but does not know the actual contents of PLT entries. The derived |
| 7328 | // classes below fill in those details. |
| 7329 | |
| 7330 | template<bool big_endian> |
| 7331 | class Output_data_plt_arm : public Output_section_data |
| 7332 | { |
| 7333 | public: |
| 7334 | // Unlike aarch64, which records symbol value in "addend" field of relocations |
| 7335 | // and could be done at the same time an IRelative reloc is created for the |
| 7336 | // symbol, arm puts the symbol value into "GOT" table, which, however, is |
| 7337 | // issued later in Output_data_plt_arm::do_write(). So we have a struct here |
| 7338 | // to keep necessary symbol information for later use in do_write. We usually |
| 7339 | // have only a very limited number of ifuncs, so the extra data required here |
| 7340 | // is also limited. |
| 7341 | |
| 7342 | struct IRelative_data |
| 7343 | { |
| 7344 | IRelative_data(Sized_symbol<32>* sized_symbol) |
| 7345 | : symbol_is_global_(true) |
| 7346 | { |
| 7347 | u_.global = sized_symbol; |
| 7348 | } |
| 7349 | |
| 7350 | IRelative_data(Sized_relobj_file<32, big_endian>* relobj, |
| 7351 | unsigned int index) |
| 7352 | : symbol_is_global_(false) |
| 7353 | { |
| 7354 | u_.local.relobj = relobj; |
| 7355 | u_.local.index = index; |
| 7356 | } |
| 7357 | |
| 7358 | union |
| 7359 | { |
| 7360 | Sized_symbol<32>* global; |
| 7361 | |
| 7362 | struct |
| 7363 | { |
| 7364 | Sized_relobj_file<32, big_endian>* relobj; |
| 7365 | unsigned int index; |
| 7366 | } local; |
| 7367 | } u_; |
| 7368 | |
| 7369 | bool symbol_is_global_; |
| 7370 | }; |
| 7371 | |
| 7372 | typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> |
| 7373 | Reloc_section; |
| 7374 | |
| 7375 | Output_data_plt_arm(Layout* layout, uint64_t addralign, |
| 7376 | Arm_output_data_got<big_endian>* got, |
| 7377 | Output_data_space* got_plt, |
| 7378 | Output_data_space* got_irelative); |
| 7379 | |
| 7380 | // Add an entry to the PLT. |
| 7381 | void |
| 7382 | add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym); |
| 7383 | |
| 7384 | // Add the relocation for a plt entry. |
| 7385 | void |
| 7386 | add_relocation(Symbol_table* symtab, Layout* layout, |
| 7387 | Symbol* gsym, unsigned int got_offset); |
| 7388 | |
| 7389 | // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. |
| 7390 | unsigned int |
| 7391 | add_local_ifunc_entry(Symbol_table* symtab, Layout*, |
| 7392 | Sized_relobj_file<32, big_endian>* relobj, |
| 7393 | unsigned int local_sym_index); |
| 7394 | |
| 7395 | // Return the .rel.plt section data. |
| 7396 | const Reloc_section* |
| 7397 | rel_plt() const |
| 7398 | { return this->rel_; } |
| 7399 | |
| 7400 | // Return the PLT relocation container for IRELATIVE. |
| 7401 | Reloc_section* |
| 7402 | rel_irelative(Symbol_table*, Layout*); |
| 7403 | |
| 7404 | // Return the number of PLT entries. |
| 7405 | unsigned int |
| 7406 | entry_count() const |
| 7407 | { return this->count_ + this->irelative_count_; } |
| 7408 | |
| 7409 | // Return the offset of the first non-reserved PLT entry. |
| 7410 | unsigned int |
| 7411 | first_plt_entry_offset() const |
| 7412 | { return this->do_first_plt_entry_offset(); } |
| 7413 | |
| 7414 | // Return the size of a PLT entry. |
| 7415 | unsigned int |
| 7416 | get_plt_entry_size() const |
| 7417 | { return this->do_get_plt_entry_size(); } |
| 7418 | |
| 7419 | // Return the PLT address for globals. |
| 7420 | uint32_t |
| 7421 | address_for_global(const Symbol*) const; |
| 7422 | |
| 7423 | // Return the PLT address for locals. |
| 7424 | uint32_t |
| 7425 | address_for_local(const Relobj*, unsigned int symndx) const; |
| 7426 | |
| 7427 | protected: |
| 7428 | // Fill in the first PLT entry. |
| 7429 | void |
| 7430 | fill_first_plt_entry(unsigned char* pov, |
| 7431 | Arm_address got_address, |
| 7432 | Arm_address plt_address) |
| 7433 | { this->do_fill_first_plt_entry(pov, got_address, plt_address); } |
| 7434 | |
| 7435 | void |
| 7436 | fill_plt_entry(unsigned char* pov, |
| 7437 | Arm_address got_address, |
| 7438 | Arm_address plt_address, |
| 7439 | unsigned int got_offset, |
| 7440 | unsigned int plt_offset) |
| 7441 | { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); } |
| 7442 | |
| 7443 | virtual unsigned int |
| 7444 | do_first_plt_entry_offset() const = 0; |
| 7445 | |
| 7446 | virtual unsigned int |
| 7447 | do_get_plt_entry_size() const = 0; |
| 7448 | |
| 7449 | virtual void |
| 7450 | do_fill_first_plt_entry(unsigned char* pov, |
| 7451 | Arm_address got_address, |
| 7452 | Arm_address plt_address) = 0; |
| 7453 | |
| 7454 | virtual void |
| 7455 | do_fill_plt_entry(unsigned char* pov, |
| 7456 | Arm_address got_address, |
| 7457 | Arm_address plt_address, |
| 7458 | unsigned int got_offset, |
| 7459 | unsigned int plt_offset) = 0; |
| 7460 | |
| 7461 | void |
| 7462 | do_adjust_output_section(Output_section* os); |
| 7463 | |
| 7464 | // Write to a map file. |
| 7465 | void |
| 7466 | do_print_to_mapfile(Mapfile* mapfile) const |
| 7467 | { mapfile->print_output_data(this, _("** PLT")); } |
| 7468 | |
| 7469 | private: |
| 7470 | // Set the final size. |
| 7471 | void |
| 7472 | set_final_data_size() |
| 7473 | { |
| 7474 | this->set_data_size(this->first_plt_entry_offset() |
| 7475 | + ((this->count_ + this->irelative_count_) |
| 7476 | * this->get_plt_entry_size())); |
| 7477 | } |
| 7478 | |
| 7479 | // Write out the PLT data. |
| 7480 | void |
| 7481 | do_write(Output_file*); |
| 7482 | |
| 7483 | // Record irelative symbol data. |
| 7484 | void insert_irelative_data(const IRelative_data& idata) |
| 7485 | { irelative_data_vec_.push_back(idata); } |
| 7486 | |
| 7487 | // The reloc section. |
| 7488 | Reloc_section* rel_; |
| 7489 | // The IRELATIVE relocs, if necessary. These must follow the |
| 7490 | // regular PLT relocations. |
| 7491 | Reloc_section* irelative_rel_; |
| 7492 | // The .got section. |
| 7493 | Arm_output_data_got<big_endian>* got_; |
| 7494 | // The .got.plt section. |
| 7495 | Output_data_space* got_plt_; |
| 7496 | // The part of the .got.plt section used for IRELATIVE relocs. |
| 7497 | Output_data_space* got_irelative_; |
| 7498 | // The number of PLT entries. |
| 7499 | unsigned int count_; |
| 7500 | // Number of PLT entries with R_ARM_IRELATIVE relocs. These |
| 7501 | // follow the regular PLT entries. |
| 7502 | unsigned int irelative_count_; |
| 7503 | // Vector for irelative data. |
| 7504 | typedef std::vector<IRelative_data> IRelative_data_vec; |
| 7505 | IRelative_data_vec irelative_data_vec_; |
| 7506 | }; |
| 7507 | |
| 7508 | // Create the PLT section. The ordinary .got section is an argument, |
| 7509 | // since we need to refer to the start. We also create our own .got |
| 7510 | // section just for PLT entries. |
| 7511 | |
| 7512 | template<bool big_endian> |
| 7513 | Output_data_plt_arm<big_endian>::Output_data_plt_arm( |
| 7514 | Layout* layout, uint64_t addralign, |
| 7515 | Arm_output_data_got<big_endian>* got, |
| 7516 | Output_data_space* got_plt, |
| 7517 | Output_data_space* got_irelative) |
| 7518 | : Output_section_data(addralign), irelative_rel_(NULL), |
| 7519 | got_(got), got_plt_(got_plt), got_irelative_(got_irelative), |
| 7520 | count_(0), irelative_count_(0) |
| 7521 | { |
| 7522 | this->rel_ = new Reloc_section(false); |
| 7523 | layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, |
| 7524 | elfcpp::SHF_ALLOC, this->rel_, |
| 7525 | ORDER_DYNAMIC_PLT_RELOCS, false); |
| 7526 | } |
| 7527 | |
| 7528 | template<bool big_endian> |
| 7529 | void |
| 7530 | Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os) |
| 7531 | { |
| 7532 | os->set_entsize(0); |
| 7533 | } |
| 7534 | |
| 7535 | // Add an entry to the PLT. |
| 7536 | |
| 7537 | template<bool big_endian> |
| 7538 | void |
| 7539 | Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab, |
| 7540 | Layout* layout, |
| 7541 | Symbol* gsym) |
| 7542 | { |
| 7543 | gold_assert(!gsym->has_plt_offset()); |
| 7544 | |
| 7545 | unsigned int* entry_count; |
| 7546 | Output_section_data_build* got; |
| 7547 | |
| 7548 | // We have 2 different types of plt entry here, normal and ifunc. |
| 7549 | |
| 7550 | // For normal plt, the offset begins with first_plt_entry_offset(20), and the |
| 7551 | // 1st entry offset would be 20, the second 32, third 44 ... etc. |
| 7552 | |
| 7553 | // For ifunc plt, the offset begins with 0. So the first offset would 0, |
| 7554 | // second 12, third 24 ... etc. |
| 7555 | |
| 7556 | // IFunc plt entries *always* come after *normal* plt entries. |
| 7557 | |
| 7558 | // Notice, when computing the plt address of a certain symbol, "plt_address + |
| 7559 | // plt_offset" is no longer correct. Use target->plt_address_for_global() or |
| 7560 | // target->plt_address_for_local() instead. |
| 7561 | |
| 7562 | int begin_offset = 0; |
| 7563 | if (gsym->type() == elfcpp::STT_GNU_IFUNC |
| 7564 | && gsym->can_use_relative_reloc(false)) |
| 7565 | { |
| 7566 | entry_count = &this->irelative_count_; |
| 7567 | got = this->got_irelative_; |
| 7568 | // For irelative plt entries, offset is relative to the end of normal plt |
| 7569 | // entries, so it starts from 0. |
| 7570 | begin_offset = 0; |
| 7571 | // Record symbol information. |
| 7572 | this->insert_irelative_data( |
| 7573 | IRelative_data(symtab->get_sized_symbol<32>(gsym))); |
| 7574 | } |
| 7575 | else |
| 7576 | { |
| 7577 | entry_count = &this->count_; |
| 7578 | got = this->got_plt_; |
| 7579 | // Note that for normal plt entries, when setting the PLT offset we skip |
| 7580 | // the initial reserved PLT entry. |
| 7581 | begin_offset = this->first_plt_entry_offset(); |
| 7582 | } |
| 7583 | |
| 7584 | gsym->set_plt_offset(begin_offset |
| 7585 | + (*entry_count) * this->get_plt_entry_size()); |
| 7586 | |
| 7587 | ++(*entry_count); |
| 7588 | |
| 7589 | section_offset_type got_offset = got->current_data_size(); |
| 7590 | |
| 7591 | // Every PLT entry needs a GOT entry which points back to the PLT |
| 7592 | // entry (this will be changed by the dynamic linker, normally |
| 7593 | // lazily when the function is called). |
| 7594 | got->set_current_data_size(got_offset + 4); |
| 7595 | |
| 7596 | // Every PLT entry needs a reloc. |
| 7597 | this->add_relocation(symtab, layout, gsym, got_offset); |
| 7598 | |
| 7599 | // Note that we don't need to save the symbol. The contents of the |
| 7600 | // PLT are independent of which symbols are used. The symbols only |
| 7601 | // appear in the relocations. |
| 7602 | } |
| 7603 | |
| 7604 | // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return |
| 7605 | // the PLT offset. |
| 7606 | |
| 7607 | template<bool big_endian> |
| 7608 | unsigned int |
| 7609 | Output_data_plt_arm<big_endian>::add_local_ifunc_entry( |
| 7610 | Symbol_table* symtab, |
| 7611 | Layout* layout, |
| 7612 | Sized_relobj_file<32, big_endian>* relobj, |
| 7613 | unsigned int local_sym_index) |
| 7614 | { |
| 7615 | this->insert_irelative_data(IRelative_data(relobj, local_sym_index)); |
| 7616 | |
| 7617 | // Notice, when computingthe plt entry address, "plt_address + plt_offset" is |
| 7618 | // no longer correct. Use target->plt_address_for_local() instead. |
| 7619 | unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size(); |
| 7620 | ++this->irelative_count_; |
| 7621 | |
| 7622 | section_offset_type got_offset = this->got_irelative_->current_data_size(); |
| 7623 | |
| 7624 | // Every PLT entry needs a GOT entry which points back to the PLT |
| 7625 | // entry. |
| 7626 | this->got_irelative_->set_current_data_size(got_offset + 4); |
| 7627 | |
| 7628 | |
| 7629 | // Every PLT entry needs a reloc. |
| 7630 | Reloc_section* rel = this->rel_irelative(symtab, layout); |
| 7631 | rel->add_symbolless_local_addend(relobj, local_sym_index, |
| 7632 | elfcpp::R_ARM_IRELATIVE, |
| 7633 | this->got_irelative_, got_offset); |
| 7634 | return plt_offset; |
| 7635 | } |
| 7636 | |
| 7637 | |
| 7638 | // Add the relocation for a PLT entry. |
| 7639 | |
| 7640 | template<bool big_endian> |
| 7641 | void |
| 7642 | Output_data_plt_arm<big_endian>::add_relocation( |
| 7643 | Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset) |
| 7644 | { |
| 7645 | if (gsym->type() == elfcpp::STT_GNU_IFUNC |
| 7646 | && gsym->can_use_relative_reloc(false)) |
| 7647 | { |
| 7648 | Reloc_section* rel = this->rel_irelative(symtab, layout); |
| 7649 | rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE, |
| 7650 | this->got_irelative_, got_offset); |
| 7651 | } |
| 7652 | else |
| 7653 | { |
| 7654 | gsym->set_needs_dynsym_entry(); |
| 7655 | this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_, |
| 7656 | got_offset); |
| 7657 | } |
| 7658 | } |
| 7659 | |
| 7660 | |
| 7661 | // Create the irelative relocation data. |
| 7662 | |
| 7663 | template<bool big_endian> |
| 7664 | typename Output_data_plt_arm<big_endian>::Reloc_section* |
| 7665 | Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab, |
| 7666 | Layout* layout) |
| 7667 | { |
| 7668 | if (this->irelative_rel_ == NULL) |
| 7669 | { |
| 7670 | // Since irelative relocations goes into 'rel.dyn', we delegate the |
| 7671 | // creation of irelative_rel_ to where rel_dyn section gets created. |
| 7672 | Target_arm<big_endian>* arm_target = |
| 7673 | Target_arm<big_endian>::default_target(); |
| 7674 | this->irelative_rel_ = arm_target->rel_irelative_section(layout); |
| 7675 | |
| 7676 | // Make sure we have a place for the TLSDESC relocations, in |
| 7677 | // case we see any later on. |
| 7678 | // this->rel_tlsdesc(layout); |
| 7679 | if (parameters->doing_static_link()) |
| 7680 | { |
| 7681 | // A statically linked executable will only have a .rel.plt section to |
| 7682 | // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library |
| 7683 | // will use these symbols to locate the IRELATIVE relocs at program |
| 7684 | // startup time. |
| 7685 | symtab->define_in_output_data("__rel_iplt_start", NULL, |
| 7686 | Symbol_table::PREDEFINED, |
| 7687 | this->irelative_rel_, 0, 0, |
| 7688 | elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, |
| 7689 | elfcpp::STV_HIDDEN, 0, false, true); |
| 7690 | symtab->define_in_output_data("__rel_iplt_end", NULL, |
| 7691 | Symbol_table::PREDEFINED, |
| 7692 | this->irelative_rel_, 0, 0, |
| 7693 | elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, |
| 7694 | elfcpp::STV_HIDDEN, 0, true, true); |
| 7695 | } |
| 7696 | } |
| 7697 | return this->irelative_rel_; |
| 7698 | } |
| 7699 | |
| 7700 | |
| 7701 | // Return the PLT address for a global symbol. |
| 7702 | |
| 7703 | template<bool big_endian> |
| 7704 | uint32_t |
| 7705 | Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const |
| 7706 | { |
| 7707 | uint64_t begin_offset = 0; |
| 7708 | if (gsym->type() == elfcpp::STT_GNU_IFUNC |
| 7709 | && gsym->can_use_relative_reloc(false)) |
| 7710 | { |
| 7711 | begin_offset = (this->first_plt_entry_offset() + |
| 7712 | this->count_ * this->get_plt_entry_size()); |
| 7713 | } |
| 7714 | return this->address() + begin_offset + gsym->plt_offset(); |
| 7715 | } |
| 7716 | |
| 7717 | |
| 7718 | // Return the PLT address for a local symbol. These are always |
| 7719 | // IRELATIVE relocs. |
| 7720 | |
| 7721 | template<bool big_endian> |
| 7722 | uint32_t |
| 7723 | Output_data_plt_arm<big_endian>::address_for_local( |
| 7724 | const Relobj* object, |
| 7725 | unsigned int r_sym) const |
| 7726 | { |
| 7727 | return (this->address() |
| 7728 | + this->first_plt_entry_offset() |
| 7729 | + this->count_ * this->get_plt_entry_size() |
| 7730 | + object->local_plt_offset(r_sym)); |
| 7731 | } |
| 7732 | |
| 7733 | |
| 7734 | template<bool big_endian> |
| 7735 | class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian> |
| 7736 | { |
| 7737 | public: |
| 7738 | Output_data_plt_arm_standard(Layout* layout, |
| 7739 | Arm_output_data_got<big_endian>* got, |
| 7740 | Output_data_space* got_plt, |
| 7741 | Output_data_space* got_irelative) |
| 7742 | : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative) |
| 7743 | { } |
| 7744 | |
| 7745 | protected: |
| 7746 | // Return the offset of the first non-reserved PLT entry. |
| 7747 | virtual unsigned int |
| 7748 | do_first_plt_entry_offset() const |
| 7749 | { return sizeof(first_plt_entry); } |
| 7750 | |
| 7751 | virtual void |
| 7752 | do_fill_first_plt_entry(unsigned char* pov, |
| 7753 | Arm_address got_address, |
| 7754 | Arm_address plt_address); |
| 7755 | |
| 7756 | private: |
| 7757 | // Template for the first PLT entry. |
| 7758 | static const uint32_t first_plt_entry[5]; |
| 7759 | }; |
| 7760 | |
| 7761 | // ARM PLTs. |
| 7762 | // FIXME: This is not very flexible. Right now this has only been tested |
| 7763 | // on armv5te. If we are to support additional architecture features like |
| 7764 | // Thumb-2 or BE8, we need to make this more flexible like GNU ld. |
| 7765 | |
| 7766 | // The first entry in the PLT. |
| 7767 | template<bool big_endian> |
| 7768 | const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] = |
| 7769 | { |
| 7770 | 0xe52de004, // str lr, [sp, #-4]! |
| 7771 | 0xe59fe004, // ldr lr, [pc, #4] |
| 7772 | 0xe08fe00e, // add lr, pc, lr |
| 7773 | 0xe5bef008, // ldr pc, [lr, #8]! |
| 7774 | 0x00000000, // &GOT[0] - . |
| 7775 | }; |
| 7776 | |
| 7777 | template<bool big_endian> |
| 7778 | void |
| 7779 | Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry( |
| 7780 | unsigned char* pov, |
| 7781 | Arm_address got_address, |
| 7782 | Arm_address plt_address) |
| 7783 | { |
| 7784 | // Write first PLT entry. All but the last word are constants. |
| 7785 | const size_t num_first_plt_words = (sizeof(first_plt_entry) |
| 7786 | / sizeof(first_plt_entry[0])); |
| 7787 | for (size_t i = 0; i < num_first_plt_words - 1; i++) |
| 7788 | elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); |
| 7789 | // Last word in first PLT entry is &GOT[0] - . |
| 7790 | elfcpp::Swap<32, big_endian>::writeval(pov + 16, |
| 7791 | got_address - (plt_address + 16)); |
| 7792 | } |
| 7793 | |
| 7794 | // Subsequent entries in the PLT. |
| 7795 | // This class generates short (12-byte) entries, for displacements up to 2^28. |
| 7796 | |
| 7797 | template<bool big_endian> |
| 7798 | class Output_data_plt_arm_short : public Output_data_plt_arm_standard<big_endian> |
| 7799 | { |
| 7800 | public: |
| 7801 | Output_data_plt_arm_short(Layout* layout, |
| 7802 | Arm_output_data_got<big_endian>* got, |
| 7803 | Output_data_space* got_plt, |
| 7804 | Output_data_space* got_irelative) |
| 7805 | : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) |
| 7806 | { } |
| 7807 | |
| 7808 | protected: |
| 7809 | // Return the size of a PLT entry. |
| 7810 | virtual unsigned int |
| 7811 | do_get_plt_entry_size() const |
| 7812 | { return sizeof(plt_entry); } |
| 7813 | |
| 7814 | virtual void |
| 7815 | do_fill_plt_entry(unsigned char* pov, |
| 7816 | Arm_address got_address, |
| 7817 | Arm_address plt_address, |
| 7818 | unsigned int got_offset, |
| 7819 | unsigned int plt_offset); |
| 7820 | |
| 7821 | private: |
| 7822 | // Template for subsequent PLT entries. |
| 7823 | static const uint32_t plt_entry[3]; |
| 7824 | }; |
| 7825 | |
| 7826 | template<bool big_endian> |
| 7827 | const uint32_t Output_data_plt_arm_short<big_endian>::plt_entry[3] = |
| 7828 | { |
| 7829 | 0xe28fc600, // add ip, pc, #0xNN00000 |
| 7830 | 0xe28cca00, // add ip, ip, #0xNN000 |
| 7831 | 0xe5bcf000, // ldr pc, [ip, #0xNNN]! |
| 7832 | }; |
| 7833 | |
| 7834 | template<bool big_endian> |
| 7835 | void |
| 7836 | Output_data_plt_arm_short<big_endian>::do_fill_plt_entry( |
| 7837 | unsigned char* pov, |
| 7838 | Arm_address got_address, |
| 7839 | Arm_address plt_address, |
| 7840 | unsigned int got_offset, |
| 7841 | unsigned int plt_offset) |
| 7842 | { |
| 7843 | int32_t offset = ((got_address + got_offset) |
| 7844 | - (plt_address + plt_offset + 8)); |
| 7845 | if (offset < 0 || offset > 0x0fffffff) |
| 7846 | gold_error(_("PLT offset too large, try linking with --long-plt")); |
| 7847 | |
| 7848 | uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); |
| 7849 | elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); |
| 7850 | uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); |
| 7851 | elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); |
| 7852 | uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); |
| 7853 | elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); |
| 7854 | } |
| 7855 | |
| 7856 | // This class generates long (16-byte) entries, for arbitrary displacements. |
| 7857 | |
| 7858 | template<bool big_endian> |
| 7859 | class Output_data_plt_arm_long : public Output_data_plt_arm_standard<big_endian> |
| 7860 | { |
| 7861 | public: |
| 7862 | Output_data_plt_arm_long(Layout* layout, |
| 7863 | Arm_output_data_got<big_endian>* got, |
| 7864 | Output_data_space* got_plt, |
| 7865 | Output_data_space* got_irelative) |
| 7866 | : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) |
| 7867 | { } |
| 7868 | |
| 7869 | protected: |
| 7870 | // Return the size of a PLT entry. |
| 7871 | virtual unsigned int |
| 7872 | do_get_plt_entry_size() const |
| 7873 | { return sizeof(plt_entry); } |
| 7874 | |
| 7875 | virtual void |
| 7876 | do_fill_plt_entry(unsigned char* pov, |
| 7877 | Arm_address got_address, |
| 7878 | Arm_address plt_address, |
| 7879 | unsigned int got_offset, |
| 7880 | unsigned int plt_offset); |
| 7881 | |
| 7882 | private: |
| 7883 | // Template for subsequent PLT entries. |
| 7884 | static const uint32_t plt_entry[4]; |
| 7885 | }; |
| 7886 | |
| 7887 | template<bool big_endian> |
| 7888 | const uint32_t Output_data_plt_arm_long<big_endian>::plt_entry[4] = |
| 7889 | { |
| 7890 | 0xe28fc200, // add ip, pc, #0xN0000000 |
| 7891 | 0xe28cc600, // add ip, ip, #0xNN00000 |
| 7892 | 0xe28cca00, // add ip, ip, #0xNN000 |
| 7893 | 0xe5bcf000, // ldr pc, [ip, #0xNNN]! |
| 7894 | }; |
| 7895 | |
| 7896 | template<bool big_endian> |
| 7897 | void |
| 7898 | Output_data_plt_arm_long<big_endian>::do_fill_plt_entry( |
| 7899 | unsigned char* pov, |
| 7900 | Arm_address got_address, |
| 7901 | Arm_address plt_address, |
| 7902 | unsigned int got_offset, |
| 7903 | unsigned int plt_offset) |
| 7904 | { |
| 7905 | int32_t offset = ((got_address + got_offset) |
| 7906 | - (plt_address + plt_offset + 8)); |
| 7907 | |
| 7908 | uint32_t plt_insn0 = plt_entry[0] | (offset >> 28); |
| 7909 | elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); |
| 7910 | uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff); |
| 7911 | elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); |
| 7912 | uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff); |
| 7913 | elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); |
| 7914 | uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff); |
| 7915 | elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3); |
| 7916 | } |
| 7917 | |
| 7918 | // Write out the PLT. This uses the hand-coded instructions above, |
| 7919 | // and adjusts them as needed. This is all specified by the arm ELF |
| 7920 | // Processor Supplement. |
| 7921 | |
| 7922 | template<bool big_endian> |
| 7923 | void |
| 7924 | Output_data_plt_arm<big_endian>::do_write(Output_file* of) |
| 7925 | { |
| 7926 | const off_t offset = this->offset(); |
| 7927 | const section_size_type oview_size = |
| 7928 | convert_to_section_size_type(this->data_size()); |
| 7929 | unsigned char* const oview = of->get_output_view(offset, oview_size); |
| 7930 | |
| 7931 | const off_t got_file_offset = this->got_plt_->offset(); |
| 7932 | gold_assert(got_file_offset + this->got_plt_->data_size() |
| 7933 | == this->got_irelative_->offset()); |
| 7934 | const section_size_type got_size = |
| 7935 | convert_to_section_size_type(this->got_plt_->data_size() |
| 7936 | + this->got_irelative_->data_size()); |
| 7937 | unsigned char* const got_view = of->get_output_view(got_file_offset, |
| 7938 | got_size); |
| 7939 | unsigned char* pov = oview; |
| 7940 | |
| 7941 | Arm_address plt_address = this->address(); |
| 7942 | Arm_address got_address = this->got_plt_->address(); |
| 7943 | |
| 7944 | // Write first PLT entry. |
| 7945 | this->fill_first_plt_entry(pov, got_address, plt_address); |
| 7946 | pov += this->first_plt_entry_offset(); |
| 7947 | |
| 7948 | unsigned char* got_pov = got_view; |
| 7949 | |
| 7950 | memset(got_pov, 0, 12); |
| 7951 | got_pov += 12; |
| 7952 | |
| 7953 | unsigned int plt_offset = this->first_plt_entry_offset(); |
| 7954 | unsigned int got_offset = 12; |
| 7955 | const unsigned int count = this->count_ + this->irelative_count_; |
| 7956 | gold_assert(this->irelative_count_ == this->irelative_data_vec_.size()); |
| 7957 | for (unsigned int i = 0; |
| 7958 | i < count; |
| 7959 | ++i, |
| 7960 | pov += this->get_plt_entry_size(), |
| 7961 | got_pov += 4, |
| 7962 | plt_offset += this->get_plt_entry_size(), |
| 7963 | got_offset += 4) |
| 7964 | { |
| 7965 | // Set and adjust the PLT entry itself. |
| 7966 | this->fill_plt_entry(pov, got_address, plt_address, |
| 7967 | got_offset, plt_offset); |
| 7968 | |
| 7969 | Arm_address value; |
| 7970 | if (i < this->count_) |
| 7971 | { |
| 7972 | // For non-irelative got entries, the value is the beginning of plt. |
| 7973 | value = plt_address; |
| 7974 | } |
| 7975 | else |
| 7976 | { |
| 7977 | // For irelative got entries, the value is the (global/local) symbol |
| 7978 | // address. |
| 7979 | const IRelative_data& idata = |
| 7980 | this->irelative_data_vec_[i - this->count_]; |
| 7981 | if (idata.symbol_is_global_) |
| 7982 | { |
| 7983 | // Set the entry in the GOT for irelative symbols. The content is |
| 7984 | // the address of the ifunc, not the address of plt start. |
| 7985 | const Sized_symbol<32>* sized_symbol = idata.u_.global; |
| 7986 | gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC); |
| 7987 | value = sized_symbol->value(); |
| 7988 | } |
| 7989 | else |
| 7990 | { |
| 7991 | value = idata.u_.local.relobj->local_symbol_value( |
| 7992 | idata.u_.local.index, 0); |
| 7993 | } |
| 7994 | } |
| 7995 | elfcpp::Swap<32, big_endian>::writeval(got_pov, value); |
| 7996 | } |
| 7997 | |
| 7998 | gold_assert(static_cast<section_size_type>(pov - oview) == oview_size); |
| 7999 | gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size); |
| 8000 | |
| 8001 | of->write_output_view(offset, oview_size, oview); |
| 8002 | of->write_output_view(got_file_offset, got_size, got_view); |
| 8003 | } |
| 8004 | |
| 8005 | |
| 8006 | // Create a PLT entry for a global symbol. |
| 8007 | |
| 8008 | template<bool big_endian> |
| 8009 | void |
| 8010 | Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout, |
| 8011 | Symbol* gsym) |
| 8012 | { |
| 8013 | if (gsym->has_plt_offset()) |
| 8014 | return; |
| 8015 | |
| 8016 | if (this->plt_ == NULL) |
| 8017 | this->make_plt_section(symtab, layout); |
| 8018 | |
| 8019 | this->plt_->add_entry(symtab, layout, gsym); |
| 8020 | } |
| 8021 | |
| 8022 | |
| 8023 | // Create the PLT section. |
| 8024 | template<bool big_endian> |
| 8025 | void |
| 8026 | Target_arm<big_endian>::make_plt_section( |
| 8027 | Symbol_table* symtab, Layout* layout) |
| 8028 | { |
| 8029 | if (this->plt_ == NULL) |
| 8030 | { |
| 8031 | // Create the GOT section first. |
| 8032 | this->got_section(symtab, layout); |
| 8033 | |
| 8034 | // GOT for irelatives is create along with got.plt. |
| 8035 | gold_assert(this->got_ != NULL |
| 8036 | && this->got_plt_ != NULL |
| 8037 | && this->got_irelative_ != NULL); |
| 8038 | this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_, |
| 8039 | this->got_irelative_); |
| 8040 | |
| 8041 | layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, |
| 8042 | (elfcpp::SHF_ALLOC |
| 8043 | | elfcpp::SHF_EXECINSTR), |
| 8044 | this->plt_, ORDER_PLT, false); |
| 8045 | symtab->define_in_output_data("$a", NULL, |
| 8046 | Symbol_table::PREDEFINED, |
| 8047 | this->plt_, |
| 8048 | 0, 0, elfcpp::STT_NOTYPE, |
| 8049 | elfcpp::STB_LOCAL, |
| 8050 | elfcpp::STV_DEFAULT, 0, |
| 8051 | false, false); |
| 8052 | } |
| 8053 | } |
| 8054 | |
| 8055 | |
| 8056 | // Make a PLT entry for a local STT_GNU_IFUNC symbol. |
| 8057 | |
| 8058 | template<bool big_endian> |
| 8059 | void |
| 8060 | Target_arm<big_endian>::make_local_ifunc_plt_entry( |
| 8061 | Symbol_table* symtab, Layout* layout, |
| 8062 | Sized_relobj_file<32, big_endian>* relobj, |
| 8063 | unsigned int local_sym_index) |
| 8064 | { |
| 8065 | if (relobj->local_has_plt_offset(local_sym_index)) |
| 8066 | return; |
| 8067 | if (this->plt_ == NULL) |
| 8068 | this->make_plt_section(symtab, layout); |
| 8069 | unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, |
| 8070 | relobj, |
| 8071 | local_sym_index); |
| 8072 | relobj->set_local_plt_offset(local_sym_index, plt_offset); |
| 8073 | } |
| 8074 | |
| 8075 | |
| 8076 | // Return the number of entries in the PLT. |
| 8077 | |
| 8078 | template<bool big_endian> |
| 8079 | unsigned int |
| 8080 | Target_arm<big_endian>::plt_entry_count() const |
| 8081 | { |
| 8082 | if (this->plt_ == NULL) |
| 8083 | return 0; |
| 8084 | return this->plt_->entry_count(); |
| 8085 | } |
| 8086 | |
| 8087 | // Return the offset of the first non-reserved PLT entry. |
| 8088 | |
| 8089 | template<bool big_endian> |
| 8090 | unsigned int |
| 8091 | Target_arm<big_endian>::first_plt_entry_offset() const |
| 8092 | { |
| 8093 | return this->plt_->first_plt_entry_offset(); |
| 8094 | } |
| 8095 | |
| 8096 | // Return the size of each PLT entry. |
| 8097 | |
| 8098 | template<bool big_endian> |
| 8099 | unsigned int |
| 8100 | Target_arm<big_endian>::plt_entry_size() const |
| 8101 | { |
| 8102 | return this->plt_->get_plt_entry_size(); |
| 8103 | } |
| 8104 | |
| 8105 | // Get the section to use for TLS_DESC relocations. |
| 8106 | |
| 8107 | template<bool big_endian> |
| 8108 | typename Target_arm<big_endian>::Reloc_section* |
| 8109 | Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const |
| 8110 | { |
| 8111 | return this->plt_section()->rel_tls_desc(layout); |
| 8112 | } |
| 8113 | |
| 8114 | // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. |
| 8115 | |
| 8116 | template<bool big_endian> |
| 8117 | void |
| 8118 | Target_arm<big_endian>::define_tls_base_symbol( |
| 8119 | Symbol_table* symtab, |
| 8120 | Layout* layout) |
| 8121 | { |
| 8122 | if (this->tls_base_symbol_defined_) |
| 8123 | return; |
| 8124 | |
| 8125 | Output_segment* tls_segment = layout->tls_segment(); |
| 8126 | if (tls_segment != NULL) |
| 8127 | { |
| 8128 | bool is_exec = parameters->options().output_is_executable(); |
| 8129 | symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL, |
| 8130 | Symbol_table::PREDEFINED, |
| 8131 | tls_segment, 0, 0, |
| 8132 | elfcpp::STT_TLS, |
| 8133 | elfcpp::STB_LOCAL, |
| 8134 | elfcpp::STV_HIDDEN, 0, |
| 8135 | (is_exec |
| 8136 | ? Symbol::SEGMENT_END |
| 8137 | : Symbol::SEGMENT_START), |
| 8138 | true); |
| 8139 | } |
| 8140 | this->tls_base_symbol_defined_ = true; |
| 8141 | } |
| 8142 | |
| 8143 | // Create a GOT entry for the TLS module index. |
| 8144 | |
| 8145 | template<bool big_endian> |
| 8146 | unsigned int |
| 8147 | Target_arm<big_endian>::got_mod_index_entry( |
| 8148 | Symbol_table* symtab, |
| 8149 | Layout* layout, |
| 8150 | Sized_relobj_file<32, big_endian>* object) |
| 8151 | { |
| 8152 | if (this->got_mod_index_offset_ == -1U) |
| 8153 | { |
| 8154 | gold_assert(symtab != NULL && layout != NULL && object != NULL); |
| 8155 | Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout); |
| 8156 | unsigned int got_offset; |
| 8157 | if (!parameters->doing_static_link()) |
| 8158 | { |
| 8159 | got_offset = got->add_constant(0); |
| 8160 | Reloc_section* rel_dyn = this->rel_dyn_section(layout); |
| 8161 | rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got, |
| 8162 | got_offset); |
| 8163 | } |
| 8164 | else |
| 8165 | { |
| 8166 | // We are doing a static link. Just mark it as belong to module 1, |
| 8167 | // the executable. |
| 8168 | got_offset = got->add_constant(1); |
| 8169 | } |
| 8170 | |
| 8171 | got->add_constant(0); |
| 8172 | this->got_mod_index_offset_ = got_offset; |
| 8173 | } |
| 8174 | return this->got_mod_index_offset_; |
| 8175 | } |
| 8176 | |
| 8177 | // Optimize the TLS relocation type based on what we know about the |
| 8178 | // symbol. IS_FINAL is true if the final address of this symbol is |
| 8179 | // known at link time. |
| 8180 | |
| 8181 | template<bool big_endian> |
| 8182 | tls::Tls_optimization |
| 8183 | Target_arm<big_endian>::optimize_tls_reloc(bool, int) |
| 8184 | { |
| 8185 | // FIXME: Currently we do not do any TLS optimization. |
| 8186 | return tls::TLSOPT_NONE; |
| 8187 | } |
| 8188 | |
| 8189 | // Get the Reference_flags for a particular relocation. |
| 8190 | |
| 8191 | template<bool big_endian> |
| 8192 | int |
| 8193 | Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type) |
| 8194 | { |
| 8195 | switch (r_type) |
| 8196 | { |
| 8197 | case elfcpp::R_ARM_NONE: |
| 8198 | case elfcpp::R_ARM_V4BX: |
| 8199 | case elfcpp::R_ARM_GNU_VTENTRY: |
| 8200 | case elfcpp::R_ARM_GNU_VTINHERIT: |
| 8201 | // No symbol reference. |
| 8202 | return 0; |
| 8203 | |
| 8204 | case elfcpp::R_ARM_ABS32: |
| 8205 | case elfcpp::R_ARM_ABS16: |
| 8206 | case elfcpp::R_ARM_ABS12: |
| 8207 | case elfcpp::R_ARM_THM_ABS5: |
| 8208 | case elfcpp::R_ARM_ABS8: |
| 8209 | case elfcpp::R_ARM_BASE_ABS: |
| 8210 | case elfcpp::R_ARM_MOVW_ABS_NC: |
| 8211 | case elfcpp::R_ARM_MOVT_ABS: |
| 8212 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: |
| 8213 | case elfcpp::R_ARM_THM_MOVT_ABS: |
| 8214 | case elfcpp::R_ARM_ABS32_NOI: |
| 8215 | return Symbol::ABSOLUTE_REF; |
| 8216 | |
| 8217 | case elfcpp::R_ARM_REL32: |
| 8218 | case elfcpp::R_ARM_LDR_PC_G0: |
| 8219 | case elfcpp::R_ARM_SBREL32: |
| 8220 | case elfcpp::R_ARM_THM_PC8: |
| 8221 | case elfcpp::R_ARM_BASE_PREL: |
| 8222 | case elfcpp::R_ARM_MOVW_PREL_NC: |
| 8223 | case elfcpp::R_ARM_MOVT_PREL: |
| 8224 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: |
| 8225 | case elfcpp::R_ARM_THM_MOVT_PREL: |
| 8226 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: |
| 8227 | case elfcpp::R_ARM_THM_PC12: |
| 8228 | case elfcpp::R_ARM_REL32_NOI: |
| 8229 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
| 8230 | case elfcpp::R_ARM_ALU_PC_G0: |
| 8231 | case elfcpp::R_ARM_ALU_PC_G1_NC: |
| 8232 | case elfcpp::R_ARM_ALU_PC_G1: |
| 8233 | case elfcpp::R_ARM_ALU_PC_G2: |
| 8234 | case elfcpp::R_ARM_LDR_PC_G1: |
| 8235 | case elfcpp::R_ARM_LDR_PC_G2: |
| 8236 | case elfcpp::R_ARM_LDRS_PC_G0: |
| 8237 | case elfcpp::R_ARM_LDRS_PC_G1: |
| 8238 | case elfcpp::R_ARM_LDRS_PC_G2: |
| 8239 | case elfcpp::R_ARM_LDC_PC_G0: |
| 8240 | case elfcpp::R_ARM_LDC_PC_G1: |
| 8241 | case elfcpp::R_ARM_LDC_PC_G2: |
| 8242 | case elfcpp::R_ARM_ALU_SB_G0_NC: |
| 8243 | case elfcpp::R_ARM_ALU_SB_G0: |
| 8244 | case elfcpp::R_ARM_ALU_SB_G1_NC: |
| 8245 | case elfcpp::R_ARM_ALU_SB_G1: |
| 8246 | case elfcpp::R_ARM_ALU_SB_G2: |
| 8247 | case elfcpp::R_ARM_LDR_SB_G0: |
| 8248 | case elfcpp::R_ARM_LDR_SB_G1: |
| 8249 | case elfcpp::R_ARM_LDR_SB_G2: |
| 8250 | case elfcpp::R_ARM_LDRS_SB_G0: |
| 8251 | case elfcpp::R_ARM_LDRS_SB_G1: |
| 8252 | case elfcpp::R_ARM_LDRS_SB_G2: |
| 8253 | case elfcpp::R_ARM_LDC_SB_G0: |
| 8254 | case elfcpp::R_ARM_LDC_SB_G1: |
| 8255 | case elfcpp::R_ARM_LDC_SB_G2: |
| 8256 | case elfcpp::R_ARM_MOVW_BREL_NC: |
| 8257 | case elfcpp::R_ARM_MOVT_BREL: |
| 8258 | case elfcpp::R_ARM_MOVW_BREL: |
| 8259 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: |
| 8260 | case elfcpp::R_ARM_THM_MOVT_BREL: |
| 8261 | case elfcpp::R_ARM_THM_MOVW_BREL: |
| 8262 | case elfcpp::R_ARM_GOTOFF32: |
| 8263 | case elfcpp::R_ARM_GOTOFF12: |
| 8264 | case elfcpp::R_ARM_SBREL31: |
| 8265 | return Symbol::RELATIVE_REF; |
| 8266 | |
| 8267 | case elfcpp::R_ARM_PLT32: |
| 8268 | case elfcpp::R_ARM_CALL: |
| 8269 | case elfcpp::R_ARM_JUMP24: |
| 8270 | case elfcpp::R_ARM_THM_CALL: |
| 8271 | case elfcpp::R_ARM_THM_JUMP24: |
| 8272 | case elfcpp::R_ARM_THM_JUMP19: |
| 8273 | case elfcpp::R_ARM_THM_JUMP6: |
| 8274 | case elfcpp::R_ARM_THM_JUMP11: |
| 8275 | case elfcpp::R_ARM_THM_JUMP8: |
| 8276 | // R_ARM_PREL31 is not used to relocate call/jump instructions but |
| 8277 | // in unwind tables. It may point to functions via PLTs. |
| 8278 | // So we treat it like call/jump relocations above. |
| 8279 | case elfcpp::R_ARM_PREL31: |
| 8280 | return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; |
| 8281 | |
| 8282 | case elfcpp::R_ARM_GOT_BREL: |
| 8283 | case elfcpp::R_ARM_GOT_ABS: |
| 8284 | case elfcpp::R_ARM_GOT_PREL: |
| 8285 | // Absolute in GOT. |
| 8286 | return Symbol::ABSOLUTE_REF; |
| 8287 | |
| 8288 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 8289 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 8290 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 8291 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 8292 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 8293 | return Symbol::TLS_REF; |
| 8294 | |
| 8295 | case elfcpp::R_ARM_TARGET1: |
| 8296 | case elfcpp::R_ARM_TARGET2: |
| 8297 | case elfcpp::R_ARM_COPY: |
| 8298 | case elfcpp::R_ARM_GLOB_DAT: |
| 8299 | case elfcpp::R_ARM_JUMP_SLOT: |
| 8300 | case elfcpp::R_ARM_RELATIVE: |
| 8301 | case elfcpp::R_ARM_PC24: |
| 8302 | case elfcpp::R_ARM_LDR_SBREL_11_0_NC: |
| 8303 | case elfcpp::R_ARM_ALU_SBREL_19_12_NC: |
| 8304 | case elfcpp::R_ARM_ALU_SBREL_27_20_CK: |
| 8305 | default: |
| 8306 | // Not expected. We will give an error later. |
| 8307 | return 0; |
| 8308 | } |
| 8309 | } |
| 8310 | |
| 8311 | // Report an unsupported relocation against a local symbol. |
| 8312 | |
| 8313 | template<bool big_endian> |
| 8314 | void |
| 8315 | Target_arm<big_endian>::Scan::unsupported_reloc_local( |
| 8316 | Sized_relobj_file<32, big_endian>* object, |
| 8317 | unsigned int r_type) |
| 8318 | { |
| 8319 | gold_error(_("%s: unsupported reloc %u against local symbol"), |
| 8320 | object->name().c_str(), r_type); |
| 8321 | } |
| 8322 | |
| 8323 | // We are about to emit a dynamic relocation of type R_TYPE. If the |
| 8324 | // dynamic linker does not support it, issue an error. The GNU linker |
| 8325 | // only issues a non-PIC error for an allocated read-only section. |
| 8326 | // Here we know the section is allocated, but we don't know that it is |
| 8327 | // read-only. But we check for all the relocation types which the |
| 8328 | // glibc dynamic linker supports, so it seems appropriate to issue an |
| 8329 | // error even if the section is not read-only. |
| 8330 | |
| 8331 | template<bool big_endian> |
| 8332 | void |
| 8333 | Target_arm<big_endian>::Scan::check_non_pic(Relobj* object, |
| 8334 | unsigned int r_type) |
| 8335 | { |
| 8336 | switch (r_type) |
| 8337 | { |
| 8338 | // These are the relocation types supported by glibc for ARM. |
| 8339 | case elfcpp::R_ARM_RELATIVE: |
| 8340 | case elfcpp::R_ARM_COPY: |
| 8341 | case elfcpp::R_ARM_GLOB_DAT: |
| 8342 | case elfcpp::R_ARM_JUMP_SLOT: |
| 8343 | case elfcpp::R_ARM_ABS32: |
| 8344 | case elfcpp::R_ARM_ABS32_NOI: |
| 8345 | case elfcpp::R_ARM_IRELATIVE: |
| 8346 | case elfcpp::R_ARM_PC24: |
| 8347 | // FIXME: The following 3 types are not supported by Android's dynamic |
| 8348 | // linker. |
| 8349 | case elfcpp::R_ARM_TLS_DTPMOD32: |
| 8350 | case elfcpp::R_ARM_TLS_DTPOFF32: |
| 8351 | case elfcpp::R_ARM_TLS_TPOFF32: |
| 8352 | return; |
| 8353 | |
| 8354 | default: |
| 8355 | { |
| 8356 | // This prevents us from issuing more than one error per reloc |
| 8357 | // section. But we can still wind up issuing more than one |
| 8358 | // error per object file. |
| 8359 | if (this->issued_non_pic_error_) |
| 8360 | return; |
| 8361 | const Arm_reloc_property* reloc_property = |
| 8362 | arm_reloc_property_table->get_reloc_property(r_type); |
| 8363 | gold_assert(reloc_property != NULL); |
| 8364 | object->error(_("requires unsupported dynamic reloc %s; " |
| 8365 | "recompile with -fPIC"), |
| 8366 | reloc_property->name().c_str()); |
| 8367 | this->issued_non_pic_error_ = true; |
| 8368 | return; |
| 8369 | } |
| 8370 | |
| 8371 | case elfcpp::R_ARM_NONE: |
| 8372 | gold_unreachable(); |
| 8373 | } |
| 8374 | } |
| 8375 | |
| 8376 | |
| 8377 | // Return whether we need to make a PLT entry for a relocation of the |
| 8378 | // given type against a STT_GNU_IFUNC symbol. |
| 8379 | |
| 8380 | template<bool big_endian> |
| 8381 | bool |
| 8382 | Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc( |
| 8383 | Sized_relobj_file<32, big_endian>* object, |
| 8384 | unsigned int r_type) |
| 8385 | { |
| 8386 | int flags = Scan::get_reference_flags(r_type); |
| 8387 | if (flags & Symbol::TLS_REF) |
| 8388 | { |
| 8389 | gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"), |
| 8390 | object->name().c_str(), r_type); |
| 8391 | return false; |
| 8392 | } |
| 8393 | return flags != 0; |
| 8394 | } |
| 8395 | |
| 8396 | |
| 8397 | // Scan a relocation for a local symbol. |
| 8398 | // FIXME: This only handles a subset of relocation types used by Android |
| 8399 | // on ARM v5te devices. |
| 8400 | |
| 8401 | template<bool big_endian> |
| 8402 | inline void |
| 8403 | Target_arm<big_endian>::Scan::local(Symbol_table* symtab, |
| 8404 | Layout* layout, |
| 8405 | Target_arm* target, |
| 8406 | Sized_relobj_file<32, big_endian>* object, |
| 8407 | unsigned int data_shndx, |
| 8408 | Output_section* output_section, |
| 8409 | const elfcpp::Rel<32, big_endian>& reloc, |
| 8410 | unsigned int r_type, |
| 8411 | const elfcpp::Sym<32, big_endian>& lsym, |
| 8412 | bool is_discarded) |
| 8413 | { |
| 8414 | if (is_discarded) |
| 8415 | return; |
| 8416 | |
| 8417 | r_type = get_real_reloc_type(r_type); |
| 8418 | |
| 8419 | // A local STT_GNU_IFUNC symbol may require a PLT entry. |
| 8420 | bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; |
| 8421 | if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type)) |
| 8422 | { |
| 8423 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8424 | target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym); |
| 8425 | } |
| 8426 | |
| 8427 | switch (r_type) |
| 8428 | { |
| 8429 | case elfcpp::R_ARM_NONE: |
| 8430 | case elfcpp::R_ARM_V4BX: |
| 8431 | case elfcpp::R_ARM_GNU_VTENTRY: |
| 8432 | case elfcpp::R_ARM_GNU_VTINHERIT: |
| 8433 | break; |
| 8434 | |
| 8435 | case elfcpp::R_ARM_ABS32: |
| 8436 | case elfcpp::R_ARM_ABS32_NOI: |
| 8437 | // If building a shared library (or a position-independent |
| 8438 | // executable), we need to create a dynamic relocation for |
| 8439 | // this location. The relocation applied at link time will |
| 8440 | // apply the link-time value, so we flag the location with |
| 8441 | // an R_ARM_RELATIVE relocation so the dynamic loader can |
| 8442 | // relocate it easily. |
| 8443 | if (parameters->options().output_is_position_independent()) |
| 8444 | { |
| 8445 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8446 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8447 | // If we are to add more other reloc types than R_ARM_ABS32, |
| 8448 | // we need to add check_non_pic(object, r_type) here. |
| 8449 | rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE, |
| 8450 | output_section, data_shndx, |
| 8451 | reloc.get_r_offset(), is_ifunc); |
| 8452 | } |
| 8453 | break; |
| 8454 | |
| 8455 | case elfcpp::R_ARM_ABS16: |
| 8456 | case elfcpp::R_ARM_ABS12: |
| 8457 | case elfcpp::R_ARM_THM_ABS5: |
| 8458 | case elfcpp::R_ARM_ABS8: |
| 8459 | case elfcpp::R_ARM_BASE_ABS: |
| 8460 | case elfcpp::R_ARM_MOVW_ABS_NC: |
| 8461 | case elfcpp::R_ARM_MOVT_ABS: |
| 8462 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: |
| 8463 | case elfcpp::R_ARM_THM_MOVT_ABS: |
| 8464 | // If building a shared library (or a position-independent |
| 8465 | // executable), we need to create a dynamic relocation for |
| 8466 | // this location. Because the addend needs to remain in the |
| 8467 | // data section, we need to be careful not to apply this |
| 8468 | // relocation statically. |
| 8469 | if (parameters->options().output_is_position_independent()) |
| 8470 | { |
| 8471 | check_non_pic(object, r_type); |
| 8472 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8473 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8474 | if (lsym.get_st_type() != elfcpp::STT_SECTION) |
| 8475 | rel_dyn->add_local(object, r_sym, r_type, output_section, |
| 8476 | data_shndx, reloc.get_r_offset()); |
| 8477 | else |
| 8478 | { |
| 8479 | gold_assert(lsym.get_st_value() == 0); |
| 8480 | unsigned int shndx = lsym.get_st_shndx(); |
| 8481 | bool is_ordinary; |
| 8482 | shndx = object->adjust_sym_shndx(r_sym, shndx, |
| 8483 | &is_ordinary); |
| 8484 | if (!is_ordinary) |
| 8485 | object->error(_("section symbol %u has bad shndx %u"), |
| 8486 | r_sym, shndx); |
| 8487 | else |
| 8488 | rel_dyn->add_local_section(object, shndx, |
| 8489 | r_type, output_section, |
| 8490 | data_shndx, reloc.get_r_offset()); |
| 8491 | } |
| 8492 | } |
| 8493 | break; |
| 8494 | |
| 8495 | case elfcpp::R_ARM_REL32: |
| 8496 | case elfcpp::R_ARM_LDR_PC_G0: |
| 8497 | case elfcpp::R_ARM_SBREL32: |
| 8498 | case elfcpp::R_ARM_THM_CALL: |
| 8499 | case elfcpp::R_ARM_THM_PC8: |
| 8500 | case elfcpp::R_ARM_BASE_PREL: |
| 8501 | case elfcpp::R_ARM_PLT32: |
| 8502 | case elfcpp::R_ARM_CALL: |
| 8503 | case elfcpp::R_ARM_JUMP24: |
| 8504 | case elfcpp::R_ARM_THM_JUMP24: |
| 8505 | case elfcpp::R_ARM_SBREL31: |
| 8506 | case elfcpp::R_ARM_PREL31: |
| 8507 | case elfcpp::R_ARM_MOVW_PREL_NC: |
| 8508 | case elfcpp::R_ARM_MOVT_PREL: |
| 8509 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: |
| 8510 | case elfcpp::R_ARM_THM_MOVT_PREL: |
| 8511 | case elfcpp::R_ARM_THM_JUMP19: |
| 8512 | case elfcpp::R_ARM_THM_JUMP6: |
| 8513 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: |
| 8514 | case elfcpp::R_ARM_THM_PC12: |
| 8515 | case elfcpp::R_ARM_REL32_NOI: |
| 8516 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
| 8517 | case elfcpp::R_ARM_ALU_PC_G0: |
| 8518 | case elfcpp::R_ARM_ALU_PC_G1_NC: |
| 8519 | case elfcpp::R_ARM_ALU_PC_G1: |
| 8520 | case elfcpp::R_ARM_ALU_PC_G2: |
| 8521 | case elfcpp::R_ARM_LDR_PC_G1: |
| 8522 | case elfcpp::R_ARM_LDR_PC_G2: |
| 8523 | case elfcpp::R_ARM_LDRS_PC_G0: |
| 8524 | case elfcpp::R_ARM_LDRS_PC_G1: |
| 8525 | case elfcpp::R_ARM_LDRS_PC_G2: |
| 8526 | case elfcpp::R_ARM_LDC_PC_G0: |
| 8527 | case elfcpp::R_ARM_LDC_PC_G1: |
| 8528 | case elfcpp::R_ARM_LDC_PC_G2: |
| 8529 | case elfcpp::R_ARM_ALU_SB_G0_NC: |
| 8530 | case elfcpp::R_ARM_ALU_SB_G0: |
| 8531 | case elfcpp::R_ARM_ALU_SB_G1_NC: |
| 8532 | case elfcpp::R_ARM_ALU_SB_G1: |
| 8533 | case elfcpp::R_ARM_ALU_SB_G2: |
| 8534 | case elfcpp::R_ARM_LDR_SB_G0: |
| 8535 | case elfcpp::R_ARM_LDR_SB_G1: |
| 8536 | case elfcpp::R_ARM_LDR_SB_G2: |
| 8537 | case elfcpp::R_ARM_LDRS_SB_G0: |
| 8538 | case elfcpp::R_ARM_LDRS_SB_G1: |
| 8539 | case elfcpp::R_ARM_LDRS_SB_G2: |
| 8540 | case elfcpp::R_ARM_LDC_SB_G0: |
| 8541 | case elfcpp::R_ARM_LDC_SB_G1: |
| 8542 | case elfcpp::R_ARM_LDC_SB_G2: |
| 8543 | case elfcpp::R_ARM_MOVW_BREL_NC: |
| 8544 | case elfcpp::R_ARM_MOVT_BREL: |
| 8545 | case elfcpp::R_ARM_MOVW_BREL: |
| 8546 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: |
| 8547 | case elfcpp::R_ARM_THM_MOVT_BREL: |
| 8548 | case elfcpp::R_ARM_THM_MOVW_BREL: |
| 8549 | case elfcpp::R_ARM_THM_JUMP11: |
| 8550 | case elfcpp::R_ARM_THM_JUMP8: |
| 8551 | // We don't need to do anything for a relative addressing relocation |
| 8552 | // against a local symbol if it does not reference the GOT. |
| 8553 | break; |
| 8554 | |
| 8555 | case elfcpp::R_ARM_GOTOFF32: |
| 8556 | case elfcpp::R_ARM_GOTOFF12: |
| 8557 | // We need a GOT section: |
| 8558 | target->got_section(symtab, layout); |
| 8559 | break; |
| 8560 | |
| 8561 | case elfcpp::R_ARM_GOT_BREL: |
| 8562 | case elfcpp::R_ARM_GOT_PREL: |
| 8563 | { |
| 8564 | // The symbol requires a GOT entry. |
| 8565 | Arm_output_data_got<big_endian>* got = |
| 8566 | target->got_section(symtab, layout); |
| 8567 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8568 | if (got->add_local(object, r_sym, GOT_TYPE_STANDARD)) |
| 8569 | { |
| 8570 | // If we are generating a shared object, we need to add a |
| 8571 | // dynamic RELATIVE relocation for this symbol's GOT entry. |
| 8572 | if (parameters->options().output_is_position_independent()) |
| 8573 | { |
| 8574 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8575 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8576 | rel_dyn->add_local_relative( |
| 8577 | object, r_sym, elfcpp::R_ARM_RELATIVE, got, |
| 8578 | object->local_got_offset(r_sym, GOT_TYPE_STANDARD)); |
| 8579 | } |
| 8580 | } |
| 8581 | } |
| 8582 | break; |
| 8583 | |
| 8584 | case elfcpp::R_ARM_TARGET1: |
| 8585 | case elfcpp::R_ARM_TARGET2: |
| 8586 | // This should have been mapped to another type already. |
| 8587 | // Fall through. |
| 8588 | case elfcpp::R_ARM_COPY: |
| 8589 | case elfcpp::R_ARM_GLOB_DAT: |
| 8590 | case elfcpp::R_ARM_JUMP_SLOT: |
| 8591 | case elfcpp::R_ARM_RELATIVE: |
| 8592 | // These are relocations which should only be seen by the |
| 8593 | // dynamic linker, and should never be seen here. |
| 8594 | gold_error(_("%s: unexpected reloc %u in object file"), |
| 8595 | object->name().c_str(), r_type); |
| 8596 | break; |
| 8597 | |
| 8598 | |
| 8599 | // These are initial TLS relocs, which are expected when |
| 8600 | // linking. |
| 8601 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 8602 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 8603 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 8604 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 8605 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 8606 | { |
| 8607 | bool output_is_shared = parameters->options().shared(); |
| 8608 | const tls::Tls_optimization optimized_type |
| 8609 | = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared, |
| 8610 | r_type); |
| 8611 | switch (r_type) |
| 8612 | { |
| 8613 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 8614 | if (optimized_type == tls::TLSOPT_NONE) |
| 8615 | { |
| 8616 | // Create a pair of GOT entries for the module index and |
| 8617 | // dtv-relative offset. |
| 8618 | Arm_output_data_got<big_endian>* got |
| 8619 | = target->got_section(symtab, layout); |
| 8620 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8621 | unsigned int shndx = lsym.get_st_shndx(); |
| 8622 | bool is_ordinary; |
| 8623 | shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary); |
| 8624 | if (!is_ordinary) |
| 8625 | { |
| 8626 | object->error(_("local symbol %u has bad shndx %u"), |
| 8627 | r_sym, shndx); |
| 8628 | break; |
| 8629 | } |
| 8630 | |
| 8631 | if (!parameters->doing_static_link()) |
| 8632 | got->add_local_pair_with_rel(object, r_sym, shndx, |
| 8633 | GOT_TYPE_TLS_PAIR, |
| 8634 | target->rel_dyn_section(layout), |
| 8635 | elfcpp::R_ARM_TLS_DTPMOD32); |
| 8636 | else |
| 8637 | got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, |
| 8638 | object, r_sym); |
| 8639 | } |
| 8640 | else |
| 8641 | // FIXME: TLS optimization not supported yet. |
| 8642 | gold_unreachable(); |
| 8643 | break; |
| 8644 | |
| 8645 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 8646 | if (optimized_type == tls::TLSOPT_NONE) |
| 8647 | { |
| 8648 | // Create a GOT entry for the module index. |
| 8649 | target->got_mod_index_entry(symtab, layout, object); |
| 8650 | } |
| 8651 | else |
| 8652 | // FIXME: TLS optimization not supported yet. |
| 8653 | gold_unreachable(); |
| 8654 | break; |
| 8655 | |
| 8656 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 8657 | break; |
| 8658 | |
| 8659 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 8660 | layout->set_has_static_tls(); |
| 8661 | if (optimized_type == tls::TLSOPT_NONE) |
| 8662 | { |
| 8663 | // Create a GOT entry for the tp-relative offset. |
| 8664 | Arm_output_data_got<big_endian>* got |
| 8665 | = target->got_section(symtab, layout); |
| 8666 | unsigned int r_sym = |
| 8667 | elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8668 | if (!parameters->doing_static_link()) |
| 8669 | got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET, |
| 8670 | target->rel_dyn_section(layout), |
| 8671 | elfcpp::R_ARM_TLS_TPOFF32); |
| 8672 | else if (!object->local_has_got_offset(r_sym, |
| 8673 | GOT_TYPE_TLS_OFFSET)) |
| 8674 | { |
| 8675 | got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET); |
| 8676 | unsigned int got_offset = |
| 8677 | object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET); |
| 8678 | got->add_static_reloc(got_offset, |
| 8679 | elfcpp::R_ARM_TLS_TPOFF32, object, |
| 8680 | r_sym); |
| 8681 | } |
| 8682 | } |
| 8683 | else |
| 8684 | // FIXME: TLS optimization not supported yet. |
| 8685 | gold_unreachable(); |
| 8686 | break; |
| 8687 | |
| 8688 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 8689 | layout->set_has_static_tls(); |
| 8690 | if (output_is_shared) |
| 8691 | { |
| 8692 | // We need to create a dynamic relocation. |
| 8693 | gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION); |
| 8694 | unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); |
| 8695 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8696 | rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32, |
| 8697 | output_section, data_shndx, |
| 8698 | reloc.get_r_offset()); |
| 8699 | } |
| 8700 | break; |
| 8701 | |
| 8702 | default: |
| 8703 | gold_unreachable(); |
| 8704 | } |
| 8705 | } |
| 8706 | break; |
| 8707 | |
| 8708 | case elfcpp::R_ARM_PC24: |
| 8709 | case elfcpp::R_ARM_LDR_SBREL_11_0_NC: |
| 8710 | case elfcpp::R_ARM_ALU_SBREL_19_12_NC: |
| 8711 | case elfcpp::R_ARM_ALU_SBREL_27_20_CK: |
| 8712 | default: |
| 8713 | unsupported_reloc_local(object, r_type); |
| 8714 | break; |
| 8715 | } |
| 8716 | } |
| 8717 | |
| 8718 | // Report an unsupported relocation against a global symbol. |
| 8719 | |
| 8720 | template<bool big_endian> |
| 8721 | void |
| 8722 | Target_arm<big_endian>::Scan::unsupported_reloc_global( |
| 8723 | Sized_relobj_file<32, big_endian>* object, |
| 8724 | unsigned int r_type, |
| 8725 | Symbol* gsym) |
| 8726 | { |
| 8727 | gold_error(_("%s: unsupported reloc %u against global symbol %s"), |
| 8728 | object->name().c_str(), r_type, gsym->demangled_name().c_str()); |
| 8729 | } |
| 8730 | |
| 8731 | template<bool big_endian> |
| 8732 | inline bool |
| 8733 | Target_arm<big_endian>::Scan::possible_function_pointer_reloc( |
| 8734 | unsigned int r_type) |
| 8735 | { |
| 8736 | switch (r_type) |
| 8737 | { |
| 8738 | case elfcpp::R_ARM_PC24: |
| 8739 | case elfcpp::R_ARM_THM_CALL: |
| 8740 | case elfcpp::R_ARM_PLT32: |
| 8741 | case elfcpp::R_ARM_CALL: |
| 8742 | case elfcpp::R_ARM_JUMP24: |
| 8743 | case elfcpp::R_ARM_THM_JUMP24: |
| 8744 | case elfcpp::R_ARM_SBREL31: |
| 8745 | case elfcpp::R_ARM_PREL31: |
| 8746 | case elfcpp::R_ARM_THM_JUMP19: |
| 8747 | case elfcpp::R_ARM_THM_JUMP6: |
| 8748 | case elfcpp::R_ARM_THM_JUMP11: |
| 8749 | case elfcpp::R_ARM_THM_JUMP8: |
| 8750 | // All the relocations above are branches except SBREL31 and PREL31. |
| 8751 | return false; |
| 8752 | |
| 8753 | default: |
| 8754 | // Be conservative and assume this is a function pointer. |
| 8755 | return true; |
| 8756 | } |
| 8757 | } |
| 8758 | |
| 8759 | template<bool big_endian> |
| 8760 | inline bool |
| 8761 | Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer( |
| 8762 | Symbol_table*, |
| 8763 | Layout*, |
| 8764 | Target_arm<big_endian>* target, |
| 8765 | Sized_relobj_file<32, big_endian>*, |
| 8766 | unsigned int, |
| 8767 | Output_section*, |
| 8768 | const elfcpp::Rel<32, big_endian>&, |
| 8769 | unsigned int r_type, |
| 8770 | const elfcpp::Sym<32, big_endian>&) |
| 8771 | { |
| 8772 | r_type = target->get_real_reloc_type(r_type); |
| 8773 | return possible_function_pointer_reloc(r_type); |
| 8774 | } |
| 8775 | |
| 8776 | template<bool big_endian> |
| 8777 | inline bool |
| 8778 | Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer( |
| 8779 | Symbol_table*, |
| 8780 | Layout*, |
| 8781 | Target_arm<big_endian>* target, |
| 8782 | Sized_relobj_file<32, big_endian>*, |
| 8783 | unsigned int, |
| 8784 | Output_section*, |
| 8785 | const elfcpp::Rel<32, big_endian>&, |
| 8786 | unsigned int r_type, |
| 8787 | Symbol* gsym) |
| 8788 | { |
| 8789 | // GOT is not a function. |
| 8790 | if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) |
| 8791 | return false; |
| 8792 | |
| 8793 | r_type = target->get_real_reloc_type(r_type); |
| 8794 | return possible_function_pointer_reloc(r_type); |
| 8795 | } |
| 8796 | |
| 8797 | // Scan a relocation for a global symbol. |
| 8798 | |
| 8799 | template<bool big_endian> |
| 8800 | inline void |
| 8801 | Target_arm<big_endian>::Scan::global(Symbol_table* symtab, |
| 8802 | Layout* layout, |
| 8803 | Target_arm* target, |
| 8804 | Sized_relobj_file<32, big_endian>* object, |
| 8805 | unsigned int data_shndx, |
| 8806 | Output_section* output_section, |
| 8807 | const elfcpp::Rel<32, big_endian>& reloc, |
| 8808 | unsigned int r_type, |
| 8809 | Symbol* gsym) |
| 8810 | { |
| 8811 | // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got |
| 8812 | // section. We check here to avoid creating a dynamic reloc against |
| 8813 | // _GLOBAL_OFFSET_TABLE_. |
| 8814 | if (!target->has_got_section() |
| 8815 | && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) |
| 8816 | target->got_section(symtab, layout); |
| 8817 | |
| 8818 | // A STT_GNU_IFUNC symbol may require a PLT entry. |
| 8819 | if (gsym->type() == elfcpp::STT_GNU_IFUNC |
| 8820 | && this->reloc_needs_plt_for_ifunc(object, r_type)) |
| 8821 | target->make_plt_entry(symtab, layout, gsym); |
| 8822 | |
| 8823 | r_type = get_real_reloc_type(r_type); |
| 8824 | switch (r_type) |
| 8825 | { |
| 8826 | case elfcpp::R_ARM_NONE: |
| 8827 | case elfcpp::R_ARM_V4BX: |
| 8828 | case elfcpp::R_ARM_GNU_VTENTRY: |
| 8829 | case elfcpp::R_ARM_GNU_VTINHERIT: |
| 8830 | break; |
| 8831 | |
| 8832 | case elfcpp::R_ARM_ABS32: |
| 8833 | case elfcpp::R_ARM_ABS16: |
| 8834 | case elfcpp::R_ARM_ABS12: |
| 8835 | case elfcpp::R_ARM_THM_ABS5: |
| 8836 | case elfcpp::R_ARM_ABS8: |
| 8837 | case elfcpp::R_ARM_BASE_ABS: |
| 8838 | case elfcpp::R_ARM_MOVW_ABS_NC: |
| 8839 | case elfcpp::R_ARM_MOVT_ABS: |
| 8840 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: |
| 8841 | case elfcpp::R_ARM_THM_MOVT_ABS: |
| 8842 | case elfcpp::R_ARM_ABS32_NOI: |
| 8843 | // Absolute addressing relocations. |
| 8844 | { |
| 8845 | // Make a PLT entry if necessary. |
| 8846 | if (this->symbol_needs_plt_entry(gsym)) |
| 8847 | { |
| 8848 | target->make_plt_entry(symtab, layout, gsym); |
| 8849 | // Since this is not a PC-relative relocation, we may be |
| 8850 | // taking the address of a function. In that case we need to |
| 8851 | // set the entry in the dynamic symbol table to the address of |
| 8852 | // the PLT entry. |
| 8853 | if (gsym->is_from_dynobj() && !parameters->options().shared()) |
| 8854 | gsym->set_needs_dynsym_value(); |
| 8855 | } |
| 8856 | // Make a dynamic relocation if necessary. |
| 8857 | if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) |
| 8858 | { |
| 8859 | if (!parameters->options().output_is_position_independent() |
| 8860 | && gsym->may_need_copy_reloc()) |
| 8861 | { |
| 8862 | target->copy_reloc(symtab, layout, object, |
| 8863 | data_shndx, output_section, gsym, reloc); |
| 8864 | } |
| 8865 | else if ((r_type == elfcpp::R_ARM_ABS32 |
| 8866 | || r_type == elfcpp::R_ARM_ABS32_NOI) |
| 8867 | && gsym->type() == elfcpp::STT_GNU_IFUNC |
| 8868 | && gsym->can_use_relative_reloc(false) |
| 8869 | && !gsym->is_from_dynobj() |
| 8870 | && !gsym->is_undefined() |
| 8871 | && !gsym->is_preemptible()) |
| 8872 | { |
| 8873 | // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC |
| 8874 | // symbol. This makes a function address in a PIE executable |
| 8875 | // match the address in a shared library that it links against. |
| 8876 | Reloc_section* rel_irelative = |
| 8877 | target->rel_irelative_section(layout); |
| 8878 | unsigned int r_type = elfcpp::R_ARM_IRELATIVE; |
| 8879 | rel_irelative->add_symbolless_global_addend( |
| 8880 | gsym, r_type, output_section, object, |
| 8881 | data_shndx, reloc.get_r_offset()); |
| 8882 | } |
| 8883 | else if ((r_type == elfcpp::R_ARM_ABS32 |
| 8884 | || r_type == elfcpp::R_ARM_ABS32_NOI) |
| 8885 | && gsym->can_use_relative_reloc(false)) |
| 8886 | { |
| 8887 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8888 | rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE, |
| 8889 | output_section, object, |
| 8890 | data_shndx, reloc.get_r_offset()); |
| 8891 | } |
| 8892 | else |
| 8893 | { |
| 8894 | check_non_pic(object, r_type); |
| 8895 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8896 | rel_dyn->add_global(gsym, r_type, output_section, object, |
| 8897 | data_shndx, reloc.get_r_offset()); |
| 8898 | } |
| 8899 | } |
| 8900 | } |
| 8901 | break; |
| 8902 | |
| 8903 | case elfcpp::R_ARM_GOTOFF32: |
| 8904 | case elfcpp::R_ARM_GOTOFF12: |
| 8905 | // We need a GOT section. |
| 8906 | target->got_section(symtab, layout); |
| 8907 | break; |
| 8908 | |
| 8909 | case elfcpp::R_ARM_REL32: |
| 8910 | case elfcpp::R_ARM_LDR_PC_G0: |
| 8911 | case elfcpp::R_ARM_SBREL32: |
| 8912 | case elfcpp::R_ARM_THM_PC8: |
| 8913 | case elfcpp::R_ARM_BASE_PREL: |
| 8914 | case elfcpp::R_ARM_MOVW_PREL_NC: |
| 8915 | case elfcpp::R_ARM_MOVT_PREL: |
| 8916 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: |
| 8917 | case elfcpp::R_ARM_THM_MOVT_PREL: |
| 8918 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: |
| 8919 | case elfcpp::R_ARM_THM_PC12: |
| 8920 | case elfcpp::R_ARM_REL32_NOI: |
| 8921 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
| 8922 | case elfcpp::R_ARM_ALU_PC_G0: |
| 8923 | case elfcpp::R_ARM_ALU_PC_G1_NC: |
| 8924 | case elfcpp::R_ARM_ALU_PC_G1: |
| 8925 | case elfcpp::R_ARM_ALU_PC_G2: |
| 8926 | case elfcpp::R_ARM_LDR_PC_G1: |
| 8927 | case elfcpp::R_ARM_LDR_PC_G2: |
| 8928 | case elfcpp::R_ARM_LDRS_PC_G0: |
| 8929 | case elfcpp::R_ARM_LDRS_PC_G1: |
| 8930 | case elfcpp::R_ARM_LDRS_PC_G2: |
| 8931 | case elfcpp::R_ARM_LDC_PC_G0: |
| 8932 | case elfcpp::R_ARM_LDC_PC_G1: |
| 8933 | case elfcpp::R_ARM_LDC_PC_G2: |
| 8934 | case elfcpp::R_ARM_ALU_SB_G0_NC: |
| 8935 | case elfcpp::R_ARM_ALU_SB_G0: |
| 8936 | case elfcpp::R_ARM_ALU_SB_G1_NC: |
| 8937 | case elfcpp::R_ARM_ALU_SB_G1: |
| 8938 | case elfcpp::R_ARM_ALU_SB_G2: |
| 8939 | case elfcpp::R_ARM_LDR_SB_G0: |
| 8940 | case elfcpp::R_ARM_LDR_SB_G1: |
| 8941 | case elfcpp::R_ARM_LDR_SB_G2: |
| 8942 | case elfcpp::R_ARM_LDRS_SB_G0: |
| 8943 | case elfcpp::R_ARM_LDRS_SB_G1: |
| 8944 | case elfcpp::R_ARM_LDRS_SB_G2: |
| 8945 | case elfcpp::R_ARM_LDC_SB_G0: |
| 8946 | case elfcpp::R_ARM_LDC_SB_G1: |
| 8947 | case elfcpp::R_ARM_LDC_SB_G2: |
| 8948 | case elfcpp::R_ARM_MOVW_BREL_NC: |
| 8949 | case elfcpp::R_ARM_MOVT_BREL: |
| 8950 | case elfcpp::R_ARM_MOVW_BREL: |
| 8951 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: |
| 8952 | case elfcpp::R_ARM_THM_MOVT_BREL: |
| 8953 | case elfcpp::R_ARM_THM_MOVW_BREL: |
| 8954 | // Relative addressing relocations. |
| 8955 | { |
| 8956 | // Make a dynamic relocation if necessary. |
| 8957 | if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) |
| 8958 | { |
| 8959 | if (parameters->options().output_is_executable() |
| 8960 | && target->may_need_copy_reloc(gsym)) |
| 8961 | { |
| 8962 | target->copy_reloc(symtab, layout, object, |
| 8963 | data_shndx, output_section, gsym, reloc); |
| 8964 | } |
| 8965 | else |
| 8966 | { |
| 8967 | check_non_pic(object, r_type); |
| 8968 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 8969 | rel_dyn->add_global(gsym, r_type, output_section, object, |
| 8970 | data_shndx, reloc.get_r_offset()); |
| 8971 | } |
| 8972 | } |
| 8973 | } |
| 8974 | break; |
| 8975 | |
| 8976 | case elfcpp::R_ARM_THM_CALL: |
| 8977 | case elfcpp::R_ARM_PLT32: |
| 8978 | case elfcpp::R_ARM_CALL: |
| 8979 | case elfcpp::R_ARM_JUMP24: |
| 8980 | case elfcpp::R_ARM_THM_JUMP24: |
| 8981 | case elfcpp::R_ARM_SBREL31: |
| 8982 | case elfcpp::R_ARM_PREL31: |
| 8983 | case elfcpp::R_ARM_THM_JUMP19: |
| 8984 | case elfcpp::R_ARM_THM_JUMP6: |
| 8985 | case elfcpp::R_ARM_THM_JUMP11: |
| 8986 | case elfcpp::R_ARM_THM_JUMP8: |
| 8987 | // All the relocation above are branches except for the PREL31 ones. |
| 8988 | // A PREL31 relocation can point to a personality function in a shared |
| 8989 | // library. In that case we want to use a PLT because we want to |
| 8990 | // call the personality routine and the dynamic linkers we care about |
| 8991 | // do not support dynamic PREL31 relocations. An REL31 relocation may |
| 8992 | // point to a function whose unwinding behaviour is being described but |
| 8993 | // we will not mistakenly generate a PLT for that because we should use |
| 8994 | // a local section symbol. |
| 8995 | |
| 8996 | // If the symbol is fully resolved, this is just a relative |
| 8997 | // local reloc. Otherwise we need a PLT entry. |
| 8998 | if (gsym->final_value_is_known()) |
| 8999 | break; |
| 9000 | // If building a shared library, we can also skip the PLT entry |
| 9001 | // if the symbol is defined in the output file and is protected |
| 9002 | // or hidden. |
| 9003 | if (gsym->is_defined() |
| 9004 | && !gsym->is_from_dynobj() |
| 9005 | && !gsym->is_preemptible()) |
| 9006 | break; |
| 9007 | target->make_plt_entry(symtab, layout, gsym); |
| 9008 | break; |
| 9009 | |
| 9010 | case elfcpp::R_ARM_GOT_BREL: |
| 9011 | case elfcpp::R_ARM_GOT_ABS: |
| 9012 | case elfcpp::R_ARM_GOT_PREL: |
| 9013 | { |
| 9014 | // The symbol requires a GOT entry. |
| 9015 | Arm_output_data_got<big_endian>* got = |
| 9016 | target->got_section(symtab, layout); |
| 9017 | if (gsym->final_value_is_known()) |
| 9018 | { |
| 9019 | // For a STT_GNU_IFUNC symbol we want the PLT address. |
| 9020 | if (gsym->type() == elfcpp::STT_GNU_IFUNC) |
| 9021 | got->add_global_plt(gsym, GOT_TYPE_STANDARD); |
| 9022 | else |
| 9023 | got->add_global(gsym, GOT_TYPE_STANDARD); |
| 9024 | } |
| 9025 | else |
| 9026 | { |
| 9027 | // If this symbol is not fully resolved, we need to add a |
| 9028 | // GOT entry with a dynamic relocation. |
| 9029 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 9030 | if (gsym->is_from_dynobj() |
| 9031 | || gsym->is_undefined() |
| 9032 | || gsym->is_preemptible() |
| 9033 | || (gsym->visibility() == elfcpp::STV_PROTECTED |
| 9034 | && parameters->options().shared()) |
| 9035 | || (gsym->type() == elfcpp::STT_GNU_IFUNC |
| 9036 | && parameters->options().output_is_position_independent())) |
| 9037 | got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, |
| 9038 | rel_dyn, elfcpp::R_ARM_GLOB_DAT); |
| 9039 | else |
| 9040 | { |
| 9041 | // For a STT_GNU_IFUNC symbol we want to write the PLT |
| 9042 | // offset into the GOT, so that function pointer |
| 9043 | // comparisons work correctly. |
| 9044 | bool is_new; |
| 9045 | if (gsym->type() != elfcpp::STT_GNU_IFUNC) |
| 9046 | is_new = got->add_global(gsym, GOT_TYPE_STANDARD); |
| 9047 | else |
| 9048 | { |
| 9049 | is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD); |
| 9050 | // Tell the dynamic linker to use the PLT address |
| 9051 | // when resolving relocations. |
| 9052 | if (gsym->is_from_dynobj() |
| 9053 | && !parameters->options().shared()) |
| 9054 | gsym->set_needs_dynsym_value(); |
| 9055 | } |
| 9056 | if (is_new) |
| 9057 | rel_dyn->add_global_relative( |
| 9058 | gsym, elfcpp::R_ARM_RELATIVE, got, |
| 9059 | gsym->got_offset(GOT_TYPE_STANDARD)); |
| 9060 | } |
| 9061 | } |
| 9062 | } |
| 9063 | break; |
| 9064 | |
| 9065 | case elfcpp::R_ARM_TARGET1: |
| 9066 | case elfcpp::R_ARM_TARGET2: |
| 9067 | // These should have been mapped to other types already. |
| 9068 | // Fall through. |
| 9069 | case elfcpp::R_ARM_COPY: |
| 9070 | case elfcpp::R_ARM_GLOB_DAT: |
| 9071 | case elfcpp::R_ARM_JUMP_SLOT: |
| 9072 | case elfcpp::R_ARM_RELATIVE: |
| 9073 | // These are relocations which should only be seen by the |
| 9074 | // dynamic linker, and should never be seen here. |
| 9075 | gold_error(_("%s: unexpected reloc %u in object file"), |
| 9076 | object->name().c_str(), r_type); |
| 9077 | break; |
| 9078 | |
| 9079 | // These are initial tls relocs, which are expected when |
| 9080 | // linking. |
| 9081 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 9082 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 9083 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 9084 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 9085 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 9086 | { |
| 9087 | const bool is_final = gsym->final_value_is_known(); |
| 9088 | const tls::Tls_optimization optimized_type |
| 9089 | = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); |
| 9090 | switch (r_type) |
| 9091 | { |
| 9092 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 9093 | if (optimized_type == tls::TLSOPT_NONE) |
| 9094 | { |
| 9095 | // Create a pair of GOT entries for the module index and |
| 9096 | // dtv-relative offset. |
| 9097 | Arm_output_data_got<big_endian>* got |
| 9098 | = target->got_section(symtab, layout); |
| 9099 | if (!parameters->doing_static_link()) |
| 9100 | got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR, |
| 9101 | target->rel_dyn_section(layout), |
| 9102 | elfcpp::R_ARM_TLS_DTPMOD32, |
| 9103 | elfcpp::R_ARM_TLS_DTPOFF32); |
| 9104 | else |
| 9105 | got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym); |
| 9106 | } |
| 9107 | else |
| 9108 | // FIXME: TLS optimization not supported yet. |
| 9109 | gold_unreachable(); |
| 9110 | break; |
| 9111 | |
| 9112 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 9113 | if (optimized_type == tls::TLSOPT_NONE) |
| 9114 | { |
| 9115 | // Create a GOT entry for the module index. |
| 9116 | target->got_mod_index_entry(symtab, layout, object); |
| 9117 | } |
| 9118 | else |
| 9119 | // FIXME: TLS optimization not supported yet. |
| 9120 | gold_unreachable(); |
| 9121 | break; |
| 9122 | |
| 9123 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 9124 | break; |
| 9125 | |
| 9126 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 9127 | layout->set_has_static_tls(); |
| 9128 | if (optimized_type == tls::TLSOPT_NONE) |
| 9129 | { |
| 9130 | // Create a GOT entry for the tp-relative offset. |
| 9131 | Arm_output_data_got<big_endian>* got |
| 9132 | = target->got_section(symtab, layout); |
| 9133 | if (!parameters->doing_static_link()) |
| 9134 | got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET, |
| 9135 | target->rel_dyn_section(layout), |
| 9136 | elfcpp::R_ARM_TLS_TPOFF32); |
| 9137 | else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET)) |
| 9138 | { |
| 9139 | got->add_global(gsym, GOT_TYPE_TLS_OFFSET); |
| 9140 | unsigned int got_offset = |
| 9141 | gsym->got_offset(GOT_TYPE_TLS_OFFSET); |
| 9142 | got->add_static_reloc(got_offset, |
| 9143 | elfcpp::R_ARM_TLS_TPOFF32, gsym); |
| 9144 | } |
| 9145 | } |
| 9146 | else |
| 9147 | // FIXME: TLS optimization not supported yet. |
| 9148 | gold_unreachable(); |
| 9149 | break; |
| 9150 | |
| 9151 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 9152 | layout->set_has_static_tls(); |
| 9153 | if (parameters->options().shared()) |
| 9154 | { |
| 9155 | // We need to create a dynamic relocation. |
| 9156 | Reloc_section* rel_dyn = target->rel_dyn_section(layout); |
| 9157 | rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32, |
| 9158 | output_section, object, |
| 9159 | data_shndx, reloc.get_r_offset()); |
| 9160 | } |
| 9161 | break; |
| 9162 | |
| 9163 | default: |
| 9164 | gold_unreachable(); |
| 9165 | } |
| 9166 | } |
| 9167 | break; |
| 9168 | |
| 9169 | case elfcpp::R_ARM_PC24: |
| 9170 | case elfcpp::R_ARM_LDR_SBREL_11_0_NC: |
| 9171 | case elfcpp::R_ARM_ALU_SBREL_19_12_NC: |
| 9172 | case elfcpp::R_ARM_ALU_SBREL_27_20_CK: |
| 9173 | default: |
| 9174 | unsupported_reloc_global(object, r_type, gsym); |
| 9175 | break; |
| 9176 | } |
| 9177 | } |
| 9178 | |
| 9179 | // Process relocations for gc. |
| 9180 | |
| 9181 | template<bool big_endian> |
| 9182 | void |
| 9183 | Target_arm<big_endian>::gc_process_relocs( |
| 9184 | Symbol_table* symtab, |
| 9185 | Layout* layout, |
| 9186 | Sized_relobj_file<32, big_endian>* object, |
| 9187 | unsigned int data_shndx, |
| 9188 | unsigned int, |
| 9189 | const unsigned char* prelocs, |
| 9190 | size_t reloc_count, |
| 9191 | Output_section* output_section, |
| 9192 | bool needs_special_offset_handling, |
| 9193 | size_t local_symbol_count, |
| 9194 | const unsigned char* plocal_symbols) |
| 9195 | { |
| 9196 | typedef Target_arm<big_endian> Arm; |
| 9197 | typedef typename Target_arm<big_endian>::Scan Scan; |
| 9198 | |
| 9199 | gold::gc_process_relocs<32, big_endian, Arm, Scan, Classify_reloc>( |
| 9200 | symtab, |
| 9201 | layout, |
| 9202 | this, |
| 9203 | object, |
| 9204 | data_shndx, |
| 9205 | prelocs, |
| 9206 | reloc_count, |
| 9207 | output_section, |
| 9208 | needs_special_offset_handling, |
| 9209 | local_symbol_count, |
| 9210 | plocal_symbols); |
| 9211 | } |
| 9212 | |
| 9213 | // Scan relocations for a section. |
| 9214 | |
| 9215 | template<bool big_endian> |
| 9216 | void |
| 9217 | Target_arm<big_endian>::scan_relocs(Symbol_table* symtab, |
| 9218 | Layout* layout, |
| 9219 | Sized_relobj_file<32, big_endian>* object, |
| 9220 | unsigned int data_shndx, |
| 9221 | unsigned int sh_type, |
| 9222 | const unsigned char* prelocs, |
| 9223 | size_t reloc_count, |
| 9224 | Output_section* output_section, |
| 9225 | bool needs_special_offset_handling, |
| 9226 | size_t local_symbol_count, |
| 9227 | const unsigned char* plocal_symbols) |
| 9228 | { |
| 9229 | if (sh_type == elfcpp::SHT_RELA) |
| 9230 | { |
| 9231 | gold_error(_("%s: unsupported RELA reloc section"), |
| 9232 | object->name().c_str()); |
| 9233 | return; |
| 9234 | } |
| 9235 | |
| 9236 | gold::scan_relocs<32, big_endian, Target_arm, Scan, Classify_reloc>( |
| 9237 | symtab, |
| 9238 | layout, |
| 9239 | this, |
| 9240 | object, |
| 9241 | data_shndx, |
| 9242 | prelocs, |
| 9243 | reloc_count, |
| 9244 | output_section, |
| 9245 | needs_special_offset_handling, |
| 9246 | local_symbol_count, |
| 9247 | plocal_symbols); |
| 9248 | } |
| 9249 | |
| 9250 | // Finalize the sections. |
| 9251 | |
| 9252 | template<bool big_endian> |
| 9253 | void |
| 9254 | Target_arm<big_endian>::do_finalize_sections( |
| 9255 | Layout* layout, |
| 9256 | const Input_objects* input_objects, |
| 9257 | Symbol_table*) |
| 9258 | { |
| 9259 | bool merged_any_attributes = false; |
| 9260 | // Merge processor-specific flags. |
| 9261 | for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); |
| 9262 | p != input_objects->relobj_end(); |
| 9263 | ++p) |
| 9264 | { |
| 9265 | Arm_relobj<big_endian>* arm_relobj = |
| 9266 | Arm_relobj<big_endian>::as_arm_relobj(*p); |
| 9267 | if (arm_relobj->merge_flags_and_attributes()) |
| 9268 | { |
| 9269 | this->merge_processor_specific_flags( |
| 9270 | arm_relobj->name(), |
| 9271 | arm_relobj->processor_specific_flags()); |
| 9272 | this->merge_object_attributes(arm_relobj->name().c_str(), |
| 9273 | arm_relobj->attributes_section_data()); |
| 9274 | merged_any_attributes = true; |
| 9275 | } |
| 9276 | } |
| 9277 | |
| 9278 | for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); |
| 9279 | p != input_objects->dynobj_end(); |
| 9280 | ++p) |
| 9281 | { |
| 9282 | Arm_dynobj<big_endian>* arm_dynobj = |
| 9283 | Arm_dynobj<big_endian>::as_arm_dynobj(*p); |
| 9284 | this->merge_processor_specific_flags( |
| 9285 | arm_dynobj->name(), |
| 9286 | arm_dynobj->processor_specific_flags()); |
| 9287 | this->merge_object_attributes(arm_dynobj->name().c_str(), |
| 9288 | arm_dynobj->attributes_section_data()); |
| 9289 | merged_any_attributes = true; |
| 9290 | } |
| 9291 | |
| 9292 | // Create an empty uninitialized attribute section if we still don't have it |
| 9293 | // at this moment. This happens if there is no attributes sections in all |
| 9294 | // inputs. |
| 9295 | if (this->attributes_section_data_ == NULL) |
| 9296 | this->attributes_section_data_ = new Attributes_section_data(NULL, 0); |
| 9297 | |
| 9298 | const Object_attribute* cpu_arch_attr = |
| 9299 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); |
| 9300 | // Check if we need to use Cortex-A8 workaround. |
| 9301 | if (parameters->options().user_set_fix_cortex_a8()) |
| 9302 | this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); |
| 9303 | else |
| 9304 | { |
| 9305 | // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on |
| 9306 | // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown |
| 9307 | // profile. |
| 9308 | const Object_attribute* cpu_arch_profile_attr = |
| 9309 | this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); |
| 9310 | this->fix_cortex_a8_ = |
| 9311 | (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7 |
| 9312 | && (cpu_arch_profile_attr->int_value() == 'A' |
| 9313 | || cpu_arch_profile_attr->int_value() == 0)); |
| 9314 | } |
| 9315 | |
| 9316 | // Check if we can use V4BX interworking. |
| 9317 | // The V4BX interworking stub contains BX instruction, |
| 9318 | // which is not specified for some profiles. |
| 9319 | if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING |
| 9320 | && !this->may_use_v4t_interworking()) |
| 9321 | gold_error(_("unable to provide V4BX reloc interworking fix up; " |
| 9322 | "the target profile does not support BX instruction")); |
| 9323 | |
| 9324 | // Fill in some more dynamic tags. |
| 9325 | const Reloc_section* rel_plt = (this->plt_ == NULL |
| 9326 | ? NULL |
| 9327 | : this->plt_->rel_plt()); |
| 9328 | layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt, |
| 9329 | this->rel_dyn_, true, false); |
| 9330 | |
| 9331 | // Emit any relocs we saved in an attempt to avoid generating COPY |
| 9332 | // relocs. |
| 9333 | if (this->copy_relocs_.any_saved_relocs()) |
| 9334 | this->copy_relocs_.emit(this->rel_dyn_section(layout)); |
| 9335 | |
| 9336 | // Handle the .ARM.exidx section. |
| 9337 | Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); |
| 9338 | |
| 9339 | if (!parameters->options().relocatable()) |
| 9340 | { |
| 9341 | if (exidx_section != NULL |
| 9342 | && exidx_section->type() == elfcpp::SHT_ARM_EXIDX) |
| 9343 | { |
| 9344 | // For the ARM target, we need to add a PT_ARM_EXIDX segment for |
| 9345 | // the .ARM.exidx section. |
| 9346 | if (!layout->script_options()->saw_phdrs_clause()) |
| 9347 | { |
| 9348 | gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, |
| 9349 | 0) |
| 9350 | == NULL); |
| 9351 | Output_segment* exidx_segment = |
| 9352 | layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R); |
| 9353 | exidx_segment->add_output_section_to_nonload(exidx_section, |
| 9354 | elfcpp::PF_R); |
| 9355 | } |
| 9356 | } |
| 9357 | } |
| 9358 | |
| 9359 | // Create an .ARM.attributes section if we have merged any attributes |
| 9360 | // from inputs. |
| 9361 | if (merged_any_attributes) |
| 9362 | { |
| 9363 | Output_attributes_section_data* attributes_section = |
| 9364 | new Output_attributes_section_data(*this->attributes_section_data_); |
| 9365 | layout->add_output_section_data(".ARM.attributes", |
| 9366 | elfcpp::SHT_ARM_ATTRIBUTES, 0, |
| 9367 | attributes_section, ORDER_INVALID, |
| 9368 | false); |
| 9369 | } |
| 9370 | |
| 9371 | // Fix up links in section EXIDX headers. |
| 9372 | for (Layout::Section_list::const_iterator p = layout->section_list().begin(); |
| 9373 | p != layout->section_list().end(); |
| 9374 | ++p) |
| 9375 | if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) |
| 9376 | { |
| 9377 | Arm_output_section<big_endian>* os = |
| 9378 | Arm_output_section<big_endian>::as_arm_output_section(*p); |
| 9379 | os->set_exidx_section_link(); |
| 9380 | } |
| 9381 | } |
| 9382 | |
| 9383 | // Return whether a direct absolute static relocation needs to be applied. |
| 9384 | // In cases where Scan::local() or Scan::global() has created |
| 9385 | // a dynamic relocation other than R_ARM_RELATIVE, the addend |
| 9386 | // of the relocation is carried in the data, and we must not |
| 9387 | // apply the static relocation. |
| 9388 | |
| 9389 | template<bool big_endian> |
| 9390 | inline bool |
| 9391 | Target_arm<big_endian>::Relocate::should_apply_static_reloc( |
| 9392 | const Sized_symbol<32>* gsym, |
| 9393 | unsigned int r_type, |
| 9394 | bool is_32bit, |
| 9395 | Output_section* output_section) |
| 9396 | { |
| 9397 | // If the output section is not allocated, then we didn't call |
| 9398 | // scan_relocs, we didn't create a dynamic reloc, and we must apply |
| 9399 | // the reloc here. |
| 9400 | if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0) |
| 9401 | return true; |
| 9402 | |
| 9403 | int ref_flags = Scan::get_reference_flags(r_type); |
| 9404 | |
| 9405 | // For local symbols, we will have created a non-RELATIVE dynamic |
| 9406 | // relocation only if (a) the output is position independent, |
| 9407 | // (b) the relocation is absolute (not pc- or segment-relative), and |
| 9408 | // (c) the relocation is not 32 bits wide. |
| 9409 | if (gsym == NULL) |
| 9410 | return !(parameters->options().output_is_position_independent() |
| 9411 | && (ref_flags & Symbol::ABSOLUTE_REF) |
| 9412 | && !is_32bit); |
| 9413 | |
| 9414 | // For global symbols, we use the same helper routines used in the |
| 9415 | // scan pass. If we did not create a dynamic relocation, or if we |
| 9416 | // created a RELATIVE dynamic relocation, we should apply the static |
| 9417 | // relocation. |
| 9418 | bool has_dyn = gsym->needs_dynamic_reloc(ref_flags); |
| 9419 | bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF) |
| 9420 | && gsym->can_use_relative_reloc(ref_flags |
| 9421 | & Symbol::FUNCTION_CALL); |
| 9422 | return !has_dyn || is_rel; |
| 9423 | } |
| 9424 | |
| 9425 | // Perform a relocation. |
| 9426 | |
| 9427 | template<bool big_endian> |
| 9428 | inline bool |
| 9429 | Target_arm<big_endian>::Relocate::relocate( |
| 9430 | const Relocate_info<32, big_endian>* relinfo, |
| 9431 | unsigned int, |
| 9432 | Target_arm* target, |
| 9433 | Output_section* output_section, |
| 9434 | size_t relnum, |
| 9435 | const unsigned char* preloc, |
| 9436 | const Sized_symbol<32>* gsym, |
| 9437 | const Symbol_value<32>* psymval, |
| 9438 | unsigned char* view, |
| 9439 | Arm_address address, |
| 9440 | section_size_type view_size) |
| 9441 | { |
| 9442 | if (view == NULL) |
| 9443 | return true; |
| 9444 | |
| 9445 | typedef Arm_relocate_functions<big_endian> Arm_relocate_functions; |
| 9446 | |
| 9447 | const elfcpp::Rel<32, big_endian> rel(preloc); |
| 9448 | unsigned int r_type = elfcpp::elf_r_type<32>(rel.get_r_info()); |
| 9449 | r_type = get_real_reloc_type(r_type); |
| 9450 | const Arm_reloc_property* reloc_property = |
| 9451 | arm_reloc_property_table->get_implemented_static_reloc_property(r_type); |
| 9452 | if (reloc_property == NULL) |
| 9453 | { |
| 9454 | std::string reloc_name = |
| 9455 | arm_reloc_property_table->reloc_name_in_error_message(r_type); |
| 9456 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), |
| 9457 | _("cannot relocate %s in object file"), |
| 9458 | reloc_name.c_str()); |
| 9459 | return true; |
| 9460 | } |
| 9461 | |
| 9462 | const Arm_relobj<big_endian>* object = |
| 9463 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); |
| 9464 | |
| 9465 | // If the final branch target of a relocation is THUMB instruction, this |
| 9466 | // is 1. Otherwise it is 0. |
| 9467 | Arm_address thumb_bit = 0; |
| 9468 | Symbol_value<32> symval; |
| 9469 | bool is_weakly_undefined_without_plt = false; |
| 9470 | bool have_got_offset = false; |
| 9471 | unsigned int got_offset = 0; |
| 9472 | |
| 9473 | // If the relocation uses the GOT entry of a symbol instead of the symbol |
| 9474 | // itself, we don't care about whether the symbol is defined or what kind |
| 9475 | // of symbol it is. |
| 9476 | if (reloc_property->uses_got_entry()) |
| 9477 | { |
| 9478 | // Get the GOT offset. |
| 9479 | // The GOT pointer points to the end of the GOT section. |
| 9480 | // We need to subtract the size of the GOT section to get |
| 9481 | // the actual offset to use in the relocation. |
| 9482 | // TODO: We should move GOT offset computing code in TLS relocations |
| 9483 | // to here. |
| 9484 | switch (r_type) |
| 9485 | { |
| 9486 | case elfcpp::R_ARM_GOT_BREL: |
| 9487 | case elfcpp::R_ARM_GOT_PREL: |
| 9488 | if (gsym != NULL) |
| 9489 | { |
| 9490 | gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD)); |
| 9491 | got_offset = (gsym->got_offset(GOT_TYPE_STANDARD) |
| 9492 | - target->got_size()); |
| 9493 | } |
| 9494 | else |
| 9495 | { |
| 9496 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); |
| 9497 | gold_assert(object->local_has_got_offset(r_sym, |
| 9498 | GOT_TYPE_STANDARD)); |
| 9499 | got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD) |
| 9500 | - target->got_size()); |
| 9501 | } |
| 9502 | have_got_offset = true; |
| 9503 | break; |
| 9504 | |
| 9505 | default: |
| 9506 | break; |
| 9507 | } |
| 9508 | } |
| 9509 | else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs) |
| 9510 | { |
| 9511 | if (gsym != NULL) |
| 9512 | { |
| 9513 | // This is a global symbol. Determine if we use PLT and if the |
| 9514 | // final target is THUMB. |
| 9515 | if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) |
| 9516 | { |
| 9517 | // This uses a PLT, change the symbol value. |
| 9518 | symval.set_output_value(target->plt_address_for_global(gsym)); |
| 9519 | psymval = &symval; |
| 9520 | } |
| 9521 | else if (gsym->is_weak_undefined()) |
| 9522 | { |
| 9523 | // This is a weakly undefined symbol and we do not use PLT |
| 9524 | // for this relocation. A branch targeting this symbol will |
| 9525 | // be converted into an NOP. |
| 9526 | is_weakly_undefined_without_plt = true; |
| 9527 | } |
| 9528 | else if (gsym->is_undefined() && reloc_property->uses_symbol()) |
| 9529 | { |
| 9530 | // This relocation uses the symbol value but the symbol is |
| 9531 | // undefined. Exit early and have the caller reporting an |
| 9532 | // error. |
| 9533 | return true; |
| 9534 | } |
| 9535 | else |
| 9536 | { |
| 9537 | // Set thumb bit if symbol: |
| 9538 | // -Has type STT_ARM_TFUNC or |
| 9539 | // -Has type STT_FUNC, is defined and with LSB in value set. |
| 9540 | thumb_bit = |
| 9541 | (((gsym->type() == elfcpp::STT_ARM_TFUNC) |
| 9542 | || (gsym->type() == elfcpp::STT_FUNC |
| 9543 | && !gsym->is_undefined() |
| 9544 | && ((psymval->value(object, 0) & 1) != 0))) |
| 9545 | ? 1 |
| 9546 | : 0); |
| 9547 | } |
| 9548 | } |
| 9549 | else |
| 9550 | { |
| 9551 | // This is a local symbol. Determine if the final target is THUMB. |
| 9552 | // We saved this information when all the local symbols were read. |
| 9553 | elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info(); |
| 9554 | unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); |
| 9555 | thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; |
| 9556 | |
| 9557 | if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym)) |
| 9558 | { |
| 9559 | symval.set_output_value( |
| 9560 | target->plt_address_for_local(object, r_sym)); |
| 9561 | psymval = &symval; |
| 9562 | } |
| 9563 | } |
| 9564 | } |
| 9565 | else |
| 9566 | { |
| 9567 | // This is a fake relocation synthesized for a stub. It does not have |
| 9568 | // a real symbol. We just look at the LSB of the symbol value to |
| 9569 | // determine if the target is THUMB or not. |
| 9570 | thumb_bit = ((psymval->value(object, 0) & 1) != 0); |
| 9571 | } |
| 9572 | |
| 9573 | // Strip LSB if this points to a THUMB target. |
| 9574 | if (thumb_bit != 0 |
| 9575 | && reloc_property->uses_thumb_bit() |
| 9576 | && ((psymval->value(object, 0) & 1) != 0)) |
| 9577 | { |
| 9578 | Arm_address stripped_value = |
| 9579 | psymval->value(object, 0) & ~static_cast<Arm_address>(1); |
| 9580 | symval.set_output_value(stripped_value); |
| 9581 | psymval = &symval; |
| 9582 | } |
| 9583 | |
| 9584 | // To look up relocation stubs, we need to pass the symbol table index of |
| 9585 | // a local symbol. |
| 9586 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); |
| 9587 | |
| 9588 | // Get the addressing origin of the output segment defining the |
| 9589 | // symbol gsym if needed (AAELF 4.6.1.2 Relocation types). |
| 9590 | Arm_address sym_origin = 0; |
| 9591 | if (reloc_property->uses_symbol_base()) |
| 9592 | { |
| 9593 | if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL) |
| 9594 | // R_ARM_BASE_ABS with the NULL symbol will give the |
| 9595 | // absolute address of the GOT origin (GOT_ORG) (see ARM IHI |
| 9596 | // 0044C (AAELF): 4.6.1.8 Proxy generating relocations). |
| 9597 | sym_origin = target->got_plt_section()->address(); |
| 9598 | else if (gsym == NULL) |
| 9599 | sym_origin = 0; |
| 9600 | else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT) |
| 9601 | sym_origin = gsym->output_segment()->vaddr(); |
| 9602 | else if (gsym->source() == Symbol::IN_OUTPUT_DATA) |
| 9603 | sym_origin = gsym->output_data()->address(); |
| 9604 | |
| 9605 | // TODO: Assumes the segment base to be zero for the global symbols |
| 9606 | // till the proper support for the segment-base-relative addressing |
| 9607 | // will be implemented. This is consistent with GNU ld. |
| 9608 | } |
| 9609 | |
| 9610 | // For relative addressing relocation, find out the relative address base. |
| 9611 | Arm_address relative_address_base = 0; |
| 9612 | switch(reloc_property->relative_address_base()) |
| 9613 | { |
| 9614 | case Arm_reloc_property::RAB_NONE: |
| 9615 | // Relocations with relative address bases RAB_TLS and RAB_tp are |
| 9616 | // handled by relocate_tls. So we do not need to do anything here. |
| 9617 | case Arm_reloc_property::RAB_TLS: |
| 9618 | case Arm_reloc_property::RAB_tp: |
| 9619 | break; |
| 9620 | case Arm_reloc_property::RAB_B_S: |
| 9621 | relative_address_base = sym_origin; |
| 9622 | break; |
| 9623 | case Arm_reloc_property::RAB_GOT_ORG: |
| 9624 | relative_address_base = target->got_plt_section()->address(); |
| 9625 | break; |
| 9626 | case Arm_reloc_property::RAB_P: |
| 9627 | relative_address_base = address; |
| 9628 | break; |
| 9629 | case Arm_reloc_property::RAB_Pa: |
| 9630 | relative_address_base = address & 0xfffffffcU; |
| 9631 | break; |
| 9632 | default: |
| 9633 | gold_unreachable(); |
| 9634 | } |
| 9635 | |
| 9636 | typename Arm_relocate_functions::Status reloc_status = |
| 9637 | Arm_relocate_functions::STATUS_OKAY; |
| 9638 | bool check_overflow = reloc_property->checks_overflow(); |
| 9639 | switch (r_type) |
| 9640 | { |
| 9641 | case elfcpp::R_ARM_NONE: |
| 9642 | break; |
| 9643 | |
| 9644 | case elfcpp::R_ARM_ABS8: |
| 9645 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9646 | reloc_status = Arm_relocate_functions::abs8(view, object, psymval); |
| 9647 | break; |
| 9648 | |
| 9649 | case elfcpp::R_ARM_ABS12: |
| 9650 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9651 | reloc_status = Arm_relocate_functions::abs12(view, object, psymval); |
| 9652 | break; |
| 9653 | |
| 9654 | case elfcpp::R_ARM_ABS16: |
| 9655 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9656 | reloc_status = Arm_relocate_functions::abs16(view, object, psymval); |
| 9657 | break; |
| 9658 | |
| 9659 | case elfcpp::R_ARM_ABS32: |
| 9660 | if (should_apply_static_reloc(gsym, r_type, true, output_section)) |
| 9661 | reloc_status = Arm_relocate_functions::abs32(view, object, psymval, |
| 9662 | thumb_bit); |
| 9663 | break; |
| 9664 | |
| 9665 | case elfcpp::R_ARM_ABS32_NOI: |
| 9666 | if (should_apply_static_reloc(gsym, r_type, true, output_section)) |
| 9667 | // No thumb bit for this relocation: (S + A) |
| 9668 | reloc_status = Arm_relocate_functions::abs32(view, object, psymval, |
| 9669 | 0); |
| 9670 | break; |
| 9671 | |
| 9672 | case elfcpp::R_ARM_MOVW_ABS_NC: |
| 9673 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9674 | reloc_status = Arm_relocate_functions::movw(view, object, psymval, |
| 9675 | 0, thumb_bit, |
| 9676 | check_overflow); |
| 9677 | break; |
| 9678 | |
| 9679 | case elfcpp::R_ARM_MOVT_ABS: |
| 9680 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9681 | reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0); |
| 9682 | break; |
| 9683 | |
| 9684 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: |
| 9685 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9686 | reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval, |
| 9687 | 0, thumb_bit, false); |
| 9688 | break; |
| 9689 | |
| 9690 | case elfcpp::R_ARM_THM_MOVT_ABS: |
| 9691 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9692 | reloc_status = Arm_relocate_functions::thm_movt(view, object, |
| 9693 | psymval, 0); |
| 9694 | break; |
| 9695 | |
| 9696 | case elfcpp::R_ARM_MOVW_PREL_NC: |
| 9697 | case elfcpp::R_ARM_MOVW_BREL_NC: |
| 9698 | case elfcpp::R_ARM_MOVW_BREL: |
| 9699 | reloc_status = |
| 9700 | Arm_relocate_functions::movw(view, object, psymval, |
| 9701 | relative_address_base, thumb_bit, |
| 9702 | check_overflow); |
| 9703 | break; |
| 9704 | |
| 9705 | case elfcpp::R_ARM_MOVT_PREL: |
| 9706 | case elfcpp::R_ARM_MOVT_BREL: |
| 9707 | reloc_status = |
| 9708 | Arm_relocate_functions::movt(view, object, psymval, |
| 9709 | relative_address_base); |
| 9710 | break; |
| 9711 | |
| 9712 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: |
| 9713 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: |
| 9714 | case elfcpp::R_ARM_THM_MOVW_BREL: |
| 9715 | reloc_status = |
| 9716 | Arm_relocate_functions::thm_movw(view, object, psymval, |
| 9717 | relative_address_base, |
| 9718 | thumb_bit, check_overflow); |
| 9719 | break; |
| 9720 | |
| 9721 | case elfcpp::R_ARM_THM_MOVT_PREL: |
| 9722 | case elfcpp::R_ARM_THM_MOVT_BREL: |
| 9723 | reloc_status = |
| 9724 | Arm_relocate_functions::thm_movt(view, object, psymval, |
| 9725 | relative_address_base); |
| 9726 | break; |
| 9727 | |
| 9728 | case elfcpp::R_ARM_REL32: |
| 9729 | reloc_status = Arm_relocate_functions::rel32(view, object, psymval, |
| 9730 | address, thumb_bit); |
| 9731 | break; |
| 9732 | |
| 9733 | case elfcpp::R_ARM_THM_ABS5: |
| 9734 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9735 | reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval); |
| 9736 | break; |
| 9737 | |
| 9738 | // Thumb long branches. |
| 9739 | case elfcpp::R_ARM_THM_CALL: |
| 9740 | case elfcpp::R_ARM_THM_XPC22: |
| 9741 | case elfcpp::R_ARM_THM_JUMP24: |
| 9742 | reloc_status = |
| 9743 | Arm_relocate_functions::thumb_branch_common( |
| 9744 | r_type, relinfo, view, gsym, object, r_sym, psymval, address, |
| 9745 | thumb_bit, is_weakly_undefined_without_plt); |
| 9746 | break; |
| 9747 | |
| 9748 | case elfcpp::R_ARM_GOTOFF32: |
| 9749 | { |
| 9750 | Arm_address got_origin; |
| 9751 | got_origin = target->got_plt_section()->address(); |
| 9752 | reloc_status = Arm_relocate_functions::rel32(view, object, psymval, |
| 9753 | got_origin, thumb_bit); |
| 9754 | } |
| 9755 | break; |
| 9756 | |
| 9757 | case elfcpp::R_ARM_BASE_PREL: |
| 9758 | gold_assert(gsym != NULL); |
| 9759 | reloc_status = |
| 9760 | Arm_relocate_functions::base_prel(view, sym_origin, address); |
| 9761 | break; |
| 9762 | |
| 9763 | case elfcpp::R_ARM_BASE_ABS: |
| 9764 | if (should_apply_static_reloc(gsym, r_type, false, output_section)) |
| 9765 | reloc_status = Arm_relocate_functions::base_abs(view, sym_origin); |
| 9766 | break; |
| 9767 | |
| 9768 | case elfcpp::R_ARM_GOT_BREL: |
| 9769 | gold_assert(have_got_offset); |
| 9770 | reloc_status = Arm_relocate_functions::got_brel(view, got_offset); |
| 9771 | break; |
| 9772 | |
| 9773 | case elfcpp::R_ARM_GOT_PREL: |
| 9774 | gold_assert(have_got_offset); |
| 9775 | // Get the address origin for GOT PLT, which is allocated right |
| 9776 | // after the GOT section, to calculate an absolute address of |
| 9777 | // the symbol GOT entry (got_origin + got_offset). |
| 9778 | Arm_address got_origin; |
| 9779 | got_origin = target->got_plt_section()->address(); |
| 9780 | reloc_status = Arm_relocate_functions::got_prel(view, |
| 9781 | got_origin + got_offset, |
| 9782 | address); |
| 9783 | break; |
| 9784 | |
| 9785 | case elfcpp::R_ARM_PLT32: |
| 9786 | case elfcpp::R_ARM_CALL: |
| 9787 | case elfcpp::R_ARM_JUMP24: |
| 9788 | case elfcpp::R_ARM_XPC25: |
| 9789 | gold_assert(gsym == NULL |
| 9790 | || gsym->has_plt_offset() |
| 9791 | || gsym->final_value_is_known() |
| 9792 | || (gsym->is_defined() |
| 9793 | && !gsym->is_from_dynobj() |
| 9794 | && !gsym->is_preemptible())); |
| 9795 | reloc_status = |
| 9796 | Arm_relocate_functions::arm_branch_common( |
| 9797 | r_type, relinfo, view, gsym, object, r_sym, psymval, address, |
| 9798 | thumb_bit, is_weakly_undefined_without_plt); |
| 9799 | break; |
| 9800 | |
| 9801 | case elfcpp::R_ARM_THM_JUMP19: |
| 9802 | reloc_status = |
| 9803 | Arm_relocate_functions::thm_jump19(view, object, psymval, address, |
| 9804 | thumb_bit); |
| 9805 | break; |
| 9806 | |
| 9807 | case elfcpp::R_ARM_THM_JUMP6: |
| 9808 | reloc_status = |
| 9809 | Arm_relocate_functions::thm_jump6(view, object, psymval, address); |
| 9810 | break; |
| 9811 | |
| 9812 | case elfcpp::R_ARM_THM_JUMP8: |
| 9813 | reloc_status = |
| 9814 | Arm_relocate_functions::thm_jump8(view, object, psymval, address); |
| 9815 | break; |
| 9816 | |
| 9817 | case elfcpp::R_ARM_THM_JUMP11: |
| 9818 | reloc_status = |
| 9819 | Arm_relocate_functions::thm_jump11(view, object, psymval, address); |
| 9820 | break; |
| 9821 | |
| 9822 | case elfcpp::R_ARM_PREL31: |
| 9823 | reloc_status = Arm_relocate_functions::prel31(view, object, psymval, |
| 9824 | address, thumb_bit); |
| 9825 | break; |
| 9826 | |
| 9827 | case elfcpp::R_ARM_V4BX: |
| 9828 | if (target->fix_v4bx() > General_options::FIX_V4BX_NONE) |
| 9829 | { |
| 9830 | const bool is_v4bx_interworking = |
| 9831 | (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING); |
| 9832 | reloc_status = |
| 9833 | Arm_relocate_functions::v4bx(relinfo, view, object, address, |
| 9834 | is_v4bx_interworking); |
| 9835 | } |
| 9836 | break; |
| 9837 | |
| 9838 | case elfcpp::R_ARM_THM_PC8: |
| 9839 | reloc_status = |
| 9840 | Arm_relocate_functions::thm_pc8(view, object, psymval, address); |
| 9841 | break; |
| 9842 | |
| 9843 | case elfcpp::R_ARM_THM_PC12: |
| 9844 | reloc_status = |
| 9845 | Arm_relocate_functions::thm_pc12(view, object, psymval, address); |
| 9846 | break; |
| 9847 | |
| 9848 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: |
| 9849 | reloc_status = |
| 9850 | Arm_relocate_functions::thm_alu11(view, object, psymval, address, |
| 9851 | thumb_bit); |
| 9852 | break; |
| 9853 | |
| 9854 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
| 9855 | case elfcpp::R_ARM_ALU_PC_G0: |
| 9856 | case elfcpp::R_ARM_ALU_PC_G1_NC: |
| 9857 | case elfcpp::R_ARM_ALU_PC_G1: |
| 9858 | case elfcpp::R_ARM_ALU_PC_G2: |
| 9859 | case elfcpp::R_ARM_ALU_SB_G0_NC: |
| 9860 | case elfcpp::R_ARM_ALU_SB_G0: |
| 9861 | case elfcpp::R_ARM_ALU_SB_G1_NC: |
| 9862 | case elfcpp::R_ARM_ALU_SB_G1: |
| 9863 | case elfcpp::R_ARM_ALU_SB_G2: |
| 9864 | reloc_status = |
| 9865 | Arm_relocate_functions::arm_grp_alu(view, object, psymval, |
| 9866 | reloc_property->group_index(), |
| 9867 | relative_address_base, |
| 9868 | thumb_bit, check_overflow); |
| 9869 | break; |
| 9870 | |
| 9871 | case elfcpp::R_ARM_LDR_PC_G0: |
| 9872 | case elfcpp::R_ARM_LDR_PC_G1: |
| 9873 | case elfcpp::R_ARM_LDR_PC_G2: |
| 9874 | case elfcpp::R_ARM_LDR_SB_G0: |
| 9875 | case elfcpp::R_ARM_LDR_SB_G1: |
| 9876 | case elfcpp::R_ARM_LDR_SB_G2: |
| 9877 | reloc_status = |
| 9878 | Arm_relocate_functions::arm_grp_ldr(view, object, psymval, |
| 9879 | reloc_property->group_index(), |
| 9880 | relative_address_base); |
| 9881 | break; |
| 9882 | |
| 9883 | case elfcpp::R_ARM_LDRS_PC_G0: |
| 9884 | case elfcpp::R_ARM_LDRS_PC_G1: |
| 9885 | case elfcpp::R_ARM_LDRS_PC_G2: |
| 9886 | case elfcpp::R_ARM_LDRS_SB_G0: |
| 9887 | case elfcpp::R_ARM_LDRS_SB_G1: |
| 9888 | case elfcpp::R_ARM_LDRS_SB_G2: |
| 9889 | reloc_status = |
| 9890 | Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, |
| 9891 | reloc_property->group_index(), |
| 9892 | relative_address_base); |
| 9893 | break; |
| 9894 | |
| 9895 | case elfcpp::R_ARM_LDC_PC_G0: |
| 9896 | case elfcpp::R_ARM_LDC_PC_G1: |
| 9897 | case elfcpp::R_ARM_LDC_PC_G2: |
| 9898 | case elfcpp::R_ARM_LDC_SB_G0: |
| 9899 | case elfcpp::R_ARM_LDC_SB_G1: |
| 9900 | case elfcpp::R_ARM_LDC_SB_G2: |
| 9901 | reloc_status = |
| 9902 | Arm_relocate_functions::arm_grp_ldc(view, object, psymval, |
| 9903 | reloc_property->group_index(), |
| 9904 | relative_address_base); |
| 9905 | break; |
| 9906 | |
| 9907 | // These are initial tls relocs, which are expected when |
| 9908 | // linking. |
| 9909 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 9910 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 9911 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 9912 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 9913 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 9914 | reloc_status = |
| 9915 | this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval, |
| 9916 | view, address, view_size); |
| 9917 | break; |
| 9918 | |
| 9919 | // The known and unknown unsupported and/or deprecated relocations. |
| 9920 | case elfcpp::R_ARM_PC24: |
| 9921 | case elfcpp::R_ARM_LDR_SBREL_11_0_NC: |
| 9922 | case elfcpp::R_ARM_ALU_SBREL_19_12_NC: |
| 9923 | case elfcpp::R_ARM_ALU_SBREL_27_20_CK: |
| 9924 | default: |
| 9925 | // Just silently leave the method. We should get an appropriate error |
| 9926 | // message in the scan methods. |
| 9927 | break; |
| 9928 | } |
| 9929 | |
| 9930 | // Report any errors. |
| 9931 | switch (reloc_status) |
| 9932 | { |
| 9933 | case Arm_relocate_functions::STATUS_OKAY: |
| 9934 | break; |
| 9935 | case Arm_relocate_functions::STATUS_OVERFLOW: |
| 9936 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), |
| 9937 | _("relocation overflow in %s"), |
| 9938 | reloc_property->name().c_str()); |
| 9939 | break; |
| 9940 | case Arm_relocate_functions::STATUS_BAD_RELOC: |
| 9941 | gold_error_at_location( |
| 9942 | relinfo, |
| 9943 | relnum, |
| 9944 | rel.get_r_offset(), |
| 9945 | _("unexpected opcode while processing relocation %s"), |
| 9946 | reloc_property->name().c_str()); |
| 9947 | break; |
| 9948 | default: |
| 9949 | gold_unreachable(); |
| 9950 | } |
| 9951 | |
| 9952 | return true; |
| 9953 | } |
| 9954 | |
| 9955 | // Perform a TLS relocation. |
| 9956 | |
| 9957 | template<bool big_endian> |
| 9958 | inline typename Arm_relocate_functions<big_endian>::Status |
| 9959 | Target_arm<big_endian>::Relocate::relocate_tls( |
| 9960 | const Relocate_info<32, big_endian>* relinfo, |
| 9961 | Target_arm<big_endian>* target, |
| 9962 | size_t relnum, |
| 9963 | const elfcpp::Rel<32, big_endian>& rel, |
| 9964 | unsigned int r_type, |
| 9965 | const Sized_symbol<32>* gsym, |
| 9966 | const Symbol_value<32>* psymval, |
| 9967 | unsigned char* view, |
| 9968 | elfcpp::Elf_types<32>::Elf_Addr address, |
| 9969 | section_size_type /*view_size*/ ) |
| 9970 | { |
| 9971 | typedef Arm_relocate_functions<big_endian> ArmRelocFuncs; |
| 9972 | typedef Relocate_functions<32, big_endian> RelocFuncs; |
| 9973 | Output_segment* tls_segment = relinfo->layout->tls_segment(); |
| 9974 | |
| 9975 | const Sized_relobj_file<32, big_endian>* object = relinfo->object; |
| 9976 | |
| 9977 | elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); |
| 9978 | |
| 9979 | const bool is_final = (gsym == NULL |
| 9980 | ? !parameters->options().shared() |
| 9981 | : gsym->final_value_is_known()); |
| 9982 | const tls::Tls_optimization optimized_type |
| 9983 | = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); |
| 9984 | switch (r_type) |
| 9985 | { |
| 9986 | case elfcpp::R_ARM_TLS_GD32: // Global-dynamic |
| 9987 | { |
| 9988 | unsigned int got_type = GOT_TYPE_TLS_PAIR; |
| 9989 | unsigned int got_offset; |
| 9990 | if (gsym != NULL) |
| 9991 | { |
| 9992 | gold_assert(gsym->has_got_offset(got_type)); |
| 9993 | got_offset = gsym->got_offset(got_type) - target->got_size(); |
| 9994 | } |
| 9995 | else |
| 9996 | { |
| 9997 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); |
| 9998 | gold_assert(object->local_has_got_offset(r_sym, got_type)); |
| 9999 | got_offset = (object->local_got_offset(r_sym, got_type) |
| 10000 | - target->got_size()); |
| 10001 | } |
| 10002 | if (optimized_type == tls::TLSOPT_NONE) |
| 10003 | { |
| 10004 | Arm_address got_entry = |
| 10005 | target->got_plt_section()->address() + got_offset; |
| 10006 | |
| 10007 | // Relocate the field with the PC relative offset of the pair of |
| 10008 | // GOT entries. |
| 10009 | RelocFuncs::pcrel32_unaligned(view, got_entry, address); |
| 10010 | return ArmRelocFuncs::STATUS_OKAY; |
| 10011 | } |
| 10012 | } |
| 10013 | break; |
| 10014 | |
| 10015 | case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic |
| 10016 | if (optimized_type == tls::TLSOPT_NONE) |
| 10017 | { |
| 10018 | // Relocate the field with the offset of the GOT entry for |
| 10019 | // the module index. |
| 10020 | unsigned int got_offset; |
| 10021 | got_offset = (target->got_mod_index_entry(NULL, NULL, NULL) |
| 10022 | - target->got_size()); |
| 10023 | Arm_address got_entry = |
| 10024 | target->got_plt_section()->address() + got_offset; |
| 10025 | |
| 10026 | // Relocate the field with the PC relative offset of the pair of |
| 10027 | // GOT entries. |
| 10028 | RelocFuncs::pcrel32_unaligned(view, got_entry, address); |
| 10029 | return ArmRelocFuncs::STATUS_OKAY; |
| 10030 | } |
| 10031 | break; |
| 10032 | |
| 10033 | case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic |
| 10034 | RelocFuncs::rel32_unaligned(view, value); |
| 10035 | return ArmRelocFuncs::STATUS_OKAY; |
| 10036 | |
| 10037 | case elfcpp::R_ARM_TLS_IE32: // Initial-exec |
| 10038 | if (optimized_type == tls::TLSOPT_NONE) |
| 10039 | { |
| 10040 | // Relocate the field with the offset of the GOT entry for |
| 10041 | // the tp-relative offset of the symbol. |
| 10042 | unsigned int got_type = GOT_TYPE_TLS_OFFSET; |
| 10043 | unsigned int got_offset; |
| 10044 | if (gsym != NULL) |
| 10045 | { |
| 10046 | gold_assert(gsym->has_got_offset(got_type)); |
| 10047 | got_offset = gsym->got_offset(got_type); |
| 10048 | } |
| 10049 | else |
| 10050 | { |
| 10051 | unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); |
| 10052 | gold_assert(object->local_has_got_offset(r_sym, got_type)); |
| 10053 | got_offset = object->local_got_offset(r_sym, got_type); |
| 10054 | } |
| 10055 | |
| 10056 | // All GOT offsets are relative to the end of the GOT. |
| 10057 | got_offset -= target->got_size(); |
| 10058 | |
| 10059 | Arm_address got_entry = |
| 10060 | target->got_plt_section()->address() + got_offset; |
| 10061 | |
| 10062 | // Relocate the field with the PC relative offset of the GOT entry. |
| 10063 | RelocFuncs::pcrel32_unaligned(view, got_entry, address); |
| 10064 | return ArmRelocFuncs::STATUS_OKAY; |
| 10065 | } |
| 10066 | break; |
| 10067 | |
| 10068 | case elfcpp::R_ARM_TLS_LE32: // Local-exec |
| 10069 | // If we're creating a shared library, a dynamic relocation will |
| 10070 | // have been created for this location, so do not apply it now. |
| 10071 | if (!parameters->options().shared()) |
| 10072 | { |
| 10073 | gold_assert(tls_segment != NULL); |
| 10074 | |
| 10075 | // $tp points to the TCB, which is followed by the TLS, so we |
| 10076 | // need to add TCB size to the offset. |
| 10077 | Arm_address aligned_tcb_size = |
| 10078 | align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); |
| 10079 | RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size); |
| 10080 | |
| 10081 | } |
| 10082 | return ArmRelocFuncs::STATUS_OKAY; |
| 10083 | |
| 10084 | default: |
| 10085 | gold_unreachable(); |
| 10086 | } |
| 10087 | |
| 10088 | gold_error_at_location(relinfo, relnum, rel.get_r_offset(), |
| 10089 | _("unsupported reloc %u"), |
| 10090 | r_type); |
| 10091 | return ArmRelocFuncs::STATUS_BAD_RELOC; |
| 10092 | } |
| 10093 | |
| 10094 | // Relocate section data. |
| 10095 | |
| 10096 | template<bool big_endian> |
| 10097 | void |
| 10098 | Target_arm<big_endian>::relocate_section( |
| 10099 | const Relocate_info<32, big_endian>* relinfo, |
| 10100 | unsigned int sh_type, |
| 10101 | const unsigned char* prelocs, |
| 10102 | size_t reloc_count, |
| 10103 | Output_section* output_section, |
| 10104 | bool needs_special_offset_handling, |
| 10105 | unsigned char* view, |
| 10106 | Arm_address address, |
| 10107 | section_size_type view_size, |
| 10108 | const Reloc_symbol_changes* reloc_symbol_changes) |
| 10109 | { |
| 10110 | typedef typename Target_arm<big_endian>::Relocate Arm_relocate; |
| 10111 | gold_assert(sh_type == elfcpp::SHT_REL); |
| 10112 | |
| 10113 | // See if we are relocating a relaxed input section. If so, the view |
| 10114 | // covers the whole output section and we need to adjust accordingly. |
| 10115 | if (needs_special_offset_handling) |
| 10116 | { |
| 10117 | const Output_relaxed_input_section* poris = |
| 10118 | output_section->find_relaxed_input_section(relinfo->object, |
| 10119 | relinfo->data_shndx); |
| 10120 | if (poris != NULL) |
| 10121 | { |
| 10122 | Arm_address section_address = poris->address(); |
| 10123 | section_size_type section_size = poris->data_size(); |
| 10124 | |
| 10125 | gold_assert((section_address >= address) |
| 10126 | && ((section_address + section_size) |
| 10127 | <= (address + view_size))); |
| 10128 | |
| 10129 | off_t offset = section_address - address; |
| 10130 | view += offset; |
| 10131 | address += offset; |
| 10132 | view_size = section_size; |
| 10133 | } |
| 10134 | } |
| 10135 | |
| 10136 | gold::relocate_section<32, big_endian, Target_arm, Arm_relocate, |
| 10137 | gold::Default_comdat_behavior, Classify_reloc>( |
| 10138 | relinfo, |
| 10139 | this, |
| 10140 | prelocs, |
| 10141 | reloc_count, |
| 10142 | output_section, |
| 10143 | needs_special_offset_handling, |
| 10144 | view, |
| 10145 | address, |
| 10146 | view_size, |
| 10147 | reloc_symbol_changes); |
| 10148 | } |
| 10149 | |
| 10150 | // Return the size of a relocation while scanning during a relocatable |
| 10151 | // link. |
| 10152 | |
| 10153 | template<bool big_endian> |
| 10154 | unsigned int |
| 10155 | Target_arm<big_endian>::Classify_reloc::get_size_for_reloc( |
| 10156 | unsigned int r_type, |
| 10157 | Relobj* object) |
| 10158 | { |
| 10159 | r_type = get_real_reloc_type(r_type); |
| 10160 | const Arm_reloc_property* arp = |
| 10161 | arm_reloc_property_table->get_implemented_static_reloc_property(r_type); |
| 10162 | if (arp != NULL) |
| 10163 | return arp->size(); |
| 10164 | else |
| 10165 | { |
| 10166 | std::string reloc_name = |
| 10167 | arm_reloc_property_table->reloc_name_in_error_message(r_type); |
| 10168 | gold_error(_("%s: unexpected %s in object file"), |
| 10169 | object->name().c_str(), reloc_name.c_str()); |
| 10170 | return 0; |
| 10171 | } |
| 10172 | } |
| 10173 | |
| 10174 | // Scan the relocs during a relocatable link. |
| 10175 | |
| 10176 | template<bool big_endian> |
| 10177 | void |
| 10178 | Target_arm<big_endian>::scan_relocatable_relocs( |
| 10179 | Symbol_table* symtab, |
| 10180 | Layout* layout, |
| 10181 | Sized_relobj_file<32, big_endian>* object, |
| 10182 | unsigned int data_shndx, |
| 10183 | unsigned int sh_type, |
| 10184 | const unsigned char* prelocs, |
| 10185 | size_t reloc_count, |
| 10186 | Output_section* output_section, |
| 10187 | bool needs_special_offset_handling, |
| 10188 | size_t local_symbol_count, |
| 10189 | const unsigned char* plocal_symbols, |
| 10190 | Relocatable_relocs* rr) |
| 10191 | { |
| 10192 | typedef Arm_scan_relocatable_relocs<big_endian, Classify_reloc> |
| 10193 | Scan_relocatable_relocs; |
| 10194 | |
| 10195 | gold_assert(sh_type == elfcpp::SHT_REL); |
| 10196 | |
| 10197 | gold::scan_relocatable_relocs<32, big_endian, Scan_relocatable_relocs>( |
| 10198 | symtab, |
| 10199 | layout, |
| 10200 | object, |
| 10201 | data_shndx, |
| 10202 | prelocs, |
| 10203 | reloc_count, |
| 10204 | output_section, |
| 10205 | needs_special_offset_handling, |
| 10206 | local_symbol_count, |
| 10207 | plocal_symbols, |
| 10208 | rr); |
| 10209 | } |
| 10210 | |
| 10211 | // Scan the relocs for --emit-relocs. |
| 10212 | |
| 10213 | template<bool big_endian> |
| 10214 | void |
| 10215 | Target_arm<big_endian>::emit_relocs_scan(Symbol_table* symtab, |
| 10216 | Layout* layout, |
| 10217 | Sized_relobj_file<32, big_endian>* object, |
| 10218 | unsigned int data_shndx, |
| 10219 | unsigned int sh_type, |
| 10220 | const unsigned char* prelocs, |
| 10221 | size_t reloc_count, |
| 10222 | Output_section* output_section, |
| 10223 | bool needs_special_offset_handling, |
| 10224 | size_t local_symbol_count, |
| 10225 | const unsigned char* plocal_syms, |
| 10226 | Relocatable_relocs* rr) |
| 10227 | { |
| 10228 | typedef gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> |
| 10229 | Classify_reloc; |
| 10230 | typedef gold::Default_emit_relocs_strategy<Classify_reloc> |
| 10231 | Emit_relocs_strategy; |
| 10232 | |
| 10233 | gold_assert(sh_type == elfcpp::SHT_REL); |
| 10234 | |
| 10235 | gold::scan_relocatable_relocs<32, big_endian, Emit_relocs_strategy>( |
| 10236 | symtab, |
| 10237 | layout, |
| 10238 | object, |
| 10239 | data_shndx, |
| 10240 | prelocs, |
| 10241 | reloc_count, |
| 10242 | output_section, |
| 10243 | needs_special_offset_handling, |
| 10244 | local_symbol_count, |
| 10245 | plocal_syms, |
| 10246 | rr); |
| 10247 | } |
| 10248 | |
| 10249 | // Emit relocations for a section. |
| 10250 | |
| 10251 | template<bool big_endian> |
| 10252 | void |
| 10253 | Target_arm<big_endian>::relocate_relocs( |
| 10254 | const Relocate_info<32, big_endian>* relinfo, |
| 10255 | unsigned int sh_type, |
| 10256 | const unsigned char* prelocs, |
| 10257 | size_t reloc_count, |
| 10258 | Output_section* output_section, |
| 10259 | typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, |
| 10260 | unsigned char* view, |
| 10261 | Arm_address view_address, |
| 10262 | section_size_type view_size, |
| 10263 | unsigned char* reloc_view, |
| 10264 | section_size_type reloc_view_size) |
| 10265 | { |
| 10266 | gold_assert(sh_type == elfcpp::SHT_REL); |
| 10267 | |
| 10268 | gold::relocate_relocs<32, big_endian, Classify_reloc>( |
| 10269 | relinfo, |
| 10270 | prelocs, |
| 10271 | reloc_count, |
| 10272 | output_section, |
| 10273 | offset_in_output_section, |
| 10274 | view, |
| 10275 | view_address, |
| 10276 | view_size, |
| 10277 | reloc_view, |
| 10278 | reloc_view_size); |
| 10279 | } |
| 10280 | |
| 10281 | // Perform target-specific processing in a relocatable link. This is |
| 10282 | // only used if we use the relocation strategy RELOC_SPECIAL. |
| 10283 | |
| 10284 | template<bool big_endian> |
| 10285 | void |
| 10286 | Target_arm<big_endian>::relocate_special_relocatable( |
| 10287 | const Relocate_info<32, big_endian>* relinfo, |
| 10288 | unsigned int sh_type, |
| 10289 | const unsigned char* preloc_in, |
| 10290 | size_t relnum, |
| 10291 | Output_section* output_section, |
| 10292 | typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, |
| 10293 | unsigned char* view, |
| 10294 | elfcpp::Elf_types<32>::Elf_Addr view_address, |
| 10295 | section_size_type, |
| 10296 | unsigned char* preloc_out) |
| 10297 | { |
| 10298 | // We can only handle REL type relocation sections. |
| 10299 | gold_assert(sh_type == elfcpp::SHT_REL); |
| 10300 | |
| 10301 | typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype; |
| 10302 | typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write |
| 10303 | Reltype_write; |
| 10304 | const Arm_address invalid_address = static_cast<Arm_address>(0) - 1; |
| 10305 | |
| 10306 | const Arm_relobj<big_endian>* object = |
| 10307 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); |
| 10308 | const unsigned int local_count = object->local_symbol_count(); |
| 10309 | |
| 10310 | Reltype reloc(preloc_in); |
| 10311 | Reltype_write reloc_write(preloc_out); |
| 10312 | |
| 10313 | elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); |
| 10314 | const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); |
| 10315 | const unsigned int r_type = elfcpp::elf_r_type<32>(r_info); |
| 10316 | |
| 10317 | const Arm_reloc_property* arp = |
| 10318 | arm_reloc_property_table->get_implemented_static_reloc_property(r_type); |
| 10319 | gold_assert(arp != NULL); |
| 10320 | |
| 10321 | // Get the new symbol index. |
| 10322 | // We only use RELOC_SPECIAL strategy in local relocations. |
| 10323 | gold_assert(r_sym < local_count); |
| 10324 | |
| 10325 | // We are adjusting a section symbol. We need to find |
| 10326 | // the symbol table index of the section symbol for |
| 10327 | // the output section corresponding to input section |
| 10328 | // in which this symbol is defined. |
| 10329 | bool is_ordinary; |
| 10330 | unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary); |
| 10331 | gold_assert(is_ordinary); |
| 10332 | Output_section* os = object->output_section(shndx); |
| 10333 | gold_assert(os != NULL); |
| 10334 | gold_assert(os->needs_symtab_index()); |
| 10335 | unsigned int new_symndx = os->symtab_index(); |
| 10336 | |
| 10337 | // Get the new offset--the location in the output section where |
| 10338 | // this relocation should be applied. |
| 10339 | |
| 10340 | Arm_address offset = reloc.get_r_offset(); |
| 10341 | Arm_address new_offset; |
| 10342 | if (offset_in_output_section != invalid_address) |
| 10343 | new_offset = offset + offset_in_output_section; |
| 10344 | else |
| 10345 | { |
| 10346 | section_offset_type sot_offset = |
| 10347 | convert_types<section_offset_type, Arm_address>(offset); |
| 10348 | section_offset_type new_sot_offset = |
| 10349 | output_section->output_offset(object, relinfo->data_shndx, |
| 10350 | sot_offset); |
| 10351 | gold_assert(new_sot_offset != -1); |
| 10352 | new_offset = new_sot_offset; |
| 10353 | } |
| 10354 | |
| 10355 | // In an object file, r_offset is an offset within the section. |
| 10356 | // In an executable or dynamic object, generated by |
| 10357 | // --emit-relocs, r_offset is an absolute address. |
| 10358 | if (!parameters->options().relocatable()) |
| 10359 | { |
| 10360 | new_offset += view_address; |
| 10361 | if (offset_in_output_section != invalid_address) |
| 10362 | new_offset -= offset_in_output_section; |
| 10363 | } |
| 10364 | |
| 10365 | reloc_write.put_r_offset(new_offset); |
| 10366 | reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type)); |
| 10367 | |
| 10368 | // Handle the reloc addend. |
| 10369 | // The relocation uses a section symbol in the input file. |
| 10370 | // We are adjusting it to use a section symbol in the output |
| 10371 | // file. The input section symbol refers to some address in |
| 10372 | // the input section. We need the relocation in the output |
| 10373 | // file to refer to that same address. This adjustment to |
| 10374 | // the addend is the same calculation we use for a simple |
| 10375 | // absolute relocation for the input section symbol. |
| 10376 | |
| 10377 | const Symbol_value<32>* psymval = object->local_symbol(r_sym); |
| 10378 | |
| 10379 | // Handle THUMB bit. |
| 10380 | Symbol_value<32> symval; |
| 10381 | Arm_address thumb_bit = |
| 10382 | object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; |
| 10383 | if (thumb_bit != 0 |
| 10384 | && arp->uses_thumb_bit() |
| 10385 | && ((psymval->value(object, 0) & 1) != 0)) |
| 10386 | { |
| 10387 | Arm_address stripped_value = |
| 10388 | psymval->value(object, 0) & ~static_cast<Arm_address>(1); |
| 10389 | symval.set_output_value(stripped_value); |
| 10390 | psymval = &symval; |
| 10391 | } |
| 10392 | |
| 10393 | unsigned char* paddend = view + offset; |
| 10394 | typename Arm_relocate_functions<big_endian>::Status reloc_status = |
| 10395 | Arm_relocate_functions<big_endian>::STATUS_OKAY; |
| 10396 | switch (r_type) |
| 10397 | { |
| 10398 | case elfcpp::R_ARM_ABS8: |
| 10399 | reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object, |
| 10400 | psymval); |
| 10401 | break; |
| 10402 | |
| 10403 | case elfcpp::R_ARM_ABS12: |
| 10404 | reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object, |
| 10405 | psymval); |
| 10406 | break; |
| 10407 | |
| 10408 | case elfcpp::R_ARM_ABS16: |
| 10409 | reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object, |
| 10410 | psymval); |
| 10411 | break; |
| 10412 | |
| 10413 | case elfcpp::R_ARM_THM_ABS5: |
| 10414 | reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend, |
| 10415 | object, |
| 10416 | psymval); |
| 10417 | break; |
| 10418 | |
| 10419 | case elfcpp::R_ARM_MOVW_ABS_NC: |
| 10420 | case elfcpp::R_ARM_MOVW_PREL_NC: |
| 10421 | case elfcpp::R_ARM_MOVW_BREL_NC: |
| 10422 | case elfcpp::R_ARM_MOVW_BREL: |
| 10423 | reloc_status = Arm_relocate_functions<big_endian>::movw( |
| 10424 | paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); |
| 10425 | break; |
| 10426 | |
| 10427 | case elfcpp::R_ARM_THM_MOVW_ABS_NC: |
| 10428 | case elfcpp::R_ARM_THM_MOVW_PREL_NC: |
| 10429 | case elfcpp::R_ARM_THM_MOVW_BREL_NC: |
| 10430 | case elfcpp::R_ARM_THM_MOVW_BREL: |
| 10431 | reloc_status = Arm_relocate_functions<big_endian>::thm_movw( |
| 10432 | paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); |
| 10433 | break; |
| 10434 | |
| 10435 | case elfcpp::R_ARM_THM_CALL: |
| 10436 | case elfcpp::R_ARM_THM_XPC22: |
| 10437 | case elfcpp::R_ARM_THM_JUMP24: |
| 10438 | reloc_status = |
| 10439 | Arm_relocate_functions<big_endian>::thumb_branch_common( |
| 10440 | r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, |
| 10441 | false); |
| 10442 | break; |
| 10443 | |
| 10444 | case elfcpp::R_ARM_PLT32: |
| 10445 | case elfcpp::R_ARM_CALL: |
| 10446 | case elfcpp::R_ARM_JUMP24: |
| 10447 | case elfcpp::R_ARM_XPC25: |
| 10448 | reloc_status = |
| 10449 | Arm_relocate_functions<big_endian>::arm_branch_common( |
| 10450 | r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, |
| 10451 | false); |
| 10452 | break; |
| 10453 | |
| 10454 | case elfcpp::R_ARM_THM_JUMP19: |
| 10455 | reloc_status = |
| 10456 | Arm_relocate_functions<big_endian>::thm_jump19(paddend, object, |
| 10457 | psymval, 0, thumb_bit); |
| 10458 | break; |
| 10459 | |
| 10460 | case elfcpp::R_ARM_THM_JUMP6: |
| 10461 | reloc_status = |
| 10462 | Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval, |
| 10463 | 0); |
| 10464 | break; |
| 10465 | |
| 10466 | case elfcpp::R_ARM_THM_JUMP8: |
| 10467 | reloc_status = |
| 10468 | Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval, |
| 10469 | 0); |
| 10470 | break; |
| 10471 | |
| 10472 | case elfcpp::R_ARM_THM_JUMP11: |
| 10473 | reloc_status = |
| 10474 | Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval, |
| 10475 | 0); |
| 10476 | break; |
| 10477 | |
| 10478 | case elfcpp::R_ARM_PREL31: |
| 10479 | reloc_status = |
| 10480 | Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0, |
| 10481 | thumb_bit); |
| 10482 | break; |
| 10483 | |
| 10484 | case elfcpp::R_ARM_THM_PC8: |
| 10485 | reloc_status = |
| 10486 | Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval, |
| 10487 | 0); |
| 10488 | break; |
| 10489 | |
| 10490 | case elfcpp::R_ARM_THM_PC12: |
| 10491 | reloc_status = |
| 10492 | Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval, |
| 10493 | 0); |
| 10494 | break; |
| 10495 | |
| 10496 | case elfcpp::R_ARM_THM_ALU_PREL_11_0: |
| 10497 | reloc_status = |
| 10498 | Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval, |
| 10499 | 0, thumb_bit); |
| 10500 | break; |
| 10501 | |
| 10502 | // These relocation truncate relocation results so we cannot handle them |
| 10503 | // in a relocatable link. |
| 10504 | case elfcpp::R_ARM_MOVT_ABS: |
| 10505 | case elfcpp::R_ARM_THM_MOVT_ABS: |
| 10506 | case elfcpp::R_ARM_MOVT_PREL: |
| 10507 | case elfcpp::R_ARM_MOVT_BREL: |
| 10508 | case elfcpp::R_ARM_THM_MOVT_PREL: |
| 10509 | case elfcpp::R_ARM_THM_MOVT_BREL: |
| 10510 | case elfcpp::R_ARM_ALU_PC_G0_NC: |
| 10511 | case elfcpp::R_ARM_ALU_PC_G0: |
| 10512 | case elfcpp::R_ARM_ALU_PC_G1_NC: |
| 10513 | case elfcpp::R_ARM_ALU_PC_G1: |
| 10514 | case elfcpp::R_ARM_ALU_PC_G2: |
| 10515 | case elfcpp::R_ARM_ALU_SB_G0_NC: |
| 10516 | case elfcpp::R_ARM_ALU_SB_G0: |
| 10517 | case elfcpp::R_ARM_ALU_SB_G1_NC: |
| 10518 | case elfcpp::R_ARM_ALU_SB_G1: |
| 10519 | case elfcpp::R_ARM_ALU_SB_G2: |
| 10520 | case elfcpp::R_ARM_LDR_PC_G0: |
| 10521 | case elfcpp::R_ARM_LDR_PC_G1: |
| 10522 | case elfcpp::R_ARM_LDR_PC_G2: |
| 10523 | case elfcpp::R_ARM_LDR_SB_G0: |
| 10524 | case elfcpp::R_ARM_LDR_SB_G1: |
| 10525 | case elfcpp::R_ARM_LDR_SB_G2: |
| 10526 | case elfcpp::R_ARM_LDRS_PC_G0: |
| 10527 | case elfcpp::R_ARM_LDRS_PC_G1: |
| 10528 | case elfcpp::R_ARM_LDRS_PC_G2: |
| 10529 | case elfcpp::R_ARM_LDRS_SB_G0: |
| 10530 | case elfcpp::R_ARM_LDRS_SB_G1: |
| 10531 | case elfcpp::R_ARM_LDRS_SB_G2: |
| 10532 | case elfcpp::R_ARM_LDC_PC_G0: |
| 10533 | case elfcpp::R_ARM_LDC_PC_G1: |
| 10534 | case elfcpp::R_ARM_LDC_PC_G2: |
| 10535 | case elfcpp::R_ARM_LDC_SB_G0: |
| 10536 | case elfcpp::R_ARM_LDC_SB_G1: |
| 10537 | case elfcpp::R_ARM_LDC_SB_G2: |
| 10538 | gold_error(_("cannot handle %s in a relocatable link"), |
| 10539 | arp->name().c_str()); |
| 10540 | break; |
| 10541 | |
| 10542 | default: |
| 10543 | gold_unreachable(); |
| 10544 | } |
| 10545 | |
| 10546 | // Report any errors. |
| 10547 | switch (reloc_status) |
| 10548 | { |
| 10549 | case Arm_relocate_functions<big_endian>::STATUS_OKAY: |
| 10550 | break; |
| 10551 | case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW: |
| 10552 | gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), |
| 10553 | _("relocation overflow in %s"), |
| 10554 | arp->name().c_str()); |
| 10555 | break; |
| 10556 | case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC: |
| 10557 | gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), |
| 10558 | _("unexpected opcode while processing relocation %s"), |
| 10559 | arp->name().c_str()); |
| 10560 | break; |
| 10561 | default: |
| 10562 | gold_unreachable(); |
| 10563 | } |
| 10564 | } |
| 10565 | |
| 10566 | // Return the value to use for a dynamic symbol which requires special |
| 10567 | // treatment. This is how we support equality comparisons of function |
| 10568 | // pointers across shared library boundaries, as described in the |
| 10569 | // processor specific ABI supplement. |
| 10570 | |
| 10571 | template<bool big_endian> |
| 10572 | uint64_t |
| 10573 | Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const |
| 10574 | { |
| 10575 | gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); |
| 10576 | return this->plt_address_for_global(gsym); |
| 10577 | } |
| 10578 | |
| 10579 | // Map platform-specific relocs to real relocs |
| 10580 | // |
| 10581 | template<bool big_endian> |
| 10582 | unsigned int |
| 10583 | Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type) |
| 10584 | { |
| 10585 | switch (r_type) |
| 10586 | { |
| 10587 | case elfcpp::R_ARM_TARGET1: |
| 10588 | // This is either R_ARM_ABS32 or R_ARM_REL32; |
| 10589 | return elfcpp::R_ARM_ABS32; |
| 10590 | |
| 10591 | case elfcpp::R_ARM_TARGET2: |
| 10592 | // This can be any reloc type but usually is R_ARM_GOT_PREL |
| 10593 | return elfcpp::R_ARM_GOT_PREL; |
| 10594 | |
| 10595 | default: |
| 10596 | return r_type; |
| 10597 | } |
| 10598 | } |
| 10599 | |
| 10600 | // Whether if two EABI versions V1 and V2 are compatible. |
| 10601 | |
| 10602 | template<bool big_endian> |
| 10603 | bool |
| 10604 | Target_arm<big_endian>::are_eabi_versions_compatible( |
| 10605 | elfcpp::Elf_Word v1, |
| 10606 | elfcpp::Elf_Word v2) |
| 10607 | { |
| 10608 | // v4 and v5 are the same spec before and after it was released, |
| 10609 | // so allow mixing them. |
| 10610 | if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN) |
| 10611 | || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5) |
| 10612 | || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4)) |
| 10613 | return true; |
| 10614 | |
| 10615 | return v1 == v2; |
| 10616 | } |
| 10617 | |
| 10618 | // Combine FLAGS from an input object called NAME and the processor-specific |
| 10619 | // flags in the ELF header of the output. Much of this is adapted from the |
| 10620 | // processor-specific flags merging code in elf32_arm_merge_private_bfd_data |
| 10621 | // in bfd/elf32-arm.c. |
| 10622 | |
| 10623 | template<bool big_endian> |
| 10624 | void |
| 10625 | Target_arm<big_endian>::merge_processor_specific_flags( |
| 10626 | const std::string& name, |
| 10627 | elfcpp::Elf_Word flags) |
| 10628 | { |
| 10629 | if (this->are_processor_specific_flags_set()) |
| 10630 | { |
| 10631 | elfcpp::Elf_Word out_flags = this->processor_specific_flags(); |
| 10632 | |
| 10633 | // Nothing to merge if flags equal to those in output. |
| 10634 | if (flags == out_flags) |
| 10635 | return; |
| 10636 | |
| 10637 | // Complain about various flag mismatches. |
| 10638 | elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags); |
| 10639 | elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags); |
| 10640 | if (!this->are_eabi_versions_compatible(version1, version2) |
| 10641 | && parameters->options().warn_mismatch()) |
| 10642 | gold_error(_("Source object %s has EABI version %d but output has " |
| 10643 | "EABI version %d."), |
| 10644 | name.c_str(), |
| 10645 | (flags & elfcpp::EF_ARM_EABIMASK) >> 24, |
| 10646 | (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24); |
| 10647 | } |
| 10648 | else |
| 10649 | { |
| 10650 | // If the input is the default architecture and had the default |
| 10651 | // flags then do not bother setting the flags for the output |
| 10652 | // architecture, instead allow future merges to do this. If no |
| 10653 | // future merges ever set these flags then they will retain their |
| 10654 | // uninitialised values, which surprise surprise, correspond |
| 10655 | // to the default values. |
| 10656 | if (flags == 0) |
| 10657 | return; |
| 10658 | |
| 10659 | // This is the first time, just copy the flags. |
| 10660 | // We only copy the EABI version for now. |
| 10661 | this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK); |
| 10662 | } |
| 10663 | } |
| 10664 | |
| 10665 | // Adjust ELF file header. |
| 10666 | template<bool big_endian> |
| 10667 | void |
| 10668 | Target_arm<big_endian>::do_adjust_elf_header( |
| 10669 | unsigned char* view, |
| 10670 | int len) |
| 10671 | { |
| 10672 | gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size); |
| 10673 | |
| 10674 | elfcpp::Ehdr<32, big_endian> ehdr(view); |
| 10675 | elfcpp::Elf_Word flags = this->processor_specific_flags(); |
| 10676 | unsigned char e_ident[elfcpp::EI_NIDENT]; |
| 10677 | memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); |
| 10678 | |
| 10679 | if (elfcpp::arm_eabi_version(flags) |
| 10680 | == elfcpp::EF_ARM_EABI_UNKNOWN) |
| 10681 | e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM; |
| 10682 | else |
| 10683 | e_ident[elfcpp::EI_OSABI] = 0; |
| 10684 | e_ident[elfcpp::EI_ABIVERSION] = 0; |
| 10685 | |
| 10686 | // FIXME: Do EF_ARM_BE8 adjustment. |
| 10687 | |
| 10688 | // If we're working in EABI_VER5, set the hard/soft float ABI flags |
| 10689 | // as appropriate. |
| 10690 | if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5) |
| 10691 | { |
| 10692 | elfcpp::Elf_Half type = ehdr.get_e_type(); |
| 10693 | if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN) |
| 10694 | { |
| 10695 | Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args); |
| 10696 | if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp) |
| 10697 | flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD; |
| 10698 | else |
| 10699 | flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT; |
| 10700 | this->set_processor_specific_flags(flags); |
| 10701 | } |
| 10702 | } |
| 10703 | elfcpp::Ehdr_write<32, big_endian> oehdr(view); |
| 10704 | oehdr.put_e_ident(e_ident); |
| 10705 | oehdr.put_e_flags(this->processor_specific_flags()); |
| 10706 | } |
| 10707 | |
| 10708 | // do_make_elf_object to override the same function in the base class. |
| 10709 | // We need to use a target-specific sub-class of |
| 10710 | // Sized_relobj_file<32, big_endian> to store ARM specific information. |
| 10711 | // Hence we need to have our own ELF object creation. |
| 10712 | |
| 10713 | template<bool big_endian> |
| 10714 | Object* |
| 10715 | Target_arm<big_endian>::do_make_elf_object( |
| 10716 | const std::string& name, |
| 10717 | Input_file* input_file, |
| 10718 | off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) |
| 10719 | { |
| 10720 | int et = ehdr.get_e_type(); |
| 10721 | // ET_EXEC files are valid input for --just-symbols/-R, |
| 10722 | // and we treat them as relocatable objects. |
| 10723 | if (et == elfcpp::ET_REL |
| 10724 | || (et == elfcpp::ET_EXEC && input_file->just_symbols())) |
| 10725 | { |
| 10726 | Arm_relobj<big_endian>* obj = |
| 10727 | new Arm_relobj<big_endian>(name, input_file, offset, ehdr); |
| 10728 | obj->setup(); |
| 10729 | return obj; |
| 10730 | } |
| 10731 | else if (et == elfcpp::ET_DYN) |
| 10732 | { |
| 10733 | Sized_dynobj<32, big_endian>* obj = |
| 10734 | new Arm_dynobj<big_endian>(name, input_file, offset, ehdr); |
| 10735 | obj->setup(); |
| 10736 | return obj; |
| 10737 | } |
| 10738 | else |
| 10739 | { |
| 10740 | gold_error(_("%s: unsupported ELF file type %d"), |
| 10741 | name.c_str(), et); |
| 10742 | return NULL; |
| 10743 | } |
| 10744 | } |
| 10745 | |
| 10746 | // Read the architecture from the Tag_also_compatible_with attribute, if any. |
| 10747 | // Returns -1 if no architecture could be read. |
| 10748 | // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c. |
| 10749 | |
| 10750 | template<bool big_endian> |
| 10751 | int |
| 10752 | Target_arm<big_endian>::get_secondary_compatible_arch( |
| 10753 | const Attributes_section_data* pasd) |
| 10754 | { |
| 10755 | const Object_attribute* known_attributes = |
| 10756 | pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); |
| 10757 | |
| 10758 | // Note: the tag and its argument below are uleb128 values, though |
| 10759 | // currently-defined values fit in one byte for each. |
| 10760 | const std::string& sv = |
| 10761 | known_attributes[elfcpp::Tag_also_compatible_with].string_value(); |
| 10762 | if (sv.size() == 2 |
| 10763 | && sv.data()[0] == elfcpp::Tag_CPU_arch |
| 10764 | && (sv.data()[1] & 128) != 128) |
| 10765 | return sv.data()[1]; |
| 10766 | |
| 10767 | // This tag is "safely ignorable", so don't complain if it looks funny. |
| 10768 | return -1; |
| 10769 | } |
| 10770 | |
| 10771 | // Set, or unset, the architecture of the Tag_also_compatible_with attribute. |
| 10772 | // The tag is removed if ARCH is -1. |
| 10773 | // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c. |
| 10774 | |
| 10775 | template<bool big_endian> |
| 10776 | void |
| 10777 | Target_arm<big_endian>::set_secondary_compatible_arch( |
| 10778 | Attributes_section_data* pasd, |
| 10779 | int arch) |
| 10780 | { |
| 10781 | Object_attribute* known_attributes = |
| 10782 | pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); |
| 10783 | |
| 10784 | if (arch == -1) |
| 10785 | { |
| 10786 | known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(""); |
| 10787 | return; |
| 10788 | } |
| 10789 | |
| 10790 | // Note: the tag and its argument below are uleb128 values, though |
| 10791 | // currently-defined values fit in one byte for each. |
| 10792 | char sv[3]; |
| 10793 | sv[0] = elfcpp::Tag_CPU_arch; |
| 10794 | gold_assert(arch != 0); |
| 10795 | sv[1] = arch; |
| 10796 | sv[2] = '\0'; |
| 10797 | |
| 10798 | known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv); |
| 10799 | } |
| 10800 | |
| 10801 | // Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
| 10802 | // into account. |
| 10803 | // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c. |
| 10804 | |
| 10805 | template<bool big_endian> |
| 10806 | int |
| 10807 | Target_arm<big_endian>::tag_cpu_arch_combine( |
| 10808 | const char* name, |
| 10809 | int oldtag, |
| 10810 | int* secondary_compat_out, |
| 10811 | int newtag, |
| 10812 | int secondary_compat) |
| 10813 | { |
| 10814 | #define T(X) elfcpp::TAG_CPU_ARCH_##X |
| 10815 | static const int v6t2[] = |
| 10816 | { |
| 10817 | T(V6T2), // PRE_V4. |
| 10818 | T(V6T2), // V4. |
| 10819 | T(V6T2), // V4T. |
| 10820 | T(V6T2), // V5T. |
| 10821 | T(V6T2), // V5TE. |
| 10822 | T(V6T2), // V5TEJ. |
| 10823 | T(V6T2), // V6. |
| 10824 | T(V7), // V6KZ. |
| 10825 | T(V6T2) // V6T2. |
| 10826 | }; |
| 10827 | static const int v6k[] = |
| 10828 | { |
| 10829 | T(V6K), // PRE_V4. |
| 10830 | T(V6K), // V4. |
| 10831 | T(V6K), // V4T. |
| 10832 | T(V6K), // V5T. |
| 10833 | T(V6K), // V5TE. |
| 10834 | T(V6K), // V5TEJ. |
| 10835 | T(V6K), // V6. |
| 10836 | T(V6KZ), // V6KZ. |
| 10837 | T(V7), // V6T2. |
| 10838 | T(V6K) // V6K. |
| 10839 | }; |
| 10840 | static const int v7[] = |
| 10841 | { |
| 10842 | T(V7), // PRE_V4. |
| 10843 | T(V7), // V4. |
| 10844 | T(V7), // V4T. |
| 10845 | T(V7), // V5T. |
| 10846 | T(V7), // V5TE. |
| 10847 | T(V7), // V5TEJ. |
| 10848 | T(V7), // V6. |
| 10849 | T(V7), // V6KZ. |
| 10850 | T(V7), // V6T2. |
| 10851 | T(V7), // V6K. |
| 10852 | T(V7) // V7. |
| 10853 | }; |
| 10854 | static const int v6_m[] = |
| 10855 | { |
| 10856 | -1, // PRE_V4. |
| 10857 | -1, // V4. |
| 10858 | T(V6K), // V4T. |
| 10859 | T(V6K), // V5T. |
| 10860 | T(V6K), // V5TE. |
| 10861 | T(V6K), // V5TEJ. |
| 10862 | T(V6K), // V6. |
| 10863 | T(V6KZ), // V6KZ. |
| 10864 | T(V7), // V6T2. |
| 10865 | T(V6K), // V6K. |
| 10866 | T(V7), // V7. |
| 10867 | T(V6_M) // V6_M. |
| 10868 | }; |
| 10869 | static const int v6s_m[] = |
| 10870 | { |
| 10871 | -1, // PRE_V4. |
| 10872 | -1, // V4. |
| 10873 | T(V6K), // V4T. |
| 10874 | T(V6K), // V5T. |
| 10875 | T(V6K), // V5TE. |
| 10876 | T(V6K), // V5TEJ. |
| 10877 | T(V6K), // V6. |
| 10878 | T(V6KZ), // V6KZ. |
| 10879 | T(V7), // V6T2. |
| 10880 | T(V6K), // V6K. |
| 10881 | T(V7), // V7. |
| 10882 | T(V6S_M), // V6_M. |
| 10883 | T(V6S_M) // V6S_M. |
| 10884 | }; |
| 10885 | static const int v7e_m[] = |
| 10886 | { |
| 10887 | -1, // PRE_V4. |
| 10888 | -1, // V4. |
| 10889 | T(V7E_M), // V4T. |
| 10890 | T(V7E_M), // V5T. |
| 10891 | T(V7E_M), // V5TE. |
| 10892 | T(V7E_M), // V5TEJ. |
| 10893 | T(V7E_M), // V6. |
| 10894 | T(V7E_M), // V6KZ. |
| 10895 | T(V7E_M), // V6T2. |
| 10896 | T(V7E_M), // V6K. |
| 10897 | T(V7E_M), // V7. |
| 10898 | T(V7E_M), // V6_M. |
| 10899 | T(V7E_M), // V6S_M. |
| 10900 | T(V7E_M) // V7E_M. |
| 10901 | }; |
| 10902 | static const int v8[] = |
| 10903 | { |
| 10904 | T(V8), // PRE_V4. |
| 10905 | T(V8), // V4. |
| 10906 | T(V8), // V4T. |
| 10907 | T(V8), // V5T. |
| 10908 | T(V8), // V5TE. |
| 10909 | T(V8), // V5TEJ. |
| 10910 | T(V8), // V6. |
| 10911 | T(V8), // V6KZ. |
| 10912 | T(V8), // V6T2. |
| 10913 | T(V8), // V6K. |
| 10914 | T(V8), // V7. |
| 10915 | T(V8), // V6_M. |
| 10916 | T(V8), // V6S_M. |
| 10917 | T(V8), // V7E_M. |
| 10918 | T(V8) // V8. |
| 10919 | }; |
| 10920 | static const int v4t_plus_v6_m[] = |
| 10921 | { |
| 10922 | -1, // PRE_V4. |
| 10923 | -1, // V4. |
| 10924 | T(V4T), // V4T. |
| 10925 | T(V5T), // V5T. |
| 10926 | T(V5TE), // V5TE. |
| 10927 | T(V5TEJ), // V5TEJ. |
| 10928 | T(V6), // V6. |
| 10929 | T(V6KZ), // V6KZ. |
| 10930 | T(V6T2), // V6T2. |
| 10931 | T(V6K), // V6K. |
| 10932 | T(V7), // V7. |
| 10933 | T(V6_M), // V6_M. |
| 10934 | T(V6S_M), // V6S_M. |
| 10935 | T(V7E_M), // V7E_M. |
| 10936 | T(V8), // V8. |
| 10937 | T(V4T_PLUS_V6_M) // V4T plus V6_M. |
| 10938 | }; |
| 10939 | static const int* comb[] = |
| 10940 | { |
| 10941 | v6t2, |
| 10942 | v6k, |
| 10943 | v7, |
| 10944 | v6_m, |
| 10945 | v6s_m, |
| 10946 | v7e_m, |
| 10947 | v8, |
| 10948 | // Pseudo-architecture. |
| 10949 | v4t_plus_v6_m |
| 10950 | }; |
| 10951 | |
| 10952 | // Check we've not got a higher architecture than we know about. |
| 10953 | |
| 10954 | if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH) |
| 10955 | { |
| 10956 | gold_error(_("%s: unknown CPU architecture"), name); |
| 10957 | return -1; |
| 10958 | } |
| 10959 | |
| 10960 | // Override old tag if we have a Tag_also_compatible_with on the output. |
| 10961 | |
| 10962 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) |
| 10963 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) |
| 10964 | oldtag = T(V4T_PLUS_V6_M); |
| 10965 | |
| 10966 | // And override the new tag if we have a Tag_also_compatible_with on the |
| 10967 | // input. |
| 10968 | |
| 10969 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) |
| 10970 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) |
| 10971 | newtag = T(V4T_PLUS_V6_M); |
| 10972 | |
| 10973 | // Architectures before V6KZ add features monotonically. |
| 10974 | int tagh = std::max(oldtag, newtag); |
| 10975 | if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ) |
| 10976 | return tagh; |
| 10977 | |
| 10978 | int tagl = std::min(oldtag, newtag); |
| 10979 | int result = comb[tagh - T(V6T2)][tagl]; |
| 10980 | |
| 10981 | // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) |
| 10982 | // as the canonical version. |
| 10983 | if (result == T(V4T_PLUS_V6_M)) |
| 10984 | { |
| 10985 | result = T(V4T); |
| 10986 | *secondary_compat_out = T(V6_M); |
| 10987 | } |
| 10988 | else |
| 10989 | *secondary_compat_out = -1; |
| 10990 | |
| 10991 | if (result == -1) |
| 10992 | { |
| 10993 | gold_error(_("%s: conflicting CPU architectures %d/%d"), |
| 10994 | name, oldtag, newtag); |
| 10995 | return -1; |
| 10996 | } |
| 10997 | |
| 10998 | return result; |
| 10999 | #undef T |
| 11000 | } |
| 11001 | |
| 11002 | // Helper to print AEABI enum tag value. |
| 11003 | |
| 11004 | template<bool big_endian> |
| 11005 | std::string |
| 11006 | Target_arm<big_endian>::aeabi_enum_name(unsigned int value) |
| 11007 | { |
| 11008 | static const char* aeabi_enum_names[] = |
| 11009 | { "", "variable-size", "32-bit", "" }; |
| 11010 | const size_t aeabi_enum_names_size = |
| 11011 | sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]); |
| 11012 | |
| 11013 | if (value < aeabi_enum_names_size) |
| 11014 | return std::string(aeabi_enum_names[value]); |
| 11015 | else |
| 11016 | { |
| 11017 | char buffer[100]; |
| 11018 | sprintf(buffer, "<unknown value %u>", value); |
| 11019 | return std::string(buffer); |
| 11020 | } |
| 11021 | } |
| 11022 | |
| 11023 | // Return the string value to store in TAG_CPU_name. |
| 11024 | |
| 11025 | template<bool big_endian> |
| 11026 | std::string |
| 11027 | Target_arm<big_endian>::tag_cpu_name_value(unsigned int value) |
| 11028 | { |
| 11029 | static const char* name_table[] = { |
| 11030 | // These aren't real CPU names, but we can't guess |
| 11031 | // that from the architecture version alone. |
| 11032 | "Pre v4", |
| 11033 | "ARM v4", |
| 11034 | "ARM v4T", |
| 11035 | "ARM v5T", |
| 11036 | "ARM v5TE", |
| 11037 | "ARM v5TEJ", |
| 11038 | "ARM v6", |
| 11039 | "ARM v6KZ", |
| 11040 | "ARM v6T2", |
| 11041 | "ARM v6K", |
| 11042 | "ARM v7", |
| 11043 | "ARM v6-M", |
| 11044 | "ARM v6S-M", |
| 11045 | "ARM v7E-M", |
| 11046 | "ARM v8" |
| 11047 | }; |
| 11048 | const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]); |
| 11049 | |
| 11050 | if (value < name_table_size) |
| 11051 | return std::string(name_table[value]); |
| 11052 | else |
| 11053 | { |
| 11054 | char buffer[100]; |
| 11055 | sprintf(buffer, "<unknown CPU value %u>", value); |
| 11056 | return std::string(buffer); |
| 11057 | } |
| 11058 | } |
| 11059 | |
| 11060 | // Query attributes object to see if integer divide instructions may be |
| 11061 | // present in an object. |
| 11062 | |
| 11063 | template<bool big_endian> |
| 11064 | bool |
| 11065 | Target_arm<big_endian>::attributes_accept_div(int arch, int profile, |
| 11066 | const Object_attribute* div_attr) |
| 11067 | { |
| 11068 | switch (div_attr->int_value()) |
| 11069 | { |
| 11070 | case 0: |
| 11071 | // Integer divide allowed if instruction contained in |
| 11072 | // archetecture. |
| 11073 | if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) |
| 11074 | return true; |
| 11075 | else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M) |
| 11076 | return true; |
| 11077 | else |
| 11078 | return false; |
| 11079 | |
| 11080 | case 1: |
| 11081 | // Integer divide explicitly prohibited. |
| 11082 | return false; |
| 11083 | |
| 11084 | default: |
| 11085 | // Unrecognised case - treat as allowing divide everywhere. |
| 11086 | case 2: |
| 11087 | // Integer divide allowed in ARM state. |
| 11088 | return true; |
| 11089 | } |
| 11090 | } |
| 11091 | |
| 11092 | // Query attributes object to see if integer divide instructions are |
| 11093 | // forbidden to be in the object. This is not the inverse of |
| 11094 | // attributes_accept_div. |
| 11095 | |
| 11096 | template<bool big_endian> |
| 11097 | bool |
| 11098 | Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr) |
| 11099 | { |
| 11100 | return div_attr->int_value() == 1; |
| 11101 | } |
| 11102 | |
| 11103 | // Merge object attributes from input file called NAME with those of the |
| 11104 | // output. The input object attributes are in the object pointed by PASD. |
| 11105 | |
| 11106 | template<bool big_endian> |
| 11107 | void |
| 11108 | Target_arm<big_endian>::merge_object_attributes( |
| 11109 | const char* name, |
| 11110 | const Attributes_section_data* pasd) |
| 11111 | { |
| 11112 | // Return if there is no attributes section data. |
| 11113 | if (pasd == NULL) |
| 11114 | return; |
| 11115 | |
| 11116 | // If output has no object attributes, just copy. |
| 11117 | const int vendor = Object_attribute::OBJ_ATTR_PROC; |
| 11118 | if (this->attributes_section_data_ == NULL) |
| 11119 | { |
| 11120 | this->attributes_section_data_ = new Attributes_section_data(*pasd); |
| 11121 | Object_attribute* out_attr = |
| 11122 | this->attributes_section_data_->known_attributes(vendor); |
| 11123 | |
| 11124 | // We do not output objects with Tag_MPextension_use_legacy - we move |
| 11125 | // the attribute's value to Tag_MPextension_use. */ |
| 11126 | if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0) |
| 11127 | { |
| 11128 | if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0 |
| 11129 | && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() |
| 11130 | != out_attr[elfcpp::Tag_MPextension_use].int_value()) |
| 11131 | { |
| 11132 | gold_error(_("%s has both the current and legacy " |
| 11133 | "Tag_MPextension_use attributes"), |
| 11134 | name); |
| 11135 | } |
| 11136 | |
| 11137 | out_attr[elfcpp::Tag_MPextension_use] = |
| 11138 | out_attr[elfcpp::Tag_MPextension_use_legacy]; |
| 11139 | out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0); |
| 11140 | out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0); |
| 11141 | } |
| 11142 | |
| 11143 | return; |
| 11144 | } |
| 11145 | |
| 11146 | const Object_attribute* in_attr = pasd->known_attributes(vendor); |
| 11147 | Object_attribute* out_attr = |
| 11148 | this->attributes_section_data_->known_attributes(vendor); |
| 11149 | |
| 11150 | // This needs to happen before Tag_ABI_FP_number_model is merged. */ |
| 11151 | if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value() |
| 11152 | != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) |
| 11153 | { |
| 11154 | // Ignore mismatches if the object doesn't use floating point. */ |
| 11155 | if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() |
| 11156 | == elfcpp::AEABI_FP_number_model_none |
| 11157 | || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() |
| 11158 | != elfcpp::AEABI_FP_number_model_none |
| 11159 | && out_attr[elfcpp::Tag_ABI_VFP_args].int_value() |
| 11160 | == elfcpp::AEABI_VFP_args_compatible)) |
| 11161 | out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( |
| 11162 | in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); |
| 11163 | else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() |
| 11164 | != elfcpp::AEABI_FP_number_model_none |
| 11165 | && in_attr[elfcpp::Tag_ABI_VFP_args].int_value() |
| 11166 | != elfcpp::AEABI_VFP_args_compatible |
| 11167 | && parameters->options().warn_mismatch()) |
| 11168 | gold_error(_("%s uses VFP register arguments, output does not"), |
| 11169 | name); |
| 11170 | } |
| 11171 | |
| 11172 | for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i) |
| 11173 | { |
| 11174 | // Merge this attribute with existing attributes. |
| 11175 | switch (i) |
| 11176 | { |
| 11177 | case elfcpp::Tag_CPU_raw_name: |
| 11178 | case elfcpp::Tag_CPU_name: |
| 11179 | // These are merged after Tag_CPU_arch. |
| 11180 | break; |
| 11181 | |
| 11182 | case elfcpp::Tag_ABI_optimization_goals: |
| 11183 | case elfcpp::Tag_ABI_FP_optimization_goals: |
| 11184 | // Use the first value seen. |
| 11185 | break; |
| 11186 | |
| 11187 | case elfcpp::Tag_CPU_arch: |
| 11188 | { |
| 11189 | unsigned int saved_out_attr = out_attr->int_value(); |
| 11190 | // Merge Tag_CPU_arch and Tag_also_compatible_with. |
| 11191 | int secondary_compat = |
| 11192 | this->get_secondary_compatible_arch(pasd); |
| 11193 | int secondary_compat_out = |
| 11194 | this->get_secondary_compatible_arch( |
| 11195 | this->attributes_section_data_); |
| 11196 | out_attr[i].set_int_value( |
| 11197 | tag_cpu_arch_combine(name, out_attr[i].int_value(), |
| 11198 | &secondary_compat_out, |
| 11199 | in_attr[i].int_value(), |
| 11200 | secondary_compat)); |
| 11201 | this->set_secondary_compatible_arch(this->attributes_section_data_, |
| 11202 | secondary_compat_out); |
| 11203 | |
| 11204 | // Merge Tag_CPU_name and Tag_CPU_raw_name. |
| 11205 | if (out_attr[i].int_value() == saved_out_attr) |
| 11206 | ; // Leave the names alone. |
| 11207 | else if (out_attr[i].int_value() == in_attr[i].int_value()) |
| 11208 | { |
| 11209 | // The output architecture has been changed to match the |
| 11210 | // input architecture. Use the input names. |
| 11211 | out_attr[elfcpp::Tag_CPU_name].set_string_value( |
| 11212 | in_attr[elfcpp::Tag_CPU_name].string_value()); |
| 11213 | out_attr[elfcpp::Tag_CPU_raw_name].set_string_value( |
| 11214 | in_attr[elfcpp::Tag_CPU_raw_name].string_value()); |
| 11215 | } |
| 11216 | else |
| 11217 | { |
| 11218 | out_attr[elfcpp::Tag_CPU_name].set_string_value(""); |
| 11219 | out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(""); |
| 11220 | } |
| 11221 | |
| 11222 | // If we still don't have a value for Tag_CPU_name, |
| 11223 | // make one up now. Tag_CPU_raw_name remains blank. |
| 11224 | if (out_attr[elfcpp::Tag_CPU_name].string_value() == "") |
| 11225 | { |
| 11226 | const std::string cpu_name = |
| 11227 | this->tag_cpu_name_value(out_attr[i].int_value()); |
| 11228 | // FIXME: If we see an unknown CPU, this will be set |
| 11229 | // to "<unknown CPU n>", where n is the attribute value. |
| 11230 | // This is different from BFD, which leaves the name alone. |
| 11231 | out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name); |
| 11232 | } |
| 11233 | } |
| 11234 | break; |
| 11235 | |
| 11236 | case elfcpp::Tag_ARM_ISA_use: |
| 11237 | case elfcpp::Tag_THUMB_ISA_use: |
| 11238 | case elfcpp::Tag_WMMX_arch: |
| 11239 | case elfcpp::Tag_Advanced_SIMD_arch: |
| 11240 | // ??? Do Advanced_SIMD (NEON) and WMMX conflict? |
| 11241 | case elfcpp::Tag_ABI_FP_rounding: |
| 11242 | case elfcpp::Tag_ABI_FP_exceptions: |
| 11243 | case elfcpp::Tag_ABI_FP_user_exceptions: |
| 11244 | case elfcpp::Tag_ABI_FP_number_model: |
| 11245 | case elfcpp::Tag_VFP_HP_extension: |
| 11246 | case elfcpp::Tag_CPU_unaligned_access: |
| 11247 | case elfcpp::Tag_T2EE_use: |
| 11248 | case elfcpp::Tag_Virtualization_use: |
| 11249 | case elfcpp::Tag_MPextension_use: |
| 11250 | // Use the largest value specified. |
| 11251 | if (in_attr[i].int_value() > out_attr[i].int_value()) |
| 11252 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11253 | break; |
| 11254 | |
| 11255 | case elfcpp::Tag_ABI_align8_preserved: |
| 11256 | case elfcpp::Tag_ABI_PCS_RO_data: |
| 11257 | // Use the smallest value specified. |
| 11258 | if (in_attr[i].int_value() < out_attr[i].int_value()) |
| 11259 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11260 | break; |
| 11261 | |
| 11262 | case elfcpp::Tag_ABI_align8_needed: |
| 11263 | if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0) |
| 11264 | && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0 |
| 11265 | || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value() |
| 11266 | == 0))) |
| 11267 | { |
| 11268 | // This error message should be enabled once all non-conforming |
| 11269 | // binaries in the toolchain have had the attributes set |
| 11270 | // properly. |
| 11271 | // gold_error(_("output 8-byte data alignment conflicts with %s"), |
| 11272 | // name); |
| 11273 | } |
| 11274 | // Fall through. |
| 11275 | case elfcpp::Tag_ABI_FP_denormal: |
| 11276 | case elfcpp::Tag_ABI_PCS_GOT_use: |
| 11277 | { |
| 11278 | // These tags have 0 = don't care, 1 = strong requirement, |
| 11279 | // 2 = weak requirement. |
| 11280 | static const int order_021[3] = {0, 2, 1}; |
| 11281 | |
| 11282 | // Use the "greatest" from the sequence 0, 2, 1, or the largest |
| 11283 | // value if greater than 2 (for future-proofing). |
| 11284 | if ((in_attr[i].int_value() > 2 |
| 11285 | && in_attr[i].int_value() > out_attr[i].int_value()) |
| 11286 | || (in_attr[i].int_value() <= 2 |
| 11287 | && out_attr[i].int_value() <= 2 |
| 11288 | && (order_021[in_attr[i].int_value()] |
| 11289 | > order_021[out_attr[i].int_value()]))) |
| 11290 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11291 | } |
| 11292 | break; |
| 11293 | |
| 11294 | case elfcpp::Tag_CPU_arch_profile: |
| 11295 | if (out_attr[i].int_value() != in_attr[i].int_value()) |
| 11296 | { |
| 11297 | // 0 will merge with anything. |
| 11298 | // 'A' and 'S' merge to 'A'. |
| 11299 | // 'R' and 'S' merge to 'R'. |
| 11300 | // 'M' and 'A|R|S' is an error. |
| 11301 | if (out_attr[i].int_value() == 0 |
| 11302 | || (out_attr[i].int_value() == 'S' |
| 11303 | && (in_attr[i].int_value() == 'A' |
| 11304 | || in_attr[i].int_value() == 'R'))) |
| 11305 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11306 | else if (in_attr[i].int_value() == 0 |
| 11307 | || (in_attr[i].int_value() == 'S' |
| 11308 | && (out_attr[i].int_value() == 'A' |
| 11309 | || out_attr[i].int_value() == 'R'))) |
| 11310 | ; // Do nothing. |
| 11311 | else if (parameters->options().warn_mismatch()) |
| 11312 | { |
| 11313 | gold_error |
| 11314 | (_("conflicting architecture profiles %c/%c"), |
| 11315 | in_attr[i].int_value() ? in_attr[i].int_value() : '0', |
| 11316 | out_attr[i].int_value() ? out_attr[i].int_value() : '0'); |
| 11317 | } |
| 11318 | } |
| 11319 | break; |
| 11320 | case elfcpp::Tag_VFP_arch: |
| 11321 | { |
| 11322 | static const struct |
| 11323 | { |
| 11324 | int ver; |
| 11325 | int regs; |
| 11326 | } vfp_versions[7] = |
| 11327 | { |
| 11328 | {0, 0}, |
| 11329 | {1, 16}, |
| 11330 | {2, 16}, |
| 11331 | {3, 32}, |
| 11332 | {3, 16}, |
| 11333 | {4, 32}, |
| 11334 | {4, 16} |
| 11335 | }; |
| 11336 | |
| 11337 | // Values greater than 6 aren't defined, so just pick the |
| 11338 | // biggest. |
| 11339 | if (in_attr[i].int_value() > 6 |
| 11340 | && in_attr[i].int_value() > out_attr[i].int_value()) |
| 11341 | { |
| 11342 | *out_attr = *in_attr; |
| 11343 | break; |
| 11344 | } |
| 11345 | // The output uses the superset of input features |
| 11346 | // (ISA version) and registers. |
| 11347 | int ver = std::max(vfp_versions[in_attr[i].int_value()].ver, |
| 11348 | vfp_versions[out_attr[i].int_value()].ver); |
| 11349 | int regs = std::max(vfp_versions[in_attr[i].int_value()].regs, |
| 11350 | vfp_versions[out_attr[i].int_value()].regs); |
| 11351 | // This assumes all possible supersets are also a valid |
| 11352 | // options. |
| 11353 | int newval; |
| 11354 | for (newval = 6; newval > 0; newval--) |
| 11355 | { |
| 11356 | if (regs == vfp_versions[newval].regs |
| 11357 | && ver == vfp_versions[newval].ver) |
| 11358 | break; |
| 11359 | } |
| 11360 | out_attr[i].set_int_value(newval); |
| 11361 | } |
| 11362 | break; |
| 11363 | case elfcpp::Tag_PCS_config: |
| 11364 | if (out_attr[i].int_value() == 0) |
| 11365 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11366 | else if (in_attr[i].int_value() != 0 |
| 11367 | && out_attr[i].int_value() != 0 |
| 11368 | && parameters->options().warn_mismatch()) |
| 11369 | { |
| 11370 | // It's sometimes ok to mix different configs, so this is only |
| 11371 | // a warning. |
| 11372 | gold_warning(_("%s: conflicting platform configuration"), name); |
| 11373 | } |
| 11374 | break; |
| 11375 | case elfcpp::Tag_ABI_PCS_R9_use: |
| 11376 | if (in_attr[i].int_value() != out_attr[i].int_value() |
| 11377 | && out_attr[i].int_value() != elfcpp::AEABI_R9_unused |
| 11378 | && in_attr[i].int_value() != elfcpp::AEABI_R9_unused |
| 11379 | && parameters->options().warn_mismatch()) |
| 11380 | { |
| 11381 | gold_error(_("%s: conflicting use of R9"), name); |
| 11382 | } |
| 11383 | if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused) |
| 11384 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11385 | break; |
| 11386 | case elfcpp::Tag_ABI_PCS_RW_data: |
| 11387 | if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel |
| 11388 | && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() |
| 11389 | != elfcpp::AEABI_R9_SB) |
| 11390 | && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() |
| 11391 | != elfcpp::AEABI_R9_unused) |
| 11392 | && parameters->options().warn_mismatch()) |
| 11393 | { |
| 11394 | gold_error(_("%s: SB relative addressing conflicts with use " |
| 11395 | "of R9"), |
| 11396 | name); |
| 11397 | } |
| 11398 | // Use the smallest value specified. |
| 11399 | if (in_attr[i].int_value() < out_attr[i].int_value()) |
| 11400 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11401 | break; |
| 11402 | case elfcpp::Tag_ABI_PCS_wchar_t: |
| 11403 | if (out_attr[i].int_value() |
| 11404 | && in_attr[i].int_value() |
| 11405 | && out_attr[i].int_value() != in_attr[i].int_value() |
| 11406 | && parameters->options().warn_mismatch() |
| 11407 | && parameters->options().wchar_size_warning()) |
| 11408 | { |
| 11409 | gold_warning(_("%s uses %u-byte wchar_t yet the output is to " |
| 11410 | "use %u-byte wchar_t; use of wchar_t values " |
| 11411 | "across objects may fail"), |
| 11412 | name, in_attr[i].int_value(), |
| 11413 | out_attr[i].int_value()); |
| 11414 | } |
| 11415 | else if (in_attr[i].int_value() && !out_attr[i].int_value()) |
| 11416 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11417 | break; |
| 11418 | case elfcpp::Tag_ABI_enum_size: |
| 11419 | if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused) |
| 11420 | { |
| 11421 | if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused |
| 11422 | || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide) |
| 11423 | { |
| 11424 | // The existing object is compatible with anything. |
| 11425 | // Use whatever requirements the new object has. |
| 11426 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11427 | } |
| 11428 | else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide |
| 11429 | && out_attr[i].int_value() != in_attr[i].int_value() |
| 11430 | && parameters->options().warn_mismatch() |
| 11431 | && parameters->options().enum_size_warning()) |
| 11432 | { |
| 11433 | unsigned int in_value = in_attr[i].int_value(); |
| 11434 | unsigned int out_value = out_attr[i].int_value(); |
| 11435 | gold_warning(_("%s uses %s enums yet the output is to use " |
| 11436 | "%s enums; use of enum values across objects " |
| 11437 | "may fail"), |
| 11438 | name, |
| 11439 | this->aeabi_enum_name(in_value).c_str(), |
| 11440 | this->aeabi_enum_name(out_value).c_str()); |
| 11441 | } |
| 11442 | } |
| 11443 | break; |
| 11444 | case elfcpp::Tag_ABI_VFP_args: |
| 11445 | // Already done. |
| 11446 | break; |
| 11447 | case elfcpp::Tag_ABI_WMMX_args: |
| 11448 | if (in_attr[i].int_value() != out_attr[i].int_value() |
| 11449 | && parameters->options().warn_mismatch()) |
| 11450 | { |
| 11451 | gold_error(_("%s uses iWMMXt register arguments, output does " |
| 11452 | "not"), |
| 11453 | name); |
| 11454 | } |
| 11455 | break; |
| 11456 | case Object_attribute::Tag_compatibility: |
| 11457 | // Merged in target-independent code. |
| 11458 | break; |
| 11459 | case elfcpp::Tag_ABI_HardFP_use: |
| 11460 | // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). |
| 11461 | if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2) |
| 11462 | || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1)) |
| 11463 | out_attr[i].set_int_value(3); |
| 11464 | else if (in_attr[i].int_value() > out_attr[i].int_value()) |
| 11465 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11466 | break; |
| 11467 | case elfcpp::Tag_ABI_FP_16bit_format: |
| 11468 | if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) |
| 11469 | { |
| 11470 | if (in_attr[i].int_value() != out_attr[i].int_value() |
| 11471 | && parameters->options().warn_mismatch()) |
| 11472 | gold_error(_("fp16 format mismatch between %s and output"), |
| 11473 | name); |
| 11474 | } |
| 11475 | if (in_attr[i].int_value() != 0) |
| 11476 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11477 | break; |
| 11478 | |
| 11479 | case elfcpp::Tag_DIV_use: |
| 11480 | { |
| 11481 | // A value of zero on input means that the divide |
| 11482 | // instruction may be used if available in the base |
| 11483 | // architecture as specified via Tag_CPU_arch and |
| 11484 | // Tag_CPU_arch_profile. A value of 1 means that the user |
| 11485 | // did not want divide instructions. A value of 2 |
| 11486 | // explicitly means that divide instructions were allowed |
| 11487 | // in ARM and Thumb state. |
| 11488 | int arch = this-> |
| 11489 | get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)-> |
| 11490 | int_value(); |
| 11491 | int profile = this-> |
| 11492 | get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)-> |
| 11493 | int_value(); |
| 11494 | if (in_attr[i].int_value() == out_attr[i].int_value()) |
| 11495 | { |
| 11496 | // Do nothing. |
| 11497 | } |
| 11498 | else if (attributes_forbid_div(&in_attr[i]) |
| 11499 | && !attributes_accept_div(arch, profile, &out_attr[i])) |
| 11500 | out_attr[i].set_int_value(1); |
| 11501 | else if (attributes_forbid_div(&out_attr[i]) |
| 11502 | && attributes_accept_div(arch, profile, &in_attr[i])) |
| 11503 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11504 | else if (in_attr[i].int_value() == 2) |
| 11505 | out_attr[i].set_int_value(in_attr[i].int_value()); |
| 11506 | } |
| 11507 | break; |
| 11508 | |
| 11509 | case elfcpp::Tag_MPextension_use_legacy: |
| 11510 | // We don't output objects with Tag_MPextension_use_legacy - we |
| 11511 | // move the value to Tag_MPextension_use. |
| 11512 | if (in_attr[i].int_value() != 0 |
| 11513 | && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0) |
| 11514 | { |
| 11515 | if (in_attr[elfcpp::Tag_MPextension_use].int_value() |
| 11516 | != in_attr[i].int_value()) |
| 11517 | { |
| 11518 | gold_error(_("%s has has both the current and legacy " |
| 11519 | "Tag_MPextension_use attributes"), |
| 11520 | name); |
| 11521 | } |
| 11522 | } |
| 11523 | |
| 11524 | if (in_attr[i].int_value() |
| 11525 | > out_attr[elfcpp::Tag_MPextension_use].int_value()) |
| 11526 | out_attr[elfcpp::Tag_MPextension_use] = in_attr[i]; |
| 11527 | |
| 11528 | break; |
| 11529 | |
| 11530 | case elfcpp::Tag_nodefaults: |
| 11531 | // This tag is set if it exists, but the value is unused (and is |
| 11532 | // typically zero). We don't actually need to do anything here - |
| 11533 | // the merge happens automatically when the type flags are merged |
| 11534 | // below. |
| 11535 | break; |
| 11536 | case elfcpp::Tag_also_compatible_with: |
| 11537 | // Already done in Tag_CPU_arch. |
| 11538 | break; |
| 11539 | case elfcpp::Tag_conformance: |
| 11540 | // Keep the attribute if it matches. Throw it away otherwise. |
| 11541 | // No attribute means no claim to conform. |
| 11542 | if (in_attr[i].string_value() != out_attr[i].string_value()) |
| 11543 | out_attr[i].set_string_value(""); |
| 11544 | break; |
| 11545 | |
| 11546 | default: |
| 11547 | { |
| 11548 | const char* err_object = NULL; |
| 11549 | |
| 11550 | // The "known_obj_attributes" table does contain some undefined |
| 11551 | // attributes. Ensure that there are unused. |
| 11552 | if (out_attr[i].int_value() != 0 |
| 11553 | || out_attr[i].string_value() != "") |
| 11554 | err_object = "output"; |
| 11555 | else if (in_attr[i].int_value() != 0 |
| 11556 | || in_attr[i].string_value() != "") |
| 11557 | err_object = name; |
| 11558 | |
| 11559 | if (err_object != NULL |
| 11560 | && parameters->options().warn_mismatch()) |
| 11561 | { |
| 11562 | // Attribute numbers >=64 (mod 128) can be safely ignored. |
| 11563 | if ((i & 127) < 64) |
| 11564 | gold_error(_("%s: unknown mandatory EABI object attribute " |
| 11565 | "%d"), |
| 11566 | err_object, i); |
| 11567 | else |
| 11568 | gold_warning(_("%s: unknown EABI object attribute %d"), |
| 11569 | err_object, i); |
| 11570 | } |
| 11571 | |
| 11572 | // Only pass on attributes that match in both inputs. |
| 11573 | if (!in_attr[i].matches(out_attr[i])) |
| 11574 | { |
| 11575 | out_attr[i].set_int_value(0); |
| 11576 | out_attr[i].set_string_value(""); |
| 11577 | } |
| 11578 | } |
| 11579 | } |
| 11580 | |
| 11581 | // If out_attr was copied from in_attr then it won't have a type yet. |
| 11582 | if (in_attr[i].type() && !out_attr[i].type()) |
| 11583 | out_attr[i].set_type(in_attr[i].type()); |
| 11584 | } |
| 11585 | |
| 11586 | // Merge Tag_compatibility attributes and any common GNU ones. |
| 11587 | this->attributes_section_data_->merge(name, pasd); |
| 11588 | |
| 11589 | // Check for any attributes not known on ARM. |
| 11590 | typedef Vendor_object_attributes::Other_attributes Other_attributes; |
| 11591 | const Other_attributes* in_other_attributes = pasd->other_attributes(vendor); |
| 11592 | Other_attributes::const_iterator in_iter = in_other_attributes->begin(); |
| 11593 | Other_attributes* out_other_attributes = |
| 11594 | this->attributes_section_data_->other_attributes(vendor); |
| 11595 | Other_attributes::iterator out_iter = out_other_attributes->begin(); |
| 11596 | |
| 11597 | while (in_iter != in_other_attributes->end() |
| 11598 | || out_iter != out_other_attributes->end()) |
| 11599 | { |
| 11600 | const char* err_object = NULL; |
| 11601 | int err_tag = 0; |
| 11602 | |
| 11603 | // The tags for each list are in numerical order. |
| 11604 | // If the tags are equal, then merge. |
| 11605 | if (out_iter != out_other_attributes->end() |
| 11606 | && (in_iter == in_other_attributes->end() |
| 11607 | || in_iter->first > out_iter->first)) |
| 11608 | { |
| 11609 | // This attribute only exists in output. We can't merge, and we |
| 11610 | // don't know what the tag means, so delete it. |
| 11611 | err_object = "output"; |
| 11612 | err_tag = out_iter->first; |
| 11613 | int saved_tag = out_iter->first; |
| 11614 | delete out_iter->second; |
| 11615 | out_other_attributes->erase(out_iter); |
| 11616 | out_iter = out_other_attributes->upper_bound(saved_tag); |
| 11617 | } |
| 11618 | else if (in_iter != in_other_attributes->end() |
| 11619 | && (out_iter != out_other_attributes->end() |
| 11620 | || in_iter->first < out_iter->first)) |
| 11621 | { |
| 11622 | // This attribute only exists in input. We can't merge, and we |
| 11623 | // don't know what the tag means, so ignore it. |
| 11624 | err_object = name; |
| 11625 | err_tag = in_iter->first; |
| 11626 | ++in_iter; |
| 11627 | } |
| 11628 | else // The tags are equal. |
| 11629 | { |
| 11630 | // As present, all attributes in the list are unknown, and |
| 11631 | // therefore can't be merged meaningfully. |
| 11632 | err_object = "output"; |
| 11633 | err_tag = out_iter->first; |
| 11634 | |
| 11635 | // Only pass on attributes that match in both inputs. |
| 11636 | if (!in_iter->second->matches(*(out_iter->second))) |
| 11637 | { |
| 11638 | // No match. Delete the attribute. |
| 11639 | int saved_tag = out_iter->first; |
| 11640 | delete out_iter->second; |
| 11641 | out_other_attributes->erase(out_iter); |
| 11642 | out_iter = out_other_attributes->upper_bound(saved_tag); |
| 11643 | } |
| 11644 | else |
| 11645 | { |
| 11646 | // Matched. Keep the attribute and move to the next. |
| 11647 | ++out_iter; |
| 11648 | ++in_iter; |
| 11649 | } |
| 11650 | } |
| 11651 | |
| 11652 | if (err_object && parameters->options().warn_mismatch()) |
| 11653 | { |
| 11654 | // Attribute numbers >=64 (mod 128) can be safely ignored. */ |
| 11655 | if ((err_tag & 127) < 64) |
| 11656 | { |
| 11657 | gold_error(_("%s: unknown mandatory EABI object attribute %d"), |
| 11658 | err_object, err_tag); |
| 11659 | } |
| 11660 | else |
| 11661 | { |
| 11662 | gold_warning(_("%s: unknown EABI object attribute %d"), |
| 11663 | err_object, err_tag); |
| 11664 | } |
| 11665 | } |
| 11666 | } |
| 11667 | } |
| 11668 | |
| 11669 | // Stub-generation methods for Target_arm. |
| 11670 | |
| 11671 | // Make a new Arm_input_section object. |
| 11672 | |
| 11673 | template<bool big_endian> |
| 11674 | Arm_input_section<big_endian>* |
| 11675 | Target_arm<big_endian>::new_arm_input_section( |
| 11676 | Relobj* relobj, |
| 11677 | unsigned int shndx) |
| 11678 | { |
| 11679 | Section_id sid(relobj, shndx); |
| 11680 | |
| 11681 | Arm_input_section<big_endian>* arm_input_section = |
| 11682 | new Arm_input_section<big_endian>(relobj, shndx); |
| 11683 | arm_input_section->init(); |
| 11684 | |
| 11685 | // Register new Arm_input_section in map for look-up. |
| 11686 | std::pair<typename Arm_input_section_map::iterator, bool> ins = |
| 11687 | this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section)); |
| 11688 | |
| 11689 | // Make sure that it we have not created another Arm_input_section |
| 11690 | // for this input section already. |
| 11691 | gold_assert(ins.second); |
| 11692 | |
| 11693 | return arm_input_section; |
| 11694 | } |
| 11695 | |
| 11696 | // Find the Arm_input_section object corresponding to the SHNDX-th input |
| 11697 | // section of RELOBJ. |
| 11698 | |
| 11699 | template<bool big_endian> |
| 11700 | Arm_input_section<big_endian>* |
| 11701 | Target_arm<big_endian>::find_arm_input_section( |
| 11702 | Relobj* relobj, |
| 11703 | unsigned int shndx) const |
| 11704 | { |
| 11705 | Section_id sid(relobj, shndx); |
| 11706 | typename Arm_input_section_map::const_iterator p = |
| 11707 | this->arm_input_section_map_.find(sid); |
| 11708 | return (p != this->arm_input_section_map_.end()) ? p->second : NULL; |
| 11709 | } |
| 11710 | |
| 11711 | // Make a new stub table. |
| 11712 | |
| 11713 | template<bool big_endian> |
| 11714 | Stub_table<big_endian>* |
| 11715 | Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner) |
| 11716 | { |
| 11717 | Stub_table<big_endian>* stub_table = |
| 11718 | new Stub_table<big_endian>(owner); |
| 11719 | this->stub_tables_.push_back(stub_table); |
| 11720 | |
| 11721 | stub_table->set_address(owner->address() + owner->data_size()); |
| 11722 | stub_table->set_file_offset(owner->offset() + owner->data_size()); |
| 11723 | stub_table->finalize_data_size(); |
| 11724 | |
| 11725 | return stub_table; |
| 11726 | } |
| 11727 | |
| 11728 | // Scan a relocation for stub generation. |
| 11729 | |
| 11730 | template<bool big_endian> |
| 11731 | void |
| 11732 | Target_arm<big_endian>::scan_reloc_for_stub( |
| 11733 | const Relocate_info<32, big_endian>* relinfo, |
| 11734 | unsigned int r_type, |
| 11735 | const Sized_symbol<32>* gsym, |
| 11736 | unsigned int r_sym, |
| 11737 | const Symbol_value<32>* psymval, |
| 11738 | elfcpp::Elf_types<32>::Elf_Swxword addend, |
| 11739 | Arm_address address) |
| 11740 | { |
| 11741 | const Arm_relobj<big_endian>* arm_relobj = |
| 11742 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); |
| 11743 | |
| 11744 | bool target_is_thumb; |
| 11745 | Symbol_value<32> symval; |
| 11746 | if (gsym != NULL) |
| 11747 | { |
| 11748 | // This is a global symbol. Determine if we use PLT and if the |
| 11749 | // final target is THUMB. |
| 11750 | if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) |
| 11751 | { |
| 11752 | // This uses a PLT, change the symbol value. |
| 11753 | symval.set_output_value(this->plt_address_for_global(gsym)); |
| 11754 | psymval = &symval; |
| 11755 | target_is_thumb = false; |
| 11756 | } |
| 11757 | else if (gsym->is_undefined()) |
| 11758 | // There is no need to generate a stub symbol is undefined. |
| 11759 | return; |
| 11760 | else |
| 11761 | { |
| 11762 | target_is_thumb = |
| 11763 | ((gsym->type() == elfcpp::STT_ARM_TFUNC) |
| 11764 | || (gsym->type() == elfcpp::STT_FUNC |
| 11765 | && !gsym->is_undefined() |
| 11766 | && ((psymval->value(arm_relobj, 0) & 1) != 0))); |
| 11767 | } |
| 11768 | } |
| 11769 | else |
| 11770 | { |
| 11771 | // This is a local symbol. Determine if the final target is THUMB. |
| 11772 | target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym); |
| 11773 | } |
| 11774 | |
| 11775 | // Strip LSB if this points to a THUMB target. |
| 11776 | const Arm_reloc_property* reloc_property = |
| 11777 | arm_reloc_property_table->get_implemented_static_reloc_property(r_type); |
| 11778 | gold_assert(reloc_property != NULL); |
| 11779 | if (target_is_thumb |
| 11780 | && reloc_property->uses_thumb_bit() |
| 11781 | && ((psymval->value(arm_relobj, 0) & 1) != 0)) |
| 11782 | { |
| 11783 | Arm_address stripped_value = |
| 11784 | psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1); |
| 11785 | symval.set_output_value(stripped_value); |
| 11786 | psymval = &symval; |
| 11787 | } |
| 11788 | |
| 11789 | // Get the symbol value. |
| 11790 | Symbol_value<32>::Value value = psymval->value(arm_relobj, 0); |
| 11791 | |
| 11792 | // Owing to pipelining, the PC relative branches below actually skip |
| 11793 | // two instructions when the branch offset is 0. |
| 11794 | Arm_address destination; |
| 11795 | switch (r_type) |
| 11796 | { |
| 11797 | case elfcpp::R_ARM_CALL: |
| 11798 | case elfcpp::R_ARM_JUMP24: |
| 11799 | case elfcpp::R_ARM_PLT32: |
| 11800 | // ARM branches. |
| 11801 | destination = value + addend + 8; |
| 11802 | break; |
| 11803 | case elfcpp::R_ARM_THM_CALL: |
| 11804 | case elfcpp::R_ARM_THM_XPC22: |
| 11805 | case elfcpp::R_ARM_THM_JUMP24: |
| 11806 | case elfcpp::R_ARM_THM_JUMP19: |
| 11807 | // THUMB branches. |
| 11808 | destination = value + addend + 4; |
| 11809 | break; |
| 11810 | default: |
| 11811 | gold_unreachable(); |
| 11812 | } |
| 11813 | |
| 11814 | Reloc_stub* stub = NULL; |
| 11815 | Stub_type stub_type = |
| 11816 | Reloc_stub::stub_type_for_reloc(r_type, address, destination, |
| 11817 | target_is_thumb); |
| 11818 | if (stub_type != arm_stub_none) |
| 11819 | { |
| 11820 | // Try looking up an existing stub from a stub table. |
| 11821 | Stub_table<big_endian>* stub_table = |
| 11822 | arm_relobj->stub_table(relinfo->data_shndx); |
| 11823 | gold_assert(stub_table != NULL); |
| 11824 | |
| 11825 | // Locate stub by destination. |
| 11826 | Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend); |
| 11827 | |
| 11828 | // Create a stub if there is not one already |
| 11829 | stub = stub_table->find_reloc_stub(stub_key); |
| 11830 | if (stub == NULL) |
| 11831 | { |
| 11832 | // create a new stub and add it to stub table. |
| 11833 | stub = this->stub_factory().make_reloc_stub(stub_type); |
| 11834 | stub_table->add_reloc_stub(stub, stub_key); |
| 11835 | } |
| 11836 | |
| 11837 | // Record the destination address. |
| 11838 | stub->set_destination_address(destination |
| 11839 | | (target_is_thumb ? 1 : 0)); |
| 11840 | } |
| 11841 | |
| 11842 | // For Cortex-A8, we need to record a relocation at 4K page boundary. |
| 11843 | if (this->fix_cortex_a8_ |
| 11844 | && (r_type == elfcpp::R_ARM_THM_JUMP24 |
| 11845 | || r_type == elfcpp::R_ARM_THM_JUMP19 |
| 11846 | || r_type == elfcpp::R_ARM_THM_CALL |
| 11847 | || r_type == elfcpp::R_ARM_THM_XPC22) |
| 11848 | && (address & 0xfffU) == 0xffeU) |
| 11849 | { |
| 11850 | // Found a candidate. Note we haven't checked the destination is |
| 11851 | // within 4K here: if we do so (and don't create a record) we can't |
| 11852 | // tell that a branch should have been relocated when scanning later. |
| 11853 | this->cortex_a8_relocs_info_[address] = |
| 11854 | new Cortex_a8_reloc(stub, r_type, |
| 11855 | destination | (target_is_thumb ? 1 : 0)); |
| 11856 | } |
| 11857 | } |
| 11858 | |
| 11859 | // This function scans a relocation sections for stub generation. |
| 11860 | // The template parameter Relocate must be a class type which provides |
| 11861 | // a single function, relocate(), which implements the machine |
| 11862 | // specific part of a relocation. |
| 11863 | |
| 11864 | // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type: |
| 11865 | // SHT_REL or SHT_RELA. |
| 11866 | |
| 11867 | // PRELOCS points to the relocation data. RELOC_COUNT is the number |
| 11868 | // of relocs. OUTPUT_SECTION is the output section. |
| 11869 | // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be |
| 11870 | // mapped to output offsets. |
| 11871 | |
| 11872 | // VIEW is the section data, VIEW_ADDRESS is its memory address, and |
| 11873 | // VIEW_SIZE is the size. These refer to the input section, unless |
| 11874 | // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to |
| 11875 | // the output section. |
| 11876 | |
| 11877 | template<bool big_endian> |
| 11878 | template<int sh_type> |
| 11879 | void inline |
| 11880 | Target_arm<big_endian>::scan_reloc_section_for_stubs( |
| 11881 | const Relocate_info<32, big_endian>* relinfo, |
| 11882 | const unsigned char* prelocs, |
| 11883 | size_t reloc_count, |
| 11884 | Output_section* output_section, |
| 11885 | bool needs_special_offset_handling, |
| 11886 | const unsigned char* view, |
| 11887 | elfcpp::Elf_types<32>::Elf_Addr view_address, |
| 11888 | section_size_type) |
| 11889 | { |
| 11890 | typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype; |
| 11891 | const int reloc_size = |
| 11892 | Reloc_types<sh_type, 32, big_endian>::reloc_size; |
| 11893 | |
| 11894 | Arm_relobj<big_endian>* arm_object = |
| 11895 | Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); |
| 11896 | unsigned int local_count = arm_object->local_symbol_count(); |
| 11897 | |
| 11898 | gold::Default_comdat_behavior default_comdat_behavior; |
| 11899 | Comdat_behavior comdat_behavior = CB_UNDETERMINED; |
| 11900 | |
| 11901 | for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) |
| 11902 | { |
| 11903 | Reltype reloc(prelocs); |
| 11904 | |
| 11905 | typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); |
| 11906 | unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); |
| 11907 | unsigned int r_type = elfcpp::elf_r_type<32>(r_info); |
| 11908 | |
| 11909 | r_type = this->get_real_reloc_type(r_type); |
| 11910 | |
| 11911 | // Only a few relocation types need stubs. |
| 11912 | if ((r_type != elfcpp::R_ARM_CALL) |
| 11913 | && (r_type != elfcpp::R_ARM_JUMP24) |
| 11914 | && (r_type != elfcpp::R_ARM_PLT32) |
| 11915 | && (r_type != elfcpp::R_ARM_THM_CALL) |
| 11916 | && (r_type != elfcpp::R_ARM_THM_XPC22) |
| 11917 | && (r_type != elfcpp::R_ARM_THM_JUMP24) |
| 11918 | && (r_type != elfcpp::R_ARM_THM_JUMP19) |
| 11919 | && (r_type != elfcpp::R_ARM_V4BX)) |
| 11920 | continue; |
| 11921 | |
| 11922 | section_offset_type offset = |
| 11923 | convert_to_section_size_type(reloc.get_r_offset()); |
| 11924 | |
| 11925 | if (needs_special_offset_handling) |
| 11926 | { |
| 11927 | offset = output_section->output_offset(relinfo->object, |
| 11928 | relinfo->data_shndx, |
| 11929 | offset); |
| 11930 | if (offset == -1) |
| 11931 | continue; |
| 11932 | } |
| 11933 | |
| 11934 | // Create a v4bx stub if --fix-v4bx-interworking is used. |
| 11935 | if (r_type == elfcpp::R_ARM_V4BX) |
| 11936 | { |
| 11937 | if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING) |
| 11938 | { |
| 11939 | // Get the BX instruction. |
| 11940 | typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; |
| 11941 | const Valtype* wv = |
| 11942 | reinterpret_cast<const Valtype*>(view + offset); |
| 11943 | elfcpp::Elf_types<32>::Elf_Swxword insn = |
| 11944 | elfcpp::Swap<32, big_endian>::readval(wv); |
| 11945 | const uint32_t reg = (insn & 0xf); |
| 11946 | |
| 11947 | if (reg < 0xf) |
| 11948 | { |
| 11949 | // Try looking up an existing stub from a stub table. |
| 11950 | Stub_table<big_endian>* stub_table = |
| 11951 | arm_object->stub_table(relinfo->data_shndx); |
| 11952 | gold_assert(stub_table != NULL); |
| 11953 | |
| 11954 | if (stub_table->find_arm_v4bx_stub(reg) == NULL) |
| 11955 | { |
| 11956 | // create a new stub and add it to stub table. |
| 11957 | Arm_v4bx_stub* stub = |
| 11958 | this->stub_factory().make_arm_v4bx_stub(reg); |
| 11959 | gold_assert(stub != NULL); |
| 11960 | stub_table->add_arm_v4bx_stub(stub); |
| 11961 | } |
| 11962 | } |
| 11963 | } |
| 11964 | continue; |
| 11965 | } |
| 11966 | |
| 11967 | // Get the addend. |
| 11968 | Stub_addend_reader<sh_type, big_endian> stub_addend_reader; |
| 11969 | elfcpp::Elf_types<32>::Elf_Swxword addend = |
| 11970 | stub_addend_reader(r_type, view + offset, reloc); |
| 11971 | |
| 11972 | const Sized_symbol<32>* sym; |
| 11973 | |
| 11974 | Symbol_value<32> symval; |
| 11975 | const Symbol_value<32> *psymval; |
| 11976 | bool is_defined_in_discarded_section; |
| 11977 | unsigned int shndx; |
| 11978 | if (r_sym < local_count) |
| 11979 | { |
| 11980 | sym = NULL; |
| 11981 | psymval = arm_object->local_symbol(r_sym); |
| 11982 | |
| 11983 | // If the local symbol belongs to a section we are discarding, |
| 11984 | // and that section is a debug section, try to find the |
| 11985 | // corresponding kept section and map this symbol to its |
| 11986 | // counterpart in the kept section. The symbol must not |
| 11987 | // correspond to a section we are folding. |
| 11988 | bool is_ordinary; |
| 11989 | shndx = psymval->input_shndx(&is_ordinary); |
| 11990 | is_defined_in_discarded_section = |
| 11991 | (is_ordinary |
| 11992 | && shndx != elfcpp::SHN_UNDEF |
| 11993 | && !arm_object->is_section_included(shndx) |
| 11994 | && !relinfo->symtab->is_section_folded(arm_object, shndx)); |
| 11995 | |
| 11996 | // We need to compute the would-be final value of this local |
| 11997 | // symbol. |
| 11998 | if (!is_defined_in_discarded_section) |
| 11999 | { |
| 12000 | typedef Sized_relobj_file<32, big_endian> ObjType; |
| 12001 | typename ObjType::Compute_final_local_value_status status = |
| 12002 | arm_object->compute_final_local_value(r_sym, psymval, &symval, |
| 12003 | relinfo->symtab); |
| 12004 | if (status == ObjType::CFLV_OK) |
| 12005 | { |
| 12006 | // Currently we cannot handle a branch to a target in |
| 12007 | // a merged section. If this is the case, issue an error |
| 12008 | // and also free the merge symbol value. |
| 12009 | if (!symval.has_output_value()) |
| 12010 | { |
| 12011 | const std::string& section_name = |
| 12012 | arm_object->section_name(shndx); |
| 12013 | arm_object->error(_("cannot handle branch to local %u " |
| 12014 | "in a merged section %s"), |
| 12015 | r_sym, section_name.c_str()); |
| 12016 | } |
| 12017 | psymval = &symval; |
| 12018 | } |
| 12019 | else |
| 12020 | { |
| 12021 | // We cannot determine the final value. |
| 12022 | continue; |
| 12023 | } |
| 12024 | } |
| 12025 | } |
| 12026 | else |
| 12027 | { |
| 12028 | const Symbol* gsym; |
| 12029 | gsym = arm_object->global_symbol(r_sym); |
| 12030 | gold_assert(gsym != NULL); |
| 12031 | if (gsym->is_forwarder()) |
| 12032 | gsym = relinfo->symtab->resolve_forwards(gsym); |
| 12033 | |
| 12034 | sym = static_cast<const Sized_symbol<32>*>(gsym); |
| 12035 | if (sym->has_symtab_index() && sym->symtab_index() != -1U) |
| 12036 | symval.set_output_symtab_index(sym->symtab_index()); |
| 12037 | else |
| 12038 | symval.set_no_output_symtab_entry(); |
| 12039 | |
| 12040 | // We need to compute the would-be final value of this global |
| 12041 | // symbol. |
| 12042 | const Symbol_table* symtab = relinfo->symtab; |
| 12043 | const Sized_symbol<32>* sized_symbol = |
| 12044 | symtab->get_sized_symbol<32>(gsym); |
| 12045 | Symbol_table::Compute_final_value_status status; |
| 12046 | Arm_address value = |
| 12047 | symtab->compute_final_value<32>(sized_symbol, &status); |
| 12048 | |
| 12049 | // Skip this if the symbol has not output section. |
| 12050 | if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION) |
| 12051 | continue; |
| 12052 | symval.set_output_value(value); |
| 12053 | |
| 12054 | if (gsym->type() == elfcpp::STT_TLS) |
| 12055 | symval.set_is_tls_symbol(); |
| 12056 | else if (gsym->type() == elfcpp::STT_GNU_IFUNC) |
| 12057 | symval.set_is_ifunc_symbol(); |
| 12058 | psymval = &symval; |
| 12059 | |
| 12060 | is_defined_in_discarded_section = |
| 12061 | (gsym->is_defined_in_discarded_section() |
| 12062 | && gsym->is_undefined()); |
| 12063 | shndx = 0; |
| 12064 | } |
| 12065 | |
| 12066 | Symbol_value<32> symval2; |
| 12067 | if (is_defined_in_discarded_section) |
| 12068 | { |
| 12069 | if (comdat_behavior == CB_UNDETERMINED) |
| 12070 | { |
| 12071 | std::string name = arm_object->section_name(relinfo->data_shndx); |
| 12072 | comdat_behavior = default_comdat_behavior.get(name.c_str()); |
| 12073 | } |
| 12074 | if (comdat_behavior == CB_PRETEND) |
| 12075 | { |
| 12076 | // FIXME: This case does not work for global symbols. |
| 12077 | // We have no place to store the original section index. |
| 12078 | // Fortunately this does not matter for comdat sections, |
| 12079 | // only for sections explicitly discarded by a linker |
| 12080 | // script. |
| 12081 | bool found; |
| 12082 | typename elfcpp::Elf_types<32>::Elf_Addr value = |
| 12083 | arm_object->map_to_kept_section(shndx, &found); |
| 12084 | if (found) |
| 12085 | symval2.set_output_value(value + psymval->input_value()); |
| 12086 | else |
| 12087 | symval2.set_output_value(0); |
| 12088 | } |
| 12089 | else |
| 12090 | { |
| 12091 | if (comdat_behavior == CB_WARNING) |
| 12092 | gold_warning_at_location(relinfo, i, offset, |
| 12093 | _("relocation refers to discarded " |
| 12094 | "section")); |
| 12095 | symval2.set_output_value(0); |
| 12096 | } |
| 12097 | symval2.set_no_output_symtab_entry(); |
| 12098 | psymval = &symval2; |
| 12099 | } |
| 12100 | |
| 12101 | // If symbol is a section symbol, we don't know the actual type of |
| 12102 | // destination. Give up. |
| 12103 | if (psymval->is_section_symbol()) |
| 12104 | continue; |
| 12105 | |
| 12106 | this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval, |
| 12107 | addend, view_address + offset); |
| 12108 | } |
| 12109 | } |
| 12110 | |
| 12111 | // Scan an input section for stub generation. |
| 12112 | |
| 12113 | template<bool big_endian> |
| 12114 | void |
| 12115 | Target_arm<big_endian>::scan_section_for_stubs( |
| 12116 | const Relocate_info<32, big_endian>* relinfo, |
| 12117 | unsigned int sh_type, |
| 12118 | const unsigned char* prelocs, |
| 12119 | size_t reloc_count, |
| 12120 | Output_section* output_section, |
| 12121 | bool needs_special_offset_handling, |
| 12122 | const unsigned char* view, |
| 12123 | Arm_address view_address, |
| 12124 | section_size_type view_size) |
| 12125 | { |
| 12126 | if (sh_type == elfcpp::SHT_REL) |
| 12127 | this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>( |
| 12128 | relinfo, |
| 12129 | prelocs, |
| 12130 | reloc_count, |
| 12131 | output_section, |
| 12132 | needs_special_offset_handling, |
| 12133 | view, |
| 12134 | view_address, |
| 12135 | view_size); |
| 12136 | else if (sh_type == elfcpp::SHT_RELA) |
| 12137 | // We do not support RELA type relocations yet. This is provided for |
| 12138 | // completeness. |
| 12139 | this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>( |
| 12140 | relinfo, |
| 12141 | prelocs, |
| 12142 | reloc_count, |
| 12143 | output_section, |
| 12144 | needs_special_offset_handling, |
| 12145 | view, |
| 12146 | view_address, |
| 12147 | view_size); |
| 12148 | else |
| 12149 | gold_unreachable(); |
| 12150 | } |
| 12151 | |
| 12152 | // Group input sections for stub generation. |
| 12153 | // |
| 12154 | // We group input sections in an output section so that the total size, |
| 12155 | // including any padding space due to alignment is smaller than GROUP_SIZE |
| 12156 | // unless the only input section in group is bigger than GROUP_SIZE already. |
| 12157 | // Then an ARM stub table is created to follow the last input section |
| 12158 | // in group. For each group an ARM stub table is created an is placed |
| 12159 | // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further |
| 12160 | // extend the group after the stub table. |
| 12161 | |
| 12162 | template<bool big_endian> |
| 12163 | void |
| 12164 | Target_arm<big_endian>::group_sections( |
| 12165 | Layout* layout, |
| 12166 | section_size_type group_size, |
| 12167 | bool stubs_always_after_branch, |
| 12168 | const Task* task) |
| 12169 | { |
| 12170 | // Group input sections and insert stub table |
| 12171 | Layout::Section_list section_list; |
| 12172 | layout->get_executable_sections(§ion_list); |
| 12173 | for (Layout::Section_list::const_iterator p = section_list.begin(); |
| 12174 | p != section_list.end(); |
| 12175 | ++p) |
| 12176 | { |
| 12177 | Arm_output_section<big_endian>* output_section = |
| 12178 | Arm_output_section<big_endian>::as_arm_output_section(*p); |
| 12179 | output_section->group_sections(group_size, stubs_always_after_branch, |
| 12180 | this, task); |
| 12181 | } |
| 12182 | } |
| 12183 | |
| 12184 | // Relaxation hook. This is where we do stub generation. |
| 12185 | |
| 12186 | template<bool big_endian> |
| 12187 | bool |
| 12188 | Target_arm<big_endian>::do_relax( |
| 12189 | int pass, |
| 12190 | const Input_objects* input_objects, |
| 12191 | Symbol_table* symtab, |
| 12192 | Layout* layout, |
| 12193 | const Task* task) |
| 12194 | { |
| 12195 | // No need to generate stubs if this is a relocatable link. |
| 12196 | gold_assert(!parameters->options().relocatable()); |
| 12197 | |
| 12198 | // If this is the first pass, we need to group input sections into |
| 12199 | // stub groups. |
| 12200 | bool done_exidx_fixup = false; |
| 12201 | typedef typename Stub_table_list::iterator Stub_table_iterator; |
| 12202 | if (pass == 1) |
| 12203 | { |
| 12204 | // Determine the stub group size. The group size is the absolute |
| 12205 | // value of the parameter --stub-group-size. If --stub-group-size |
| 12206 | // is passed a negative value, we restrict stubs to be always after |
| 12207 | // the stubbed branches. |
| 12208 | int32_t stub_group_size_param = |
| 12209 | parameters->options().stub_group_size(); |
| 12210 | bool stubs_always_after_branch = stub_group_size_param < 0; |
| 12211 | section_size_type stub_group_size = abs(stub_group_size_param); |
| 12212 | |
| 12213 | if (stub_group_size == 1) |
| 12214 | { |
| 12215 | // Default value. |
| 12216 | // Thumb branch range is +-4MB has to be used as the default |
| 12217 | // maximum size (a given section can contain both ARM and Thumb |
| 12218 | // code, so the worst case has to be taken into account). If we are |
| 12219 | // fixing cortex-a8 errata, the branch range has to be even smaller, |
| 12220 | // since wide conditional branch has a range of +-1MB only. |
| 12221 | // |
| 12222 | // This value is 48K less than that, which allows for 4096 |
| 12223 | // 12-byte stubs. If we exceed that, then we will fail to link. |
| 12224 | // The user will have to relink with an explicit group size |
| 12225 | // option. |
| 12226 | stub_group_size = 4145152; |
| 12227 | } |
| 12228 | |
| 12229 | // The Cortex-A8 erratum fix depends on stubs not being in the same 4K |
| 12230 | // page as the first half of a 32-bit branch straddling two 4K pages. |
| 12231 | // This is a crude way of enforcing that. In addition, long conditional |
| 12232 | // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8 |
| 12233 | // erratum, limit the group size to (1M - 12k) to avoid unreachable |
| 12234 | // cortex-A8 stubs from long conditional branches. |
| 12235 | if (this->fix_cortex_a8_) |
| 12236 | { |
| 12237 | stubs_always_after_branch = true; |
| 12238 | const section_size_type cortex_a8_group_size = 1024 * (1024 - 12); |
| 12239 | stub_group_size = std::max(stub_group_size, cortex_a8_group_size); |
| 12240 | } |
| 12241 | |
| 12242 | group_sections(layout, stub_group_size, stubs_always_after_branch, task); |
| 12243 | |
| 12244 | // Also fix .ARM.exidx section coverage. |
| 12245 | Arm_output_section<big_endian>* exidx_output_section = NULL; |
| 12246 | for (Layout::Section_list::const_iterator p = |
| 12247 | layout->section_list().begin(); |
| 12248 | p != layout->section_list().end(); |
| 12249 | ++p) |
| 12250 | if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) |
| 12251 | { |
| 12252 | if (exidx_output_section == NULL) |
| 12253 | exidx_output_section = |
| 12254 | Arm_output_section<big_endian>::as_arm_output_section(*p); |
| 12255 | else |
| 12256 | // We cannot handle this now. |
| 12257 | gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a " |
| 12258 | "non-relocatable link"), |
| 12259 | exidx_output_section->name(), |
| 12260 | (*p)->name()); |
| 12261 | } |
| 12262 | |
| 12263 | if (exidx_output_section != NULL) |
| 12264 | { |
| 12265 | this->fix_exidx_coverage(layout, input_objects, exidx_output_section, |
| 12266 | symtab, task); |
| 12267 | done_exidx_fixup = true; |
| 12268 | } |
| 12269 | } |
| 12270 | else |
| 12271 | { |
| 12272 | // If this is not the first pass, addresses and file offsets have |
| 12273 | // been reset at this point, set them here. |
| 12274 | for (Stub_table_iterator sp = this->stub_tables_.begin(); |
| 12275 | sp != this->stub_tables_.end(); |
| 12276 | ++sp) |
| 12277 | { |
| 12278 | Arm_input_section<big_endian>* owner = (*sp)->owner(); |
| 12279 | off_t off = align_address(owner->original_size(), |
| 12280 | (*sp)->addralign()); |
| 12281 | (*sp)->set_address_and_file_offset(owner->address() + off, |
| 12282 | owner->offset() + off); |
| 12283 | } |
| 12284 | } |
| 12285 | |
| 12286 | // The Cortex-A8 stubs are sensitive to layout of code sections. At the |
| 12287 | // beginning of each relaxation pass, just blow away all the stubs. |
| 12288 | // Alternatively, we could selectively remove only the stubs and reloc |
| 12289 | // information for code sections that have moved since the last pass. |
| 12290 | // That would require more book-keeping. |
| 12291 | if (this->fix_cortex_a8_) |
| 12292 | { |
| 12293 | // Clear all Cortex-A8 reloc information. |
| 12294 | for (typename Cortex_a8_relocs_info::const_iterator p = |
| 12295 | this->cortex_a8_relocs_info_.begin(); |
| 12296 | p != this->cortex_a8_relocs_info_.end(); |
| 12297 | ++p) |
| 12298 | delete p->second; |
| 12299 | this->cortex_a8_relocs_info_.clear(); |
| 12300 | |
| 12301 | // Remove all Cortex-A8 stubs. |
| 12302 | for (Stub_table_iterator sp = this->stub_tables_.begin(); |
| 12303 | sp != this->stub_tables_.end(); |
| 12304 | ++sp) |
| 12305 | (*sp)->remove_all_cortex_a8_stubs(); |
| 12306 | } |
| 12307 | |
| 12308 | // Scan relocs for relocation stubs |
| 12309 | for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); |
| 12310 | op != input_objects->relobj_end(); |
| 12311 | ++op) |
| 12312 | { |
| 12313 | Arm_relobj<big_endian>* arm_relobj = |
| 12314 | Arm_relobj<big_endian>::as_arm_relobj(*op); |
| 12315 | // Lock the object so we can read from it. This is only called |
| 12316 | // single-threaded from Layout::finalize, so it is OK to lock. |
| 12317 | Task_lock_obj<Object> tl(task, arm_relobj); |
| 12318 | arm_relobj->scan_sections_for_stubs(this, symtab, layout); |
| 12319 | } |
| 12320 | |
| 12321 | // Check all stub tables to see if any of them have their data sizes |
| 12322 | // or addresses alignments changed. These are the only things that |
| 12323 | // matter. |
| 12324 | bool any_stub_table_changed = false; |
| 12325 | Unordered_set<const Output_section*> sections_needing_adjustment; |
| 12326 | for (Stub_table_iterator sp = this->stub_tables_.begin(); |
| 12327 | (sp != this->stub_tables_.end()) && !any_stub_table_changed; |
| 12328 | ++sp) |
| 12329 | { |
| 12330 | if ((*sp)->update_data_size_and_addralign()) |
| 12331 | { |
| 12332 | // Update data size of stub table owner. |
| 12333 | Arm_input_section<big_endian>* owner = (*sp)->owner(); |
| 12334 | uint64_t address = owner->address(); |
| 12335 | off_t offset = owner->offset(); |
| 12336 | owner->reset_address_and_file_offset(); |
| 12337 | owner->set_address_and_file_offset(address, offset); |
| 12338 | |
| 12339 | sections_needing_adjustment.insert(owner->output_section()); |
| 12340 | any_stub_table_changed = true; |
| 12341 | } |
| 12342 | } |
| 12343 | |
| 12344 | // Output_section_data::output_section() returns a const pointer but we |
| 12345 | // need to update output sections, so we record all output sections needing |
| 12346 | // update above and scan the sections here to find out what sections need |
| 12347 | // to be updated. |
| 12348 | for (Layout::Section_list::const_iterator p = layout->section_list().begin(); |
| 12349 | p != layout->section_list().end(); |
| 12350 | ++p) |
| 12351 | { |
| 12352 | if (sections_needing_adjustment.find(*p) |
| 12353 | != sections_needing_adjustment.end()) |
| 12354 | (*p)->set_section_offsets_need_adjustment(); |
| 12355 | } |
| 12356 | |
| 12357 | // Stop relaxation if no EXIDX fix-up and no stub table change. |
| 12358 | bool continue_relaxation = done_exidx_fixup || any_stub_table_changed; |
| 12359 | |
| 12360 | // Finalize the stubs in the last relaxation pass. |
| 12361 | if (!continue_relaxation) |
| 12362 | { |
| 12363 | for (Stub_table_iterator sp = this->stub_tables_.begin(); |
| 12364 | (sp != this->stub_tables_.end()) && !any_stub_table_changed; |
| 12365 | ++sp) |
| 12366 | (*sp)->finalize_stubs(); |
| 12367 | |
| 12368 | // Update output local symbol counts of objects if necessary. |
| 12369 | for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); |
| 12370 | op != input_objects->relobj_end(); |
| 12371 | ++op) |
| 12372 | { |
| 12373 | Arm_relobj<big_endian>* arm_relobj = |
| 12374 | Arm_relobj<big_endian>::as_arm_relobj(*op); |
| 12375 | |
| 12376 | // Update output local symbol counts. We need to discard local |
| 12377 | // symbols defined in parts of input sections that are discarded by |
| 12378 | // relaxation. |
| 12379 | if (arm_relobj->output_local_symbol_count_needs_update()) |
| 12380 | { |
| 12381 | // We need to lock the object's file to update it. |
| 12382 | Task_lock_obj<Object> tl(task, arm_relobj); |
| 12383 | arm_relobj->update_output_local_symbol_count(); |
| 12384 | } |
| 12385 | } |
| 12386 | } |
| 12387 | |
| 12388 | return continue_relaxation; |
| 12389 | } |
| 12390 | |
| 12391 | // Relocate a stub. |
| 12392 | |
| 12393 | template<bool big_endian> |
| 12394 | void |
| 12395 | Target_arm<big_endian>::relocate_stub( |
| 12396 | Stub* stub, |
| 12397 | const Relocate_info<32, big_endian>* relinfo, |
| 12398 | Output_section* output_section, |
| 12399 | unsigned char* view, |
| 12400 | Arm_address address, |
| 12401 | section_size_type view_size) |
| 12402 | { |
| 12403 | Relocate relocate; |
| 12404 | const Stub_template* stub_template = stub->stub_template(); |
| 12405 | for (size_t i = 0; i < stub_template->reloc_count(); i++) |
| 12406 | { |
| 12407 | size_t reloc_insn_index = stub_template->reloc_insn_index(i); |
| 12408 | const Insn_template* insn = &stub_template->insns()[reloc_insn_index]; |
| 12409 | |
| 12410 | unsigned int r_type = insn->r_type(); |
| 12411 | section_size_type reloc_offset = stub_template->reloc_offset(i); |
| 12412 | section_size_type reloc_size = insn->size(); |
| 12413 | gold_assert(reloc_offset + reloc_size <= view_size); |
| 12414 | |
| 12415 | // This is the address of the stub destination. |
| 12416 | Arm_address target = stub->reloc_target(i) + insn->reloc_addend(); |
| 12417 | Symbol_value<32> symval; |
| 12418 | symval.set_output_value(target); |
| 12419 | |
| 12420 | // Synthesize a fake reloc just in case. We don't have a symbol so |
| 12421 | // we use 0. |
| 12422 | unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size]; |
| 12423 | memset(reloc_buffer, 0, sizeof(reloc_buffer)); |
| 12424 | elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer); |
| 12425 | reloc_write.put_r_offset(reloc_offset); |
| 12426 | reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type)); |
| 12427 | |
| 12428 | relocate.relocate(relinfo, elfcpp::SHT_REL, this, output_section, |
| 12429 | this->fake_relnum_for_stubs, reloc_buffer, |
| 12430 | NULL, &symval, view + reloc_offset, |
| 12431 | address + reloc_offset, reloc_size); |
| 12432 | } |
| 12433 | } |
| 12434 | |
| 12435 | // Determine whether an object attribute tag takes an integer, a |
| 12436 | // string or both. |
| 12437 | |
| 12438 | template<bool big_endian> |
| 12439 | int |
| 12440 | Target_arm<big_endian>::do_attribute_arg_type(int tag) const |
| 12441 | { |
| 12442 | if (tag == Object_attribute::Tag_compatibility) |
| 12443 | return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL |
| 12444 | | Object_attribute::ATTR_TYPE_FLAG_STR_VAL); |
| 12445 | else if (tag == elfcpp::Tag_nodefaults) |
| 12446 | return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL |
| 12447 | | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT); |
| 12448 | else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name) |
| 12449 | return Object_attribute::ATTR_TYPE_FLAG_STR_VAL; |
| 12450 | else if (tag < 32) |
| 12451 | return Object_attribute::ATTR_TYPE_FLAG_INT_VAL; |
| 12452 | else |
| 12453 | return ((tag & 1) != 0 |
| 12454 | ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL |
| 12455 | : Object_attribute::ATTR_TYPE_FLAG_INT_VAL); |
| 12456 | } |
| 12457 | |
| 12458 | // Reorder attributes. |
| 12459 | // |
| 12460 | // The ABI defines that Tag_conformance should be emitted first, and that |
| 12461 | // Tag_nodefaults should be second (if either is defined). This sets those |
| 12462 | // two positions, and bumps up the position of all the remaining tags to |
| 12463 | // compensate. |
| 12464 | |
| 12465 | template<bool big_endian> |
| 12466 | int |
| 12467 | Target_arm<big_endian>::do_attributes_order(int num) const |
| 12468 | { |
| 12469 | // Reorder the known object attributes in output. We want to move |
| 12470 | // Tag_conformance to position 4 and Tag_conformance to position 5 |
| 12471 | // and shift everything between 4 .. Tag_conformance - 1 to make room. |
| 12472 | if (num == 4) |
| 12473 | return elfcpp::Tag_conformance; |
| 12474 | if (num == 5) |
| 12475 | return elfcpp::Tag_nodefaults; |
| 12476 | if ((num - 2) < elfcpp::Tag_nodefaults) |
| 12477 | return num - 2; |
| 12478 | if ((num - 1) < elfcpp::Tag_conformance) |
| 12479 | return num - 1; |
| 12480 | return num; |
| 12481 | } |
| 12482 | |
| 12483 | // Scan a span of THUMB code for Cortex-A8 erratum. |
| 12484 | |
| 12485 | template<bool big_endian> |
| 12486 | void |
| 12487 | Target_arm<big_endian>::scan_span_for_cortex_a8_erratum( |
| 12488 | Arm_relobj<big_endian>* arm_relobj, |
| 12489 | unsigned int shndx, |
| 12490 | section_size_type span_start, |
| 12491 | section_size_type span_end, |
| 12492 | const unsigned char* view, |
| 12493 | Arm_address address) |
| 12494 | { |
| 12495 | // Scan for 32-bit Thumb-2 branches which span two 4K regions, where: |
| 12496 | // |
| 12497 | // The opcode is BLX.W, BL.W, B.W, Bcc.W |
| 12498 | // The branch target is in the same 4KB region as the |
| 12499 | // first half of the branch. |
| 12500 | // The instruction before the branch is a 32-bit |
| 12501 | // length non-branch instruction. |
| 12502 | section_size_type i = span_start; |
| 12503 | bool last_was_32bit = false; |
| 12504 | bool last_was_branch = false; |
| 12505 | while (i < span_end) |
| 12506 | { |
| 12507 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 12508 | const Valtype* wv = reinterpret_cast<const Valtype*>(view + i); |
| 12509 | uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 12510 | bool is_blx = false, is_b = false; |
| 12511 | bool is_bl = false, is_bcc = false; |
| 12512 | |
| 12513 | bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000; |
| 12514 | if (insn_32bit) |
| 12515 | { |
| 12516 | // Load the rest of the insn (in manual-friendly order). |
| 12517 | insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 12518 | |
| 12519 | // Encoding T4: B<c>.W. |
| 12520 | is_b = (insn & 0xf800d000U) == 0xf0009000U; |
| 12521 | // Encoding T1: BL<c>.W. |
| 12522 | is_bl = (insn & 0xf800d000U) == 0xf000d000U; |
| 12523 | // Encoding T2: BLX<c>.W. |
| 12524 | is_blx = (insn & 0xf800d000U) == 0xf000c000U; |
| 12525 | // Encoding T3: B<c>.W (not permitted in IT block). |
| 12526 | is_bcc = ((insn & 0xf800d000U) == 0xf0008000U |
| 12527 | && (insn & 0x07f00000U) != 0x03800000U); |
| 12528 | } |
| 12529 | |
| 12530 | bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc; |
| 12531 | |
| 12532 | // If this instruction is a 32-bit THUMB branch that crosses a 4K |
| 12533 | // page boundary and it follows 32-bit non-branch instruction, |
| 12534 | // we need to work around. |
| 12535 | if (is_32bit_branch |
| 12536 | && ((address + i) & 0xfffU) == 0xffeU |
| 12537 | && last_was_32bit |
| 12538 | && !last_was_branch) |
| 12539 | { |
| 12540 | // Check to see if there is a relocation stub for this branch. |
| 12541 | bool force_target_arm = false; |
| 12542 | bool force_target_thumb = false; |
| 12543 | const Cortex_a8_reloc* cortex_a8_reloc = NULL; |
| 12544 | Cortex_a8_relocs_info::const_iterator p = |
| 12545 | this->cortex_a8_relocs_info_.find(address + i); |
| 12546 | |
| 12547 | if (p != this->cortex_a8_relocs_info_.end()) |
| 12548 | { |
| 12549 | cortex_a8_reloc = p->second; |
| 12550 | bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0; |
| 12551 | |
| 12552 | if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL |
| 12553 | && !target_is_thumb) |
| 12554 | force_target_arm = true; |
| 12555 | else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL |
| 12556 | && target_is_thumb) |
| 12557 | force_target_thumb = true; |
| 12558 | } |
| 12559 | |
| 12560 | off_t offset; |
| 12561 | Stub_type stub_type = arm_stub_none; |
| 12562 | |
| 12563 | // Check if we have an offending branch instruction. |
| 12564 | uint16_t upper_insn = (insn >> 16) & 0xffffU; |
| 12565 | uint16_t lower_insn = insn & 0xffffU; |
| 12566 | typedef class Arm_relocate_functions<big_endian> RelocFuncs; |
| 12567 | |
| 12568 | if (cortex_a8_reloc != NULL |
| 12569 | && cortex_a8_reloc->reloc_stub() != NULL) |
| 12570 | // We've already made a stub for this instruction, e.g. |
| 12571 | // it's a long branch or a Thumb->ARM stub. Assume that |
| 12572 | // stub will suffice to work around the A8 erratum (see |
| 12573 | // setting of always_after_branch above). |
| 12574 | ; |
| 12575 | else if (is_bcc) |
| 12576 | { |
| 12577 | offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn, |
| 12578 | lower_insn); |
| 12579 | stub_type = arm_stub_a8_veneer_b_cond; |
| 12580 | } |
| 12581 | else if (is_b || is_bl || is_blx) |
| 12582 | { |
| 12583 | offset = RelocFuncs::thumb32_branch_offset(upper_insn, |
| 12584 | lower_insn); |
| 12585 | if (is_blx) |
| 12586 | offset &= ~3; |
| 12587 | |
| 12588 | stub_type = (is_blx |
| 12589 | ? arm_stub_a8_veneer_blx |
| 12590 | : (is_bl |
| 12591 | ? arm_stub_a8_veneer_bl |
| 12592 | : arm_stub_a8_veneer_b)); |
| 12593 | } |
| 12594 | |
| 12595 | if (stub_type != arm_stub_none) |
| 12596 | { |
| 12597 | Arm_address pc_for_insn = address + i + 4; |
| 12598 | |
| 12599 | // The original instruction is a BL, but the target is |
| 12600 | // an ARM instruction. If we were not making a stub, |
| 12601 | // the BL would have been converted to a BLX. Use the |
| 12602 | // BLX stub instead in that case. |
| 12603 | if (this->may_use_v5t_interworking() && force_target_arm |
| 12604 | && stub_type == arm_stub_a8_veneer_bl) |
| 12605 | { |
| 12606 | stub_type = arm_stub_a8_veneer_blx; |
| 12607 | is_blx = true; |
| 12608 | is_bl = false; |
| 12609 | } |
| 12610 | // Conversely, if the original instruction was |
| 12611 | // BLX but the target is Thumb mode, use the BL stub. |
| 12612 | else if (force_target_thumb |
| 12613 | && stub_type == arm_stub_a8_veneer_blx) |
| 12614 | { |
| 12615 | stub_type = arm_stub_a8_veneer_bl; |
| 12616 | is_blx = false; |
| 12617 | is_bl = true; |
| 12618 | } |
| 12619 | |
| 12620 | if (is_blx) |
| 12621 | pc_for_insn &= ~3; |
| 12622 | |
| 12623 | // If we found a relocation, use the proper destination, |
| 12624 | // not the offset in the (unrelocated) instruction. |
| 12625 | // Note this is always done if we switched the stub type above. |
| 12626 | if (cortex_a8_reloc != NULL) |
| 12627 | offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn); |
| 12628 | |
| 12629 | Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1); |
| 12630 | |
| 12631 | // Add a new stub if destination address in in the same page. |
| 12632 | if (((address + i) & ~0xfffU) == (target & ~0xfffU)) |
| 12633 | { |
| 12634 | Cortex_a8_stub* stub = |
| 12635 | this->stub_factory_.make_cortex_a8_stub(stub_type, |
| 12636 | arm_relobj, shndx, |
| 12637 | address + i, |
| 12638 | target, insn); |
| 12639 | Stub_table<big_endian>* stub_table = |
| 12640 | arm_relobj->stub_table(shndx); |
| 12641 | gold_assert(stub_table != NULL); |
| 12642 | stub_table->add_cortex_a8_stub(address + i, stub); |
| 12643 | } |
| 12644 | } |
| 12645 | } |
| 12646 | |
| 12647 | i += insn_32bit ? 4 : 2; |
| 12648 | last_was_32bit = insn_32bit; |
| 12649 | last_was_branch = is_32bit_branch; |
| 12650 | } |
| 12651 | } |
| 12652 | |
| 12653 | // Apply the Cortex-A8 workaround. |
| 12654 | |
| 12655 | template<bool big_endian> |
| 12656 | void |
| 12657 | Target_arm<big_endian>::apply_cortex_a8_workaround( |
| 12658 | const Cortex_a8_stub* stub, |
| 12659 | Arm_address stub_address, |
| 12660 | unsigned char* insn_view, |
| 12661 | Arm_address insn_address) |
| 12662 | { |
| 12663 | typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; |
| 12664 | Valtype* wv = reinterpret_cast<Valtype*>(insn_view); |
| 12665 | Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); |
| 12666 | Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); |
| 12667 | off_t branch_offset = stub_address - (insn_address + 4); |
| 12668 | |
| 12669 | typedef class Arm_relocate_functions<big_endian> RelocFuncs; |
| 12670 | switch (stub->stub_template()->type()) |
| 12671 | { |
| 12672 | case arm_stub_a8_veneer_b_cond: |
| 12673 | // For a conditional branch, we re-write it to be an unconditional |
| 12674 | // branch to the stub. We use the THUMB-2 encoding here. |
| 12675 | upper_insn = 0xf000U; |
| 12676 | lower_insn = 0xb800U; |
| 12677 | // Fall through |
| 12678 | case arm_stub_a8_veneer_b: |
| 12679 | case arm_stub_a8_veneer_bl: |
| 12680 | case arm_stub_a8_veneer_blx: |
| 12681 | if ((lower_insn & 0x5000U) == 0x4000U) |
| 12682 | // For a BLX instruction, make sure that the relocation is |
| 12683 | // rounded up to a word boundary. This follows the semantics of |
| 12684 | // the instruction which specifies that bit 1 of the target |
| 12685 | // address will come from bit 1 of the base address. |
| 12686 | branch_offset = (branch_offset + 2) & ~3; |
| 12687 | |
| 12688 | // Put BRANCH_OFFSET back into the insn. |
| 12689 | gold_assert(!Bits<25>::has_overflow32(branch_offset)); |
| 12690 | upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset); |
| 12691 | lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset); |
| 12692 | break; |
| 12693 | |
| 12694 | default: |
| 12695 | gold_unreachable(); |
| 12696 | } |
| 12697 | |
| 12698 | // Put the relocated value back in the object file: |
| 12699 | elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); |
| 12700 | elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); |
| 12701 | } |
| 12702 | |
| 12703 | // Target selector for ARM. Note this is never instantiated directly. |
| 12704 | // It's only used in Target_selector_arm_nacl, below. |
| 12705 | |
| 12706 | template<bool big_endian> |
| 12707 | class Target_selector_arm : public Target_selector |
| 12708 | { |
| 12709 | public: |
| 12710 | Target_selector_arm() |
| 12711 | : Target_selector(elfcpp::EM_ARM, 32, big_endian, |
| 12712 | (big_endian ? "elf32-bigarm" : "elf32-littlearm"), |
| 12713 | (big_endian ? "armelfb" : "armelf")) |
| 12714 | { } |
| 12715 | |
| 12716 | Target* |
| 12717 | do_instantiate_target() |
| 12718 | { return new Target_arm<big_endian>(); } |
| 12719 | }; |
| 12720 | |
| 12721 | // Fix .ARM.exidx section coverage. |
| 12722 | |
| 12723 | template<bool big_endian> |
| 12724 | void |
| 12725 | Target_arm<big_endian>::fix_exidx_coverage( |
| 12726 | Layout* layout, |
| 12727 | const Input_objects* input_objects, |
| 12728 | Arm_output_section<big_endian>* exidx_section, |
| 12729 | Symbol_table* symtab, |
| 12730 | const Task* task) |
| 12731 | { |
| 12732 | // We need to look at all the input sections in output in ascending |
| 12733 | // order of of output address. We do that by building a sorted list |
| 12734 | // of output sections by addresses. Then we looks at the output sections |
| 12735 | // in order. The input sections in an output section are already sorted |
| 12736 | // by addresses within the output section. |
| 12737 | |
| 12738 | typedef std::set<Output_section*, output_section_address_less_than> |
| 12739 | Sorted_output_section_list; |
| 12740 | Sorted_output_section_list sorted_output_sections; |
| 12741 | |
| 12742 | // Find out all the output sections of input sections pointed by |
| 12743 | // EXIDX input sections. |
| 12744 | for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); |
| 12745 | p != input_objects->relobj_end(); |
| 12746 | ++p) |
| 12747 | { |
| 12748 | Arm_relobj<big_endian>* arm_relobj = |
| 12749 | Arm_relobj<big_endian>::as_arm_relobj(*p); |
| 12750 | std::vector<unsigned int> shndx_list; |
| 12751 | arm_relobj->get_exidx_shndx_list(&shndx_list); |
| 12752 | for (size_t i = 0; i < shndx_list.size(); ++i) |
| 12753 | { |
| 12754 | const Arm_exidx_input_section* exidx_input_section = |
| 12755 | arm_relobj->exidx_input_section_by_shndx(shndx_list[i]); |
| 12756 | gold_assert(exidx_input_section != NULL); |
| 12757 | if (!exidx_input_section->has_errors()) |
| 12758 | { |
| 12759 | unsigned int text_shndx = exidx_input_section->link(); |
| 12760 | Output_section* os = arm_relobj->output_section(text_shndx); |
| 12761 | if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0) |
| 12762 | sorted_output_sections.insert(os); |
| 12763 | } |
| 12764 | } |
| 12765 | } |
| 12766 | |
| 12767 | // Go over the output sections in ascending order of output addresses. |
| 12768 | typedef typename Arm_output_section<big_endian>::Text_section_list |
| 12769 | Text_section_list; |
| 12770 | Text_section_list sorted_text_sections; |
| 12771 | for (typename Sorted_output_section_list::iterator p = |
| 12772 | sorted_output_sections.begin(); |
| 12773 | p != sorted_output_sections.end(); |
| 12774 | ++p) |
| 12775 | { |
| 12776 | Arm_output_section<big_endian>* arm_output_section = |
| 12777 | Arm_output_section<big_endian>::as_arm_output_section(*p); |
| 12778 | arm_output_section->append_text_sections_to_list(&sorted_text_sections); |
| 12779 | } |
| 12780 | |
| 12781 | exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab, |
| 12782 | merge_exidx_entries(), task); |
| 12783 | } |
| 12784 | |
| 12785 | template<bool big_endian> |
| 12786 | void |
| 12787 | Target_arm<big_endian>::do_define_standard_symbols( |
| 12788 | Symbol_table* symtab, |
| 12789 | Layout* layout) |
| 12790 | { |
| 12791 | // Handle the .ARM.exidx section. |
| 12792 | Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); |
| 12793 | |
| 12794 | if (exidx_section != NULL) |
| 12795 | { |
| 12796 | // Create __exidx_start and __exidx_end symbols. |
| 12797 | symtab->define_in_output_data("__exidx_start", |
| 12798 | NULL, // version |
| 12799 | Symbol_table::PREDEFINED, |
| 12800 | exidx_section, |
| 12801 | 0, // value |
| 12802 | 0, // symsize |
| 12803 | elfcpp::STT_NOTYPE, |
| 12804 | elfcpp::STB_GLOBAL, |
| 12805 | elfcpp::STV_HIDDEN, |
| 12806 | 0, // nonvis |
| 12807 | false, // offset_is_from_end |
| 12808 | true); // only_if_ref |
| 12809 | |
| 12810 | symtab->define_in_output_data("__exidx_end", |
| 12811 | NULL, // version |
| 12812 | Symbol_table::PREDEFINED, |
| 12813 | exidx_section, |
| 12814 | 0, // value |
| 12815 | 0, // symsize |
| 12816 | elfcpp::STT_NOTYPE, |
| 12817 | elfcpp::STB_GLOBAL, |
| 12818 | elfcpp::STV_HIDDEN, |
| 12819 | 0, // nonvis |
| 12820 | true, // offset_is_from_end |
| 12821 | true); // only_if_ref |
| 12822 | } |
| 12823 | else |
| 12824 | { |
| 12825 | // Define __exidx_start and __exidx_end even when .ARM.exidx |
| 12826 | // section is missing to match ld's behaviour. |
| 12827 | symtab->define_as_constant("__exidx_start", NULL, |
| 12828 | Symbol_table::PREDEFINED, |
| 12829 | 0, 0, elfcpp::STT_OBJECT, |
| 12830 | elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, |
| 12831 | true, false); |
| 12832 | symtab->define_as_constant("__exidx_end", NULL, |
| 12833 | Symbol_table::PREDEFINED, |
| 12834 | 0, 0, elfcpp::STT_OBJECT, |
| 12835 | elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, |
| 12836 | true, false); |
| 12837 | } |
| 12838 | } |
| 12839 | |
| 12840 | // NaCl variant. It uses different PLT contents. |
| 12841 | |
| 12842 | template<bool big_endian> |
| 12843 | class Output_data_plt_arm_nacl; |
| 12844 | |
| 12845 | template<bool big_endian> |
| 12846 | class Target_arm_nacl : public Target_arm<big_endian> |
| 12847 | { |
| 12848 | public: |
| 12849 | Target_arm_nacl() |
| 12850 | : Target_arm<big_endian>(&arm_nacl_info) |
| 12851 | { } |
| 12852 | |
| 12853 | protected: |
| 12854 | virtual Output_data_plt_arm<big_endian>* |
| 12855 | do_make_data_plt( |
| 12856 | Layout* layout, |
| 12857 | Arm_output_data_got<big_endian>* got, |
| 12858 | Output_data_space* got_plt, |
| 12859 | Output_data_space* got_irelative) |
| 12860 | { return new Output_data_plt_arm_nacl<big_endian>( |
| 12861 | layout, got, got_plt, got_irelative); } |
| 12862 | |
| 12863 | private: |
| 12864 | static const Target::Target_info arm_nacl_info; |
| 12865 | }; |
| 12866 | |
| 12867 | template<bool big_endian> |
| 12868 | const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info = |
| 12869 | { |
| 12870 | 32, // size |
| 12871 | big_endian, // is_big_endian |
| 12872 | elfcpp::EM_ARM, // machine_code |
| 12873 | false, // has_make_symbol |
| 12874 | false, // has_resolve |
| 12875 | false, // has_code_fill |
| 12876 | true, // is_default_stack_executable |
| 12877 | false, // can_icf_inline_merge_sections |
| 12878 | '\0', // wrap_char |
| 12879 | "/lib/ld-nacl-arm.so.1", // dynamic_linker |
| 12880 | 0x20000, // default_text_segment_address |
| 12881 | 0x10000, // abi_pagesize (overridable by -z max-page-size) |
| 12882 | 0x10000, // common_pagesize (overridable by -z common-page-size) |
| 12883 | true, // isolate_execinstr |
| 12884 | 0x10000000, // rosegment_gap |
| 12885 | elfcpp::SHN_UNDEF, // small_common_shndx |
| 12886 | elfcpp::SHN_UNDEF, // large_common_shndx |
| 12887 | 0, // small_common_section_flags |
| 12888 | 0, // large_common_section_flags |
| 12889 | ".ARM.attributes", // attributes_section |
| 12890 | "aeabi", // attributes_vendor |
| 12891 | "_start", // entry_symbol_name |
| 12892 | 32, // hash_entry_size |
| 12893 | }; |
| 12894 | |
| 12895 | template<bool big_endian> |
| 12896 | class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian> |
| 12897 | { |
| 12898 | public: |
| 12899 | Output_data_plt_arm_nacl( |
| 12900 | Layout* layout, |
| 12901 | Arm_output_data_got<big_endian>* got, |
| 12902 | Output_data_space* got_plt, |
| 12903 | Output_data_space* got_irelative) |
| 12904 | : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative) |
| 12905 | { } |
| 12906 | |
| 12907 | protected: |
| 12908 | // Return the offset of the first non-reserved PLT entry. |
| 12909 | virtual unsigned int |
| 12910 | do_first_plt_entry_offset() const |
| 12911 | { return sizeof(first_plt_entry); } |
| 12912 | |
| 12913 | // Return the size of a PLT entry. |
| 12914 | virtual unsigned int |
| 12915 | do_get_plt_entry_size() const |
| 12916 | { return sizeof(plt_entry); } |
| 12917 | |
| 12918 | virtual void |
| 12919 | do_fill_first_plt_entry(unsigned char* pov, |
| 12920 | Arm_address got_address, |
| 12921 | Arm_address plt_address); |
| 12922 | |
| 12923 | virtual void |
| 12924 | do_fill_plt_entry(unsigned char* pov, |
| 12925 | Arm_address got_address, |
| 12926 | Arm_address plt_address, |
| 12927 | unsigned int got_offset, |
| 12928 | unsigned int plt_offset); |
| 12929 | |
| 12930 | private: |
| 12931 | inline uint32_t arm_movw_immediate(uint32_t value) |
| 12932 | { |
| 12933 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); |
| 12934 | } |
| 12935 | |
| 12936 | inline uint32_t arm_movt_immediate(uint32_t value) |
| 12937 | { |
| 12938 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); |
| 12939 | } |
| 12940 | |
| 12941 | // Template for the first PLT entry. |
| 12942 | static const uint32_t first_plt_entry[16]; |
| 12943 | |
| 12944 | // Template for subsequent PLT entries. |
| 12945 | static const uint32_t plt_entry[4]; |
| 12946 | }; |
| 12947 | |
| 12948 | // The first entry in the PLT. |
| 12949 | template<bool big_endian> |
| 12950 | const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] = |
| 12951 | { |
| 12952 | // First bundle: |
| 12953 | 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8 |
| 12954 | 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8 |
| 12955 | 0xe08cc00f, // add ip, ip, pc |
| 12956 | 0xe52dc008, // str ip, [sp, #-8]! |
| 12957 | // Second bundle: |
| 12958 | 0xe3ccc103, // bic ip, ip, #0xc0000000 |
| 12959 | 0xe59cc000, // ldr ip, [ip] |
| 12960 | 0xe3ccc13f, // bic ip, ip, #0xc000000f |
| 12961 | 0xe12fff1c, // bx ip |
| 12962 | // Third bundle: |
| 12963 | 0xe320f000, // nop |
| 12964 | 0xe320f000, // nop |
| 12965 | 0xe320f000, // nop |
| 12966 | // .Lplt_tail: |
| 12967 | 0xe50dc004, // str ip, [sp, #-4] |
| 12968 | // Fourth bundle: |
| 12969 | 0xe3ccc103, // bic ip, ip, #0xc0000000 |
| 12970 | 0xe59cc000, // ldr ip, [ip] |
| 12971 | 0xe3ccc13f, // bic ip, ip, #0xc000000f |
| 12972 | 0xe12fff1c, // bx ip |
| 12973 | }; |
| 12974 | |
| 12975 | template<bool big_endian> |
| 12976 | void |
| 12977 | Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry( |
| 12978 | unsigned char* pov, |
| 12979 | Arm_address got_address, |
| 12980 | Arm_address plt_address) |
| 12981 | { |
| 12982 | // Write first PLT entry. All but first two words are constants. |
| 12983 | const size_t num_first_plt_words = (sizeof(first_plt_entry) |
| 12984 | / sizeof(first_plt_entry[0])); |
| 12985 | |
| 12986 | int32_t got_displacement = got_address + 8 - (plt_address + 16); |
| 12987 | |
| 12988 | elfcpp::Swap<32, big_endian>::writeval |
| 12989 | (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement)); |
| 12990 | elfcpp::Swap<32, big_endian>::writeval |
| 12991 | (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement)); |
| 12992 | |
| 12993 | for (size_t i = 2; i < num_first_plt_words; ++i) |
| 12994 | elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); |
| 12995 | } |
| 12996 | |
| 12997 | // Subsequent entries in the PLT. |
| 12998 | |
| 12999 | template<bool big_endian> |
| 13000 | const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] = |
| 13001 | { |
| 13002 | 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8 |
| 13003 | 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8 |
| 13004 | 0xe08cc00f, // add ip, ip, pc |
| 13005 | 0xea000000, // b .Lplt_tail |
| 13006 | }; |
| 13007 | |
| 13008 | template<bool big_endian> |
| 13009 | void |
| 13010 | Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry( |
| 13011 | unsigned char* pov, |
| 13012 | Arm_address got_address, |
| 13013 | Arm_address plt_address, |
| 13014 | unsigned int got_offset, |
| 13015 | unsigned int plt_offset) |
| 13016 | { |
| 13017 | // Calculate the displacement between the PLT slot and the |
| 13018 | // common tail that's part of the special initial PLT slot. |
| 13019 | int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t)) |
| 13020 | - (plt_address + plt_offset |
| 13021 | + sizeof(plt_entry) + sizeof(uint32_t))); |
| 13022 | gold_assert((tail_displacement & 3) == 0); |
| 13023 | tail_displacement >>= 2; |
| 13024 | |
| 13025 | gold_assert ((tail_displacement & 0xff000000) == 0 |
| 13026 | || (-tail_displacement & 0xff000000) == 0); |
| 13027 | |
| 13028 | // Calculate the displacement between the PLT slot and the entry |
| 13029 | // in the GOT. The offset accounts for the value produced by |
| 13030 | // adding to pc in the penultimate instruction of the PLT stub. |
| 13031 | const int32_t got_displacement = (got_address + got_offset |
| 13032 | - (plt_address + sizeof(plt_entry))); |
| 13033 | |
| 13034 | elfcpp::Swap<32, big_endian>::writeval |
| 13035 | (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement)); |
| 13036 | elfcpp::Swap<32, big_endian>::writeval |
| 13037 | (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement)); |
| 13038 | elfcpp::Swap<32, big_endian>::writeval |
| 13039 | (pov + 8, plt_entry[2]); |
| 13040 | elfcpp::Swap<32, big_endian>::writeval |
| 13041 | (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff)); |
| 13042 | } |
| 13043 | |
| 13044 | // Target selectors. |
| 13045 | |
| 13046 | template<bool big_endian> |
| 13047 | class Target_selector_arm_nacl |
| 13048 | : public Target_selector_nacl<Target_selector_arm<big_endian>, |
| 13049 | Target_arm_nacl<big_endian> > |
| 13050 | { |
| 13051 | public: |
| 13052 | Target_selector_arm_nacl() |
| 13053 | : Target_selector_nacl<Target_selector_arm<big_endian>, |
| 13054 | Target_arm_nacl<big_endian> >( |
| 13055 | "arm", |
| 13056 | big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl", |
| 13057 | big_endian ? "armelfb_nacl" : "armelf_nacl") |
| 13058 | { } |
| 13059 | }; |
| 13060 | |
| 13061 | Target_selector_arm_nacl<false> target_selector_arm; |
| 13062 | Target_selector_arm_nacl<true> target_selector_armbe; |
| 13063 | |
| 13064 | } // End anonymous namespace. |