arch/arm/mach-rockchip/pm.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Tony Xie <tony.xie@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/io.h>
  18 #include <linux/kernel.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/regmap.h>
  22 #include <linux/suspend.h>
  23 #include <linux/mfd/syscon.h>
  24 #include <linux/regulator/machine.h>
  25
  26 #include <asm/cacheflush.h>
  27 #include <asm/tlbflush.h>
  28 #include <asm/suspend.h>
  29
  30 #include "pm.h"
  31
  32 /* These enum are option of low power mode */
  33 enum {
  34         ROCKCHIP_ARM_OFF_LOGIC_NORMAL = 0,
  35         ROCKCHIP_ARM_OFF_LOGIC_DEEP = 1,
  36 };
  37
  38 struct rockchip_pm_data {
  39         const struct platform_suspend_ops *ops;
  40         int (*init)(struct device_node *np);
  41 };
  42
  43 static void __iomem *rk3288_bootram_base;
  44 static phys_addr_t rk3288_bootram_phy;
  45
  46 static struct regmap *pmu_regmap;
  47 static struct regmap *sgrf_regmap;
  48
  49 static u32 rk3288_pmu_pwr_mode_con;
  50 static u32 rk3288_sgrf_soc_con0;
  51
  52 static inline u32 rk3288_l2_config(void)
  53 {
  54         u32 l2ctlr;
  55
  56         asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr));
  57         return l2ctlr;
  58 }
  59
  60 static void rk3288_config_bootdata(void)
  61 {
  62         rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8);
  63         rkpm_bootdata_cpu_code = virt_to_phys(cpu_resume);
  64
  65         rkpm_bootdata_l2ctlr_f  = 1;
  66         rkpm_bootdata_l2ctlr = rk3288_l2_config();
  67 }
  68
  69 static void rk3288_slp_mode_set(int level)
  70 {
  71         u32 mode_set, mode_set1;
  72
  73         regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
  74
  75         regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
  76                     &rk3288_pmu_pwr_mode_con);
  77
  78         /*
  79          * SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR
  80          * PCLK_WDT_GATE - disable WDT during suspend.
  81          */
  82         regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
  83                      SGRF_PCLK_WDT_GATE | SGRF_FAST_BOOT_EN
  84                      | SGRF_PCLK_WDT_GATE_WRITE | SGRF_FAST_BOOT_EN_WRITE);
  85
  86         /* booting address of resuming system is from this register value */
  87         regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR,
  88                      rk3288_bootram_phy);
  89
  90         regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1,
  91                      PMU_ARMINT_WAKEUP_EN);
  92
  93         mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) |
  94                    BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) |
  95                    BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |
  96                    BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) |
  97                    BIT(PMU_SCU_EN);
  98
  99         mode_set1 = BIT(PMU_CLR_CORE) | BIT(PMU_CLR_CPUP);
 100
 101         if (level == ROCKCHIP_ARM_OFF_LOGIC_DEEP) {
 102                 /* arm off, logic deep sleep */
 103                 mode_set |= BIT(PMU_BUS_PD_EN) |
 104                             BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) |
 105                             BIT(PMU_OSC_24M_DIS) | BIT(PMU_PMU_USE_LF) |
 106                             BIT(PMU_ALIVE_USE_LF) | BIT(PMU_PLL_PD_EN);
 107
 108                 mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
 109                              BIT(PMU_CLR_PERI) | BIT(PMU_CLR_DMA);
 110         } else {
 111                 /*
 112                  * arm off, logic normal
 113                  * if pmu_clk_core_src_gate_en is not set,
 114                  * wakeup will be error
 115                  */
 116                 mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN);
 117         }
 118
 119         regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set);
 120         regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON1, mode_set1);
 121 }
 122
 123 static void rk3288_slp_mode_set_resume(void)
 124 {
 125         regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON,
 126                      rk3288_pmu_pwr_mode_con);
 127
 128         regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
 129                      rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE
 130                      | SGRF_FAST_BOOT_EN_WRITE);
 131 }
 132
 133 static int rockchip_lpmode_enter(unsigned long arg)
 134 {
 135         flush_cache_all();
 136
 137         cpu_do_idle();
 138
 139         pr_err("%s: Failed to suspend\n", __func__);
 140
 141         return 1;
 142 }
 143
 144 static int rk3288_suspend_enter(suspend_state_t state)
 145 {
 146         local_fiq_disable();
 147
 148         rk3288_slp_mode_set(ROCKCHIP_ARM_OFF_LOGIC_NORMAL);
 149
 150         cpu_suspend(0, rockchip_lpmode_enter);
 151
 152         rk3288_slp_mode_set_resume();
 153
 154         local_fiq_enable();
 155
 156         return 0;
 157 }
 158
 159 static int rk3288_suspend_prepare(void)
 160 {
 161         return regulator_suspend_prepare(PM_SUSPEND_MEM);
 162 }
 163
 164 static void rk3288_suspend_finish(void)
 165 {
 166         if (regulator_suspend_finish())
 167                 pr_err("%s: Suspend finish failed\n", __func__);
 168 }
 169
 170 static int rk3288_suspend_init(struct device_node *np)
 171 {
 172         struct device_node *sram_np;
 173         struct resource res;
 174         int ret;
 175
 176         pmu_regmap = syscon_node_to_regmap(np);
 177         if (IS_ERR(pmu_regmap)) {
 178                 pr_err("%s: could not find pmu regmap\n", __func__);
 179                 return PTR_ERR(pmu_regmap);
 180         }
 181
 182         sgrf_regmap = syscon_regmap_lookup_by_compatible(
 183                                 "rockchip,rk3288-sgrf");
 184         if (IS_ERR(sgrf_regmap)) {
 185                 pr_err("%s: could not find sgrf regmap\n", __func__);
 186                 return PTR_ERR(pmu_regmap);
 187         }
 188
 189         sram_np = of_find_compatible_node(NULL, NULL,
 190                                           "rockchip,rk3288-pmu-sram");
 191         if (!sram_np) {
 192                 pr_err("%s: could not find bootram dt node\n", __func__);
 193                 return -ENODEV;
 194         }
 195
 196         rk3288_bootram_base = of_iomap(sram_np, 0);
 197         if (!rk3288_bootram_base) {
 198                 pr_err("%s: could not map bootram base\n", __func__);
 199                 return -ENOMEM;
 200         }
 201
 202         ret = of_address_to_resource(sram_np, 0, &res);
 203         if (ret) {
 204                 pr_err("%s: could not get bootram phy addr\n", __func__);
 205                 return ret;
 206         }
 207         rk3288_bootram_phy = res.start;
 208
 209         of_node_put(sram_np);
 210
 211         rk3288_config_bootdata();
 212
 213         /* copy resume code and data to bootsram */
 214         memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume,
 215                rk3288_bootram_sz);
 216
 217         regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, OSC_STABL_CNT_THRESH);
 218         regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, PMU_STABL_CNT_THRESH);
 219
 220         return 0;
 221 }
 222
 223 static const struct platform_suspend_ops rk3288_suspend_ops = {
 224         .enter   = rk3288_suspend_enter,
 225         .valid   = suspend_valid_only_mem,
 226         .prepare = rk3288_suspend_prepare,
 227         .finish  = rk3288_suspend_finish,
 228 };
 229
 230 static const struct rockchip_pm_data rk3288_pm_data __initconst = {
 231         .ops = &rk3288_suspend_ops,
 232         .init = rk3288_suspend_init,
 233 };
 234
 235 static const struct of_device_id rockchip_pmu_of_device_ids[] __initconst = {
 236         {
 237                 .compatible = "rockchip,rk3288-pmu",
 238                 .data = &rk3288_pm_data,
 239         },
 240         { /* sentinel */ },
 241 };
 242
 243 void __init rockchip_suspend_init(void)
 244 {
 245         const struct rockchip_pm_data *pm_data;
 246         const struct of_device_id *match;
 247         struct device_node *np;
 248         int ret;
 249
 250         np = of_find_matching_node_and_match(NULL, rockchip_pmu_of_device_ids,
 251                                              &match);
 252         if (!match) {
 253                 pr_err("Failed to find PMU node\n");
 254                 return;
 255         }
 256         pm_data = (struct rockchip_pm_data *) match->data;
 257
 258         if (pm_data->init) {
 259                 ret = pm_data->init(np);
 260
 261                 if (ret) {
 262                         pr_err("%s: matches init error %d\n", __func__, ret);
 263                         return;
 264                 }
 265         }
 266
 267         suspend_set_ops(pm_data->ops);
 268 }