2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
3 * Author: Tony Xie <tony.xie@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/init.h>
18 #include <linux/kernel.h>
20 #include <linux/of_address.h>
21 #include <linux/regmap.h>
22 #include <linux/suspend.h>
23 #include <linux/mfd/syscon.h>
24 #include <linux/regulator/machine.h>
26 #include <asm/cacheflush.h>
27 #include <asm/tlbflush.h>
28 #include <asm/suspend.h>
32 /* These enum are option of low power mode */
34 ROCKCHIP_ARM_OFF_LOGIC_NORMAL
= 0,
35 ROCKCHIP_ARM_OFF_LOGIC_DEEP
= 1,
38 struct rockchip_pm_data
{
39 const struct platform_suspend_ops
*ops
;
40 int (*init
)(struct device_node
*np
);
43 static void __iomem
*rk3288_bootram_base
;
44 static phys_addr_t rk3288_bootram_phy
;
46 static struct regmap
*pmu_regmap
;
47 static struct regmap
*sgrf_regmap
;
49 static u32 rk3288_pmu_pwr_mode_con
;
50 static u32 rk3288_sgrf_soc_con0
;
52 static inline u32
rk3288_l2_config(void)
56 asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr
));
60 static void rk3288_config_bootdata(void)
62 rkpm_bootdata_cpusp
= rk3288_bootram_phy
+ (SZ_4K
- 8);
63 rkpm_bootdata_cpu_code
= virt_to_phys(cpu_resume
);
65 rkpm_bootdata_l2ctlr_f
= 1;
66 rkpm_bootdata_l2ctlr
= rk3288_l2_config();
69 static void rk3288_slp_mode_set(int level
)
71 u32 mode_set
, mode_set1
;
73 regmap_read(sgrf_regmap
, RK3288_SGRF_SOC_CON0
, &rk3288_sgrf_soc_con0
);
75 regmap_read(pmu_regmap
, RK3288_PMU_PWRMODE_CON
,
76 &rk3288_pmu_pwr_mode_con
);
78 /* set bit 8 so that system will resume to FAST_BOOT_ADDR */
79 regmap_write(sgrf_regmap
, RK3288_SGRF_SOC_CON0
,
80 SGRF_FAST_BOOT_EN
| SGRF_FAST_BOOT_EN_WRITE
);
82 /* booting address of resuming system is from this register value */
83 regmap_write(sgrf_regmap
, RK3288_SGRF_FAST_BOOT_ADDR
,
86 regmap_write(pmu_regmap
, RK3288_PMU_WAKEUP_CFG1
,
87 PMU_ARMINT_WAKEUP_EN
);
89 mode_set
= BIT(PMU_GLOBAL_INT_DISABLE
) | BIT(PMU_L2FLUSH_EN
) |
90 BIT(PMU_SREF0_ENTER_EN
) | BIT(PMU_SREF1_ENTER_EN
) |
91 BIT(PMU_DDR0_GATING_EN
) | BIT(PMU_DDR1_GATING_EN
) |
92 BIT(PMU_PWR_MODE_EN
) | BIT(PMU_CHIP_PD_EN
) |
95 mode_set1
= BIT(PMU_CLR_CORE
) | BIT(PMU_CLR_CPUP
);
97 if (level
== ROCKCHIP_ARM_OFF_LOGIC_DEEP
) {
98 /* arm off, logic deep sleep */
99 mode_set
|= BIT(PMU_BUS_PD_EN
) |
100 BIT(PMU_DDR1IO_RET_EN
) | BIT(PMU_DDR0IO_RET_EN
) |
101 BIT(PMU_OSC_24M_DIS
) | BIT(PMU_PMU_USE_LF
) |
102 BIT(PMU_ALIVE_USE_LF
) | BIT(PMU_PLL_PD_EN
);
104 mode_set1
|= BIT(PMU_CLR_ALIVE
) | BIT(PMU_CLR_BUS
) |
105 BIT(PMU_CLR_PERI
) | BIT(PMU_CLR_DMA
);
108 * arm off, logic normal
109 * if pmu_clk_core_src_gate_en is not set,
110 * wakeup will be error
112 mode_set
|= BIT(PMU_CLK_CORE_SRC_GATE_EN
);
115 regmap_write(pmu_regmap
, RK3288_PMU_PWRMODE_CON
, mode_set
);
116 regmap_write(pmu_regmap
, RK3288_PMU_PWRMODE_CON1
, mode_set1
);
119 static void rk3288_slp_mode_set_resume(void)
121 regmap_write(pmu_regmap
, RK3288_PMU_PWRMODE_CON
,
122 rk3288_pmu_pwr_mode_con
);
124 regmap_write(sgrf_regmap
, RK3288_SGRF_SOC_CON0
,
125 rk3288_sgrf_soc_con0
| SGRF_FAST_BOOT_EN_WRITE
);
128 static int rockchip_lpmode_enter(unsigned long arg
)
134 pr_err("%s: Failed to suspend\n", __func__
);
139 static int rk3288_suspend_enter(suspend_state_t state
)
143 rk3288_slp_mode_set(ROCKCHIP_ARM_OFF_LOGIC_NORMAL
);
145 cpu_suspend(0, rockchip_lpmode_enter
);
147 rk3288_slp_mode_set_resume();
154 static int rk3288_suspend_prepare(void)
156 return regulator_suspend_prepare(PM_SUSPEND_MEM
);
159 static void rk3288_suspend_finish(void)
161 if (regulator_suspend_finish())
162 pr_err("%s: Suspend finish failed\n", __func__
);
165 static int rk3288_suspend_init(struct device_node
*np
)
167 struct device_node
*sram_np
;
171 pmu_regmap
= syscon_node_to_regmap(np
);
172 if (IS_ERR(pmu_regmap
)) {
173 pr_err("%s: could not find pmu regmap\n", __func__
);
174 return PTR_ERR(pmu_regmap
);
177 sgrf_regmap
= syscon_regmap_lookup_by_compatible(
178 "rockchip,rk3288-sgrf");
179 if (IS_ERR(sgrf_regmap
)) {
180 pr_err("%s: could not find sgrf regmap\n", __func__
);
181 return PTR_ERR(pmu_regmap
);
184 sram_np
= of_find_compatible_node(NULL
, NULL
,
185 "rockchip,rk3288-pmu-sram");
187 pr_err("%s: could not find bootram dt node\n", __func__
);
191 rk3288_bootram_base
= of_iomap(sram_np
, 0);
192 if (!rk3288_bootram_base
) {
193 pr_err("%s: could not map bootram base\n", __func__
);
197 ret
= of_address_to_resource(sram_np
, 0, &res
);
199 pr_err("%s: could not get bootram phy addr\n", __func__
);
202 rk3288_bootram_phy
= res
.start
;
204 of_node_put(sram_np
);
206 rk3288_config_bootdata();
208 /* copy resume code and data to bootsram */
209 memcpy(rk3288_bootram_base
, rockchip_slp_cpu_resume
,
215 static const struct platform_suspend_ops rk3288_suspend_ops
= {
216 .enter
= rk3288_suspend_enter
,
217 .valid
= suspend_valid_only_mem
,
218 .prepare
= rk3288_suspend_prepare
,
219 .finish
= rk3288_suspend_finish
,
222 static const struct rockchip_pm_data rk3288_pm_data __initconst
= {
223 .ops
= &rk3288_suspend_ops
,
224 .init
= rk3288_suspend_init
,
227 static const struct of_device_id rockchip_pmu_of_device_ids
[] __initconst
= {
229 .compatible
= "rockchip,rk3288-pmu",
230 .data
= &rk3288_pm_data
,
235 void __init
rockchip_suspend_init(void)
237 const struct rockchip_pm_data
*pm_data
;
238 const struct of_device_id
*match
;
239 struct device_node
*np
;
242 np
= of_find_matching_node_and_match(NULL
, rockchip_pmu_of_device_ids
,
245 pr_err("Failed to find PMU node\n");
248 pm_data
= (struct rockchip_pm_data
*) match
->data
;
251 ret
= pm_data
->init(np
);
254 pr_err("%s: matches init error %d\n", __func__
, ret
);
259 suspend_set_ops(pm_data
->ops
);