2 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; version 2 of the
11 #ifndef _ASM_MPIC_MSGR_H
12 #define _ASM_MPIC_MSGR_H
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
28 /* Get a message register
30 * @reg_num: the MPIC message register to get
32 * A pointer to the message register is returned. If
33 * the message register asked for is already in use, then
34 * EBUSY is returned. If the number given is not associated
35 * with an actual message register, then ENODEV is returned.
36 * Successfully getting the register marks it as in use.
38 extern struct mpic_msgr
*mpic_msgr_get(unsigned int reg_num
);
40 /* Relinquish a message register
42 * @msgr: the message register to return
44 * Disables the given message register and marks it as free.
45 * After this call has completed successully the message
46 * register is available to be acquired by a call to
49 extern void mpic_msgr_put(struct mpic_msgr
*msgr
);
51 /* Enable a message register
53 * @msgr: the message register to enable
55 * The given message register is enabled for sending
58 extern void mpic_msgr_enable(struct mpic_msgr
*msgr
);
60 /* Disable a message register
62 * @msgr: the message register to disable
64 * The given message register is disabled for sending
67 extern void mpic_msgr_disable(struct mpic_msgr
*msgr
);
69 /* Write a message to a message register
71 * @msgr: the message register to write to
72 * @message: the message to write
74 * The given 32-bit message is written to the given message
75 * register. Writing to an enabled message registers fires
78 static inline void mpic_msgr_write(struct mpic_msgr
*msgr
, u32 message
)
80 out_be32(msgr
->base
, message
);
83 /* Read a message from a message register
85 * @msgr: the message register to read from
87 * Returns the 32-bit value currently in the given message register.
88 * Upon reading the register any interrupts for that register are
91 static inline u32
mpic_msgr_read(struct mpic_msgr
*msgr
)
93 return in_be32(msgr
->base
);
96 /* Clear a message register
98 * @msgr: the message register to clear
100 * Clears any interrupts associated with the given message register.
102 static inline void mpic_msgr_clear(struct mpic_msgr
*msgr
)
104 (void) mpic_msgr_read(msgr
);
107 /* Set the destination CPU for the message register
109 * @msgr: the message register whose destination is to be set
110 * @cpu_num: the Linux CPU number to bind the message register to
112 * Note that the CPU number given is the CPU number used by the kernel
113 * and *not* the actual hardware CPU number.
115 static inline void mpic_msgr_set_destination(struct mpic_msgr
*msgr
,
118 out_be32(msgr
->base
, 1 << get_hard_smp_processor_id(cpu_num
));
121 /* Get the IRQ number for the message register
122 * @msgr: the message register whose IRQ is to be returned
124 * Returns the IRQ number associated with the given message register.
125 * NO_IRQ is returned if this message register is not capable of
126 * receiving interrupts. What message register can and cannot receive
127 * interrupts is specified in the device tree for the system.
129 static inline int mpic_msgr_get_irq(struct mpic_msgr
*msgr
)
This page took 0.038214 seconds and 6 git commands to generate.