[PATCH] powerpc: get rid of per_cpu EEH counters
[deliverable/linux.git] / arch / powerpc / platforms / pseries / eeh.c
1 /*
2 * eeh.c
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
29 #include <asm/eeh.h>
30 #include <asm/eeh_event.h>
31 #include <asm/io.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
34 #include <asm/rtas.h>
35
36 #undef DEBUG
37
38 /** Overview:
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
52 *
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
60 * with EEH.
61 *
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
70 */
71
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
76 */
77 #define EEH_MAX_FAILS 100000
78
79 /* RTAS tokens */
80 static int ibm_set_eeh_option;
81 static int ibm_set_slot_reset;
82 static int ibm_read_slot_reset_state;
83 static int ibm_read_slot_reset_state2;
84 static int ibm_slot_error_detail;
85 static int ibm_get_config_addr_info;
86 static int ibm_configure_bridge;
87
88 int eeh_subsystem_enabled;
89 EXPORT_SYMBOL(eeh_subsystem_enabled);
90
91 /* Lock to avoid races due to multiple reports of an error */
92 static DEFINE_SPINLOCK(confirm_error_lock);
93
94 /* Buffer for reporting slot-error-detail rtas calls */
95 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
96 static DEFINE_SPINLOCK(slot_errbuf_lock);
97 static int eeh_error_buf_size;
98
99 /* System monitoring statistics */
100 static unsigned long no_device;
101 static unsigned long no_dn;
102 static unsigned long no_cfg_addr;
103 static unsigned long ignored_check;
104 static unsigned long total_mmio_ffs;
105 static unsigned long false_positives;
106 static unsigned long ignored_failures;
107 static unsigned long slot_resets;
108
109 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
110
111 /* --------------------------------------------------------------- */
112 /* Below lies the EEH event infrastructure */
113
114 void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
115 {
116 int config_addr;
117 unsigned long flags;
118 int rc;
119
120 /* Log the error with the rtas logger */
121 spin_lock_irqsave(&slot_errbuf_lock, flags);
122 memset(slot_errbuf, 0, eeh_error_buf_size);
123
124 /* Use PE configuration address, if present */
125 config_addr = pdn->eeh_config_addr;
126 if (pdn->eeh_pe_config_addr)
127 config_addr = pdn->eeh_pe_config_addr;
128
129 rc = rtas_call(ibm_slot_error_detail,
130 8, 1, NULL, config_addr,
131 BUID_HI(pdn->phb->buid),
132 BUID_LO(pdn->phb->buid), NULL, 0,
133 virt_to_phys(slot_errbuf),
134 eeh_error_buf_size,
135 severity);
136
137 if (rc == 0)
138 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
139 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
140 }
141
142 /**
143 * read_slot_reset_state - Read the reset state of a device node's slot
144 * @dn: device node to read
145 * @rets: array to return results in
146 */
147 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
148 {
149 int token, outputs;
150 int config_addr;
151
152 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
153 token = ibm_read_slot_reset_state2;
154 outputs = 4;
155 } else {
156 token = ibm_read_slot_reset_state;
157 rets[2] = 0; /* fake PE Unavailable info */
158 outputs = 3;
159 }
160
161 /* Use PE configuration address, if present */
162 config_addr = pdn->eeh_config_addr;
163 if (pdn->eeh_pe_config_addr)
164 config_addr = pdn->eeh_pe_config_addr;
165
166 return rtas_call(token, 3, outputs, rets, config_addr,
167 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
168 }
169
170 /**
171 * eeh_token_to_phys - convert EEH address token to phys address
172 * @token i/o token, should be address in the form 0xA....
173 */
174 static inline unsigned long eeh_token_to_phys(unsigned long token)
175 {
176 pte_t *ptep;
177 unsigned long pa;
178
179 ptep = find_linux_pte(init_mm.pgd, token);
180 if (!ptep)
181 return token;
182 pa = pte_pfn(*ptep) << PAGE_SHIFT;
183
184 return pa | (token & (PAGE_SIZE-1));
185 }
186
187 /**
188 * Return the "partitionable endpoint" (pe) under which this device lies
189 */
190 struct device_node * find_device_pe(struct device_node *dn)
191 {
192 while ((dn->parent) && PCI_DN(dn->parent) &&
193 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
194 dn = dn->parent;
195 }
196 return dn;
197 }
198
199 /** Mark all devices that are peers of this device as failed.
200 * Mark the device driver too, so that it can see the failure
201 * immediately; this is critical, since some drivers poll
202 * status registers in interrupts ... If a driver is polling,
203 * and the slot is frozen, then the driver can deadlock in
204 * an interrupt context, which is bad.
205 */
206
207 static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
208 {
209 while (dn) {
210 if (PCI_DN(dn)) {
211 PCI_DN(dn)->eeh_mode |= mode_flag;
212
213 /* Mark the pci device driver too */
214 struct pci_dev *dev = PCI_DN(dn)->pcidev;
215 if (dev && dev->driver)
216 dev->error_state = pci_channel_io_frozen;
217
218 if (dn->child)
219 __eeh_mark_slot (dn->child, mode_flag);
220 }
221 dn = dn->sibling;
222 }
223 }
224
225 void eeh_mark_slot (struct device_node *dn, int mode_flag)
226 {
227 dn = find_device_pe (dn);
228
229 /* Back up one, since config addrs might be shared */
230 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
231 dn = dn->parent;
232
233 PCI_DN(dn)->eeh_mode |= mode_flag;
234 __eeh_mark_slot (dn->child, mode_flag);
235 }
236
237 static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
238 {
239 while (dn) {
240 if (PCI_DN(dn)) {
241 PCI_DN(dn)->eeh_mode &= ~mode_flag;
242 PCI_DN(dn)->eeh_check_count = 0;
243 if (dn->child)
244 __eeh_clear_slot (dn->child, mode_flag);
245 }
246 dn = dn->sibling;
247 }
248 }
249
250 void eeh_clear_slot (struct device_node *dn, int mode_flag)
251 {
252 unsigned long flags;
253 spin_lock_irqsave(&confirm_error_lock, flags);
254
255 dn = find_device_pe (dn);
256
257 /* Back up one, since config addrs might be shared */
258 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
259 dn = dn->parent;
260
261 PCI_DN(dn)->eeh_mode &= ~mode_flag;
262 PCI_DN(dn)->eeh_check_count = 0;
263 __eeh_clear_slot (dn->child, mode_flag);
264 spin_unlock_irqrestore(&confirm_error_lock, flags);
265 }
266
267 /**
268 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
269 * @dn device node
270 * @dev pci device, if known
271 *
272 * Check for an EEH failure for the given device node. Call this
273 * routine if the result of a read was all 0xff's and you want to
274 * find out if this is due to an EEH slot freeze. This routine
275 * will query firmware for the EEH status.
276 *
277 * Returns 0 if there has not been an EEH error; otherwise returns
278 * a non-zero value and queues up a slot isolation event notification.
279 *
280 * It is safe to call this routine in an interrupt context.
281 */
282 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
283 {
284 int ret;
285 int rets[3];
286 unsigned long flags;
287 struct pci_dn *pdn;
288 enum pci_channel_state state;
289 int rc = 0;
290
291 total_mmio_ffs++;
292
293 if (!eeh_subsystem_enabled)
294 return 0;
295
296 if (!dn) {
297 no_dn++;
298 return 0;
299 }
300 pdn = PCI_DN(dn);
301
302 /* Access to IO BARs might get this far and still not want checking. */
303 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
304 pdn->eeh_mode & EEH_MODE_NOCHECK) {
305 ignored_check++;
306 #ifdef DEBUG
307 printk ("EEH:ignored check (%x) for %s %s\n",
308 pdn->eeh_mode, pci_name (dev), dn->full_name);
309 #endif
310 return 0;
311 }
312
313 if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) {
314 no_cfg_addr++;
315 return 0;
316 }
317
318 /* If we already have a pending isolation event for this
319 * slot, we know it's bad already, we don't need to check.
320 * Do this checking under a lock; as multiple PCI devices
321 * in one slot might report errors simultaneously, and we
322 * only want one error recovery routine running.
323 */
324 spin_lock_irqsave(&confirm_error_lock, flags);
325 rc = 1;
326 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
327 pdn->eeh_check_count ++;
328 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
329 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
330 pdn->eeh_check_count);
331 dump_stack();
332
333 /* re-read the slot reset state */
334 if (read_slot_reset_state(pdn, rets) != 0)
335 rets[0] = -1; /* reset state unknown */
336
337 /* If we are here, then we hit an infinite loop. Stop. */
338 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
339 }
340 goto dn_unlock;
341 }
342
343 /*
344 * Now test for an EEH failure. This is VERY expensive.
345 * Note that the eeh_config_addr may be a parent device
346 * in the case of a device behind a bridge, or it may be
347 * function zero of a multi-function device.
348 * In any case they must share a common PHB.
349 */
350 ret = read_slot_reset_state(pdn, rets);
351
352 /* If the call to firmware failed, punt */
353 if (ret != 0) {
354 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
355 ret, dn->full_name);
356 false_positives++;
357 rc = 0;
358 goto dn_unlock;
359 }
360
361 /* If EEH is not supported on this device, punt. */
362 if (rets[1] != 1) {
363 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
364 ret, dn->full_name);
365 false_positives++;
366 rc = 0;
367 goto dn_unlock;
368 }
369
370 /* If not the kind of error we know about, punt. */
371 if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
372 false_positives++;
373 rc = 0;
374 goto dn_unlock;
375 }
376
377 /* Note that config-io to empty slots may fail;
378 * we recognize empty because they don't have children. */
379 if ((rets[0] == 5) && (dn->child == NULL)) {
380 false_positives++;
381 rc = 0;
382 goto dn_unlock;
383 }
384
385 slot_resets++;
386
387 /* Avoid repeated reports of this failure, including problems
388 * with other functions on this device, and functions under
389 * bridges. */
390 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
391 spin_unlock_irqrestore(&confirm_error_lock, flags);
392
393 state = pci_channel_io_normal;
394 if ((rets[0] == 2) || (rets[0] == 4))
395 state = pci_channel_io_frozen;
396 if (rets[0] == 5)
397 state = pci_channel_io_perm_failure;
398 eeh_send_failure_event (dn, dev, state, rets[2]);
399
400 /* Most EEH events are due to device driver bugs. Having
401 * a stack trace will help the device-driver authors figure
402 * out what happened. So print that out. */
403 if (rets[0] != 5) dump_stack();
404 return 1;
405
406 dn_unlock:
407 spin_unlock_irqrestore(&confirm_error_lock, flags);
408 return rc;
409 }
410
411 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
412
413 /**
414 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
415 * @token i/o token, should be address in the form 0xA....
416 * @val value, should be all 1's (XXX why do we need this arg??)
417 *
418 * Check for an EEH failure at the given token address. Call this
419 * routine if the result of a read was all 0xff's and you want to
420 * find out if this is due to an EEH slot freeze event. This routine
421 * will query firmware for the EEH status.
422 *
423 * Note this routine is safe to call in an interrupt context.
424 */
425 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
426 {
427 unsigned long addr;
428 struct pci_dev *dev;
429 struct device_node *dn;
430
431 /* Finding the phys addr + pci device; this is pretty quick. */
432 addr = eeh_token_to_phys((unsigned long __force) token);
433 dev = pci_get_device_by_addr(addr);
434 if (!dev) {
435 no_device++;
436 return val;
437 }
438
439 dn = pci_device_to_OF_node(dev);
440 eeh_dn_check_failure (dn, dev);
441
442 pci_dev_put(dev);
443 return val;
444 }
445
446 EXPORT_SYMBOL(eeh_check_failure);
447
448 /* ------------------------------------------------------------- */
449 /* The code below deals with error recovery */
450
451 /** Return negative value if a permanent error, else return
452 * a number of milliseconds to wait until the PCI slot is
453 * ready to be used.
454 */
455 static int
456 eeh_slot_availability(struct pci_dn *pdn)
457 {
458 int rc;
459 int rets[3];
460
461 rc = read_slot_reset_state(pdn, rets);
462
463 if (rc) return rc;
464
465 if (rets[1] == 0) return -1; /* EEH is not supported */
466 if (rets[0] == 0) return 0; /* Oll Korrect */
467 if (rets[0] == 5) {
468 if (rets[2] == 0) return -1; /* permanently unavailable */
469 return rets[2]; /* number of millisecs to wait */
470 }
471 if (rets[0] == 1)
472 return 250;
473
474 printk (KERN_ERR "EEH: Slot unavailable: rc=%d, rets=%d %d %d\n",
475 rc, rets[0], rets[1], rets[2]);
476 return -1;
477 }
478
479 /** rtas_pci_slot_reset raises/lowers the pci #RST line
480 * state: 1/0 to raise/lower the #RST
481 *
482 * Clear the EEH-frozen condition on a slot. This routine
483 * asserts the PCI #RST line if the 'state' argument is '1',
484 * and drops the #RST line if 'state is '0'. This routine is
485 * safe to call in an interrupt context.
486 *
487 */
488
489 static void
490 rtas_pci_slot_reset(struct pci_dn *pdn, int state)
491 {
492 int config_addr;
493 int rc;
494
495 BUG_ON (pdn==NULL);
496
497 if (!pdn->phb) {
498 printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
499 pdn->node->full_name);
500 return;
501 }
502
503 /* Use PE configuration address, if present */
504 config_addr = pdn->eeh_config_addr;
505 if (pdn->eeh_pe_config_addr)
506 config_addr = pdn->eeh_pe_config_addr;
507
508 rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
509 config_addr,
510 BUID_HI(pdn->phb->buid),
511 BUID_LO(pdn->phb->buid),
512 state);
513 if (rc) {
514 printk (KERN_WARNING "EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
515 rc, state, pdn->node->full_name);
516 return;
517 }
518 }
519
520 /** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
521 * dn -- device node to be reset.
522 *
523 * Return 0 if success, else a non-zero value.
524 */
525
526 int
527 rtas_set_slot_reset(struct pci_dn *pdn)
528 {
529 int i, rc;
530
531 rtas_pci_slot_reset (pdn, 1);
532
533 /* The PCI bus requires that the reset be held high for at least
534 * a 100 milliseconds. We wait a bit longer 'just in case'. */
535
536 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
537 msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
538
539 /* We might get hit with another EEH freeze as soon as the
540 * pci slot reset line is dropped. Make sure we don't miss
541 * these, and clear the flag now. */
542 eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
543
544 rtas_pci_slot_reset (pdn, 0);
545
546 /* After a PCI slot has been reset, the PCI Express spec requires
547 * a 1.5 second idle time for the bus to stabilize, before starting
548 * up traffic. */
549 #define PCI_BUS_SETTLE_TIME_MSEC 1800
550 msleep (PCI_BUS_SETTLE_TIME_MSEC);
551
552 /* Now double check with the firmware to make sure the device is
553 * ready to be used; if not, wait for recovery. */
554 for (i=0; i<10; i++) {
555 rc = eeh_slot_availability (pdn);
556 if (rc < 0)
557 printk (KERN_ERR "EEH: failed (%d) to reset slot %s\n", rc, pdn->node->full_name);
558 if (rc == 0)
559 return 0;
560 if (rc < 0)
561 return -1;
562
563 msleep (rc+100);
564 }
565
566 rc = eeh_slot_availability (pdn);
567 if (rc)
568 printk (KERN_ERR "EEH: timeout resetting slot %s\n", pdn->node->full_name);
569
570 return rc;
571 }
572
573 /* ------------------------------------------------------- */
574 /** Save and restore of PCI BARs
575 *
576 * Although firmware will set up BARs during boot, it doesn't
577 * set up device BAR's after a device reset, although it will,
578 * if requested, set up bridge configuration. Thus, we need to
579 * configure the PCI devices ourselves.
580 */
581
582 /**
583 * __restore_bars - Restore the Base Address Registers
584 * Loads the PCI configuration space base address registers,
585 * the expansion ROM base address, the latency timer, and etc.
586 * from the saved values in the device node.
587 */
588 static inline void __restore_bars (struct pci_dn *pdn)
589 {
590 int i;
591
592 if (NULL==pdn->phb) return;
593 for (i=4; i<10; i++) {
594 rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
595 }
596
597 /* 12 == Expansion ROM Address */
598 rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
599
600 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
601 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
602
603 rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
604 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
605
606 rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
607 SAVED_BYTE(PCI_LATENCY_TIMER));
608
609 /* max latency, min grant, interrupt pin and line */
610 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
611 }
612
613 /**
614 * eeh_restore_bars - restore the PCI config space info
615 *
616 * This routine performs a recursive walk to the children
617 * of this device as well.
618 */
619 void eeh_restore_bars(struct pci_dn *pdn)
620 {
621 struct device_node *dn;
622 if (!pdn)
623 return;
624
625 if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
626 __restore_bars (pdn);
627
628 dn = pdn->node->child;
629 while (dn) {
630 eeh_restore_bars (PCI_DN(dn));
631 dn = dn->sibling;
632 }
633 }
634
635 /**
636 * eeh_save_bars - save device bars
637 *
638 * Save the values of the device bars. Unlike the restore
639 * routine, this routine is *not* recursive. This is because
640 * PCI devices are added individuallly; but, for the restore,
641 * an entire slot is reset at a time.
642 */
643 static void eeh_save_bars(struct pci_dn *pdn)
644 {
645 int i;
646
647 if (!pdn )
648 return;
649
650 for (i = 0; i < 16; i++)
651 rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
652 }
653
654 void
655 rtas_configure_bridge(struct pci_dn *pdn)
656 {
657 int config_addr;
658 int rc;
659
660 /* Use PE configuration address, if present */
661 config_addr = pdn->eeh_config_addr;
662 if (pdn->eeh_pe_config_addr)
663 config_addr = pdn->eeh_pe_config_addr;
664
665 rc = rtas_call(ibm_configure_bridge,3,1, NULL,
666 config_addr,
667 BUID_HI(pdn->phb->buid),
668 BUID_LO(pdn->phb->buid));
669 if (rc) {
670 printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
671 rc, pdn->node->full_name);
672 }
673 }
674
675 /* ------------------------------------------------------------- */
676 /* The code below deals with enabling EEH for devices during the
677 * early boot sequence. EEH must be enabled before any PCI probing
678 * can be done.
679 */
680
681 #define EEH_ENABLE 1
682
683 struct eeh_early_enable_info {
684 unsigned int buid_hi;
685 unsigned int buid_lo;
686 };
687
688 /* Enable eeh for the given device node. */
689 static void *early_enable_eeh(struct device_node *dn, void *data)
690 {
691 struct eeh_early_enable_info *info = data;
692 int ret;
693 char *status = get_property(dn, "status", NULL);
694 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
695 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
696 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
697 u32 *regs;
698 int enable;
699 struct pci_dn *pdn = PCI_DN(dn);
700
701 pdn->class_code = *class_code;
702 pdn->eeh_mode = 0;
703 pdn->eeh_check_count = 0;
704 pdn->eeh_freeze_count = 0;
705
706 if (status && strcmp(status, "ok") != 0)
707 return NULL; /* ignore devices with bad status */
708
709 /* Ignore bad nodes. */
710 if (!class_code || !vendor_id || !device_id)
711 return NULL;
712
713 /* There is nothing to check on PCI to ISA bridges */
714 if (dn->type && !strcmp(dn->type, "isa")) {
715 pdn->eeh_mode |= EEH_MODE_NOCHECK;
716 return NULL;
717 }
718
719 /*
720 * Now decide if we are going to "Disable" EEH checking
721 * for this device. We still run with the EEH hardware active,
722 * but we won't be checking for ff's. This means a driver
723 * could return bad data (very bad!), an interrupt handler could
724 * hang waiting on status bits that won't change, etc.
725 * But there are a few cases like display devices that make sense.
726 */
727 enable = 1; /* i.e. we will do checking */
728 #if 0
729 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
730 enable = 0;
731 #endif
732
733 if (!enable)
734 pdn->eeh_mode |= EEH_MODE_NOCHECK;
735
736 /* Ok... see if this device supports EEH. Some do, some don't,
737 * and the only way to find out is to check each and every one. */
738 regs = (u32 *)get_property(dn, "reg", NULL);
739 if (regs) {
740 /* First register entry is addr (00BBSS00) */
741 /* Try to enable eeh */
742 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
743 regs[0], info->buid_hi, info->buid_lo,
744 EEH_ENABLE);
745
746 if (ret == 0) {
747 eeh_subsystem_enabled = 1;
748 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
749 pdn->eeh_config_addr = regs[0];
750
751 /* If the newer, better, ibm,get-config-addr-info is supported,
752 * then use that instead. */
753 pdn->eeh_pe_config_addr = 0;
754 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
755 unsigned int rets[2];
756 ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets,
757 pdn->eeh_config_addr,
758 info->buid_hi, info->buid_lo,
759 0);
760 if (ret == 0)
761 pdn->eeh_pe_config_addr = rets[0];
762 }
763 #ifdef DEBUG
764 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
765 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
766 #endif
767 } else {
768
769 /* This device doesn't support EEH, but it may have an
770 * EEH parent, in which case we mark it as supported. */
771 if (dn->parent && PCI_DN(dn->parent)
772 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
773 /* Parent supports EEH. */
774 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
775 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
776 return NULL;
777 }
778 }
779 } else {
780 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
781 dn->full_name);
782 }
783
784 eeh_save_bars(pdn);
785 return NULL;
786 }
787
788 /*
789 * Initialize EEH by trying to enable it for all of the adapters in the system.
790 * As a side effect we can determine here if eeh is supported at all.
791 * Note that we leave EEH on so failed config cycles won't cause a machine
792 * check. If a user turns off EEH for a particular adapter they are really
793 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
794 * grant access to a slot if EEH isn't enabled, and so we always enable
795 * EEH for all slots/all devices.
796 *
797 * The eeh-force-off option disables EEH checking globally, for all slots.
798 * Even if force-off is set, the EEH hardware is still enabled, so that
799 * newer systems can boot.
800 */
801 void __init eeh_init(void)
802 {
803 struct device_node *phb, *np;
804 struct eeh_early_enable_info info;
805
806 spin_lock_init(&confirm_error_lock);
807 spin_lock_init(&slot_errbuf_lock);
808
809 np = of_find_node_by_path("/rtas");
810 if (np == NULL)
811 return;
812
813 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
814 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
815 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
816 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
817 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
818 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
819 ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
820
821 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
822 return;
823
824 eeh_error_buf_size = rtas_token("rtas-error-log-max");
825 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
826 eeh_error_buf_size = 1024;
827 }
828 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
829 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
830 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
831 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
832 }
833
834 /* Enable EEH for all adapters. Note that eeh requires buid's */
835 for (phb = of_find_node_by_name(NULL, "pci"); phb;
836 phb = of_find_node_by_name(phb, "pci")) {
837 unsigned long buid;
838
839 buid = get_phb_buid(phb);
840 if (buid == 0 || PCI_DN(phb) == NULL)
841 continue;
842
843 info.buid_lo = BUID_LO(buid);
844 info.buid_hi = BUID_HI(buid);
845 traverse_pci_devices(phb, early_enable_eeh, &info);
846 }
847
848 if (eeh_subsystem_enabled)
849 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
850 else
851 printk(KERN_WARNING "EEH: No capable adapters found\n");
852 }
853
854 /**
855 * eeh_add_device_early - enable EEH for the indicated device_node
856 * @dn: device node for which to set up EEH
857 *
858 * This routine must be used to perform EEH initialization for PCI
859 * devices that were added after system boot (e.g. hotplug, dlpar).
860 * This routine must be called before any i/o is performed to the
861 * adapter (inluding any config-space i/o).
862 * Whether this actually enables EEH or not for this device depends
863 * on the CEC architecture, type of the device, on earlier boot
864 * command-line arguments & etc.
865 */
866 void eeh_add_device_early(struct device_node *dn)
867 {
868 struct pci_controller *phb;
869 struct eeh_early_enable_info info;
870
871 if (!dn || !PCI_DN(dn))
872 return;
873 phb = PCI_DN(dn)->phb;
874
875 /* USB Bus children of PCI devices will not have BUID's */
876 if (NULL == phb || 0 == phb->buid)
877 return;
878
879 info.buid_hi = BUID_HI(phb->buid);
880 info.buid_lo = BUID_LO(phb->buid);
881 early_enable_eeh(dn, &info);
882 }
883 EXPORT_SYMBOL_GPL(eeh_add_device_early);
884
885 void eeh_add_device_tree_early(struct device_node *dn)
886 {
887 struct device_node *sib;
888 for (sib = dn->child; sib; sib = sib->sibling)
889 eeh_add_device_tree_early(sib);
890 eeh_add_device_early(dn);
891 }
892 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
893
894 /**
895 * eeh_add_device_late - perform EEH initialization for the indicated pci device
896 * @dev: pci device for which to set up EEH
897 *
898 * This routine must be used to complete EEH initialization for PCI
899 * devices that were added after system boot (e.g. hotplug, dlpar).
900 */
901 void eeh_add_device_late(struct pci_dev *dev)
902 {
903 struct device_node *dn;
904 struct pci_dn *pdn;
905
906 if (!dev || !eeh_subsystem_enabled)
907 return;
908
909 #ifdef DEBUG
910 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
911 #endif
912
913 pci_dev_get (dev);
914 dn = pci_device_to_OF_node(dev);
915 pdn = PCI_DN(dn);
916 pdn->pcidev = dev;
917
918 pci_addr_cache_insert_device (dev);
919 }
920 EXPORT_SYMBOL_GPL(eeh_add_device_late);
921
922 /**
923 * eeh_remove_device - undo EEH setup for the indicated pci device
924 * @dev: pci device to be removed
925 *
926 * This routine should be when a device is removed from a running
927 * system (e.g. by hotplug or dlpar).
928 */
929 void eeh_remove_device(struct pci_dev *dev)
930 {
931 struct device_node *dn;
932 if (!dev || !eeh_subsystem_enabled)
933 return;
934
935 /* Unregister the device with the EEH/PCI address search system */
936 #ifdef DEBUG
937 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
938 #endif
939 pci_addr_cache_remove_device(dev);
940
941 dn = pci_device_to_OF_node(dev);
942 PCI_DN(dn)->pcidev = NULL;
943 pci_dev_put (dev);
944 }
945 EXPORT_SYMBOL_GPL(eeh_remove_device);
946
947 void eeh_remove_bus_device(struct pci_dev *dev)
948 {
949 eeh_remove_device(dev);
950 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
951 struct pci_bus *bus = dev->subordinate;
952 struct list_head *ln;
953 if (!bus)
954 return;
955 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
956 struct pci_dev *pdev = pci_dev_b(ln);
957 if (pdev)
958 eeh_remove_bus_device(pdev);
959 }
960 }
961 }
962 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
963
964 static int proc_eeh_show(struct seq_file *m, void *v)
965 {
966 if (0 == eeh_subsystem_enabled) {
967 seq_printf(m, "EEH Subsystem is globally disabled\n");
968 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs);
969 } else {
970 seq_printf(m, "EEH Subsystem is enabled\n");
971 seq_printf(m,
972 "no device=%ld\n"
973 "no device node=%ld\n"
974 "no config address=%ld\n"
975 "check not wanted=%ld\n"
976 "eeh_total_mmio_ffs=%ld\n"
977 "eeh_false_positives=%ld\n"
978 "eeh_ignored_failures=%ld\n"
979 "eeh_slot_resets=%ld\n",
980 no_device, no_dn, no_cfg_addr,
981 ignored_check, total_mmio_ffs,
982 false_positives, ignored_failures,
983 slot_resets);
984 }
985
986 return 0;
987 }
988
989 static int proc_eeh_open(struct inode *inode, struct file *file)
990 {
991 return single_open(file, proc_eeh_show, NULL);
992 }
993
994 static struct file_operations proc_eeh_operations = {
995 .open = proc_eeh_open,
996 .read = seq_read,
997 .llseek = seq_lseek,
998 .release = single_release,
999 };
1000
1001 static int __init eeh_init_proc(void)
1002 {
1003 struct proc_dir_entry *e;
1004
1005 if (platform_is_pseries()) {
1006 e = create_proc_entry("ppc64/eeh", 0, NULL);
1007 if (e)
1008 e->proc_fops = &proc_eeh_operations;
1009 }
1010
1011 return 0;
1012 }
1013 __initcall(eeh_init_proc);
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