3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 100000
80 static int ibm_set_eeh_option
;
81 static int ibm_set_slot_reset
;
82 static int ibm_read_slot_reset_state
;
83 static int ibm_read_slot_reset_state2
;
84 static int ibm_slot_error_detail
;
85 static int ibm_get_config_addr_info
;
87 int eeh_subsystem_enabled
;
88 EXPORT_SYMBOL(eeh_subsystem_enabled
);
90 /* Lock to avoid races due to multiple reports of an error */
91 static DEFINE_SPINLOCK(confirm_error_lock
);
93 /* Buffer for reporting slot-error-detail rtas calls */
94 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
95 static DEFINE_SPINLOCK(slot_errbuf_lock
);
96 static int eeh_error_buf_size
;
98 /* System monitoring statistics */
99 static DEFINE_PER_CPU(unsigned long, no_device
);
100 static DEFINE_PER_CPU(unsigned long, no_dn
);
101 static DEFINE_PER_CPU(unsigned long, no_cfg_addr
);
102 static DEFINE_PER_CPU(unsigned long, ignored_check
);
103 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs
);
104 static DEFINE_PER_CPU(unsigned long, false_positives
);
105 static DEFINE_PER_CPU(unsigned long, ignored_failures
);
106 static DEFINE_PER_CPU(unsigned long, slot_resets
);
108 /* --------------------------------------------------------------- */
109 /* Below lies the EEH event infrastructure */
111 void eeh_slot_error_detail (struct pci_dn
*pdn
, int severity
)
116 /* Log the error with the rtas logger */
117 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
118 memset(slot_errbuf
, 0, eeh_error_buf_size
);
120 rc
= rtas_call(ibm_slot_error_detail
,
121 8, 1, NULL
, pdn
->eeh_config_addr
,
122 BUID_HI(pdn
->phb
->buid
),
123 BUID_LO(pdn
->phb
->buid
), NULL
, 0,
124 virt_to_phys(slot_errbuf
),
129 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
130 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
134 * read_slot_reset_state - Read the reset state of a device node's slot
135 * @dn: device node to read
136 * @rets: array to return results in
138 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
142 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
143 token
= ibm_read_slot_reset_state2
;
146 token
= ibm_read_slot_reset_state
;
147 rets
[2] = 0; /* fake PE Unavailable info */
151 return rtas_call(token
, 3, outputs
, rets
, pdn
->eeh_config_addr
,
152 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
156 * eeh_token_to_phys - convert EEH address token to phys address
157 * @token i/o token, should be address in the form 0xA....
159 static inline unsigned long eeh_token_to_phys(unsigned long token
)
164 ptep
= find_linux_pte(init_mm
.pgd
, token
);
167 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
169 return pa
| (token
& (PAGE_SIZE
-1));
173 * Return the "partitionable endpoint" (pe) under which this device lies
175 struct device_node
* find_device_pe(struct device_node
*dn
)
177 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
178 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
184 /** Mark all devices that are peers of this device as failed.
185 * Mark the device driver too, so that it can see the failure
186 * immediately; this is critical, since some drivers poll
187 * status registers in interrupts ... If a driver is polling,
188 * and the slot is frozen, then the driver can deadlock in
189 * an interrupt context, which is bad.
192 static void __eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
196 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
198 /* Mark the pci device driver too */
199 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
200 if (dev
&& dev
->driver
)
201 dev
->error_state
= pci_channel_io_frozen
;
204 __eeh_mark_slot (dn
->child
, mode_flag
);
210 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
212 dn
= find_device_pe (dn
);
213 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
214 __eeh_mark_slot (dn
->child
, mode_flag
);
217 static void __eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
221 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
222 PCI_DN(dn
)->eeh_check_count
= 0;
224 __eeh_clear_slot (dn
->child
, mode_flag
);
230 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
233 spin_lock_irqsave(&confirm_error_lock
, flags
);
234 dn
= find_device_pe (dn
);
235 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
236 PCI_DN(dn
)->eeh_check_count
= 0;
237 __eeh_clear_slot (dn
->child
, mode_flag
);
238 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
242 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
244 * @dev pci device, if known
246 * Check for an EEH failure for the given device node. Call this
247 * routine if the result of a read was all 0xff's and you want to
248 * find out if this is due to an EEH slot freeze. This routine
249 * will query firmware for the EEH status.
251 * Returns 0 if there has not been an EEH error; otherwise returns
252 * a non-zero value and queues up a slot isolation event notification.
254 * It is safe to call this routine in an interrupt context.
256 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
262 enum pci_channel_state state
;
265 __get_cpu_var(total_mmio_ffs
)++;
267 if (!eeh_subsystem_enabled
)
271 __get_cpu_var(no_dn
)++;
276 /* Access to IO BARs might get this far and still not want checking. */
277 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
278 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
279 __get_cpu_var(ignored_check
)++;
281 printk ("EEH:ignored check (%x) for %s %s\n",
282 pdn
->eeh_mode
, pci_name (dev
), dn
->full_name
);
287 if (!pdn
->eeh_config_addr
) {
288 __get_cpu_var(no_cfg_addr
)++;
292 /* If we already have a pending isolation event for this
293 * slot, we know it's bad already, we don't need to check.
294 * Do this checking under a lock; as multiple PCI devices
295 * in one slot might report errors simultaneously, and we
296 * only want one error recovery routine running.
298 spin_lock_irqsave(&confirm_error_lock
, flags
);
300 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
301 pdn
->eeh_check_count
++;
302 if (pdn
->eeh_check_count
>= EEH_MAX_FAILS
) {
303 printk (KERN_ERR
"EEH: Device driver ignored %d bad reads, panicing\n",
304 pdn
->eeh_check_count
);
307 /* re-read the slot reset state */
308 if (read_slot_reset_state(pdn
, rets
) != 0)
309 rets
[0] = -1; /* reset state unknown */
311 /* If we are here, then we hit an infinite loop. Stop. */
312 panic("EEH: MMIO halt (%d) on device:%s\n", rets
[0], pci_name(dev
));
318 * Now test for an EEH failure. This is VERY expensive.
319 * Note that the eeh_config_addr may be a parent device
320 * in the case of a device behind a bridge, or it may be
321 * function zero of a multi-function device.
322 * In any case they must share a common PHB.
324 ret
= read_slot_reset_state(pdn
, rets
);
326 /* If the call to firmware failed, punt */
328 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
330 __get_cpu_var(false_positives
)++;
335 /* If EEH is not supported on this device, punt. */
337 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
339 __get_cpu_var(false_positives
)++;
344 /* If not the kind of error we know about, punt. */
345 if (rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
346 __get_cpu_var(false_positives
)++;
351 /* Note that config-io to empty slots may fail;
352 * we recognize empty because they don't have children. */
353 if ((rets
[0] == 5) && (dn
->child
== NULL
)) {
354 __get_cpu_var(false_positives
)++;
359 __get_cpu_var(slot_resets
)++;
361 /* Avoid repeated reports of this failure, including problems
362 * with other functions on this device, and functions under
364 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
365 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
367 state
= pci_channel_io_normal
;
368 if ((rets
[0] == 2) || (rets
[0] == 4))
369 state
= pci_channel_io_frozen
;
371 state
= pci_channel_io_perm_failure
;
372 eeh_send_failure_event (dn
, dev
, state
, rets
[2]);
374 /* Most EEH events are due to device driver bugs. Having
375 * a stack trace will help the device-driver authors figure
376 * out what happened. So print that out. */
377 if (rets
[0] != 5) dump_stack();
381 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
385 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
388 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
389 * @token i/o token, should be address in the form 0xA....
390 * @val value, should be all 1's (XXX why do we need this arg??)
392 * Check for an EEH failure at the given token address. Call this
393 * routine if the result of a read was all 0xff's and you want to
394 * find out if this is due to an EEH slot freeze event. This routine
395 * will query firmware for the EEH status.
397 * Note this routine is safe to call in an interrupt context.
399 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
403 struct device_node
*dn
;
405 /* Finding the phys addr + pci device; this is pretty quick. */
406 addr
= eeh_token_to_phys((unsigned long __force
) token
);
407 dev
= pci_get_device_by_addr(addr
);
409 __get_cpu_var(no_device
)++;
413 dn
= pci_device_to_OF_node(dev
);
414 eeh_dn_check_failure (dn
, dev
);
420 EXPORT_SYMBOL(eeh_check_failure
);
422 /* ------------------------------------------------------------- */
423 /* The code below deals with error recovery */
425 /** Return negative value if a permanent error, else return
426 * a number of milliseconds to wait until the PCI slot is
430 eeh_slot_availability(struct pci_dn
*pdn
)
435 rc
= read_slot_reset_state(pdn
, rets
);
439 if (rets
[1] == 0) return -1; /* EEH is not supported */
440 if (rets
[0] == 0) return 0; /* Oll Korrect */
442 if (rets
[2] == 0) return -1; /* permanently unavailable */
443 return rets
[2]; /* number of millisecs to wait */
448 /** rtas_pci_slot_reset raises/lowers the pci #RST line
449 * state: 1/0 to raise/lower the #RST
451 * Clear the EEH-frozen condition on a slot. This routine
452 * asserts the PCI #RST line if the 'state' argument is '1',
453 * and drops the #RST line if 'state is '0'. This routine is
454 * safe to call in an interrupt context.
459 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
467 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
468 pdn
->node
->full_name
);
472 /* Use PE configuration address, if present */
473 config_addr
= pdn
->eeh_config_addr
;
474 if (pdn
->eeh_pe_config_addr
)
475 config_addr
= pdn
->eeh_pe_config_addr
;
477 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
479 BUID_HI(pdn
->phb
->buid
),
480 BUID_LO(pdn
->phb
->buid
),
483 printk (KERN_WARNING
"EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
484 rc
, state
, pdn
->node
->full_name
);
489 /** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
490 * dn -- device node to be reset.
494 rtas_set_slot_reset(struct pci_dn
*pdn
)
498 rtas_pci_slot_reset (pdn
, 1);
500 /* The PCI bus requires that the reset be held high for at least
501 * a 100 milliseconds. We wait a bit longer 'just in case'. */
503 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
504 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
506 /* We might get hit with another EEH freeze as soon as the
507 * pci slot reset line is dropped. Make sure we don't miss
508 * these, and clear the flag now. */
509 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
511 rtas_pci_slot_reset (pdn
, 0);
513 /* After a PCI slot has been reset, the PCI Express spec requires
514 * a 1.5 second idle time for the bus to stabilize, before starting
516 #define PCI_BUS_SETTLE_TIME_MSEC 1800
517 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
519 /* Now double check with the firmware to make sure the device is
520 * ready to be used; if not, wait for recovery. */
521 for (i
=0; i
<10; i
++) {
522 rc
= eeh_slot_availability (pdn
);
529 /* ------------------------------------------------------- */
530 /** Save and restore of PCI BARs
532 * Although firmware will set up BARs during boot, it doesn't
533 * set up device BAR's after a device reset, although it will,
534 * if requested, set up bridge configuration. Thus, we need to
535 * configure the PCI devices ourselves.
539 * __restore_bars - Restore the Base Address Registers
540 * Loads the PCI configuration space base address registers,
541 * the expansion ROM base address, the latency timer, and etc.
542 * from the saved values in the device node.
544 static inline void __restore_bars (struct pci_dn
*pdn
)
548 if (NULL
==pdn
->phb
) return;
549 for (i
=4; i
<10; i
++) {
550 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
553 /* 12 == Expansion ROM Address */
554 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
556 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
557 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
559 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
560 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
562 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
563 SAVED_BYTE(PCI_LATENCY_TIMER
));
565 /* max latency, min grant, interrupt pin and line */
566 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
570 * eeh_restore_bars - restore the PCI config space info
572 * This routine performs a recursive walk to the children
573 * of this device as well.
575 void eeh_restore_bars(struct pci_dn
*pdn
)
577 struct device_node
*dn
;
581 if (! pdn
->eeh_is_bridge
)
582 __restore_bars (pdn
);
584 dn
= pdn
->node
->child
;
586 eeh_restore_bars (PCI_DN(dn
));
592 * eeh_save_bars - save device bars
594 * Save the values of the device bars. Unlike the restore
595 * routine, this routine is *not* recursive. This is because
596 * PCI devices are added individuallly; but, for the restore,
597 * an entire slot is reset at a time.
599 void eeh_save_bars(struct pci_dev
* pdev
, struct pci_dn
*pdn
)
606 for (i
= 0; i
< 16; i
++)
607 pci_read_config_dword(pdev
, i
* 4, &pdn
->config_space
[i
]);
609 if (pdev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
)
610 pdn
->eeh_is_bridge
= 1;
614 rtas_configure_bridge(struct pci_dn
*pdn
)
616 int token
= rtas_token ("ibm,configure-bridge");
619 if (token
== RTAS_UNKNOWN_SERVICE
)
621 rc
= rtas_call(token
,3,1, NULL
,
622 pdn
->eeh_config_addr
,
623 BUID_HI(pdn
->phb
->buid
),
624 BUID_LO(pdn
->phb
->buid
));
626 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
627 rc
, pdn
->node
->full_name
);
631 /* ------------------------------------------------------------- */
632 /* The code below deals with enabling EEH for devices during the
633 * early boot sequence. EEH must be enabled before any PCI probing
639 struct eeh_early_enable_info
{
640 unsigned int buid_hi
;
641 unsigned int buid_lo
;
644 /* Enable eeh for the given device node. */
645 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
647 struct eeh_early_enable_info
*info
= data
;
649 char *status
= get_property(dn
, "status", NULL
);
650 u32
*class_code
= (u32
*)get_property(dn
, "class-code", NULL
);
651 u32
*vendor_id
= (u32
*)get_property(dn
, "vendor-id", NULL
);
652 u32
*device_id
= (u32
*)get_property(dn
, "device-id", NULL
);
655 struct pci_dn
*pdn
= PCI_DN(dn
);
658 pdn
->eeh_check_count
= 0;
659 pdn
->eeh_freeze_count
= 0;
661 if (status
&& strcmp(status
, "ok") != 0)
662 return NULL
; /* ignore devices with bad status */
664 /* Ignore bad nodes. */
665 if (!class_code
|| !vendor_id
|| !device_id
)
668 /* There is nothing to check on PCI to ISA bridges */
669 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
670 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
675 * Now decide if we are going to "Disable" EEH checking
676 * for this device. We still run with the EEH hardware active,
677 * but we won't be checking for ff's. This means a driver
678 * could return bad data (very bad!), an interrupt handler could
679 * hang waiting on status bits that won't change, etc.
680 * But there are a few cases like display devices that make sense.
682 enable
= 1; /* i.e. we will do checking */
684 if ((*class_code
>> 16) == PCI_BASE_CLASS_DISPLAY
)
689 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
691 /* Ok... see if this device supports EEH. Some do, some don't,
692 * and the only way to find out is to check each and every one. */
693 regs
= (u32
*)get_property(dn
, "reg", NULL
);
695 /* First register entry is addr (00BBSS00) */
696 /* Try to enable eeh */
697 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
698 regs
[0], info
->buid_hi
, info
->buid_lo
,
702 eeh_subsystem_enabled
= 1;
703 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
704 pdn
->eeh_config_addr
= regs
[0];
706 /* If the newer, better, ibm,get-config-addr-info is supported,
707 * then use that instead. */
708 pdn
->eeh_pe_config_addr
= 0;
709 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
710 unsigned int rets
[2];
711 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
712 pdn
->eeh_config_addr
,
713 info
->buid_hi
, info
->buid_lo
,
716 pdn
->eeh_pe_config_addr
= rets
[0];
719 printk(KERN_DEBUG
"EEH: %s: eeh enabled, config=%x pe_config=%x\n",
720 dn
->full_name
, pdn
->eeh_config_addr
, pdn
->eeh_pe_config_addr
);
724 /* This device doesn't support EEH, but it may have an
725 * EEH parent, in which case we mark it as supported. */
726 if (dn
->parent
&& PCI_DN(dn
->parent
)
727 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
728 /* Parent supports EEH. */
729 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
730 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
735 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
743 * Initialize EEH by trying to enable it for all of the adapters in the system.
744 * As a side effect we can determine here if eeh is supported at all.
745 * Note that we leave EEH on so failed config cycles won't cause a machine
746 * check. If a user turns off EEH for a particular adapter they are really
747 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
748 * grant access to a slot if EEH isn't enabled, and so we always enable
749 * EEH for all slots/all devices.
751 * The eeh-force-off option disables EEH checking globally, for all slots.
752 * Even if force-off is set, the EEH hardware is still enabled, so that
753 * newer systems can boot.
755 void __init
eeh_init(void)
757 struct device_node
*phb
, *np
;
758 struct eeh_early_enable_info info
;
760 spin_lock_init(&confirm_error_lock
);
761 spin_lock_init(&slot_errbuf_lock
);
763 np
= of_find_node_by_path("/rtas");
767 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
768 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
769 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
770 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
771 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
772 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
774 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
777 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
778 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
779 eeh_error_buf_size
= 1024;
781 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
782 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
783 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
784 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
787 /* Enable EEH for all adapters. Note that eeh requires buid's */
788 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
789 phb
= of_find_node_by_name(phb
, "pci")) {
792 buid
= get_phb_buid(phb
);
793 if (buid
== 0 || PCI_DN(phb
) == NULL
)
796 info
.buid_lo
= BUID_LO(buid
);
797 info
.buid_hi
= BUID_HI(buid
);
798 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
801 if (eeh_subsystem_enabled
)
802 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
804 printk(KERN_WARNING
"EEH: No capable adapters found\n");
808 * eeh_add_device_early - enable EEH for the indicated device_node
809 * @dn: device node for which to set up EEH
811 * This routine must be used to perform EEH initialization for PCI
812 * devices that were added after system boot (e.g. hotplug, dlpar).
813 * This routine must be called before any i/o is performed to the
814 * adapter (inluding any config-space i/o).
815 * Whether this actually enables EEH or not for this device depends
816 * on the CEC architecture, type of the device, on earlier boot
817 * command-line arguments & etc.
819 void eeh_add_device_early(struct device_node
*dn
)
821 struct pci_controller
*phb
;
822 struct eeh_early_enable_info info
;
824 if (!dn
|| !PCI_DN(dn
))
826 phb
= PCI_DN(dn
)->phb
;
828 /* USB Bus children of PCI devices will not have BUID's */
829 if (NULL
== phb
|| 0 == phb
->buid
)
832 info
.buid_hi
= BUID_HI(phb
->buid
);
833 info
.buid_lo
= BUID_LO(phb
->buid
);
834 early_enable_eeh(dn
, &info
);
836 EXPORT_SYMBOL_GPL(eeh_add_device_early
);
838 void eeh_add_device_tree_early(struct device_node
*dn
)
840 struct device_node
*sib
;
841 for (sib
= dn
->child
; sib
; sib
= sib
->sibling
)
842 eeh_add_device_tree_early(sib
);
843 eeh_add_device_early(dn
);
845 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
848 * eeh_add_device_late - perform EEH initialization for the indicated pci device
849 * @dev: pci device for which to set up EEH
851 * This routine must be used to complete EEH initialization for PCI
852 * devices that were added after system boot (e.g. hotplug, dlpar).
854 void eeh_add_device_late(struct pci_dev
*dev
)
856 struct device_node
*dn
;
859 if (!dev
|| !eeh_subsystem_enabled
)
863 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
867 dn
= pci_device_to_OF_node(dev
);
871 pci_addr_cache_insert_device (dev
);
872 eeh_save_bars(dev
, pdn
);
874 EXPORT_SYMBOL_GPL(eeh_add_device_late
);
877 * eeh_remove_device - undo EEH setup for the indicated pci device
878 * @dev: pci device to be removed
880 * This routine should be when a device is removed from a running
881 * system (e.g. by hotplug or dlpar).
883 void eeh_remove_device(struct pci_dev
*dev
)
885 struct device_node
*dn
;
886 if (!dev
|| !eeh_subsystem_enabled
)
889 /* Unregister the device with the EEH/PCI address search system */
891 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
893 pci_addr_cache_remove_device(dev
);
895 dn
= pci_device_to_OF_node(dev
);
896 PCI_DN(dn
)->pcidev
= NULL
;
899 EXPORT_SYMBOL_GPL(eeh_remove_device
);
901 void eeh_remove_bus_device(struct pci_dev
*dev
)
903 eeh_remove_device(dev
);
904 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
905 struct pci_bus
*bus
= dev
->subordinate
;
906 struct list_head
*ln
;
909 for (ln
= bus
->devices
.next
; ln
!= &bus
->devices
; ln
= ln
->next
) {
910 struct pci_dev
*pdev
= pci_dev_b(ln
);
912 eeh_remove_bus_device(pdev
);
916 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
918 static int proc_eeh_show(struct seq_file
*m
, void *v
)
921 unsigned long ffs
= 0, positives
= 0, failures
= 0;
922 unsigned long resets
= 0;
923 unsigned long no_dev
= 0, no_dn
= 0, no_cfg
= 0, no_check
= 0;
926 ffs
+= per_cpu(total_mmio_ffs
, cpu
);
927 positives
+= per_cpu(false_positives
, cpu
);
928 failures
+= per_cpu(ignored_failures
, cpu
);
929 resets
+= per_cpu(slot_resets
, cpu
);
930 no_dev
+= per_cpu(no_device
, cpu
);
931 no_dn
+= per_cpu(no_dn
, cpu
);
932 no_cfg
+= per_cpu(no_cfg_addr
, cpu
);
933 no_check
+= per_cpu(ignored_check
, cpu
);
936 if (0 == eeh_subsystem_enabled
) {
937 seq_printf(m
, "EEH Subsystem is globally disabled\n");
938 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", ffs
);
940 seq_printf(m
, "EEH Subsystem is enabled\n");
943 "no device node=%ld\n"
944 "no config address=%ld\n"
945 "check not wanted=%ld\n"
946 "eeh_total_mmio_ffs=%ld\n"
947 "eeh_false_positives=%ld\n"
948 "eeh_ignored_failures=%ld\n"
949 "eeh_slot_resets=%ld\n",
950 no_dev
, no_dn
, no_cfg
, no_check
,
951 ffs
, positives
, failures
, resets
);
957 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
959 return single_open(file
, proc_eeh_show
, NULL
);
962 static struct file_operations proc_eeh_operations
= {
963 .open
= proc_eeh_open
,
966 .release
= single_release
,
969 static int __init
eeh_init_proc(void)
971 struct proc_dir_entry
*e
;
973 if (platform_is_pseries()) {
974 e
= create_proc_entry("ppc64/eeh", 0, NULL
);
976 e
->proc_fops
= &proc_eeh_operations
;
981 __initcall(eeh_init_proc
);