arch/powerpc/sysdev/fsl_rio.c

   1 /*
   2  * Freescale MPC85xx/MPC86xx RapidIO support
   3  *
   4  * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc.
   5  * Zhang Wei <wei.zhang@freescale.com>
   6  *
   7  * Copyright 2005 MontaVista Software, Inc.
   8  * Matt Porter <mporter@kernel.crashing.org>
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/types.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/rio.h>
  22 #include <linux/rio_drv.h>
  23 #include <linux/of_platform.h>
  24
  25 #include <asm/io.h>
  26
  27 /* RapidIO definition irq, which read from OF-tree */
  28 #define IRQ_RIO_BELL(m)         (((struct rio_priv *)(m->priv))->bellirq)
  29 #define IRQ_RIO_TX(m)           (((struct rio_priv *)(m->priv))->txirq)
  30 #define IRQ_RIO_RX(m)           (((struct rio_priv *)(m->priv))->rxirq)
  31
  32 #define RIO_ATMU_REGS_OFFSET    0x10c00
  33 #define RIO_MSG_REGS_OFFSET     0x11000
  34 #define RIO_MAINT_WIN_SIZE      0x400000
  35 #define RIO_DBELL_WIN_SIZE      0x1000
  36
  37 #define RIO_MSG_OMR_MUI         0x00000002
  38 #define RIO_MSG_OSR_TE          0x00000080
  39 #define RIO_MSG_OSR_QOI         0x00000020
  40 #define RIO_MSG_OSR_QFI         0x00000010
  41 #define RIO_MSG_OSR_MUB         0x00000004
  42 #define RIO_MSG_OSR_EOMI        0x00000002
  43 #define RIO_MSG_OSR_QEI         0x00000001
  44
  45 #define RIO_MSG_IMR_MI          0x00000002
  46 #define RIO_MSG_ISR_TE          0x00000080
  47 #define RIO_MSG_ISR_QFI         0x00000010
  48 #define RIO_MSG_ISR_DIQI        0x00000001
  49
  50 #define RIO_MSG_DESC_SIZE       32
  51 #define RIO_MSG_BUFFER_SIZE     4096
  52 #define RIO_MIN_TX_RING_SIZE    2
  53 #define RIO_MAX_TX_RING_SIZE    2048
  54 #define RIO_MIN_RX_RING_SIZE    2
  55 #define RIO_MAX_RX_RING_SIZE    2048
  56
  57 #define DOORBELL_DMR_DI         0x00000002
  58 #define DOORBELL_DSR_TE         0x00000080
  59 #define DOORBELL_DSR_QFI        0x00000010
  60 #define DOORBELL_DSR_DIQI       0x00000001
  61 #define DOORBELL_TID_OFFSET     0x03
  62 #define DOORBELL_SID_OFFSET     0x05
  63 #define DOORBELL_INFO_OFFSET    0x06
  64
  65 #define DOORBELL_MESSAGE_SIZE   0x08
  66 #define DBELL_SID(x)            (*(u8 *)(x + DOORBELL_SID_OFFSET))
  67 #define DBELL_TID(x)            (*(u8 *)(x + DOORBELL_TID_OFFSET))
  68 #define DBELL_INF(x)            (*(u16 *)(x + DOORBELL_INFO_OFFSET))
  69
  70 struct rio_atmu_regs {
  71         u32 rowtar;
  72         u32 pad1;
  73         u32 rowbar;
  74         u32 pad2;
  75         u32 rowar;
  76         u32 pad3[3];
  77 };
  78
  79 struct rio_msg_regs {
  80         u32 omr;
  81         u32 osr;
  82         u32 pad1;
  83         u32 odqdpar;
  84         u32 pad2;
  85         u32 osar;
  86         u32 odpr;
  87         u32 odatr;
  88         u32 odcr;
  89         u32 pad3;
  90         u32 odqepar;
  91         u32 pad4[13];
  92         u32 imr;
  93         u32 isr;
  94         u32 pad5;
  95         u32 ifqdpar;
  96         u32 pad6;
  97         u32 ifqepar;
  98         u32 pad7[250];
  99         u32 dmr;
 100         u32 dsr;
 101         u32 pad8;
 102         u32 dqdpar;
 103         u32 pad9;
 104         u32 dqepar;
 105         u32 pad10[26];
 106         u32 pwmr;
 107         u32 pwsr;
 108         u32 pad11;
 109         u32 pwqbar;
 110 };
 111
 112 struct rio_tx_desc {
 113         u32 res1;
 114         u32 saddr;
 115         u32 dport;
 116         u32 dattr;
 117         u32 res2;
 118         u32 res3;
 119         u32 dwcnt;
 120         u32 res4;
 121 };
 122
 123 struct rio_dbell_ring {
 124         void *virt;
 125         dma_addr_t phys;
 126 };
 127
 128 struct rio_msg_tx_ring {
 129         void *virt;
 130         dma_addr_t phys;
 131         void *virt_buffer[RIO_MAX_TX_RING_SIZE];
 132         dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
 133         int tx_slot;
 134         int size;
 135         void *dev_id;
 136 };
 137
 138 struct rio_msg_rx_ring {
 139         void *virt;
 140         dma_addr_t phys;
 141         void *virt_buffer[RIO_MAX_RX_RING_SIZE];
 142         int rx_slot;
 143         int size;
 144         void *dev_id;
 145 };
 146
 147 struct rio_priv {
 148         void __iomem *regs_win;
 149         struct rio_atmu_regs __iomem *atmu_regs;
 150         struct rio_atmu_regs __iomem *maint_atmu_regs;
 151         struct rio_atmu_regs __iomem *dbell_atmu_regs;
 152         void __iomem *dbell_win;
 153         void __iomem *maint_win;
 154         struct rio_msg_regs __iomem *msg_regs;
 155         struct rio_dbell_ring dbell_ring;
 156         struct rio_msg_tx_ring msg_tx_ring;
 157         struct rio_msg_rx_ring msg_rx_ring;
 158         int bellirq;
 159         int txirq;
 160         int rxirq;
 161 };
 162
 163 /**
 164  * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
 165  * @index: ID of RapidIO interface
 166  * @destid: Destination ID of target device
 167  * @data: 16-bit info field of RapidIO doorbell message
 168  *
 169  * Sends a MPC85xx doorbell message. Returns %0 on success or
 170  * %-EINVAL on failure.
 171  */
 172 static int fsl_rio_doorbell_send(struct rio_mport *mport,
 173                                 int index, u16 destid, u16 data)
 174 {
 175         struct rio_priv *priv = mport->priv;
 176         pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n",
 177                  index, destid, data);
 178         out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
 179         out_be16(priv->dbell_win, data);
 180
 181         return 0;
 182 }
 183
 184 /**
 185  * fsl_local_config_read - Generate a MPC85xx local config space read
 186  * @index: ID of RapdiIO interface
 187  * @offset: Offset into configuration space
 188  * @len: Length (in bytes) of the maintenance transaction
 189  * @data: Value to be read into
 190  *
 191  * Generates a MPC85xx local configuration space read. Returns %0 on
 192  * success or %-EINVAL on failure.
 193  */
 194 static int fsl_local_config_read(struct rio_mport *mport,
 195                                 int index, u32 offset, int len, u32 *data)
 196 {
 197         struct rio_priv *priv = mport->priv;
 198         pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index,
 199                  offset);
 200         *data = in_be32(priv->regs_win + offset);
 201
 202         return 0;
 203 }
 204
 205 /**
 206  * fsl_local_config_write - Generate a MPC85xx local config space write
 207  * @index: ID of RapdiIO interface
 208  * @offset: Offset into configuration space
 209  * @len: Length (in bytes) of the maintenance transaction
 210  * @data: Value to be written
 211  *
 212  * Generates a MPC85xx local configuration space write. Returns %0 on
 213  * success or %-EINVAL on failure.
 214  */
 215 static int fsl_local_config_write(struct rio_mport *mport,
 216                                 int index, u32 offset, int len, u32 data)
 217 {
 218         struct rio_priv *priv = mport->priv;
 219         pr_debug
 220             ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n",
 221              index, offset, data);
 222         out_be32(priv->regs_win + offset, data);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction
 229  * @index: ID of RapdiIO interface
 230  * @destid: Destination ID of transaction
 231  * @hopcount: Number of hops to target device
 232  * @offset: Offset into configuration space
 233  * @len: Length (in bytes) of the maintenance transaction
 234  * @val: Location to be read into
 235  *
 236  * Generates a MPC85xx read maintenance transaction. Returns %0 on
 237  * success or %-EINVAL on failure.
 238  */
 239 static int
 240 fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
 241                         u8 hopcount, u32 offset, int len, u32 *val)
 242 {
 243         struct rio_priv *priv = mport->priv;
 244         u8 *data;
 245
 246         pr_debug
 247             ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
 248              index, destid, hopcount, offset, len);
 249         out_be32(&priv->maint_atmu_regs->rowtar,
 250                  (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
 251
 252         data = (u8 *) priv->maint_win + offset;
 253         switch (len) {
 254         case 1:
 255                 *val = in_8((u8 *) data);
 256                 break;
 257         case 2:
 258                 *val = in_be16((u16 *) data);
 259                 break;
 260         default:
 261                 *val = in_be32((u32 *) data);
 262                 break;
 263         }
 264
 265         return 0;
 266 }
 267
 268 /**
 269  * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction
 270  * @index: ID of RapdiIO interface
 271  * @destid: Destination ID of transaction
 272  * @hopcount: Number of hops to target device
 273  * @offset: Offset into configuration space
 274  * @len: Length (in bytes) of the maintenance transaction
 275  * @val: Value to be written
 276  *
 277  * Generates an MPC85xx write maintenance transaction. Returns %0 on
 278  * success or %-EINVAL on failure.
 279  */
 280 static int
 281 fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
 282                         u8 hopcount, u32 offset, int len, u32 val)
 283 {
 284         struct rio_priv *priv = mport->priv;
 285         u8 *data;
 286         pr_debug
 287             ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
 288              index, destid, hopcount, offset, len, val);
 289         out_be32(&priv->maint_atmu_regs->rowtar,
 290                  (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
 291
 292         data = (u8 *) priv->maint_win + offset;
 293         switch (len) {
 294         case 1:
 295                 out_8((u8 *) data, val);
 296                 break;
 297         case 2:
 298                 out_be16((u16 *) data, val);
 299                 break;
 300         default:
 301                 out_be32((u32 *) data, val);
 302                 break;
 303         }
 304
 305         return 0;
 306 }
 307
 308 /**
 309  * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
 310  * @mport: Master port with outbound message queue
 311  * @rdev: Target of outbound message
 312  * @mbox: Outbound mailbox
 313  * @buffer: Message to add to outbound queue
 314  * @len: Length of message
 315  *
 316  * Adds the @buffer message to the MPC85xx outbound message queue. Returns
 317  * %0 on success or %-EINVAL on failure.
 318  */
 319 int
 320 rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
 321                         void *buffer, size_t len)
 322 {
 323         struct rio_priv *priv = mport->priv;
 324         u32 omr;
 325         struct rio_tx_desc *desc = (struct rio_tx_desc *)priv->msg_tx_ring.virt
 326                                         + priv->msg_tx_ring.tx_slot;
 327         int ret = 0;
 328
 329         pr_debug
 330             ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
 331              rdev->destid, mbox, (int)buffer, len);
 332
 333         if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
 334                 ret = -EINVAL;
 335                 goto out;
 336         }
 337
 338         /* Copy and clear rest of buffer */
 339         memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer,
 340                         len);
 341         if (len < (RIO_MAX_MSG_SIZE - 4))
 342                 memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot]
 343                                 + len, 0, RIO_MAX_MSG_SIZE - len);
 344
 345         /* Set mbox field for message */
 346         desc->dport = mbox & 0x3;
 347
 348         /* Enable EOMI interrupt, set priority, and set destid */
 349         desc->dattr = 0x28000000 | (rdev->destid << 2);
 350
 351         /* Set transfer size aligned to next power of 2 (in double words) */
 352         desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
 353
 354         /* Set snooping and source buffer address */
 355         desc->saddr = 0x00000004
 356                 | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot];
 357
 358         /* Increment enqueue pointer */
 359         omr = in_be32(&priv->msg_regs->omr);
 360         out_be32(&priv->msg_regs->omr, omr | RIO_MSG_OMR_MUI);
 361
 362         /* Go to next descriptor */
 363         if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size)
 364                 priv->msg_tx_ring.tx_slot = 0;
 365
 366       out:
 367         return ret;
 368 }
 369
 370 EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
 371
 372 /**
 373  * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
 374  * @irq: Linux interrupt number
 375  * @dev_instance: Pointer to interrupt-specific data
 376  *
 377  * Handles outbound message interrupts. Executes a register outbound
 378  * mailbox event handler and acks the interrupt occurrence.
 379  */
 380 static irqreturn_t
 381 fsl_rio_tx_handler(int irq, void *dev_instance)
 382 {
 383         int osr;
 384         struct rio_mport *port = (struct rio_mport *)dev_instance;
 385         struct rio_priv *priv = port->priv;
 386
 387         osr = in_be32(&priv->msg_regs->osr);
 388
 389         if (osr & RIO_MSG_OSR_TE) {
 390                 pr_info("RIO: outbound message transmission error\n");
 391                 out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE);
 392                 goto out;
 393         }
 394
 395         if (osr & RIO_MSG_OSR_QOI) {
 396                 pr_info("RIO: outbound message queue overflow\n");
 397                 out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI);
 398                 goto out;
 399         }
 400
 401         if (osr & RIO_MSG_OSR_EOMI) {
 402                 u32 dqp = in_be32(&priv->msg_regs->odqdpar);
 403                 int slot = (dqp - priv->msg_tx_ring.phys) >> 5;
 404                 port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1,
 405                                 slot);
 406
 407                 /* Ack the end-of-message interrupt */
 408                 out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI);
 409         }
 410
 411       out:
 412         return IRQ_HANDLED;
 413 }
 414
 415 /**
 416  * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
 417  * @mport: Master port implementing the outbound message unit
 418  * @dev_id: Device specific pointer to pass on event
 419  * @mbox: Mailbox to open
 420  * @entries: Number of entries in the outbound mailbox ring
 421  *
 422  * Initializes buffer ring, request the outbound message interrupt,
 423  * and enables the outbound message unit. Returns %0 on success and
 424  * %-EINVAL or %-ENOMEM on failure.
 425  */
 426 int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
 427 {
 428         int i, j, rc = 0;
 429         struct rio_priv *priv = mport->priv;
 430
 431         if ((entries < RIO_MIN_TX_RING_SIZE) ||
 432             (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
 433                 rc = -EINVAL;
 434                 goto out;
 435         }
 436
 437         /* Initialize shadow copy ring */
 438         priv->msg_tx_ring.dev_id = dev_id;
 439         priv->msg_tx_ring.size = entries;
 440
 441         for (i = 0; i < priv->msg_tx_ring.size; i++) {
 442                 priv->msg_tx_ring.virt_buffer[i] =
 443                         dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
 444                                 &priv->msg_tx_ring.phys_buffer[i], GFP_KERNEL);
 445                 if (!priv->msg_tx_ring.virt_buffer[i]) {
 446                         rc = -ENOMEM;
 447                         for (j = 0; j < priv->msg_tx_ring.size; j++)
 448                                 if (priv->msg_tx_ring.virt_buffer[j])
 449                                         dma_free_coherent(NULL,
 450                                                         RIO_MSG_BUFFER_SIZE,
 451                                                         priv->msg_tx_ring.
 452                                                         virt_buffer[j],
 453                                                         priv->msg_tx_ring.
 454                                                         phys_buffer[j]);
 455                         goto out;
 456                 }
 457         }
 458
 459         /* Initialize outbound message descriptor ring */
 460         priv->msg_tx_ring.virt = dma_alloc_coherent(NULL,
 461                                 priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
 462                                 &priv->msg_tx_ring.phys, GFP_KERNEL);
 463         if (!priv->msg_tx_ring.virt) {
 464                 rc = -ENOMEM;
 465                 goto out_dma;
 466         }
 467         memset(priv->msg_tx_ring.virt, 0,
 468                         priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE);
 469         priv->msg_tx_ring.tx_slot = 0;
 470
 471         /* Point dequeue/enqueue pointers at first entry in ring */
 472         out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys);
 473         out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys);
 474
 475         /* Configure for snooping */
 476         out_be32(&priv->msg_regs->osar, 0x00000004);
 477
 478         /* Clear interrupt status */
 479         out_be32(&priv->msg_regs->osr, 0x000000b3);
 480
 481         /* Hook up outbound message handler */
 482         rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0,
 483                          "msg_tx", (void *)mport);
 484         if (rc < 0)
 485                 goto out_irq;
 486
 487         /*
 488          * Configure outbound message unit
 489          *      Snooping
 490          *      Interrupts (all enabled, except QEIE)
 491          *      Chaining mode
 492          *      Disable
 493          */
 494         out_be32(&priv->msg_regs->omr, 0x00100220);
 495
 496         /* Set number of entries */
 497         out_be32(&priv->msg_regs->omr,
 498                  in_be32(&priv->msg_regs->omr) |
 499                  ((get_bitmask_order(entries) - 2) << 12));
 500
 501         /* Now enable the unit */
 502         out_be32(&priv->msg_regs->omr, in_be32(&priv->msg_regs->omr) | 0x1);
 503
 504       out:
 505         return rc;
 506
 507       out_irq:
 508         dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
 509                           priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
 510
 511       out_dma:
 512         for (i = 0; i < priv->msg_tx_ring.size; i++)
 513                 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
 514                                   priv->msg_tx_ring.virt_buffer[i],
 515                                   priv->msg_tx_ring.phys_buffer[i]);
 516
 517         return rc;
 518 }
 519
 520 /**
 521  * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
 522  * @mport: Master port implementing the outbound message unit
 523  * @mbox: Mailbox to close
 524  *
 525  * Disables the outbound message unit, free all buffers, and
 526  * frees the outbound message interrupt.
 527  */
 528 void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
 529 {
 530         struct rio_priv *priv = mport->priv;
 531         /* Disable inbound message unit */
 532         out_be32(&priv->msg_regs->omr, 0);
 533
 534         /* Free ring */
 535         dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
 536                           priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
 537
 538         /* Free interrupt */
 539         free_irq(IRQ_RIO_TX(mport), (void *)mport);
 540 }
 541
 542 /**
 543  * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler
 544  * @irq: Linux interrupt number
 545  * @dev_instance: Pointer to interrupt-specific data
 546  *
 547  * Handles inbound message interrupts. Executes a registered inbound
 548  * mailbox event handler and acks the interrupt occurrence.
 549  */
 550 static irqreturn_t
 551 fsl_rio_rx_handler(int irq, void *dev_instance)
 552 {
 553         int isr;
 554         struct rio_mport *port = (struct rio_mport *)dev_instance;
 555         struct rio_priv *priv = port->priv;
 556
 557         isr = in_be32(&priv->msg_regs->isr);
 558
 559         if (isr & RIO_MSG_ISR_TE) {
 560                 pr_info("RIO: inbound message reception error\n");
 561                 out_be32((void *)&priv->msg_regs->isr, RIO_MSG_ISR_TE);
 562                 goto out;
 563         }
 564
 565         /* XXX Need to check/dispatch until queue empty */
 566         if (isr & RIO_MSG_ISR_DIQI) {
 567                 /*
 568                  * We implement *only* mailbox 0, but can receive messages
 569                  * for any mailbox/letter to that mailbox destination. So,
 570                  * make the callback with an unknown/invalid mailbox number
 571                  * argument.
 572                  */
 573                 port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1);
 574
 575                 /* Ack the queueing interrupt */
 576                 out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI);
 577         }
 578
 579       out:
 580         return IRQ_HANDLED;
 581 }
 582
 583 /**
 584  * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
 585  * @mport: Master port implementing the inbound message unit
 586  * @dev_id: Device specific pointer to pass on event
 587  * @mbox: Mailbox to open
 588  * @entries: Number of entries in the inbound mailbox ring
 589  *
 590  * Initializes buffer ring, request the inbound message interrupt,
 591  * and enables the inbound message unit. Returns %0 on success
 592  * and %-EINVAL or %-ENOMEM on failure.
 593  */
 594 int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
 595 {
 596         int i, rc = 0;
 597         struct rio_priv *priv = mport->priv;
 598
 599         if ((entries < RIO_MIN_RX_RING_SIZE) ||
 600             (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
 601                 rc = -EINVAL;
 602                 goto out;
 603         }
 604
 605         /* Initialize client buffer ring */
 606         priv->msg_rx_ring.dev_id = dev_id;
 607         priv->msg_rx_ring.size = entries;
 608         priv->msg_rx_ring.rx_slot = 0;
 609         for (i = 0; i < priv->msg_rx_ring.size; i++)
 610                 priv->msg_rx_ring.virt_buffer[i] = NULL;
 611
 612         /* Initialize inbound message ring */
 613         priv->msg_rx_ring.virt = dma_alloc_coherent(NULL,
 614                                 priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
 615                                 &priv->msg_rx_ring.phys, GFP_KERNEL);
 616         if (!priv->msg_rx_ring.virt) {
 617                 rc = -ENOMEM;
 618                 goto out;
 619         }
 620
 621         /* Point dequeue/enqueue pointers at first entry in ring */
 622         out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys);
 623         out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys);
 624
 625         /* Clear interrupt status */
 626         out_be32(&priv->msg_regs->isr, 0x00000091);
 627
 628         /* Hook up inbound message handler */
 629         rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0,
 630                          "msg_rx", (void *)mport);
 631         if (rc < 0) {
 632                 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
 633                                   priv->msg_tx_ring.virt_buffer[i],
 634                                   priv->msg_tx_ring.phys_buffer[i]);
 635                 goto out;
 636         }
 637
 638         /*
 639          * Configure inbound message unit:
 640          *      Snooping
 641          *      4KB max message size
 642          *      Unmask all interrupt sources
 643          *      Disable
 644          */
 645         out_be32(&priv->msg_regs->imr, 0x001b0060);
 646
 647         /* Set number of queue entries */
 648         setbits32(&priv->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12);
 649
 650         /* Now enable the unit */
 651         setbits32(&priv->msg_regs->imr, 0x1);
 652
 653       out:
 654         return rc;
 655 }
 656
 657 /**
 658  * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
 659  * @mport: Master port implementing the inbound message unit
 660  * @mbox: Mailbox to close
 661  *
 662  * Disables the inbound message unit, free all buffers, and
 663  * frees the inbound message interrupt.
 664  */
 665 void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
 666 {
 667         struct rio_priv *priv = mport->priv;
 668         /* Disable inbound message unit */
 669         out_be32(&priv->msg_regs->imr, 0);
 670
 671         /* Free ring */
 672         dma_free_coherent(NULL, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
 673                           priv->msg_rx_ring.virt, priv->msg_rx_ring.phys);
 674
 675         /* Free interrupt */
 676         free_irq(IRQ_RIO_RX(mport), (void *)mport);
 677 }
 678
 679 /**
 680  * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
 681  * @mport: Master port implementing the inbound message unit
 682  * @mbox: Inbound mailbox number
 683  * @buf: Buffer to add to inbound queue
 684  *
 685  * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
 686  * %0 on success or %-EINVAL on failure.
 687  */
 688 int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
 689 {
 690         int rc = 0;
 691         struct rio_priv *priv = mport->priv;
 692
 693         pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
 694                  priv->msg_rx_ring.rx_slot);
 695
 696         if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) {
 697                 printk(KERN_ERR
 698                        "RIO: error adding inbound buffer %d, buffer exists\n",
 699                        priv->msg_rx_ring.rx_slot);
 700                 rc = -EINVAL;
 701                 goto out;
 702         }
 703
 704         priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf;
 705         if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size)
 706                 priv->msg_rx_ring.rx_slot = 0;
 707
 708       out:
 709         return rc;
 710 }
 711
 712 EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
 713
 714 /**
 715  * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
 716  * @mport: Master port implementing the inbound message unit
 717  * @mbox: Inbound mailbox number
 718  *
 719  * Gets the next available inbound message from the inbound message queue.
 720  * A pointer to the message is returned on success or NULL on failure.
 721  */
 722 void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
 723 {
 724         struct rio_priv *priv = mport->priv;
 725         u32 phys_buf, virt_buf;
 726         void *buf = NULL;
 727         int buf_idx;
 728
 729         phys_buf = in_be32(&priv->msg_regs->ifqdpar);
 730
 731         /* If no more messages, then bail out */
 732         if (phys_buf == in_be32(&priv->msg_regs->ifqepar))
 733                 goto out2;
 734
 735         virt_buf = (u32) priv->msg_rx_ring.virt + (phys_buf
 736                                                 - priv->msg_rx_ring.phys);
 737         buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
 738         buf = priv->msg_rx_ring.virt_buffer[buf_idx];
 739
 740         if (!buf) {
 741                 printk(KERN_ERR
 742                        "RIO: inbound message copy failed, no buffers\n");
 743                 goto out1;
 744         }
 745
 746         /* Copy max message size, caller is expected to allocate that big */
 747         memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
 748
 749         /* Clear the available buffer */
 750         priv->msg_rx_ring.virt_buffer[buf_idx] = NULL;
 751
 752       out1:
 753         setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI);
 754
 755       out2:
 756         return buf;
 757 }
 758
 759 EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
 760
 761 /**
 762  * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
 763  * @irq: Linux interrupt number
 764  * @dev_instance: Pointer to interrupt-specific data
 765  *
 766  * Handles doorbell interrupts. Parses a list of registered
 767  * doorbell event handlers and executes a matching event handler.
 768  */
 769 static irqreturn_t
 770 fsl_rio_dbell_handler(int irq, void *dev_instance)
 771 {
 772         int dsr;
 773         struct rio_mport *port = (struct rio_mport *)dev_instance;
 774         struct rio_priv *priv = port->priv;
 775
 776         dsr = in_be32(&priv->msg_regs->dsr);
 777
 778         if (dsr & DOORBELL_DSR_TE) {
 779                 pr_info("RIO: doorbell reception error\n");
 780                 out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE);
 781                 goto out;
 782         }
 783
 784         if (dsr & DOORBELL_DSR_QFI) {
 785                 pr_info("RIO: doorbell queue full\n");
 786                 out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
 787                 goto out;
 788         }
 789
 790         /* XXX Need to check/dispatch until queue empty */
 791         if (dsr & DOORBELL_DSR_DIQI) {
 792                 u32 dmsg =
 793                     (u32) priv->dbell_ring.virt +
 794                     (in_be32(&priv->msg_regs->dqdpar) & 0xfff);
 795                 struct rio_dbell *dbell;
 796                 int found = 0;
 797
 798                 pr_debug
 799                     ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
 800                      DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
 801
 802                 list_for_each_entry(dbell, &port->dbells, node) {
 803                         if ((dbell->res->start <= DBELL_INF(dmsg)) &&
 804                             (dbell->res->end >= DBELL_INF(dmsg))) {
 805                                 found = 1;
 806                                 break;
 807                         }
 808                 }
 809                 if (found) {
 810                         dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
 811                                     DBELL_INF(dmsg));
 812                 } else {
 813                         pr_debug
 814                             ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
 815                              DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
 816                 }
 817                 setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI);
 818                 out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI);
 819         }
 820
 821       out:
 822         return IRQ_HANDLED;
 823 }
 824
 825 /**
 826  * fsl_rio_doorbell_init - MPC85xx doorbell interface init
 827  * @mport: Master port implementing the inbound doorbell unit
 828  *
 829  * Initializes doorbell unit hardware and inbound DMA buffer
 830  * ring. Called from fsl_rio_setup(). Returns %0 on success
 831  * or %-ENOMEM on failure.
 832  */
 833 static int fsl_rio_doorbell_init(struct rio_mport *mport)
 834 {
 835         struct rio_priv *priv = mport->priv;
 836         int rc = 0;
 837
 838         /* Map outbound doorbell window immediately after maintenance window */
 839         priv->dbell_win = ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
 840                             RIO_DBELL_WIN_SIZE);
 841         if (!priv->dbell_win) {
 842                 printk(KERN_ERR
 843                        "RIO: unable to map outbound doorbell window\n");
 844                 rc = -ENOMEM;
 845                 goto out;
 846         }
 847
 848         /* Initialize inbound doorbells */
 849         priv->dbell_ring.virt = dma_alloc_coherent(NULL, 512 *
 850                     DOORBELL_MESSAGE_SIZE, &priv->dbell_ring.phys, GFP_KERNEL);
 851         if (!priv->dbell_ring.virt) {
 852                 printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
 853                 rc = -ENOMEM;
 854                 iounmap(priv->dbell_win);
 855                 goto out;
 856         }
 857
 858         /* Point dequeue/enqueue pointers at first entry in ring */
 859         out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys);
 860         out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys);
 861
 862         /* Clear interrupt status */
 863         out_be32(&priv->msg_regs->dsr, 0x00000091);
 864
 865         /* Hook up doorbell handler */
 866         rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0,
 867                          "dbell_rx", (void *)mport);
 868         if (rc < 0) {
 869                 iounmap(priv->dbell_win);
 870                 dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
 871                                   priv->dbell_ring.virt, priv->dbell_ring.phys);
 872                 printk(KERN_ERR
 873                        "MPC85xx RIO: unable to request inbound doorbell irq");
 874                 goto out;
 875         }
 876
 877         /* Configure doorbells for snooping, 512 entries, and enable */
 878         out_be32(&priv->msg_regs->dmr, 0x00108161);
 879
 880       out:
 881         return rc;
 882 }
 883
 884 static char *cmdline = NULL;
 885
 886 static int fsl_rio_get_hdid(int index)
 887 {
 888         /* XXX Need to parse multiple entries in some format */
 889         if (!cmdline)
 890                 return -1;
 891
 892         return simple_strtol(cmdline, NULL, 0);
 893 }
 894
 895 static int fsl_rio_get_cmdline(char *s)
 896 {
 897         if (!s)
 898                 return 0;
 899
 900         cmdline = s;
 901         return 1;
 902 }
 903
 904 __setup("riohdid=", fsl_rio_get_cmdline);
 905
 906 /**
 907  * fsl_rio_setup - Setup MPC85xx RapidIO interface
 908  * @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
 909  *
 910  * Initializes MPC85xx RapidIO hardware interface, configures
 911  * master port with system-specific info, and registers the
 912  * master port with the RapidIO subsystem.
 913  */
 914 int fsl_rio_setup(struct of_device *dev)
 915 {
 916         struct rio_ops *ops;
 917         struct rio_mport *port;
 918         struct rio_priv *priv;
 919         int rc = 0;
 920         const u32 *dt_range, *cell;
 921         struct resource regs;
 922         int rlen;
 923         u64 law_start, law_size;
 924         int paw, aw, sw;
 925
 926         if (!dev->node) {
 927                 dev_err(&dev->dev, "Device OF-Node is NULL");
 928                 return -EFAULT;
 929         }
 930
 931         rc = of_address_to_resource(dev->node, 0, &regs);
 932         if (rc) {
 933                 dev_err(&dev->dev, "Can't get %s property 'reg'\n",
 934                                 dev->node->full_name);
 935                 return -EFAULT;
 936         }
 937         dev_info(&dev->dev, "Of-device full name %s\n", dev->node->full_name);
 938         dev_info(&dev->dev, "Regs start 0x%08x size 0x%08x\n",  regs.start,
 939                                                 regs.end - regs.start + 1);
 940
 941         dt_range = of_get_property(dev->node, "ranges", &rlen);
 942         if (!dt_range) {
 943                 dev_err(&dev->dev, "Can't get %s property 'ranges'\n",
 944                                 dev->node->full_name);
 945                 return -EFAULT;
 946         }
 947
 948         /* Get node address wide */
 949         cell = of_get_property(dev->node, "#address-cells", NULL);
 950         if (cell)
 951                 aw = *cell;
 952         else
 953                 aw = of_n_addr_cells(dev->node);
 954         /* Get node size wide */
 955         cell = of_get_property(dev->node, "#size-cells", NULL);
 956         if (cell)
 957                 sw = *cell;
 958         else
 959                 sw = of_n_size_cells(dev->node);
 960         /* Get parent address wide wide */
 961         paw = of_n_addr_cells(dev->node);
 962
 963         law_start = of_read_number(dt_range + aw, paw);
 964         law_size = of_read_number(dt_range + aw + paw, sw);
 965
 966         dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n",
 967                         law_start, law_size);
 968
 969         ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
 970         ops->lcread = fsl_local_config_read;
 971         ops->lcwrite = fsl_local_config_write;
 972         ops->cread = fsl_rio_config_read;
 973         ops->cwrite = fsl_rio_config_write;
 974         ops->dsend = fsl_rio_doorbell_send;
 975
 976         port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
 977         port->id = 0;
 978         port->index = 0;
 979
 980         priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
 981         if (!priv) {
 982                 printk(KERN_ERR "Can't alloc memory for 'priv'\n");
 983                 rc = -ENOMEM;
 984                 goto err;
 985         }
 986
 987         INIT_LIST_HEAD(&port->dbells);
 988         port->iores.start = law_start;
 989         port->iores.end = law_start + law_size;
 990         port->iores.flags = IORESOURCE_MEM;
 991
 992         priv->bellirq = irq_of_parse_and_map(dev->node, 2);
 993         priv->txirq = irq_of_parse_and_map(dev->node, 3);
 994         priv->rxirq = irq_of_parse_and_map(dev->node, 4);
 995         dev_info(&dev->dev, "bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq,
 996                                 priv->txirq, priv->rxirq);
 997
 998         rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
 999         rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
1000         rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
1001         strcpy(port->name, "RIO0 mport");
1002
1003         port->ops = ops;
1004         port->host_deviceid = fsl_rio_get_hdid(port->id);
1005
1006         port->priv = priv;
1007         rio_register_mport(port);
1008
1009         priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1);
1010         priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win
1011                                         + RIO_ATMU_REGS_OFFSET);
1012         priv->maint_atmu_regs = priv->atmu_regs + 1;
1013         priv->dbell_atmu_regs = priv->atmu_regs + 2;
1014         priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win
1015                                                         + RIO_MSG_REGS_OFFSET);
1016
1017         /* Configure maintenance transaction window */
1018         out_be32(&priv->maint_atmu_regs->rowbar, 0x000c0000);
1019         out_be32(&priv->maint_atmu_regs->rowar, 0x80077015);
1020
1021         priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
1022
1023         /* Configure outbound doorbell window */
1024         out_be32(&priv->dbell_atmu_regs->rowbar, 0x000c0400);
1025         out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b);
1026         fsl_rio_doorbell_init(port);
1027
1028         return 0;
1029 err:
1030         if (priv)
1031                 iounmap(priv->regs_win);
1032         kfree(ops);
1033         kfree(priv);
1034         kfree(port);
1035         return rc;
1036 }
1037
1038 /* The probe function for RapidIO peer-to-peer network.
1039  */
1040 static int __devinit fsl_of_rio_rpn_probe(struct of_device *dev,
1041                                      const struct of_device_id *match)
1042 {
1043         int rc;
1044         printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
1045                         dev->node->full_name);
1046
1047         rc = fsl_rio_setup(dev);
1048         if (rc)
1049                 goto out;
1050
1051         /* Enumerate all registered ports */
1052         rc = rio_init_mports();
1053 out:
1054         return rc;
1055 };
1056
1057 static const struct of_device_id fsl_of_rio_rpn_ids[] = {
1058         {
1059                 .compatible = "fsl,rapidio-delta",
1060         },
1061         {},
1062 };
1063
1064 static struct of_platform_driver fsl_of_rio_rpn_driver = {
1065         .name = "fsl-of-rio",
1066         .match_table = fsl_of_rio_rpn_ids,
1067         .probe = fsl_of_rio_rpn_probe,
1068 };
1069
1070 static __init int fsl_of_rio_rpn_init(void)
1071 {
1072         return of_register_platform_driver(&fsl_of_rio_rpn_driver);
1073 }
1074
1075 subsys_initcall(fsl_of_rio_rpn_init);