arch/ppc/platforms/85xx/mpc8540_ads.c

   1 /*
   2  * arch/ppc/platforms/85xx/mpc8540_ads.c
   3  *
   4  * MPC8540ADS board specific routines
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2004 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/serial.h>
  31 #include <linux/tty.h>  /* for linux/serial_core.h */
  32 #include <linux/serial_core.h>
  33 #include <linux/initrd.h>
  34 #include <linux/module.h>
  35 #include <linux/fsl_devices.h>
  36
  37 #include <asm/system.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/page.h>
  40 #include <asm/atomic.h>
  41 #include <asm/time.h>
  42 #include <asm/io.h>
  43 #include <asm/machdep.h>
  44 #include <asm/open_pic.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/pci-bridge.h>
  47 #include <asm/mpc85xx.h>
  48 #include <asm/irq.h>
  49 #include <asm/immap_85xx.h>
  50 #include <asm/kgdb.h>
  51 #include <asm/ppc_sys.h>
  52 #include <mm/mmu_decl.h>
  53
  54 #include <syslib/ppc85xx_setup.h>
  55
  56 /* ************************************************************************
  57  *
  58  * Setup the architecture
  59  *
  60  */
  61 static void __init
  62 mpc8540ads_setup_arch(void)
  63 {
  64         bd_t *binfo = (bd_t *) __res;
  65         unsigned int freq;
  66         struct gianfar_platform_data *pdata;
  67
  68         /* get the core frequency */
  69         freq = binfo->bi_intfreq;
  70
  71         if (ppc_md.progress)
  72                 ppc_md.progress("mpc8540ads_setup_arch()", 0);
  73
  74         /* Set loops_per_jiffy to a half-way reasonable value,
  75            for use until calibrate_delay gets called. */
  76         loops_per_jiffy = freq / HZ;
  77
  78 #ifdef CONFIG_PCI
  79         /* setup PCI host bridges */
  80         mpc85xx_setup_hose();
  81 #endif
  82
  83 #ifdef CONFIG_SERIAL_8250
  84         mpc85xx_early_serial_map();
  85 #endif
  86
  87 #ifdef CONFIG_SERIAL_TEXT_DEBUG
  88         /* Invalidate the entry we stole earlier the serial ports
  89          * should be properly mapped */
  90         invalidate_tlbcam_entry(num_tlbcam_entries - 1);
  91 #endif
  92
  93         /* setup the board related information for the enet controllers */
  94         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
  95         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  96         pdata->interruptPHY = MPC85xx_IRQ_EXT5;
  97         pdata->phyid = 0;
  98         /* fixup phy address */
  99         pdata->phy_reg_addr += binfo->bi_immr_base;
 100         memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
 101
 102         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
 103         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 104         pdata->interruptPHY = MPC85xx_IRQ_EXT5;
 105         pdata->phyid = 1;
 106         /* fixup phy address */
 107         pdata->phy_reg_addr += binfo->bi_immr_base;
 108         memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
 109
 110         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
 111         pdata->board_flags = 0;
 112         pdata->interruptPHY = MPC85xx_IRQ_EXT5;
 113         pdata->phyid = 3;
 114         /* fixup phy address */
 115         pdata->phy_reg_addr += binfo->bi_immr_base;
 116         memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
 117
 118 #ifdef CONFIG_BLK_DEV_INITRD
 119         if (initrd_start)
 120                 ROOT_DEV = Root_RAM0;
 121         else
 122 #endif
 123 #ifdef  CONFIG_ROOT_NFS
 124                 ROOT_DEV = Root_NFS;
 125 #else
 126                 ROOT_DEV = Root_HDA1;
 127 #endif
 128 }
 129
 130 /* ************************************************************************ */
 131 void __init
 132 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 133               unsigned long r6, unsigned long r7)
 134 {
 135         /* parse_bootinfo must always be called first */
 136         parse_bootinfo(find_bootinfo());
 137
 138         /*
 139          * If we were passed in a board information, copy it into the
 140          * residual data area.
 141          */
 142         if (r3) {
 143                 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
 144                        sizeof (bd_t));
 145         }
 146 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 147         {
 148                 bd_t *binfo = (bd_t *) __res;
 149                 struct uart_port p;
 150
 151                 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
 152                 settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
 153                           binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
 154
 155                 memset(&p, 0, sizeof (p));
 156                 p.iotype = SERIAL_IO_MEM;
 157                 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
 158                 p.uartclk = binfo->bi_busfreq;
 159
 160                 gen550_init(0, &p);
 161
 162                 memset(&p, 0, sizeof (p));
 163                 p.iotype = SERIAL_IO_MEM;
 164                 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
 165                 p.uartclk = binfo->bi_busfreq;
 166
 167                 gen550_init(1, &p);
 168         }
 169 #endif
 170
 171 #if defined(CONFIG_BLK_DEV_INITRD)
 172         /*
 173          * If the init RAM disk has been configured in, and there's a valid
 174          * starting address for it, set it up.
 175          */
 176         if (r4) {
 177                 initrd_start = r4 + KERNELBASE;
 178                 initrd_end = r5 + KERNELBASE;
 179         }
 180 #endif                          /* CONFIG_BLK_DEV_INITRD */
 181
 182         /* Copy the kernel command line arguments to a safe place. */
 183
 184         if (r6) {
 185                 *(char *) (r7 + KERNELBASE) = 0;
 186                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 187         }
 188
 189         identify_ppc_sys_by_id(mfspr(SPRN_SVR));
 190
 191         /* setup the PowerPC module struct */
 192         ppc_md.setup_arch = mpc8540ads_setup_arch;
 193         ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
 194
 195         ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
 196         ppc_md.get_irq = openpic_get_irq;
 197
 198         ppc_md.restart = mpc85xx_restart;
 199         ppc_md.power_off = mpc85xx_power_off;
 200         ppc_md.halt = mpc85xx_halt;
 201
 202         ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
 203
 204         ppc_md.time_init = NULL;
 205         ppc_md.set_rtc_time = NULL;
 206         ppc_md.get_rtc_time = NULL;
 207         ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
 208
 209 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 210         ppc_md.progress = gen550_progress;
 211 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
 212 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
 213         ppc_md.early_serial_map = mpc85xx_early_serial_map;
 214 #endif  /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
 215
 216         if (ppc_md.progress)
 217                 ppc_md.progress("mpc8540ads_init(): exit", 0);
 218
 219         return;
 220 }