cpu/ChangeLog

   1 2020-09-01  Alan Modra  <amodra@gmail.com>
   2
   3         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
   4         value by two rather than shifting left.
   5         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
   6
   7 2020-08-26  David Faust  <david.faust@oracle.com>
   8
   9         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  10         (define-xbpf-isa) New pmacro.
  11         (all-isas) Add xbpfle,xbpfbe.
  12         (endian-isas): New pmacro.
  13         (mach xbpf): New.
  14         (model xbpf-def): Likewise.
  15         (h-gpr): Add xbpf mach.
  16         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  17         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  18         (define-alu-insn-un): Use new endian-isas pmacro.
  19         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  20         (define-endian-insn, define-lddw): Likewise.
  21         (dlind, dxli, dxsi, dsti): Likewise.
  22         (define-cond-jump-insn, define-call-insn): Likewise.
  23         (define-atomic-insns): Likewise.
  24
  25 2020-07-04  Nick Clifton  <nickc@redhat.com>
  26
  27         Binutils 2.35 branch created.
  28
  29 2020-06-25 David Faust  <david.faust@oracle.com>
  30
  31         * bpf.cpu (f-offset16): Change type from INT to HI.
  32         (dxli): Simplify memory access.
  33         (dxsi): Likewise.
  34         (define-endian-insn): Update c-call in semantics.
  35         (dlabs) Likewise.
  36         (dlind) Likewise.
  37
  38 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  39
  40         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  41         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  42
  43 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  44
  45         * mep.opc (print_slot_insn): Pass the insn endianness to
  46         cgen_get_insn_value.
  47
  48 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  49             David Faust <david.faust@oracle.com>
  50
  51         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  52         (define-alu-insn-mov): Likewise.
  53         (daib): Likewise.
  54         (define-alu-instructions): Likewise.
  55         (define-endian-insn): Likewise.
  56         (define-lddw): Likewise.
  57         (dlabs): Likewise.
  58         (dlind): Likewise.
  59         (dxli): Likewise.
  60         (dxsi): Likewise.
  61         (dsti): Likewise.
  62         (define-ldstx-insns): Likewise.
  63         (define-st-insns): Likewise.
  64         (define-cond-jump-insn): Likewise.
  65         (dcji): Likewise.
  66         (define-condjump-insns): Likewise.
  67         (define-call-insn): Likewise.
  68         (ja): Likewise.
  69         ("exit"): Likewise.
  70         (define-atomic-insns): Likewise.
  71         (sem-exchange-and-add): New macro.
  72         * bpf.cpu ("brkpt"): New instruction.
  73         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  74         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  75         (h-pc): Expand definition.
  76         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  77
  78 2020-05-21  Alan Modra  <amodra@gmail.com>
  79
  80         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
  81         "if (x) free (x)" with "free (x)".
  82
  83 2020-05-19  Stafford Horne  <shorne@gmail.com>
  84
  85         PR 25184
  86         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
  87         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
  88         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
  89         * or1kcommon.cpu (h-fdr): Remove hardware.
  90         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
  91         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
  92         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
  93         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
  94         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
  95
  96 2020-02-16  David Faust  <david.faust@oracle.com>
  97
  98         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
  99         (dcji) New version with support for JMP32
 100
 101 2020-02-03  Alan Modra  <amodra@gmail.com>
 102
 103         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 104
 105 2020-02-01  Alan Modra  <amodra@gmail.com>
 106
 107         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 108         (f-label16, f-label24): Likewise.
 109
 110 2020-01-30  Alan Modra  <amodra@gmail.com>
 111
 112         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 113         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 114         (f-dst32-rn-prefixed-QI): Likewise.
 115         (f-dsp-32-s32): Mask before shifting left.
 116         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 117         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 118         shifting left.
 119         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 120         (h-gr-SI): Mask before shifting.
 121
 122 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 123
 124         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 125         (neg and neg32) use OP_SRC_K even if they operate only in
 126         registers.
 127
 128 2020-01-18  Nick Clifton  <nickc@redhat.com>
 129
 130         Binutils 2.34 branch created.
 131
 132 2020-01-13  Alan Modra  <amodra@gmail.com>
 133
 134         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 135         left shift signed values.
 136
 137 2020-01-06  Alan Modra  <amodra@gmail.com>
 138
 139         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 140         bits before shifting rather than masking after shifting.
 141         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 142         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 143         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 144         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 145
 146 2020-01-04  Alan Modra  <amodra@gmail.com>
 147
 148         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 149         (f-disp16, f-disp24): Likewise.
 150
 151 2019-12-23  Alan Modra  <amodra@gmail.com>
 152
 153         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 154
 155 2019-12-20  Alan Modra  <amodra@gmail.com>
 156
 157         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 158
 159 2019-12-17  Alan Modra  <amodra@gmail.com>
 160
 161         * bpf.cpu (f-imm64): Avoid signed overflow.
 162
 163 2019-12-16  Alan Modra  <amodra@gmail.com>
 164
 165         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 166
 167 2019-12-11  Alan Modra  <amodra@gmail.com>
 168
 169         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 170         * lm32.cpu (f-branch, f-vall): Likewise.
 171         * m32.cpu (f-lab-8-16): Likewise.
 172
 173 2019-12-11  Alan Modra  <amodra@gmail.com>
 174
 175         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 176         shift left to avoid UB on left shift of negative values.
 177
 178 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 179
 180         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 181
 182 2019-09-09  Phil Blundell  <pb@pbcl.net>
 183
 184         binutils 2.33 branch created.
 185
 186 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 187
 188         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 189         %a and %ctx.
 190
 191 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 192
 193         * bpf.cpu (dlabs): New pmacro.
 194         (dlind): Likewise.
 195
 196 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 197
 198         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 199         explicit 'dst' argument.
 200
 201 2019-06-13  Stafford Horne  <shorne@gmail.com>
 202
 203         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 204
 205 2019-06-13  Stafford Horne  <shorne@gmail.com>
 206
 207         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 208         (l-adrp): Improve comment.
 209
 210 2019-06-13  Stafford Horne  <shorne@gmail.com>
 211
 212         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 213         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 214         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 215         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 216         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 217         float-setflag-unordered-symantics): New pmacro for instruction
 218         symantics.
 219         (float-setflag-insn): Update to use float-setflag-insn-base.
 220         (float-setflag-unordered-insn): New pmacro for generating instructions.
 221
 222 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 223             Stafford Horne  <shorne@gmail.com>
 224
 225         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 226         (ORFPX-MACHS): Removed pmacro.
 227         * or1k.opc (or1k_cgen_insn_supported): New function.
 228         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 229         (parse_regpair, print_regpair): New functions.
 230         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 231         and add comments.
 232         (h-fdr): Update comment to indicate or64.
 233         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 234         (h-fd32r): New hardware for 64-bit fpu registers.
 235         (h-i64r): New hardware for 64-bit int registers.
 236         * or1korbis.cpu (f-resv-8-1): New field.
 237         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 238         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 239         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 240         (h-roff1): New hardware.
 241         (double-field-and-ops mnemonic): New pmacro to generate operations
 242         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 243         (float-regreg-insn): Update single precision generator to MACH
 244         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 245         (float-setflag-insn): Update single precision generator to MACH
 246         ORFPX32-MACHS.  Fix double instructions from single to double
 247         precision.  Add generator for or32 64-bit instructions.
 248         (float-cust-insn cust-num): Update single precision generator to MACH
 249         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 250         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 251         ORFPX32-MACHS.
 252         (lf-rem-d): Fix operation from mod to rem.
 253         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 254         (lf-itof-d): Fix operands from single to double.
 255         (lf-ftoi-d): Update operand mode from DI to WI.
 256
 257 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 258
 259         * bpf.cpu: New file.
 260         * bpf.opc: Likewise.
 261
 262 2018-06-24  Nick Clifton  <nickc@redhat.com>
 263
 264         2.32 branch created.
 265
 266 2018-10-05  Richard Henderson  <rth@twiddle.net>
 267             Stafford Horne  <shorne@gmail.com>
 268
 269         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 270         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 271         (l-mul): Fix overflow support and indentation.
 272         (l-mulu): Fix overflow support and indentation.
 273         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 274         (l-div); Remove incorrect carry behavior.
 275         (l-divu): Fix carry and overflow behavior.
 276         (l-mac): Add overflow support.
 277         (l-msb, l-msbu): Add carry and overflow support.
 278
 279 2018-10-05  Richard Henderson  <rth@twiddle.net>
 280
 281         * or1k.opc (parse_disp26): Add support for plta() relocations.
 282         (parse_disp21): New function.
 283         (or1k_rclass): New enum.
 284         (or1k_rtype): New enum.
 285         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 286         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 287         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 288         * or1korbis.cpu (f-disp26): Don't assume SI.
 289         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 290         (insn-opcode): Add ADRP.
 291         (l-adrp): New instruction.
 292
 293 2018-10-05  Richard Henderson  <rth@twiddle.net>
 294
 295         * or1k.opc: Add RTYPE_ enum.
 296         (INVALID_STORE_RELOC): New string.
 297         (or1k_imm16_relocs): New array array.
 298         (parse_reloc): New static function that just does the parsing.
 299         (parse_imm16): New static function for generic parsing.
 300         (parse_simm16): Change to just call parse_imm16.
 301         (parse_simm16_split): New function.
 302         (parse_uimm16): Change to call parse_imm16.
 303         (parse_uimm16_split): New function.
 304         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 305         (uimm16-split): Change to use new uimm16_split.
 306
 307 2018-07-24  Alan Modra  <amodra@gmail.com>
 308
 309         PR 23430
 310         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 311
 312 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 313
 314         * or1kcommon.cpu (spr-reg-info): Typo fix.
 315
 316 2018-03-03  Alan Modra  <amodra@gmail.com>
 317
 318         * frv.opc: Include opintl.h.
 319         (add_next_to_vliw): Use opcodes_error_handler to print error.
 320         Standardize error message.
 321         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 322
 323 2018-01-13  Nick Clifton  <nickc@redhat.com>
 324
 325         2.30 branch created.
 326
 327 2017-03-15  Stafford Horne  <shorne@gmail.com>
 328
 329         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 330
 331 2016-10-06  Alan Modra  <amodra@gmail.com>
 332
 333         * mep.opc (expand_string): Add fall through comment.
 334
 335 2016-03-03  Alan Modra  <amodra@gmail.com>
 336
 337         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 338         at what is really going on.
 339
 340 2016-03-02  Alan Modra  <amodra@gmail.com>
 341
 342         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 343
 344 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 345
 346         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 347         a constant to better align disassembler output.
 348
 349 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 350
 351         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 352
 353 2014-06-12  Alan Modra  <amodra@gmail.com>
 354
 355         * or1k.opc: Whitespace fixes.
 356
 357 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 358
 359         * or1korbis.cpu (h-atomic-reserve): New hardware.
 360         (h-atomic-address): Likewise.
 361         (insn-opcode): Add opcodes for LWA and SWA.
 362         (atomic-reserve): New operand.
 363         (atomic-address): Likewise.
 364         (l-lwa, l-swa): New instructions.
 365         (l-lbs): Fix typo in comment.
 366         (store-insn): Clear atomic reserve on store to atomic-address.
 367         Fix register names in fmt field.
 368
 369 2014-04-22  Christian Svensson  <blue@cmd.nu>
 370
 371         * openrisc.cpu: Delete.
 372         * openrisc.opc: Delete.
 373         * or1k.cpu: New file.
 374         * or1k.opc: New file.
 375         * or1kcommon.cpu: New file.
 376         * or1korbis.cpu: New file.
 377         * or1korfpx.cpu: New file.
 378
 379 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 380
 381         * epiphany.opc: Remove +x file mode.
 382
 383 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 384
 385         PR binutils/15241
 386         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 387         TLBVADDR, TLBPADDR and TLBBADVADDR.
 388
 389 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 390             Joern Rennecke  <joern.rennecke@embecosm.com>
 391
 392         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 393         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 394         (testset-insn): Add NO_DIS attribute to t.l.
 395         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 396         (move-insns): Add NO-DIS attribute to cmov.l.
 397         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 398         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 399         (op-rrr): Add NO-DIS attribute to .l.
 400         (shift-rrr): Add NO-DIS attribute to .l.
 401         (op-shift-rri): Add NO-DIS attribute to i32.l.
 402         (bitrl, movtl): Add NO-DIS attribute.
 403         (op-iextrrr): Add NO-DIS attribute to .l
 404         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 405         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 406
 407 2012-02-27  Alan Modra  <amodra@gmail.com>
 408
 409         * mt.opc (print_dollarhex): Trim values to 32 bits.
 410
 411 2011-12-15  Nick Clifton  <nickc@redhat.com>
 412
 413         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 414         hosts.
 415
 416 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 417
 418         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 419         Cast value before printing it as a long.
 420         (parse_postindex): Fix type of valuep.
 421
 422 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 423
 424         * cpu/epiphany.cpu: New file.
 425         * cpu/epiphany.opc: New file.
 426
 427 2011-08-22  Nick Clifton  <nickc@redhat.com>
 428
 429         * fr30.cpu: Newly contributed file.
 430         * fr30.opc: Likewise.
 431         * ip2k.cpu: Likewise.
 432         * ip2k.opc: Likewise.
 433         * mep-avc.cpu: Likewise.
 434         * mep-avc2.cpu: Likewise.
 435         * mep-c5.cpu: Likewise.
 436         * mep-core.cpu: Likewise.
 437         * mep-default.cpu: Likewise.
 438         * mep-ext-cop.cpu: Likewise.
 439         * mep-fmax.cpu: Likewise.
 440         * mep-h1.cpu: Likewise.
 441         * mep-ivc2.cpu: Likewise.
 442         * mep-rhcop.cpu: Likewise.
 443         * mep-sample-ucidsp.cpu: Likewise.
 444         * mep.cpu: Likewise.
 445         * mep.opc: Likewise.
 446         * openrisc.cpu: Likewise.
 447         * openrisc.opc: Likewise.
 448         * xstormy16.cpu: Likewise.
 449         * xstormy16.opc: Likewise.
 450
 451 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 452
 453         * frv.opc: #undef DEBUG.
 454
 455 2010-07-03  DJ Delorie  <dj@delorie.com>
 456
 457         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 458
 459 2010-02-11  Doug Evans  <dje@sebabeach.org>
 460
 461         * m32r.cpu (HASH-PREFIX): Delete.
 462         (duhpo, dshpo): New pmacros.
 463         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 464         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 465         attribute, define with dshpo.
 466         (uimm24): Delete HASH-PREFIX attribute.
 467         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 468         (print_signed_with_hash_prefix): New function.
 469         (print_unsigned_with_hash_prefix): New function.
 470         * xc16x.cpu (dowh): New pmacro.
 471         (upof16): Define with dowh, specify print handler.
 472         (qbit, qlobit, qhibit): Ditto.
 473         (upag16): Ditto.
 474         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 475         (print_with_dot_prefix): New functions.
 476         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 477
 478 2010-01-24  Doug Evans  <dje@sebabeach.org>
 479
 480         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 481         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 482         conditional-floating-point-conversion, ne-floating-point-conversion,
 483         float-parallel-mul-add-double-semantics): Ditto.
 484
 485 2010-01-05  Doug Evans  <dje@sebabeach.org>
 486
 487         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 488         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 489
 490 2010-01-02  Doug Evans  <dje@sebabeach.org>
 491
 492         * m32c.opc (parse_signed16): Fix typo.
 493
 494 2009-12-11  Nick Clifton  <nickc@redhat.com>
 495
 496         * frv.opc: Fix shadowed variable warnings.
 497         * m32c.opc: Fix shadowed variable warnings.
 498
 499 2009-11-14  Doug Evans  <dje@sebabeach.org>
 500
 501         Must use VOID expression in VOID context.
 502         * xc16x.cpu (mov4): Fix mode of `sequence'.
 503         (mov9, mov10): Ditto.
 504         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 505         (callr, callseg, calls, trap, rets, reti): Ditto.
 506         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 507         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 508         (exts, exts1, extsr, extsr1, prior): Ditto.
 509
 510 2009-10-23  Doug Evans  <dje@sebabeach.org>
 511
 512         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 513         cgen-ops.h -> cgen/basic-ops.h.
 514
 515 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 516
 517         * m32r.cpu (stb-plus): Typo fix.
 518
 519 2009-09-23  Doug Evans  <dje@sebabeach.org>
 520
 521         * m32r.cpu (sth-plus): Fix address mode and calculation.
 522         (stb-plus): Ditto.
 523         (clrpsw): Fix mask calculation.
 524         (bset, bclr, btst): Make mode in bit calculation match expression.
 525
 526         * xc16x.cpu (rtl-version): Set to 0.8.
 527         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 528         make uppercase.  Remove unnecessary name-prefix spec.
 529         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 530         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 531         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 532         (h-cr): New hardware.
 533         (muls): Comment out parts that won't compile, add fixme.
 534         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 535         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 536         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 537
 538 2009-07-16  Doug Evans  <dje@sebabeach.org>
 539
 540         * cpu/simplify.inc (*): One line doc strings don't need \n.
 541         (df): Invoke define-full-ifield instead of claiming it's an alias.
 542         (dno): Define.
 543         (dnop): Mark as deprecated.
 544
 545 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 546
 547         * m32c.opc (parse_lab_5_3): Use correct enum.
 548
 549 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 550
 551         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 552         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 553         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 554         arguments of "operation" to DI using "mode" and the new pmacros.
 555
 556 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 557
 558         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 559         of number 2, PID.
 560
 561 2008-12-23  Jon Beniston <jon@beniston.com>
 562
 563         * lm32.cpu: New file.
 564         * lm32.opc: New file.
 565
 566 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 567
 568         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 569         to source.
 570
 571 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 572
 573         * cris.cpu (movs, movu): Use result of extension operation when
 574         updating flags.
 575
 576 2007-07-04  Nick Clifton  <nickc@redhat.com>
 577
 578         * cris.cpu: Update copyright notice to refer to GPLv3.
 579         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 580         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 581         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 582         xc16x.opc: Likewise.
 583         * iq2000.cpu: Fix copyright notice to refer to FSF.
 584
 585 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 586
 587         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 588
 589 2007-04-20  Nick Clifton  <nickc@redhat.com>
 590
 591         * xc16x.cpu: Restore after accidentally overwriting this file with
 592         xc16x.opc.
 593
 594 2007-03-29  DJ Delorie  <dj@redhat.com>
 595
 596         * m32c.cpu (Imm-8-s4n): Fix print hook.
 597         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 598         (arith-jnz-imm4-dst-defn): Make relaxable.
 599         (arith-jnz16-imm4-dst-defn): Fix encodings.
 600
 601 2007-03-20  DJ Delorie  <dj@redhat.com>
 602
 603         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 604         mem20): New.
 605         (src16-16-20-An-relative-*): New.
 606         (dst16-*-20-An-relative-*): New.
 607         (dst16-16-16sa-*): New
 608         (dst16-16-16ar-*): New
 609         (dst32-16-16sa-Unprefixed-*): New
 610         (jsri): Fix operands.
 611         (setzx): Fix encoding.
 612
 613 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 614
 615         * m32r.opc: Formatting.
 616
 617 2006-05-22  Nick Clifton  <nickc@redhat.com>
 618
 619         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 620
 621 2006-04-10  DJ Delorie  <dj@redhat.com>
 622
 623         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 624         decides if this function accepts symbolic constants or not.
 625         (parse_signed_bitbase): Likewise.
 626         (parse_unsigned_bitbase8): Pass the new parameter.
 627         (parse_unsigned_bitbase11): Likewise.
 628         (parse_unsigned_bitbase16): Likewise.
 629         (parse_unsigned_bitbase19): Likewise.
 630         (parse_unsigned_bitbase27): Likewise.
 631         (parse_signed_bitbase8): Likewise.
 632         (parse_signed_bitbase11): Likewise.
 633         (parse_signed_bitbase19): Likewise.
 634
 635 2006-03-13  DJ Delorie  <dj@redhat.com>
 636
 637         * m32c.cpu (Bit3-S): New.
 638         (btst:s): New.
 639         * m32c.opc (parse_bit3_S): New.
 640
 641         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 642         (btst): Add optional :G suffix for MACH32.
 643         (or.b:S): New.
 644         (pop.w:G): Add optional :G suffix for MACH16.
 645         (push.b.imm): Fix syntax.
 646
 647 2006-03-10  DJ Delorie  <dj@redhat.com>
 648
 649         * m32c.cpu (mul.l): New.
 650         (mulu.l): New.
 651
 652 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 653
 654         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 655         an error message otherwise.
 656         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 657         Fix up comments to correctly describe the functions.
 658
 659 2006-02-24  DJ Delorie  <dj@redhat.com>
 660
 661         * m32c.cpu (RL_TYPE): New attribute, with macros.
 662         (Lab-8-24): Add RELAX.
 663         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 664         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 665         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 666         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 667         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 668         attribute.
 669         (jsri16, jsri32): Add 1ADDR attribute.
 670         (jsr32.w, jsr32.a): Add JUMP attribute.
 671
 672 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 673             Anil Paranjape   <anilp1@kpitcummins.com>
 674             Shilin Shakti    <shilins@kpitcummins.com>
 675
 676         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 677         description.
 678         * xc16x.opc: New file containing supporting XC16C routines.
 679
 680 2006-02-10  Nick Clifton  <nickc@redhat.com>
 681
 682         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 683
 684 2006-01-06  DJ Delorie  <dj@redhat.com>
 685
 686         * m32c.cpu (mov.w:q): Fix mode.
 687         (push32.b.imm): Likewise, for the comment.
 688
 689 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 690
 691         Second part of ms1 to mt renaming.
 692         * mt.cpu (define-arch, define-isa): Set name to mt.
 693         (define-mach): Adjust.
 694         * mt.opc (CGEN_ASM_HASH): Update.
 695         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 696         (parse_loopsize, parse_imm16): Adjust.
 697
 698 2005-12-13  DJ Delorie  <dj@redhat.com>
 699
 700         * m32c.cpu (jsri): Fix order so register names aren't treated as
 701         symbols.
 702         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 703         indexwd, indexws): Fix encodings.
 704
 705 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 706
 707         * mt.cpu: Rename from ms1.cpu.
 708         * mt.opc: Rename from ms1.opc.
 709
 710 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 711
 712         * cris.cpu (simplecris-common-writable-specregs)
 713         (simplecris-common-readable-specregs): Split from
 714         simplecris-common-specregs.  All users changed.
 715         (cris-implemented-writable-specregs-v0)
 716         (cris-implemented-readable-specregs-v0): Similar from
 717         cris-implemented-specregs-v0.
 718         (cris-implemented-writable-specregs-v3)
 719         (cris-implemented-readable-specregs-v3)
 720         (cris-implemented-writable-specregs-v8)
 721         (cris-implemented-readable-specregs-v8)
 722         (cris-implemented-writable-specregs-v10)
 723         (cris-implemented-readable-specregs-v10)
 724         (cris-implemented-writable-specregs-v32)
 725         (cris-implemented-readable-specregs-v32): Similar.
 726         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 727         insns and specializations.
 728
 729 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 730
 731         Add ms2
 732         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 733         model.
 734         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 735         f-cb2incr, f-rc3): New fields.
 736         (LOOP): New instruction.
 737         (JAL-HAZARD): New hazard.
 738         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 739         New operands.
 740         (mul, muli, dbnz, iflush): Enable for ms2
 741         (jal, reti): Has JAL-HAZARD.
 742         (ldctxt, ldfb, stfb): Only ms1.
 743         (fbcb): Only ms1,ms1-003.
 744         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 745         fbcbincrs, mfbcbincrs): Enable for ms2.
 746         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 747         * ms1.opc (parse_loopsize): New.
 748         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 749         (print_pcrel): New.
 750
 751 2005-10-28  Dave Brolley  <brolley@redhat.com>
 752
 753         Contribute the following change:
 754         2003-09-24  Dave Brolley  <brolley@redhat.com>
 755
 756         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 757         CGEN_ATTR_VALUE_TYPE.
 758         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 759         Use cgen_bitset_intersect_p.
 760
 761 2005-10-27  DJ Delorie  <dj@redhat.com>
 762
 763         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 764         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 765         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 766         imm operand is needed.
 767         (adjnz, sbjnz): Pass the right operands.
 768         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 769         unary-insn): Add -g variants for opcodes that need to support :G.
 770         (not.BW:G, push.BW:G): Call it.
 771         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 772         stzx16-imm8-imm8-abs16): Fix operand typos.
 773         * m32c.opc (m32c_asm_hash): Support bnCND.
 774         (parse_signed4n, print_signed4n): New.
 775
 776 2005-10-26  DJ Delorie  <dj@redhat.com>
 777
 778         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 779         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 780         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 781         dsp8[sp] is signed.
 782         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 783         (mov.BW:S r0,r1): Fix typo r1l->r1.
 784         (tst): Allow :G suffix.
 785         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 786
 787 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 788
 789         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 790
 791 2005-10-25  DJ Delorie  <dj@redhat.com>
 792
 793         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 794         making one a macro of the other.
 795
 796 2005-10-21  DJ Delorie  <dj@redhat.com>
 797
 798         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 799         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 800         indexld, indexls): .w variants have `1' bit.
 801         (rot32.b): QI, not SI.
 802         (rot32.w): HI, not SI.
 803         (xchg16): HI for .w variant.
 804
 805 2005-10-19  Nick Clifton  <nickc@redhat.com>
 806
 807         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 808
 809 2005-10-18  Andreas Schwab  <schwab@suse.de>
 810
 811         * m32r.opc (parse_slo16): Better version of previous patch.
 812
 813 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 814
 815         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 816         size.
 817
 818 2005-07-25  DJ Delorie  <dj@redhat.com>
 819
 820         * m32c.opc (parse_unsigned8): Add %dsp8().
 821         (parse_signed8): Add %hi8().
 822         (parse_unsigned16): Add %dsp16().
 823         (parse_signed16): Add %lo16() and %hi16().
 824         (parse_lab_5_3): Make valuep a bfd_vma *.
 825
 826 2005-07-18  Nick Clifton  <nickc@redhat.com>
 827
 828         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 829         components.
 830         (f-lab32-jmp-s): Fix insertion sequence.
 831         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 832         (Dsp-40-s8): Make parameter be signed.
 833         (Dsp-40-s16): Likewise.
 834         (Dsp-48-s8): Likewise.
 835         (Dsp-48-s16): Likewise.
 836         (Imm-13-u3): Likewise. (Despite its name!)
 837         (BitBase16-16-s8): Make the parameter be unsigned.
 838         (BitBase16-8-u11-S): Likewise.
 839         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 840         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 841         relaxation.
 842
 843         * m32c.opc: Fix formatting.
 844         Use safe-ctype.h instead of ctype.h
 845         Move duplicated code sequences into a macro.
 846         Fix compile time warnings about signedness mismatches.
 847         Remove dead code.
 848         (parse_lab_5_3): New parser function.
 849
 850 2005-07-16  Jim Blandy  <jimb@redhat.com>
 851
 852         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 853         to represent isa sets.
 854
 855 2005-07-15  Jim Blandy  <jimb@redhat.com>
 856
 857         * m32c.cpu, m32c.opc: Fix copyright.
 858
 859 2005-07-14  Jim Blandy  <jimb@redhat.com>
 860
 861         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 862
 863 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 864
 865         * ms1.opc (print_dollarhex): Correct format string.
 866
 867 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 868
 869         * iq2000.cpu: Include from binutils cpu dir.
 870
 871 2005-07-05  Nick Clifton  <nickc@redhat.com>
 872
 873         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 874         unsigned in order to avoid compile time warnings about sign
 875         conflicts.
 876
 877         * ms1.opc (parse_*): Likewise.
 878         (parse_imm16): Use a "void *" as it is passed both signed and
 879         unsigned arguments.
 880
 881 2005-07-01  Nick Clifton  <nickc@redhat.com>
 882
 883         * frv.opc: Update to ISO C90 function declaration style.
 884         * iq2000.opc: Likewise.
 885         * m32r.opc: Likewise.
 886         * sh.opc: Likewise.
 887
 888 2005-06-15  Dave Brolley  <brolley@redhat.com>
 889
 890         Contributed by Red Hat.
 891         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 892         * ms1.opc: New file.  Written by Stan Cox.
 893
 894 2005-05-10  Nick Clifton  <nickc@redhat.com>
 895
 896         * Update the address and phone number of the FSF organization in
 897         the GPL notices in the following files:
 898         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 899         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 900         sh64-media.cpu, simplify.inc
 901
 902 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 903
 904         * frv.opc (parse_A): Warning fix.
 905
 906 2005-02-23  Nick Clifton  <nickc@redhat.com>
 907
 908         * frv.opc: Fixed compile time warnings about differing signed'ness
 909         of pointers passed to functions.
 910         * m32r.opc: Likewise.
 911
 912 2005-02-11  Nick Clifton  <nickc@redhat.com>
 913
 914         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 915         'bfd_vma *' in order avoid compile time warning message.
 916
 917 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 918
 919         * cris.cpu (mstep): Add missing insn.
 920
 921 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 922
 923         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 924         * frv.cpu: Add support for TLS annotations in loads and calll.
 925         * frv.opc (parse_symbolic_address): New.
 926         (parse_ldd_annotation): New.
 927         (parse_call_annotation): New.
 928         (parse_ld_annotation): New.
 929         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 930         Introduce TLS relocations.
 931         (parse_d12, parse_s12, parse_u12): Likewise.
 932         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 933         (parse_call_label, print_at): New.
 934
 935 2004-12-21  Mikael Starvik  <starvik@axis.com>
 936
 937         * cris.cpu (cris-set-mem): Correct integral write semantics.
 938
 939 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 940
 941         * cris.cpu: New file.
 942
 943 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 944
 945         * iq2000.cpu: Added quotes around macro arguments so that they
 946         will work with newer versions of guile.
 947
 948 2004-10-27  Nick Clifton  <nickc@redhat.com>
 949
 950         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 951         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 952         operand.
 953         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 954         with guile.
 955
 956 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 957
 958         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 959
 960 2004-05-15  Nick Clifton  <nickc@redhat.com>
 961
 962         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 963
 964 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 965
 966         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 967
 968 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 969
 970         * frv.cpu (define-arch frv): Add fr450 mach.
 971         (define-mach fr450): New.
 972         (define-model fr450): New.  Add profile units to every fr450 insn.
 973         (define-attr UNIT): Add MDCUTSSI.
 974         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 975         (define-attr AUDIO): New boolean.
 976         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 977         (f-LRA-null, f-TLBPR-null): New fields.
 978         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 979         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 980         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 981         (LRA-null, TLBPR-null): New macros.
 982         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 983         (load-real-address): New macro.
 984         (lrai, lrad, tlbpr): New instructions.
 985         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 986         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 987         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 988         (media-low-clear-semantics, media-scope-limit-semantics)
 989         (media-quad-limit, media-quad-shift): New macros.
 990         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 991         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 992         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 993         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 994         (fr450_unit_mapping): New array.
 995         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 996         for new MDCUTSSI unit.
 997         (fr450_check_insn_major_constraints): New function.
 998         (check_insn_major_constraints): Use it.
 999
1000 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1001
1002         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1003         (scutss): Change unit to I0.
1004         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1005         (mqsaths): Fix FR400-MAJOR categorization.
1006         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1007         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1008         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1009         combinations.
1010
1011 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1012
1013         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1014         (rstb, rsth, rst, rstd, rstq): Delete.
1015         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1016
1017 2004-02-23  Nick Clifton  <nickc@redhat.com>
1018
1019         * Apply these patches from Renesas:
1020
1021         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1022
1023         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1024         disassembling codes for 0x*2 addresses.
1025
1026         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1027
1028         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1029
1030         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1031
1032         * cpu/m32r.cpu : Add new model m32r2.
1033         Add new instructions.
1034         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1035         Changed PIPE attr of push from O to OS.
1036         Care for Little-endian of M32R.
1037         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1038         Care for Little-endian of M32R.
1039         (parse_slo16): signed extension for value.
1040
1041 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1042
1043         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1044         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1045
1046         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1047         written by Ben Elliston.
1048
1049 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1050
1051         * frv.cpu (UNIT): Add IACC.
1052         (iacc-multiply-r-r): Use it.
1053         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1054         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1055
1056 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1057
1058         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1059         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1060         cut&paste errors in shifting/truncating numerical operands.
1061         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1062         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1063         (parse_uslo16): Likewise.
1064         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1065         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1066         (parse_s12): Likewise.
1067         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1068         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1069         (parse_uslo16): Likewise.
1070         (parse_uhi16): Parse gothi and gotfuncdeschi.
1071         (parse_d12): Parse got12 and gotfuncdesc12.
1072         (parse_s12): Likewise.
1073
1074 2003-10-10  Dave Brolley  <brolley@redhat.com>
1075
1076         * frv.cpu (dnpmop): New p-macro.
1077         (GRdoublek): Use dnpmop.
1078         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1079         (store-double-r-r): Use (.sym regtype doublek).
1080         (r-store-double): Ditto.
1081         (store-double-r-r-u): Ditto.
1082         (conditional-store-double): Ditto.
1083         (conditional-store-double-u): Ditto.
1084         (store-double-r-simm): Ditto.
1085         (fmovs): Assign to UNIT FMALL.
1086
1087 2003-10-06  Dave Brolley  <brolley@redhat.com>
1088
1089         * frv.cpu, frv.opc: Add support for fr550.
1090
1091 2003-09-24  Dave Brolley  <brolley@redhat.com>
1092
1093         * frv.cpu (u-commit): New modelling unit for fr500.
1094         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1095         (commit-r): Use u-commit model for fr500.
1096         (commit): Ditto.
1097         (conditional-float-binary-op): Take profiling data as an argument.
1098         Update callers.
1099         (ne-float-binary-op): Ditto.
1100
1101 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1102
1103         * frv.cpu (nldqi): Delete unimplemented instruction.
1104
1105 2003-09-12  Dave Brolley  <brolley@redhat.com>
1106
1107         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1108         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1109         frv_ref_SI to get input register referenced for profiling.
1110         (clear-ne-flag-all): Pass insn profiling in as an argument.
1111         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1112
1113 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1114
1115         * frv.cpu: Typographical corrections.
1116
1117 2003-09-09  Dave Brolley  <brolley@redhat.com>
1118
1119         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1120         (conditional-media-dual-complex, media-quad-complex): Likewise.
1121
1122 2003-09-04  Dave Brolley  <brolley@redhat.com>
1123
1124         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1125         Update all callers.
1126         (conditional-register-transfer): Ditto.
1127         (cache-preload): Ditto.
1128         (floating-point-conversion): Ditto.
1129         (floating-point-neg): Ditto.
1130         (float-abs): Ditto.
1131         (float-binary-op-s): Ditto.
1132         (conditional-float-binary-op): Ditto.
1133         (ne-float-binary-op): Ditto.
1134         (float-dual-arith): Ditto.
1135         (ne-float-dual-arith): Ditto.
1136
1137 2003-09-03  Dave Brolley  <brolley@redhat.com>
1138
1139         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1140         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1141         MCLRACC-1.
1142         (A): Removed operand.
1143         (A0,A1): New operands replace operand A.
1144         (mnop): Now a real insn
1145         (mclracc): Removed insn.
1146         (mclracc-0, mclracc-1): New insns replace mclracc.
1147         (all insns): Use new UNIT attributes.
1148
1149 2003-08-21  Nick Clifton  <nickc@redhat.com>
1150
1151         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1152         and u-media-dual-btoh with output parameter.
1153         (cmbtoh): Add profiling hack.
1154
1155 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1156
1157         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1158
1159 2003-06-10  Doug Evans  <dje@sebabeach.org>
1160
1161         * frv.cpu: Add IDOC attribute.
1162
1163 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1164
1165         Contributed by Red Hat.
1166         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1167         Stan Cox, and Frank Ch. Eigler.
1168         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1169         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1170         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1171         * iq10.cpu: New file.  Written by Jeff Johnston.
1172
1173 2003-06-05  Nick Clifton  <nickc@redhat.com>
1174
1175         * frv.cpu (FRintieven): New operand.  An even-numbered only
1176         version of the FRinti operand.
1177         (FRintjeven): Likewise for FRintj.
1178         (FRintkeven): Likewise for FRintk.
1179         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1180         media-quad-arith-sat-semantics, media-quad-arith-sat,
1181         conditional-media-quad-arith-sat, mdunpackh,
1182         media-quad-multiply-semantics, media-quad-multiply,
1183         conditional-media-quad-multiply, media-quad-complex-i,
1184         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1185         conditional-media-quad-multiply-acc, munpackh,
1186         media-quad-multiply-cross-acc-semantics, mdpackh,
1187         media-quad-multiply-cross-acc, mbtoh-semantics,
1188         media-quad-cross-multiply-cross-acc-semantics,
1189         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1190         media-quad-cross-multiply-acc-semantics, cmbtoh,
1191         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1192         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1193         cmhtob): Use new operands.
1194         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1195         (parse_even_register): New function.
1196
1197 2003-06-03  Nick Clifton  <nickc@redhat.com>
1198
1199         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1200         immediate value not unsigned.
1201
1202 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1203
1204         Contributed by Red Hat.
1205         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1206         and Eric Christopher.
1207         * frv.opc: New file.  Written by Catherine Moore, and Dave
1208         Brolley.
1209         * simplify.inc: New file.  Written by Doug Evans.
1210
1211 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1212
1213         * New file.
1214
1215 \f
1216 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1217
1218 Copying and distribution of this file, with or without modification,
1219 are permitted in any medium without royalty provided the copyright
1220 notice and this notice are preserved.
1221
1222 Local Variables:
1223 mode: change-log
1224 left-margin: 8
1225 fill-column: 74
1226 version-control: never
1227 End: