2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 #include <linux/moduleparam.h>
34 #include "intel_drv.h"
36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
39 intel_fixed_panel_mode(struct drm_display_mode
*fixed_mode
,
40 struct drm_display_mode
*adjusted_mode
)
42 adjusted_mode
->hdisplay
= fixed_mode
->hdisplay
;
43 adjusted_mode
->hsync_start
= fixed_mode
->hsync_start
;
44 adjusted_mode
->hsync_end
= fixed_mode
->hsync_end
;
45 adjusted_mode
->htotal
= fixed_mode
->htotal
;
47 adjusted_mode
->vdisplay
= fixed_mode
->vdisplay
;
48 adjusted_mode
->vsync_start
= fixed_mode
->vsync_start
;
49 adjusted_mode
->vsync_end
= fixed_mode
->vsync_end
;
50 adjusted_mode
->vtotal
= fixed_mode
->vtotal
;
52 adjusted_mode
->clock
= fixed_mode
->clock
;
55 /* adjusted_mode has been preset to be the panel's fixed mode */
57 intel_pch_panel_fitting(struct intel_crtc
*intel_crtc
,
58 struct intel_crtc_config
*pipe_config
,
61 struct drm_display_mode
*mode
, *adjusted_mode
;
62 int x
, y
, width
, height
;
64 mode
= &pipe_config
->requested_mode
;
65 adjusted_mode
= &pipe_config
->adjusted_mode
;
67 x
= y
= width
= height
= 0;
69 /* Native modes don't need fitting */
70 if (adjusted_mode
->hdisplay
== mode
->hdisplay
&&
71 adjusted_mode
->vdisplay
== mode
->vdisplay
)
74 switch (fitting_mode
) {
75 case DRM_MODE_SCALE_CENTER
:
76 width
= mode
->hdisplay
;
77 height
= mode
->vdisplay
;
78 x
= (adjusted_mode
->hdisplay
- width
+ 1)/2;
79 y
= (adjusted_mode
->vdisplay
- height
+ 1)/2;
82 case DRM_MODE_SCALE_ASPECT
:
83 /* Scale but preserve the aspect ratio */
85 u32 scaled_width
= adjusted_mode
->hdisplay
* mode
->vdisplay
;
86 u32 scaled_height
= mode
->hdisplay
* adjusted_mode
->vdisplay
;
87 if (scaled_width
> scaled_height
) { /* pillar */
88 width
= scaled_height
/ mode
->vdisplay
;
91 x
= (adjusted_mode
->hdisplay
- width
+ 1) / 2;
93 height
= adjusted_mode
->vdisplay
;
94 } else if (scaled_width
< scaled_height
) { /* letter */
95 height
= scaled_width
/ mode
->hdisplay
;
98 y
= (adjusted_mode
->vdisplay
- height
+ 1) / 2;
100 width
= adjusted_mode
->hdisplay
;
103 width
= adjusted_mode
->hdisplay
;
104 height
= adjusted_mode
->vdisplay
;
109 case DRM_MODE_SCALE_FULLSCREEN
:
111 width
= adjusted_mode
->hdisplay
;
112 height
= adjusted_mode
->vdisplay
;
116 WARN(1, "bad panel fit mode: %d\n", fitting_mode
);
121 pipe_config
->pch_pfit
.pos
= (x
<< 16) | y
;
122 pipe_config
->pch_pfit
.size
= (width
<< 16) | height
;
126 centre_horizontally(struct drm_display_mode
*mode
,
129 u32 border
, sync_pos
, blank_width
, sync_width
;
131 /* keep the hsync and hblank widths constant */
132 sync_width
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
133 blank_width
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
134 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
136 border
= (mode
->hdisplay
- width
+ 1) / 2;
137 border
+= border
& 1; /* make the border even */
139 mode
->crtc_hdisplay
= width
;
140 mode
->crtc_hblank_start
= width
+ border
;
141 mode
->crtc_hblank_end
= mode
->crtc_hblank_start
+ blank_width
;
143 mode
->crtc_hsync_start
= mode
->crtc_hblank_start
+ sync_pos
;
144 mode
->crtc_hsync_end
= mode
->crtc_hsync_start
+ sync_width
;
148 centre_vertically(struct drm_display_mode
*mode
,
151 u32 border
, sync_pos
, blank_width
, sync_width
;
153 /* keep the vsync and vblank widths constant */
154 sync_width
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
155 blank_width
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
156 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
158 border
= (mode
->vdisplay
- height
+ 1) / 2;
160 mode
->crtc_vdisplay
= height
;
161 mode
->crtc_vblank_start
= height
+ border
;
162 mode
->crtc_vblank_end
= mode
->crtc_vblank_start
+ blank_width
;
164 mode
->crtc_vsync_start
= mode
->crtc_vblank_start
+ sync_pos
;
165 mode
->crtc_vsync_end
= mode
->crtc_vsync_start
+ sync_width
;
168 static inline u32
panel_fitter_scaling(u32 source
, u32 target
)
171 * Floating point operation is not supported. So the FACTOR
172 * is defined, which can avoid the floating point computation
173 * when calculating the panel ratio.
176 #define FACTOR (1 << ACCURACY)
177 u32 ratio
= source
* FACTOR
/ target
;
178 return (FACTOR
* ratio
+ FACTOR
/2) / FACTOR
;
181 void intel_gmch_panel_fitting(struct intel_crtc
*intel_crtc
,
182 struct intel_crtc_config
*pipe_config
,
185 struct drm_device
*dev
= intel_crtc
->base
.dev
;
186 u32 pfit_control
= 0, pfit_pgm_ratios
= 0, border
= 0;
187 struct drm_display_mode
*mode
, *adjusted_mode
;
189 mode
= &pipe_config
->requested_mode
;
190 adjusted_mode
= &pipe_config
->adjusted_mode
;
192 /* Native modes don't need fitting */
193 if (adjusted_mode
->hdisplay
== mode
->hdisplay
&&
194 adjusted_mode
->vdisplay
== mode
->vdisplay
)
197 switch (fitting_mode
) {
198 case DRM_MODE_SCALE_CENTER
:
200 * For centered modes, we have to calculate border widths &
201 * heights and modify the values programmed into the CRTC.
203 centre_horizontally(adjusted_mode
, mode
->hdisplay
);
204 centre_vertically(adjusted_mode
, mode
->vdisplay
);
205 border
= LVDS_BORDER_ENABLE
;
207 case DRM_MODE_SCALE_ASPECT
:
208 /* Scale but preserve the aspect ratio */
209 if (INTEL_INFO(dev
)->gen
>= 4) {
210 u32 scaled_width
= adjusted_mode
->hdisplay
*
212 u32 scaled_height
= mode
->hdisplay
*
213 adjusted_mode
->vdisplay
;
215 /* 965+ is easy, it does everything in hw */
216 if (scaled_width
> scaled_height
)
217 pfit_control
|= PFIT_ENABLE
|
219 else if (scaled_width
< scaled_height
)
220 pfit_control
|= PFIT_ENABLE
|
222 else if (adjusted_mode
->hdisplay
!= mode
->hdisplay
)
223 pfit_control
|= PFIT_ENABLE
| PFIT_SCALING_AUTO
;
225 u32 scaled_width
= adjusted_mode
->hdisplay
*
227 u32 scaled_height
= mode
->hdisplay
*
228 adjusted_mode
->vdisplay
;
230 * For earlier chips we have to calculate the scaling
231 * ratio by hand and program it into the
232 * PFIT_PGM_RATIO register
234 if (scaled_width
> scaled_height
) { /* pillar */
235 centre_horizontally(adjusted_mode
,
239 border
= LVDS_BORDER_ENABLE
;
240 if (mode
->vdisplay
!= adjusted_mode
->vdisplay
) {
241 u32 bits
= panel_fitter_scaling(mode
->vdisplay
, adjusted_mode
->vdisplay
);
242 pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
243 bits
<< PFIT_VERT_SCALE_SHIFT
);
244 pfit_control
|= (PFIT_ENABLE
|
245 VERT_INTERP_BILINEAR
|
246 HORIZ_INTERP_BILINEAR
);
248 } else if (scaled_width
< scaled_height
) { /* letter */
249 centre_vertically(adjusted_mode
,
253 border
= LVDS_BORDER_ENABLE
;
254 if (mode
->hdisplay
!= adjusted_mode
->hdisplay
) {
255 u32 bits
= panel_fitter_scaling(mode
->hdisplay
, adjusted_mode
->hdisplay
);
256 pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
257 bits
<< PFIT_VERT_SCALE_SHIFT
);
258 pfit_control
|= (PFIT_ENABLE
|
259 VERT_INTERP_BILINEAR
|
260 HORIZ_INTERP_BILINEAR
);
263 /* Aspects match, Let hw scale both directions */
264 pfit_control
|= (PFIT_ENABLE
|
265 VERT_AUTO_SCALE
| HORIZ_AUTO_SCALE
|
266 VERT_INTERP_BILINEAR
|
267 HORIZ_INTERP_BILINEAR
);
271 case DRM_MODE_SCALE_FULLSCREEN
:
273 * Full scaling, even if it changes the aspect ratio.
274 * Fortunately this is all done for us in hw.
276 if (mode
->vdisplay
!= adjusted_mode
->vdisplay
||
277 mode
->hdisplay
!= adjusted_mode
->hdisplay
) {
278 pfit_control
|= PFIT_ENABLE
;
279 if (INTEL_INFO(dev
)->gen
>= 4)
280 pfit_control
|= PFIT_SCALING_AUTO
;
282 pfit_control
|= (VERT_AUTO_SCALE
|
283 VERT_INTERP_BILINEAR
|
285 HORIZ_INTERP_BILINEAR
);
289 WARN(1, "bad panel fit mode: %d\n", fitting_mode
);
293 /* 965+ wants fuzzy fitting */
294 /* FIXME: handle multiple panels by failing gracefully */
295 if (INTEL_INFO(dev
)->gen
>= 4)
296 pfit_control
|= ((intel_crtc
->pipe
<< PFIT_PIPE_SHIFT
) |
300 if ((pfit_control
& PFIT_ENABLE
) == 0) {
305 /* Make sure pre-965 set dither correctly for 18bpp panels. */
306 if (INTEL_INFO(dev
)->gen
< 4 && pipe_config
->pipe_bpp
== 18)
307 pfit_control
|= PANEL_8TO6_DITHER_ENABLE
;
309 pipe_config
->gmch_pfit
.control
= pfit_control
;
310 pipe_config
->gmch_pfit
.pgm_ratios
= pfit_pgm_ratios
;
311 pipe_config
->gmch_pfit
.lvds_border_bits
= border
;
314 static int is_backlight_combination_mode(struct drm_device
*dev
)
316 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
318 if (INTEL_INFO(dev
)->gen
>= 4)
319 return I915_READ(BLC_PWM_CTL2
) & BLM_COMBINATION_MODE
;
322 return I915_READ(BLC_PWM_CTL
) & BLM_LEGACY_MODE
;
327 /* XXX: query mode clock or hardware clock and program max PWM appropriately
330 static u32
i915_read_blc_pwm_ctl(struct drm_device
*dev
)
332 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
335 WARN_ON_SMP(!spin_is_locked(&dev_priv
->backlight
.lock
));
337 /* Restore the CTL value if it lost, e.g. GPU reset */
339 if (HAS_PCH_SPLIT(dev_priv
->dev
)) {
340 val
= I915_READ(BLC_PWM_PCH_CTL2
);
341 if (dev_priv
->regfile
.saveBLC_PWM_CTL2
== 0) {
342 dev_priv
->regfile
.saveBLC_PWM_CTL2
= val
;
343 } else if (val
== 0) {
344 val
= dev_priv
->regfile
.saveBLC_PWM_CTL2
;
345 I915_WRITE(BLC_PWM_PCH_CTL2
, val
);
348 val
= I915_READ(BLC_PWM_CTL
);
349 if (dev_priv
->regfile
.saveBLC_PWM_CTL
== 0) {
350 dev_priv
->regfile
.saveBLC_PWM_CTL
= val
;
351 if (INTEL_INFO(dev
)->gen
>= 4)
352 dev_priv
->regfile
.saveBLC_PWM_CTL2
=
353 I915_READ(BLC_PWM_CTL2
);
354 } else if (val
== 0) {
355 val
= dev_priv
->regfile
.saveBLC_PWM_CTL
;
356 I915_WRITE(BLC_PWM_CTL
, val
);
357 if (INTEL_INFO(dev
)->gen
>= 4)
358 I915_WRITE(BLC_PWM_CTL2
,
359 dev_priv
->regfile
.saveBLC_PWM_CTL2
);
366 static u32
intel_panel_get_max_backlight(struct drm_device
*dev
)
370 max
= i915_read_blc_pwm_ctl(dev
);
372 if (HAS_PCH_SPLIT(dev
)) {
375 if (INTEL_INFO(dev
)->gen
< 4)
380 if (is_backlight_combination_mode(dev
))
384 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max
);
389 static int i915_panel_invert_brightness
;
390 MODULE_PARM_DESC(invert_brightness
, "Invert backlight brightness "
391 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
392 "report PCI device ID, subsystem vendor and subsystem device ID "
393 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
394 "It will then be included in an upcoming module version.");
395 module_param_named(invert_brightness
, i915_panel_invert_brightness
, int, 0600);
396 static u32
intel_panel_compute_brightness(struct drm_device
*dev
, u32 val
)
398 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
400 if (i915_panel_invert_brightness
< 0)
403 if (i915_panel_invert_brightness
> 0 ||
404 dev_priv
->quirks
& QUIRK_INVERT_BRIGHTNESS
) {
405 u32 max
= intel_panel_get_max_backlight(dev
);
413 static u32
intel_panel_get_backlight(struct drm_device
*dev
)
415 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
419 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
421 if (HAS_PCH_SPLIT(dev
)) {
422 val
= I915_READ(BLC_PWM_CPU_CTL
) & BACKLIGHT_DUTY_CYCLE_MASK
;
424 val
= I915_READ(BLC_PWM_CTL
) & BACKLIGHT_DUTY_CYCLE_MASK
;
425 if (INTEL_INFO(dev
)->gen
< 4)
428 if (is_backlight_combination_mode(dev
)) {
431 pci_read_config_byte(dev
->pdev
, PCI_LBPC
, &lbpc
);
436 val
= intel_panel_compute_brightness(dev
, val
);
438 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
440 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val
);
444 static void intel_pch_panel_set_backlight(struct drm_device
*dev
, u32 level
)
446 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
447 u32 val
= I915_READ(BLC_PWM_CPU_CTL
) & ~BACKLIGHT_DUTY_CYCLE_MASK
;
448 I915_WRITE(BLC_PWM_CPU_CTL
, val
| level
);
451 static void intel_panel_actually_set_backlight(struct drm_device
*dev
, u32 level
)
453 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
456 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level
);
457 level
= intel_panel_compute_brightness(dev
, level
);
459 if (HAS_PCH_SPLIT(dev
))
460 return intel_pch_panel_set_backlight(dev
, level
);
462 if (is_backlight_combination_mode(dev
)) {
463 u32 max
= intel_panel_get_max_backlight(dev
);
466 /* we're screwed, but keep behaviour backwards compatible */
470 lbpc
= level
* 0xfe / max
+ 1;
472 pci_write_config_byte(dev
->pdev
, PCI_LBPC
, lbpc
);
475 tmp
= I915_READ(BLC_PWM_CTL
);
476 if (INTEL_INFO(dev
)->gen
< 4)
478 tmp
&= ~BACKLIGHT_DUTY_CYCLE_MASK
;
479 I915_WRITE(BLC_PWM_CTL
, tmp
| level
);
482 /* set backlight brightness to level in range [0..max] */
483 void intel_panel_set_backlight(struct drm_device
*dev
, u32 level
, u32 max
)
485 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
489 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
491 freq
= intel_panel_get_max_backlight(dev
);
493 /* we are screwed, bail out */
497 /* scale to hardware */
498 level
= level
* freq
/ max
;
500 dev_priv
->backlight
.level
= level
;
501 if (dev_priv
->backlight
.device
)
502 dev_priv
->backlight
.device
->props
.brightness
= level
;
504 if (dev_priv
->backlight
.enabled
)
505 intel_panel_actually_set_backlight(dev
, level
);
507 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
510 void intel_panel_disable_backlight(struct drm_device
*dev
)
512 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
515 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
517 dev_priv
->backlight
.enabled
= false;
518 intel_panel_actually_set_backlight(dev
, 0);
520 if (INTEL_INFO(dev
)->gen
>= 4) {
523 reg
= HAS_PCH_SPLIT(dev
) ? BLC_PWM_CPU_CTL2
: BLC_PWM_CTL2
;
525 I915_WRITE(reg
, I915_READ(reg
) & ~BLM_PWM_ENABLE
);
527 if (HAS_PCH_SPLIT(dev
)) {
528 tmp
= I915_READ(BLC_PWM_PCH_CTL1
);
529 tmp
&= ~BLM_PCH_PWM_ENABLE
;
530 I915_WRITE(BLC_PWM_PCH_CTL1
, tmp
);
534 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
537 void intel_panel_enable_backlight(struct drm_device
*dev
,
540 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
541 enum transcoder cpu_transcoder
=
542 intel_pipe_to_cpu_transcoder(dev_priv
, pipe
);
545 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
547 if (dev_priv
->backlight
.level
== 0) {
548 dev_priv
->backlight
.level
= intel_panel_get_max_backlight(dev
);
549 if (dev_priv
->backlight
.device
)
550 dev_priv
->backlight
.device
->props
.brightness
=
551 dev_priv
->backlight
.level
;
554 if (INTEL_INFO(dev
)->gen
>= 4) {
557 reg
= HAS_PCH_SPLIT(dev
) ? BLC_PWM_CPU_CTL2
: BLC_PWM_CTL2
;
560 tmp
= I915_READ(reg
);
562 /* Note that this can also get called through dpms changes. And
563 * we don't track the backlight dpms state, hence check whether
564 * we have to do anything first. */
565 if (tmp
& BLM_PWM_ENABLE
)
568 if (INTEL_INFO(dev
)->num_pipes
== 3)
569 tmp
&= ~BLM_PIPE_SELECT_IVB
;
571 tmp
&= ~BLM_PIPE_SELECT
;
573 if (cpu_transcoder
== TRANSCODER_EDP
)
574 tmp
|= BLM_TRANSCODER_EDP
;
576 tmp
|= BLM_PIPE(cpu_transcoder
);
577 tmp
&= ~BLM_PWM_ENABLE
;
579 I915_WRITE(reg
, tmp
);
581 I915_WRITE(reg
, tmp
| BLM_PWM_ENABLE
);
583 if (HAS_PCH_SPLIT(dev
)) {
584 tmp
= I915_READ(BLC_PWM_PCH_CTL1
);
585 tmp
|= BLM_PCH_PWM_ENABLE
;
586 tmp
&= ~BLM_PCH_OVERRIDE_ENABLE
;
587 I915_WRITE(BLC_PWM_PCH_CTL1
, tmp
);
592 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
593 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
596 dev_priv
->backlight
.enabled
= true;
597 intel_panel_actually_set_backlight(dev
, dev_priv
->backlight
.level
);
599 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
602 static void intel_panel_init_backlight(struct drm_device
*dev
)
604 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
606 dev_priv
->backlight
.level
= intel_panel_get_backlight(dev
);
607 dev_priv
->backlight
.enabled
= dev_priv
->backlight
.level
!= 0;
610 enum drm_connector_status
611 intel_panel_detect(struct drm_device
*dev
)
613 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
615 /* Assume that the BIOS does not lie through the OpRegion... */
616 if (!i915_panel_ignore_lid
&& dev_priv
->opregion
.lid_state
) {
617 return ioread32(dev_priv
->opregion
.lid_state
) & 0x1 ?
618 connector_status_connected
:
619 connector_status_disconnected
;
622 switch (i915_panel_ignore_lid
) {
624 return connector_status_connected
;
626 return connector_status_disconnected
;
628 return connector_status_unknown
;
632 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
633 static int intel_panel_update_status(struct backlight_device
*bd
)
635 struct drm_device
*dev
= bl_get_data(bd
);
636 intel_panel_set_backlight(dev
, bd
->props
.brightness
,
637 bd
->props
.max_brightness
);
641 static int intel_panel_get_brightness(struct backlight_device
*bd
)
643 struct drm_device
*dev
= bl_get_data(bd
);
644 return intel_panel_get_backlight(dev
);
647 static const struct backlight_ops intel_panel_bl_ops
= {
648 .update_status
= intel_panel_update_status
,
649 .get_brightness
= intel_panel_get_brightness
,
652 int intel_panel_setup_backlight(struct drm_connector
*connector
)
654 struct drm_device
*dev
= connector
->dev
;
655 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
656 struct backlight_properties props
;
659 intel_panel_init_backlight(dev
);
661 if (WARN_ON(dev_priv
->backlight
.device
))
664 memset(&props
, 0, sizeof(props
));
665 props
.type
= BACKLIGHT_RAW
;
666 props
.brightness
= dev_priv
->backlight
.level
;
668 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
669 props
.max_brightness
= intel_panel_get_max_backlight(dev
);
670 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
672 if (props
.max_brightness
== 0) {
673 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
676 dev_priv
->backlight
.device
=
677 backlight_device_register("intel_backlight",
678 &connector
->kdev
, dev
,
679 &intel_panel_bl_ops
, &props
);
681 if (IS_ERR(dev_priv
->backlight
.device
)) {
682 DRM_ERROR("Failed to register backlight: %ld\n",
683 PTR_ERR(dev_priv
->backlight
.device
));
684 dev_priv
->backlight
.device
= NULL
;
690 void intel_panel_destroy_backlight(struct drm_device
*dev
)
692 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
693 if (dev_priv
->backlight
.device
) {
694 backlight_device_unregister(dev_priv
->backlight
.device
);
695 dev_priv
->backlight
.device
= NULL
;
699 int intel_panel_setup_backlight(struct drm_connector
*connector
)
701 intel_panel_init_backlight(connector
->dev
);
705 void intel_panel_destroy_backlight(struct drm_device
*dev
)
711 int intel_panel_init(struct intel_panel
*panel
,
712 struct drm_display_mode
*fixed_mode
)
714 panel
->fixed_mode
= fixed_mode
;
719 void intel_panel_fini(struct intel_panel
*panel
)
721 struct intel_connector
*intel_connector
=
722 container_of(panel
, struct intel_connector
, panel
);
724 if (panel
->fixed_mode
)
725 drm_mode_destroy(intel_connector
->base
.dev
, panel
->fixed_mode
);