drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/gpuobj.h>
  26
  27 #include <subdev/timer.h>
  28 #include <subdev/fb.h>
  29 #include <subdev/vm.h>
  30
  31 #include "priv.h"
  32
  33 struct nvc0_bar_priv {
  34         struct nouveau_bar base;
  35         spinlock_t lock;
  36         struct {
  37                 struct nouveau_gpuobj *mem;
  38                 struct nouveau_gpuobj *pgd;
  39                 struct nouveau_vm *vm;
  40         } bar[2];
  41 };
  42
  43 static int
  44 nvc0_bar_kmap(struct nouveau_bar *bar, struct nouveau_mem *mem,
  45               u32 flags, struct nouveau_vma *vma)
  46 {
  47         struct nvc0_bar_priv *priv = (void *)bar;
  48         int ret;
  49
  50         ret = nouveau_vm_get(priv->bar[0].vm, mem->size << 12, 12, flags, vma);
  51         if (ret)
  52                 return ret;
  53
  54         nouveau_vm_map(vma, mem);
  55         return 0;
  56 }
  57
  58 static int
  59 nvc0_bar_umap(struct nouveau_bar *bar, struct nouveau_mem *mem,
  60               u32 flags, struct nouveau_vma *vma)
  61 {
  62         struct nvc0_bar_priv *priv = (void *)bar;
  63         int ret;
  64
  65         ret = nouveau_vm_get(priv->bar[1].vm, mem->size << 12,
  66                              mem->page_shift, flags, vma);
  67         if (ret)
  68                 return ret;
  69
  70         nouveau_vm_map(vma, mem);
  71         return 0;
  72 }
  73
  74 static void
  75 nvc0_bar_unmap(struct nouveau_bar *bar, struct nouveau_vma *vma)
  76 {
  77         nouveau_vm_unmap(vma);
  78         nouveau_vm_put(vma);
  79 }
  80
  81 static int
  82 nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  83               struct nouveau_oclass *oclass, void *data, u32 size,
  84               struct nouveau_object **pobject)
  85 {
  86         struct nouveau_device *device = nv_device(parent);
  87         struct nvc0_bar_priv *priv;
  88         struct nouveau_gpuobj *mem;
  89         struct nouveau_vm *vm;
  90         int ret;
  91
  92         ret = nouveau_bar_create(parent, engine, oclass, &priv);
  93         *pobject = nv_object(priv);
  94         if (ret)
  95                 return ret;
  96
  97         /* BAR3 */
  98         ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
  99                                 &priv->bar[0].mem);
 100         mem = priv->bar[0].mem;
 101         if (ret)
 102                 return ret;
 103
 104         ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0, 0,
 105                                 &priv->bar[0].pgd);
 106         if (ret)
 107                 return ret;
 108
 109         ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
 110         if (ret)
 111                 return ret;
 112
 113         atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
 114
 115         ret = nouveau_gpuobj_new(nv_object(priv), NULL,
 116                                  (nv_device_resource_len(device, 3) >> 12) * 8,
 117                                  0x1000, NVOBJ_FLAG_ZERO_ALLOC,
 118                                  &vm->pgt[0].obj[0]);
 119         vm->pgt[0].refcount[0] = 1;
 120         if (ret)
 121                 return ret;
 122
 123         ret = nouveau_vm_ref(vm, &priv->bar[0].vm, priv->bar[0].pgd);
 124         nouveau_vm_ref(NULL, &vm, NULL);
 125         if (ret)
 126                 return ret;
 127
 128         nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[0].pgd->addr));
 129         nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[0].pgd->addr));
 130         nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 3) - 1));
 131         nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 3) - 1));
 132
 133         /* BAR1 */
 134         ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
 135                                 &priv->bar[1].mem);
 136         mem = priv->bar[1].mem;
 137         if (ret)
 138                 return ret;
 139
 140         ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0, 0,
 141                                 &priv->bar[1].pgd);
 142         if (ret)
 143                 return ret;
 144
 145         ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
 146         if (ret)
 147                 return ret;
 148
 149         atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
 150
 151         ret = nouveau_vm_ref(vm, &priv->bar[1].vm, priv->bar[1].pgd);
 152         nouveau_vm_ref(NULL, &vm, NULL);
 153         if (ret)
 154                 return ret;
 155
 156         nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[1].pgd->addr));
 157         nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[1].pgd->addr));
 158         nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 1) - 1));
 159         nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 1) - 1));
 160
 161         priv->base.alloc = nouveau_bar_alloc;
 162         priv->base.kmap = nvc0_bar_kmap;
 163         priv->base.umap = nvc0_bar_umap;
 164         priv->base.unmap = nvc0_bar_unmap;
 165         priv->base.flush = nv84_bar_flush;
 166         spin_lock_init(&priv->lock);
 167         return 0;
 168 }
 169
 170 static void
 171 nvc0_bar_dtor(struct nouveau_object *object)
 172 {
 173         struct nvc0_bar_priv *priv = (void *)object;
 174
 175         nouveau_vm_ref(NULL, &priv->bar[1].vm, priv->bar[1].pgd);
 176         nouveau_gpuobj_ref(NULL, &priv->bar[1].pgd);
 177         nouveau_gpuobj_ref(NULL, &priv->bar[1].mem);
 178
 179         if (priv->bar[0].vm) {
 180                 nouveau_gpuobj_ref(NULL, &priv->bar[0].vm->pgt[0].obj[0]);
 181                 nouveau_vm_ref(NULL, &priv->bar[0].vm, priv->bar[0].pgd);
 182         }
 183         nouveau_gpuobj_ref(NULL, &priv->bar[0].pgd);
 184         nouveau_gpuobj_ref(NULL, &priv->bar[0].mem);
 185
 186         nouveau_bar_destroy(&priv->base);
 187 }
 188
 189 static int
 190 nvc0_bar_init(struct nouveau_object *object)
 191 {
 192         struct nvc0_bar_priv *priv = (void *)object;
 193         int ret;
 194
 195         ret = nouveau_bar_init(&priv->base);
 196         if (ret)
 197                 return ret;
 198
 199         nv_mask(priv, 0x000200, 0x00000100, 0x00000000);
 200         nv_mask(priv, 0x000200, 0x00000100, 0x00000100);
 201         nv_mask(priv, 0x100c80, 0x00000001, 0x00000000);
 202
 203         nv_wr32(priv, 0x001704, 0x80000000 | priv->bar[1].mem->addr >> 12);
 204         nv_wr32(priv, 0x001714, 0xc0000000 | priv->bar[0].mem->addr >> 12);
 205         return 0;
 206 }
 207
 208 struct nouveau_oclass
 209 nvc0_bar_oclass = {
 210         .handle = NV_SUBDEV(BAR, 0xc0),
 211         .ofuncs = &(struct nouveau_ofuncs) {
 212                 .ctor = nvc0_bar_ctor,
 213                 .dtor = nvc0_bar_dtor,
 214                 .init = nvc0_bar_init,
 215                 .fini = _nouveau_bar_fini,
 216         },
 217 };