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Merge tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma
[deliverable/linux.git] / drivers / media / platform / exynos4-is / fimc-lite.c
1 /*
2 * Samsung EXYNOS FIMC-LITE (camera host interface) driver
3 *
4 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11 #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
12
13 #include <linux/bug.h>
14 #include <linux/clk.h>
15 #include <linux/device.h>
16 #include <linux/errno.h>
17 #include <linux/interrupt.h>
18 #include <linux/kernel.h>
19 #include <linux/list.h>
20 #include <linux/module.h>
21 #include <linux/of.h>
22 #include <linux/types.h>
23 #include <linux/platform_device.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/slab.h>
26 #include <linux/videodev2.h>
27
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-ioctl.h>
30 #include <media/v4l2-mem2mem.h>
31 #include <media/videobuf2-v4l2.h>
32 #include <media/videobuf2-dma-contig.h>
33 #include <media/exynos-fimc.h>
34
35 #include "common.h"
36 #include "fimc-core.h"
37 #include "fimc-lite.h"
38 #include "fimc-lite-reg.h"
39
40 static int debug;
41 module_param(debug, int, 0644);
42
43 static const struct fimc_fmt fimc_lite_formats[] = {
44 {
45 .name = "YUV 4:2:2 packed, YCbYCr",
46 .fourcc = V4L2_PIX_FMT_YUYV,
47 .colorspace = V4L2_COLORSPACE_JPEG,
48 .depth = { 16 },
49 .color = FIMC_FMT_YCBYCR422,
50 .memplanes = 1,
51 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
52 .flags = FMT_FLAGS_YUV,
53 }, {
54 .name = "YUV 4:2:2 packed, CbYCrY",
55 .fourcc = V4L2_PIX_FMT_UYVY,
56 .colorspace = V4L2_COLORSPACE_JPEG,
57 .depth = { 16 },
58 .color = FIMC_FMT_CBYCRY422,
59 .memplanes = 1,
60 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
61 .flags = FMT_FLAGS_YUV,
62 }, {
63 .name = "YUV 4:2:2 packed, CrYCbY",
64 .fourcc = V4L2_PIX_FMT_VYUY,
65 .colorspace = V4L2_COLORSPACE_JPEG,
66 .depth = { 16 },
67 .color = FIMC_FMT_CRYCBY422,
68 .memplanes = 1,
69 .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
70 .flags = FMT_FLAGS_YUV,
71 }, {
72 .name = "YUV 4:2:2 packed, YCrYCb",
73 .fourcc = V4L2_PIX_FMT_YVYU,
74 .colorspace = V4L2_COLORSPACE_JPEG,
75 .depth = { 16 },
76 .color = FIMC_FMT_YCRYCB422,
77 .memplanes = 1,
78 .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
79 .flags = FMT_FLAGS_YUV,
80 }, {
81 .name = "RAW8 (GRBG)",
82 .fourcc = V4L2_PIX_FMT_SGRBG8,
83 .colorspace = V4L2_COLORSPACE_SRGB,
84 .depth = { 8 },
85 .color = FIMC_FMT_RAW8,
86 .memplanes = 1,
87 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
88 .flags = FMT_FLAGS_RAW_BAYER,
89 }, {
90 .name = "RAW10 (GRBG)",
91 .fourcc = V4L2_PIX_FMT_SGRBG10,
92 .colorspace = V4L2_COLORSPACE_SRGB,
93 .depth = { 16 },
94 .color = FIMC_FMT_RAW10,
95 .memplanes = 1,
96 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
97 .flags = FMT_FLAGS_RAW_BAYER,
98 }, {
99 .name = "RAW12 (GRBG)",
100 .fourcc = V4L2_PIX_FMT_SGRBG12,
101 .colorspace = V4L2_COLORSPACE_SRGB,
102 .depth = { 16 },
103 .color = FIMC_FMT_RAW12,
104 .memplanes = 1,
105 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
106 .flags = FMT_FLAGS_RAW_BAYER,
107 },
108 };
109
110 /**
111 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
112 * @pixelformat: fourcc to match, ignored if null
113 * @mbus_code: media bus code to match, ignored if null
114 * @mask: the color format flags to match
115 * @index: index to the fimc_lite_formats array, ignored if negative
116 */
117 static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
118 const u32 *mbus_code, unsigned int mask, int index)
119 {
120 const struct fimc_fmt *fmt, *def_fmt = NULL;
121 unsigned int i;
122 int id = 0;
123
124 if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
125 return NULL;
126
127 for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
128 fmt = &fimc_lite_formats[i];
129 if (mask && !(fmt->flags & mask))
130 continue;
131 if (pixelformat && fmt->fourcc == *pixelformat)
132 return fmt;
133 if (mbus_code && fmt->mbus_code == *mbus_code)
134 return fmt;
135 if (index == id)
136 def_fmt = fmt;
137 id++;
138 }
139 return def_fmt;
140 }
141
142 static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
143 {
144 struct fimc_source_info *si;
145 unsigned long flags;
146
147 if (fimc->sensor == NULL)
148 return -ENXIO;
149
150 if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
151 return -EINVAL;
152
153 /* Get sensor configuration data from the sensor subdev */
154 si = v4l2_get_subdev_hostdata(fimc->sensor);
155 if (!si)
156 return -EINVAL;
157
158 spin_lock_irqsave(&fimc->slock, flags);
159
160 flite_hw_set_camera_bus(fimc, si);
161 flite_hw_set_source_format(fimc, &fimc->inp_frame);
162 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
163 flite_hw_set_dma_buf_mask(fimc, 0);
164 flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
165 flite_hw_set_interrupt_mask(fimc);
166 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
167
168 if (debug > 0)
169 flite_hw_dump_regs(fimc, __func__);
170
171 spin_unlock_irqrestore(&fimc->slock, flags);
172 return 0;
173 }
174
175 /*
176 * Reinitialize the driver so it is ready to start the streaming again.
177 * Set fimc->state to indicate stream off and the hardware shut down state.
178 * If not suspending (@suspend is false), return any buffers to videobuf2.
179 * Otherwise put any owned buffers onto the pending buffers queue, so they
180 * can be re-spun when the device is being resumed. Also perform FIMC
181 * software reset and disable streaming on the whole pipeline if required.
182 */
183 static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
184 {
185 struct flite_buffer *buf;
186 unsigned long flags;
187 bool streaming;
188
189 spin_lock_irqsave(&fimc->slock, flags);
190 streaming = fimc->state & (1 << ST_SENSOR_STREAM);
191
192 fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
193 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
194 if (suspend)
195 fimc->state |= (1 << ST_FLITE_SUSPENDED);
196 else
197 fimc->state &= ~(1 << ST_FLITE_PENDING |
198 1 << ST_FLITE_SUSPENDED);
199
200 /* Release unused buffers */
201 while (!suspend && !list_empty(&fimc->pending_buf_q)) {
202 buf = fimc_lite_pending_queue_pop(fimc);
203 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
204 }
205 /* If suspending put unused buffers onto pending queue */
206 while (!list_empty(&fimc->active_buf_q)) {
207 buf = fimc_lite_active_queue_pop(fimc);
208 if (suspend)
209 fimc_lite_pending_queue_add(fimc, buf);
210 else
211 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
212 }
213
214 spin_unlock_irqrestore(&fimc->slock, flags);
215
216 flite_hw_reset(fimc);
217
218 if (!streaming)
219 return 0;
220
221 return fimc_pipeline_call(&fimc->ve, set_stream, 0);
222 }
223
224 static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
225 {
226 unsigned long flags;
227
228 if (!fimc_lite_active(fimc))
229 return 0;
230
231 spin_lock_irqsave(&fimc->slock, flags);
232 set_bit(ST_FLITE_OFF, &fimc->state);
233 flite_hw_capture_stop(fimc);
234 spin_unlock_irqrestore(&fimc->slock, flags);
235
236 wait_event_timeout(fimc->irq_queue,
237 !test_bit(ST_FLITE_OFF, &fimc->state),
238 (2*HZ/10)); /* 200 ms */
239
240 return fimc_lite_reinit(fimc, suspend);
241 }
242
243 /* Must be called with fimc.slock spinlock held. */
244 static void fimc_lite_config_update(struct fimc_lite *fimc)
245 {
246 flite_hw_set_window_offset(fimc, &fimc->inp_frame);
247 flite_hw_set_dma_window(fimc, &fimc->out_frame);
248 flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
249 clear_bit(ST_FLITE_CONFIG, &fimc->state);
250 }
251
252 static irqreturn_t flite_irq_handler(int irq, void *priv)
253 {
254 struct fimc_lite *fimc = priv;
255 struct flite_buffer *vbuf;
256 unsigned long flags;
257 u32 intsrc;
258
259 spin_lock_irqsave(&fimc->slock, flags);
260
261 intsrc = flite_hw_get_interrupt_source(fimc);
262 flite_hw_clear_pending_irq(fimc);
263
264 if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
265 wake_up(&fimc->irq_queue);
266 goto done;
267 }
268
269 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
270 clear_bit(ST_FLITE_RUN, &fimc->state);
271 fimc->events.data_overflow++;
272 }
273
274 if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
275 flite_hw_clear_last_capture_end(fimc);
276 clear_bit(ST_FLITE_STREAM, &fimc->state);
277 wake_up(&fimc->irq_queue);
278 }
279
280 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
281 goto done;
282
283 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
284 test_bit(ST_FLITE_RUN, &fimc->state) &&
285 !list_empty(&fimc->pending_buf_q)) {
286 vbuf = fimc_lite_pending_queue_pop(fimc);
287 flite_hw_set_dma_buffer(fimc, vbuf);
288 fimc_lite_active_queue_add(fimc, vbuf);
289 }
290
291 if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
292 test_bit(ST_FLITE_RUN, &fimc->state) &&
293 !list_empty(&fimc->active_buf_q)) {
294 vbuf = fimc_lite_active_queue_pop(fimc);
295 v4l2_get_timestamp(&vbuf->vb.timestamp);
296 vbuf->vb.sequence = fimc->frame_count++;
297 flite_hw_mask_dma_buffer(fimc, vbuf->index);
298 vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
299 }
300
301 if (test_bit(ST_FLITE_CONFIG, &fimc->state))
302 fimc_lite_config_update(fimc);
303
304 if (list_empty(&fimc->pending_buf_q)) {
305 flite_hw_capture_stop(fimc);
306 clear_bit(ST_FLITE_STREAM, &fimc->state);
307 }
308 done:
309 set_bit(ST_FLITE_RUN, &fimc->state);
310 spin_unlock_irqrestore(&fimc->slock, flags);
311 return IRQ_HANDLED;
312 }
313
314 static int start_streaming(struct vb2_queue *q, unsigned int count)
315 {
316 struct fimc_lite *fimc = q->drv_priv;
317 unsigned long flags;
318 int ret;
319
320 spin_lock_irqsave(&fimc->slock, flags);
321
322 fimc->buf_index = 0;
323 fimc->frame_count = 0;
324
325 spin_unlock_irqrestore(&fimc->slock, flags);
326
327 ret = fimc_lite_hw_init(fimc, false);
328 if (ret) {
329 fimc_lite_reinit(fimc, false);
330 return ret;
331 }
332
333 set_bit(ST_FLITE_PENDING, &fimc->state);
334
335 if (!list_empty(&fimc->active_buf_q) &&
336 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
337 flite_hw_capture_start(fimc);
338
339 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
340 fimc_pipeline_call(&fimc->ve, set_stream, 1);
341 }
342 if (debug > 0)
343 flite_hw_dump_regs(fimc, __func__);
344
345 return 0;
346 }
347
348 static void stop_streaming(struct vb2_queue *q)
349 {
350 struct fimc_lite *fimc = q->drv_priv;
351
352 if (!fimc_lite_active(fimc))
353 return;
354
355 fimc_lite_stop_capture(fimc, false);
356 }
357
358 static int queue_setup(struct vb2_queue *vq, const void *parg,
359 unsigned int *num_buffers, unsigned int *num_planes,
360 unsigned int sizes[], void *allocators[])
361 {
362 const struct v4l2_format *pfmt = parg;
363 const struct v4l2_pix_format_mplane *pixm = NULL;
364 struct fimc_lite *fimc = vq->drv_priv;
365 struct flite_frame *frame = &fimc->out_frame;
366 const struct fimc_fmt *fmt = frame->fmt;
367 unsigned long wh;
368 int i;
369
370 if (pfmt) {
371 pixm = &pfmt->fmt.pix_mp;
372 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
373 wh = pixm->width * pixm->height;
374 } else {
375 wh = frame->f_width * frame->f_height;
376 }
377
378 if (fmt == NULL)
379 return -EINVAL;
380
381 *num_planes = fmt->memplanes;
382
383 for (i = 0; i < fmt->memplanes; i++) {
384 unsigned int size = (wh * fmt->depth[i]) / 8;
385 if (pixm)
386 sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
387 else
388 sizes[i] = size;
389 allocators[i] = fimc->alloc_ctx;
390 }
391
392 return 0;
393 }
394
395 static int buffer_prepare(struct vb2_buffer *vb)
396 {
397 struct vb2_queue *vq = vb->vb2_queue;
398 struct fimc_lite *fimc = vq->drv_priv;
399 int i;
400
401 if (fimc->out_frame.fmt == NULL)
402 return -EINVAL;
403
404 for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
405 unsigned long size = fimc->payload[i];
406
407 if (vb2_plane_size(vb, i) < size) {
408 v4l2_err(&fimc->ve.vdev,
409 "User buffer too small (%ld < %ld)\n",
410 vb2_plane_size(vb, i), size);
411 return -EINVAL;
412 }
413 vb2_set_plane_payload(vb, i, size);
414 }
415
416 return 0;
417 }
418
419 static void buffer_queue(struct vb2_buffer *vb)
420 {
421 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
422 struct flite_buffer *buf
423 = container_of(vbuf, struct flite_buffer, vb);
424 struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
425 unsigned long flags;
426
427 spin_lock_irqsave(&fimc->slock, flags);
428 buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
429
430 buf->index = fimc->buf_index++;
431 if (fimc->buf_index >= fimc->reqbufs_count)
432 fimc->buf_index = 0;
433
434 if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
435 !test_bit(ST_FLITE_STREAM, &fimc->state) &&
436 list_empty(&fimc->active_buf_q)) {
437 flite_hw_set_dma_buffer(fimc, buf);
438 fimc_lite_active_queue_add(fimc, buf);
439 } else {
440 fimc_lite_pending_queue_add(fimc, buf);
441 }
442
443 if (vb2_is_streaming(&fimc->vb_queue) &&
444 !list_empty(&fimc->pending_buf_q) &&
445 !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
446 flite_hw_capture_start(fimc);
447 spin_unlock_irqrestore(&fimc->slock, flags);
448
449 if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
450 fimc_pipeline_call(&fimc->ve, set_stream, 1);
451 return;
452 }
453 spin_unlock_irqrestore(&fimc->slock, flags);
454 }
455
456 static const struct vb2_ops fimc_lite_qops = {
457 .queue_setup = queue_setup,
458 .buf_prepare = buffer_prepare,
459 .buf_queue = buffer_queue,
460 .wait_prepare = vb2_ops_wait_prepare,
461 .wait_finish = vb2_ops_wait_finish,
462 .start_streaming = start_streaming,
463 .stop_streaming = stop_streaming,
464 };
465
466 static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
467 {
468 unsigned long flags;
469
470 spin_lock_irqsave(&fimc->slock, flags);
471 memset(&fimc->events, 0, sizeof(fimc->events));
472 spin_unlock_irqrestore(&fimc->slock, flags);
473 }
474
475 static int fimc_lite_open(struct file *file)
476 {
477 struct fimc_lite *fimc = video_drvdata(file);
478 struct media_entity *me = &fimc->ve.vdev.entity;
479 int ret;
480
481 mutex_lock(&fimc->lock);
482 if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
483 ret = -EBUSY;
484 goto unlock;
485 }
486
487 set_bit(ST_FLITE_IN_USE, &fimc->state);
488 ret = pm_runtime_get_sync(&fimc->pdev->dev);
489 if (ret < 0)
490 goto unlock;
491
492 ret = v4l2_fh_open(file);
493 if (ret < 0)
494 goto err_pm;
495
496 if (!v4l2_fh_is_singular_file(file) ||
497 atomic_read(&fimc->out_path) != FIMC_IO_DMA)
498 goto unlock;
499
500 mutex_lock(&me->parent->graph_mutex);
501
502 ret = fimc_pipeline_call(&fimc->ve, open, me, true);
503
504 /* Mark video pipeline ending at this video node as in use. */
505 if (ret == 0)
506 me->use_count++;
507
508 mutex_unlock(&me->parent->graph_mutex);
509
510 if (!ret) {
511 fimc_lite_clear_event_counters(fimc);
512 goto unlock;
513 }
514
515 v4l2_fh_release(file);
516 err_pm:
517 pm_runtime_put_sync(&fimc->pdev->dev);
518 clear_bit(ST_FLITE_IN_USE, &fimc->state);
519 unlock:
520 mutex_unlock(&fimc->lock);
521 return ret;
522 }
523
524 static int fimc_lite_release(struct file *file)
525 {
526 struct fimc_lite *fimc = video_drvdata(file);
527 struct media_entity *entity = &fimc->ve.vdev.entity;
528
529 mutex_lock(&fimc->lock);
530
531 if (v4l2_fh_is_singular_file(file) &&
532 atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
533 if (fimc->streaming) {
534 media_entity_pipeline_stop(entity);
535 fimc->streaming = false;
536 }
537 fimc_lite_stop_capture(fimc, false);
538 fimc_pipeline_call(&fimc->ve, close);
539 clear_bit(ST_FLITE_IN_USE, &fimc->state);
540
541 mutex_lock(&entity->parent->graph_mutex);
542 entity->use_count--;
543 mutex_unlock(&entity->parent->graph_mutex);
544 }
545
546 _vb2_fop_release(file, NULL);
547 pm_runtime_put(&fimc->pdev->dev);
548 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
549
550 mutex_unlock(&fimc->lock);
551 return 0;
552 }
553
554 static const struct v4l2_file_operations fimc_lite_fops = {
555 .owner = THIS_MODULE,
556 .open = fimc_lite_open,
557 .release = fimc_lite_release,
558 .poll = vb2_fop_poll,
559 .unlocked_ioctl = video_ioctl2,
560 .mmap = vb2_fop_mmap,
561 };
562
563 /*
564 * Format and crop negotiation helpers
565 */
566
567 static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
568 struct v4l2_subdev_pad_config *cfg,
569 struct v4l2_subdev_format *format)
570 {
571 struct flite_drvdata *dd = fimc->dd;
572 struct v4l2_mbus_framefmt *mf = &format->format;
573 const struct fimc_fmt *fmt = NULL;
574
575 if (format->pad == FLITE_SD_PAD_SINK) {
576 v4l_bound_align_image(&mf->width, 8, dd->max_width,
577 ffs(dd->out_width_align) - 1,
578 &mf->height, 0, dd->max_height, 0, 0);
579
580 fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
581 if (WARN_ON(!fmt))
582 return NULL;
583
584 mf->colorspace = fmt->colorspace;
585 mf->code = fmt->mbus_code;
586 } else {
587 struct flite_frame *sink = &fimc->inp_frame;
588 struct v4l2_mbus_framefmt *sink_fmt;
589 struct v4l2_rect *rect;
590
591 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
592 sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg,
593 FLITE_SD_PAD_SINK);
594
595 mf->code = sink_fmt->code;
596 mf->colorspace = sink_fmt->colorspace;
597
598 rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg,
599 FLITE_SD_PAD_SINK);
600 } else {
601 mf->code = sink->fmt->mbus_code;
602 mf->colorspace = sink->fmt->colorspace;
603 rect = &sink->rect;
604 }
605
606 /* Allow changing format only on sink pad */
607 mf->width = rect->width;
608 mf->height = rect->height;
609 }
610
611 mf->field = V4L2_FIELD_NONE;
612
613 v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
614 mf->code, mf->colorspace, mf->width, mf->height);
615
616 return fmt;
617 }
618
619 static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
620 {
621 struct flite_frame *frame = &fimc->inp_frame;
622
623 v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
624 &r->height, 0, frame->f_height, 0, 0);
625
626 /* Adjust left/top if cropping rectangle got out of bounds */
627 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
628 r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
629 r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
630
631 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
632 r->left, r->top, r->width, r->height,
633 frame->f_width, frame->f_height);
634 }
635
636 static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
637 {
638 struct flite_frame *frame = &fimc->out_frame;
639 struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
640
641 /* Scaling is not supported so we enforce compose rectangle size
642 same as size of the sink crop rectangle. */
643 r->width = crop_rect->width;
644 r->height = crop_rect->height;
645
646 /* Adjust left/top if the composing rectangle got out of bounds */
647 r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
648 r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
649 r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
650
651 v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
652 r->left, r->top, r->width, r->height,
653 frame->f_width, frame->f_height);
654 }
655
656 /*
657 * Video node ioctl operations
658 */
659 static int fimc_lite_querycap(struct file *file, void *priv,
660 struct v4l2_capability *cap)
661 {
662 struct fimc_lite *fimc = video_drvdata(file);
663
664 strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
665 strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
666 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
667 dev_name(&fimc->pdev->dev));
668
669 cap->device_caps = V4L2_CAP_STREAMING;
670 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
671 return 0;
672 }
673
674 static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
675 struct v4l2_fmtdesc *f)
676 {
677 const struct fimc_fmt *fmt;
678
679 if (f->index >= ARRAY_SIZE(fimc_lite_formats))
680 return -EINVAL;
681
682 fmt = &fimc_lite_formats[f->index];
683 strlcpy(f->description, fmt->name, sizeof(f->description));
684 f->pixelformat = fmt->fourcc;
685
686 return 0;
687 }
688
689 static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
690 struct v4l2_format *f)
691 {
692 struct fimc_lite *fimc = video_drvdata(file);
693 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
694 struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
695 struct flite_frame *frame = &fimc->out_frame;
696 const struct fimc_fmt *fmt = frame->fmt;
697
698 plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
699 plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
700
701 pixm->num_planes = fmt->memplanes;
702 pixm->pixelformat = fmt->fourcc;
703 pixm->width = frame->f_width;
704 pixm->height = frame->f_height;
705 pixm->field = V4L2_FIELD_NONE;
706 pixm->colorspace = fmt->colorspace;
707 return 0;
708 }
709
710 static int fimc_lite_try_fmt(struct fimc_lite *fimc,
711 struct v4l2_pix_format_mplane *pixm,
712 const struct fimc_fmt **ffmt)
713 {
714 u32 bpl = pixm->plane_fmt[0].bytesperline;
715 struct flite_drvdata *dd = fimc->dd;
716 const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
717 const struct fimc_fmt *fmt;
718
719 if (WARN_ON(inp_fmt == NULL))
720 return -EINVAL;
721 /*
722 * We allow some flexibility only for YUV formats. In case of raw
723 * raw Bayer the FIMC-LITE's output format must match its camera
724 * interface input format.
725 */
726 if (inp_fmt->flags & FMT_FLAGS_YUV)
727 fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
728 inp_fmt->flags, 0);
729 else
730 fmt = inp_fmt;
731
732 if (WARN_ON(fmt == NULL))
733 return -EINVAL;
734 if (ffmt)
735 *ffmt = fmt;
736 v4l_bound_align_image(&pixm->width, 8, dd->max_width,
737 ffs(dd->out_width_align) - 1,
738 &pixm->height, 0, dd->max_height, 0, 0);
739
740 if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
741 pixm->plane_fmt[0].bytesperline = (pixm->width *
742 fmt->depth[0]) / 8;
743
744 if (pixm->plane_fmt[0].sizeimage == 0)
745 pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
746 fmt->depth[0]) / 8;
747 pixm->num_planes = fmt->memplanes;
748 pixm->pixelformat = fmt->fourcc;
749 pixm->colorspace = fmt->colorspace;
750 pixm->field = V4L2_FIELD_NONE;
751 return 0;
752 }
753
754 static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
755 struct v4l2_format *f)
756 {
757 struct fimc_lite *fimc = video_drvdata(file);
758 return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
759 }
760
761 static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
762 struct v4l2_format *f)
763 {
764 struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
765 struct fimc_lite *fimc = video_drvdata(file);
766 struct flite_frame *frame = &fimc->out_frame;
767 const struct fimc_fmt *fmt = NULL;
768 int ret;
769
770 if (vb2_is_busy(&fimc->vb_queue))
771 return -EBUSY;
772
773 ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
774 if (ret < 0)
775 return ret;
776
777 frame->fmt = fmt;
778 fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
779 pixm->plane_fmt[0].sizeimage);
780 frame->f_width = pixm->width;
781 frame->f_height = pixm->height;
782
783 return 0;
784 }
785
786 static int fimc_pipeline_validate(struct fimc_lite *fimc)
787 {
788 struct v4l2_subdev *sd = &fimc->subdev;
789 struct v4l2_subdev_format sink_fmt, src_fmt;
790 struct media_pad *pad;
791 int ret;
792
793 while (1) {
794 /* Retrieve format at the sink pad */
795 pad = &sd->entity.pads[0];
796 if (!(pad->flags & MEDIA_PAD_FL_SINK))
797 break;
798 /* Don't call FIMC subdev operation to avoid nested locking */
799 if (sd == &fimc->subdev) {
800 struct flite_frame *ff = &fimc->out_frame;
801 sink_fmt.format.width = ff->f_width;
802 sink_fmt.format.height = ff->f_height;
803 sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
804 } else {
805 sink_fmt.pad = pad->index;
806 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
807 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
808 &sink_fmt);
809 if (ret < 0 && ret != -ENOIOCTLCMD)
810 return -EPIPE;
811 }
812 /* Retrieve format at the source pad */
813 pad = media_entity_remote_pad(pad);
814 if (pad == NULL ||
815 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
816 break;
817
818 sd = media_entity_to_v4l2_subdev(pad->entity);
819 src_fmt.pad = pad->index;
820 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
821 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
822 if (ret < 0 && ret != -ENOIOCTLCMD)
823 return -EPIPE;
824
825 if (src_fmt.format.width != sink_fmt.format.width ||
826 src_fmt.format.height != sink_fmt.format.height ||
827 src_fmt.format.code != sink_fmt.format.code)
828 return -EPIPE;
829 }
830 return 0;
831 }
832
833 static int fimc_lite_streamon(struct file *file, void *priv,
834 enum v4l2_buf_type type)
835 {
836 struct fimc_lite *fimc = video_drvdata(file);
837 struct media_entity *entity = &fimc->ve.vdev.entity;
838 int ret;
839
840 if (fimc_lite_active(fimc))
841 return -EBUSY;
842
843 ret = media_entity_pipeline_start(entity, &fimc->ve.pipe->mp);
844 if (ret < 0)
845 return ret;
846
847 ret = fimc_pipeline_validate(fimc);
848 if (ret < 0)
849 goto err_p_stop;
850
851 fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
852
853 ret = vb2_ioctl_streamon(file, priv, type);
854 if (!ret) {
855 fimc->streaming = true;
856 return ret;
857 }
858
859 err_p_stop:
860 media_entity_pipeline_stop(entity);
861 return 0;
862 }
863
864 static int fimc_lite_streamoff(struct file *file, void *priv,
865 enum v4l2_buf_type type)
866 {
867 struct fimc_lite *fimc = video_drvdata(file);
868 int ret;
869
870 ret = vb2_ioctl_streamoff(file, priv, type);
871 if (ret < 0)
872 return ret;
873
874 media_entity_pipeline_stop(&fimc->ve.vdev.entity);
875 fimc->streaming = false;
876 return 0;
877 }
878
879 static int fimc_lite_reqbufs(struct file *file, void *priv,
880 struct v4l2_requestbuffers *reqbufs)
881 {
882 struct fimc_lite *fimc = video_drvdata(file);
883 int ret;
884
885 reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
886 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
887 if (!ret)
888 fimc->reqbufs_count = reqbufs->count;
889
890 return ret;
891 }
892
893 /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
894 static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
895 {
896 if (a->left < b->left || a->top < b->top)
897 return 0;
898 if (a->left + a->width > b->left + b->width)
899 return 0;
900 if (a->top + a->height > b->top + b->height)
901 return 0;
902
903 return 1;
904 }
905
906 static int fimc_lite_g_selection(struct file *file, void *fh,
907 struct v4l2_selection *sel)
908 {
909 struct fimc_lite *fimc = video_drvdata(file);
910 struct flite_frame *f = &fimc->out_frame;
911
912 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
913 return -EINVAL;
914
915 switch (sel->target) {
916 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
917 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
918 sel->r.left = 0;
919 sel->r.top = 0;
920 sel->r.width = f->f_width;
921 sel->r.height = f->f_height;
922 return 0;
923
924 case V4L2_SEL_TGT_COMPOSE:
925 sel->r = f->rect;
926 return 0;
927 }
928
929 return -EINVAL;
930 }
931
932 static int fimc_lite_s_selection(struct file *file, void *fh,
933 struct v4l2_selection *sel)
934 {
935 struct fimc_lite *fimc = video_drvdata(file);
936 struct flite_frame *f = &fimc->out_frame;
937 struct v4l2_rect rect = sel->r;
938 unsigned long flags;
939
940 if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
941 sel->target != V4L2_SEL_TGT_COMPOSE)
942 return -EINVAL;
943
944 fimc_lite_try_compose(fimc, &rect);
945
946 if ((sel->flags & V4L2_SEL_FLAG_LE) &&
947 !enclosed_rectangle(&rect, &sel->r))
948 return -ERANGE;
949
950 if ((sel->flags & V4L2_SEL_FLAG_GE) &&
951 !enclosed_rectangle(&sel->r, &rect))
952 return -ERANGE;
953
954 sel->r = rect;
955 spin_lock_irqsave(&fimc->slock, flags);
956 f->rect = rect;
957 set_bit(ST_FLITE_CONFIG, &fimc->state);
958 spin_unlock_irqrestore(&fimc->slock, flags);
959
960 return 0;
961 }
962
963 static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
964 .vidioc_querycap = fimc_lite_querycap,
965 .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
966 .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
967 .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
968 .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
969 .vidioc_g_selection = fimc_lite_g_selection,
970 .vidioc_s_selection = fimc_lite_s_selection,
971 .vidioc_reqbufs = fimc_lite_reqbufs,
972 .vidioc_querybuf = vb2_ioctl_querybuf,
973 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
974 .vidioc_create_bufs = vb2_ioctl_create_bufs,
975 .vidioc_qbuf = vb2_ioctl_qbuf,
976 .vidioc_dqbuf = vb2_ioctl_dqbuf,
977 .vidioc_streamon = fimc_lite_streamon,
978 .vidioc_streamoff = fimc_lite_streamoff,
979 };
980
981 /* Capture subdev media entity operations */
982 static int fimc_lite_link_setup(struct media_entity *entity,
983 const struct media_pad *local,
984 const struct media_pad *remote, u32 flags)
985 {
986 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
987 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
988 unsigned int remote_ent_type = media_entity_type(remote->entity);
989 int ret = 0;
990
991 if (WARN_ON(fimc == NULL))
992 return 0;
993
994 v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
995 __func__, remote->entity->name, local->entity->name,
996 flags, fimc->source_subdev_grp_id);
997
998 switch (local->index) {
999 case FLITE_SD_PAD_SINK:
1000 if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
1001 ret = -EINVAL;
1002 break;
1003 }
1004 if (flags & MEDIA_LNK_FL_ENABLED) {
1005 if (fimc->source_subdev_grp_id == 0)
1006 fimc->source_subdev_grp_id = sd->grp_id;
1007 else
1008 ret = -EBUSY;
1009 } else {
1010 fimc->source_subdev_grp_id = 0;
1011 fimc->sensor = NULL;
1012 }
1013 break;
1014
1015 case FLITE_SD_PAD_SOURCE_DMA:
1016 if (!(flags & MEDIA_LNK_FL_ENABLED))
1017 atomic_set(&fimc->out_path, FIMC_IO_NONE);
1018 else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
1019 atomic_set(&fimc->out_path, FIMC_IO_DMA);
1020 else
1021 ret = -EINVAL;
1022 break;
1023
1024 case FLITE_SD_PAD_SOURCE_ISP:
1025 if (!(flags & MEDIA_LNK_FL_ENABLED))
1026 atomic_set(&fimc->out_path, FIMC_IO_NONE);
1027 else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
1028 atomic_set(&fimc->out_path, FIMC_IO_ISP);
1029 else
1030 ret = -EINVAL;
1031 break;
1032
1033 default:
1034 v4l2_err(sd, "Invalid pad index\n");
1035 ret = -EINVAL;
1036 }
1037 mb();
1038
1039 return ret;
1040 }
1041
1042 static const struct media_entity_operations fimc_lite_subdev_media_ops = {
1043 .link_setup = fimc_lite_link_setup,
1044 };
1045
1046 static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1047 struct v4l2_subdev_pad_config *cfg,
1048 struct v4l2_subdev_mbus_code_enum *code)
1049 {
1050 const struct fimc_fmt *fmt;
1051
1052 fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
1053 if (!fmt)
1054 return -EINVAL;
1055 code->code = fmt->mbus_code;
1056 return 0;
1057 }
1058
1059 static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
1060 struct v4l2_subdev *sd,
1061 struct v4l2_subdev_pad_config *cfg, unsigned int pad)
1062 {
1063 if (pad != FLITE_SD_PAD_SINK)
1064 pad = FLITE_SD_PAD_SOURCE_DMA;
1065
1066 return v4l2_subdev_get_try_format(sd, cfg, pad);
1067 }
1068
1069 static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1070 struct v4l2_subdev_pad_config *cfg,
1071 struct v4l2_subdev_format *fmt)
1072 {
1073 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1074 struct v4l2_mbus_framefmt *mf = &fmt->format;
1075 struct flite_frame *f = &fimc->inp_frame;
1076
1077 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1078 mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
1079 fmt->format = *mf;
1080 return 0;
1081 }
1082
1083 mutex_lock(&fimc->lock);
1084 mf->colorspace = f->fmt->colorspace;
1085 mf->code = f->fmt->mbus_code;
1086
1087 if (fmt->pad == FLITE_SD_PAD_SINK) {
1088 /* full camera input frame size */
1089 mf->width = f->f_width;
1090 mf->height = f->f_height;
1091 } else {
1092 /* crop size */
1093 mf->width = f->rect.width;
1094 mf->height = f->rect.height;
1095 }
1096 mutex_unlock(&fimc->lock);
1097 return 0;
1098 }
1099
1100 static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1101 struct v4l2_subdev_pad_config *cfg,
1102 struct v4l2_subdev_format *fmt)
1103 {
1104 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1105 struct v4l2_mbus_framefmt *mf = &fmt->format;
1106 struct flite_frame *sink = &fimc->inp_frame;
1107 struct flite_frame *source = &fimc->out_frame;
1108 const struct fimc_fmt *ffmt;
1109
1110 v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
1111 fmt->pad, mf->code, mf->width, mf->height);
1112
1113 mutex_lock(&fimc->lock);
1114
1115 if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1116 sd->entity.stream_count > 0) ||
1117 (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1118 vb2_is_busy(&fimc->vb_queue))) {
1119 mutex_unlock(&fimc->lock);
1120 return -EBUSY;
1121 }
1122
1123 ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt);
1124
1125 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1126 struct v4l2_mbus_framefmt *src_fmt;
1127
1128 mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
1129 *mf = fmt->format;
1130
1131 if (fmt->pad == FLITE_SD_PAD_SINK) {
1132 unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
1133 src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad);
1134 *src_fmt = *mf;
1135 }
1136
1137 mutex_unlock(&fimc->lock);
1138 return 0;
1139 }
1140
1141 if (fmt->pad == FLITE_SD_PAD_SINK) {
1142 sink->f_width = mf->width;
1143 sink->f_height = mf->height;
1144 sink->fmt = ffmt;
1145 /* Set sink crop rectangle */
1146 sink->rect.width = mf->width;
1147 sink->rect.height = mf->height;
1148 sink->rect.left = 0;
1149 sink->rect.top = 0;
1150 /* Reset source format and crop rectangle */
1151 source->rect = sink->rect;
1152 source->f_width = mf->width;
1153 source->f_height = mf->height;
1154 }
1155
1156 mutex_unlock(&fimc->lock);
1157 return 0;
1158 }
1159
1160 static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1161 struct v4l2_subdev_pad_config *cfg,
1162 struct v4l2_subdev_selection *sel)
1163 {
1164 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1165 struct flite_frame *f = &fimc->inp_frame;
1166
1167 if ((sel->target != V4L2_SEL_TGT_CROP &&
1168 sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1169 sel->pad != FLITE_SD_PAD_SINK)
1170 return -EINVAL;
1171
1172 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1173 sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1174 return 0;
1175 }
1176
1177 mutex_lock(&fimc->lock);
1178 if (sel->target == V4L2_SEL_TGT_CROP) {
1179 sel->r = f->rect;
1180 } else {
1181 sel->r.left = 0;
1182 sel->r.top = 0;
1183 sel->r.width = f->f_width;
1184 sel->r.height = f->f_height;
1185 }
1186 mutex_unlock(&fimc->lock);
1187
1188 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1189 __func__, f->rect.left, f->rect.top, f->rect.width,
1190 f->rect.height, f->f_width, f->f_height);
1191
1192 return 0;
1193 }
1194
1195 static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1196 struct v4l2_subdev_pad_config *cfg,
1197 struct v4l2_subdev_selection *sel)
1198 {
1199 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1200 struct flite_frame *f = &fimc->inp_frame;
1201 int ret = 0;
1202
1203 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
1204 return -EINVAL;
1205
1206 mutex_lock(&fimc->lock);
1207 fimc_lite_try_crop(fimc, &sel->r);
1208
1209 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1210 *v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r;
1211 } else {
1212 unsigned long flags;
1213 spin_lock_irqsave(&fimc->slock, flags);
1214 f->rect = sel->r;
1215 /* Same crop rectangle on the source pad */
1216 fimc->out_frame.rect = sel->r;
1217 set_bit(ST_FLITE_CONFIG, &fimc->state);
1218 spin_unlock_irqrestore(&fimc->slock, flags);
1219 }
1220 mutex_unlock(&fimc->lock);
1221
1222 v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1223 __func__, f->rect.left, f->rect.top, f->rect.width,
1224 f->rect.height, f->f_width, f->f_height);
1225
1226 return ret;
1227 }
1228
1229 static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1230 {
1231 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1232 unsigned long flags;
1233 int ret;
1234
1235 /*
1236 * Find sensor subdev linked to FIMC-LITE directly or through
1237 * MIPI-CSIS. This is required for configuration where FIMC-LITE
1238 * is used as a subdev only and feeds data internally to FIMC-IS.
1239 * The pipeline links are protected through entity.stream_count
1240 * so there is no need to take the media graph mutex here.
1241 */
1242 fimc->sensor = fimc_find_remote_sensor(&sd->entity);
1243
1244 if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
1245 return -ENOIOCTLCMD;
1246
1247 mutex_lock(&fimc->lock);
1248 if (on) {
1249 flite_hw_reset(fimc);
1250 ret = fimc_lite_hw_init(fimc, true);
1251 if (!ret) {
1252 spin_lock_irqsave(&fimc->slock, flags);
1253 flite_hw_capture_start(fimc);
1254 spin_unlock_irqrestore(&fimc->slock, flags);
1255 }
1256 } else {
1257 set_bit(ST_FLITE_OFF, &fimc->state);
1258
1259 spin_lock_irqsave(&fimc->slock, flags);
1260 flite_hw_capture_stop(fimc);
1261 spin_unlock_irqrestore(&fimc->slock, flags);
1262
1263 ret = wait_event_timeout(fimc->irq_queue,
1264 !test_bit(ST_FLITE_OFF, &fimc->state),
1265 msecs_to_jiffies(200));
1266 if (ret == 0)
1267 v4l2_err(sd, "s_stream(0) timeout\n");
1268 clear_bit(ST_FLITE_RUN, &fimc->state);
1269 }
1270
1271 mutex_unlock(&fimc->lock);
1272 return ret;
1273 }
1274
1275 static int fimc_lite_log_status(struct v4l2_subdev *sd)
1276 {
1277 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1278
1279 flite_hw_dump_regs(fimc, __func__);
1280 return 0;
1281 }
1282
1283 static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1284 {
1285 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1286 struct vb2_queue *q = &fimc->vb_queue;
1287 struct video_device *vfd = &fimc->ve.vdev;
1288 int ret;
1289
1290 memset(vfd, 0, sizeof(*vfd));
1291 atomic_set(&fimc->out_path, FIMC_IO_DMA);
1292
1293 snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1294 fimc->index);
1295
1296 vfd->fops = &fimc_lite_fops;
1297 vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1298 vfd->v4l2_dev = sd->v4l2_dev;
1299 vfd->minor = -1;
1300 vfd->release = video_device_release_empty;
1301 vfd->queue = q;
1302 fimc->reqbufs_count = 0;
1303
1304 INIT_LIST_HEAD(&fimc->pending_buf_q);
1305 INIT_LIST_HEAD(&fimc->active_buf_q);
1306
1307 memset(q, 0, sizeof(*q));
1308 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1309 q->io_modes = VB2_MMAP | VB2_USERPTR;
1310 q->ops = &fimc_lite_qops;
1311 q->mem_ops = &vb2_dma_contig_memops;
1312 q->buf_struct_size = sizeof(struct flite_buffer);
1313 q->drv_priv = fimc;
1314 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1315 q->lock = &fimc->lock;
1316
1317 ret = vb2_queue_init(q);
1318 if (ret < 0)
1319 return ret;
1320
1321 fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1322 ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
1323 if (ret < 0)
1324 return ret;
1325
1326 video_set_drvdata(vfd, fimc);
1327 fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
1328
1329 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1330 if (ret < 0) {
1331 media_entity_cleanup(&vfd->entity);
1332 fimc->ve.pipe = NULL;
1333 return ret;
1334 }
1335
1336 v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1337 vfd->name, video_device_node_name(vfd));
1338 return 0;
1339 }
1340
1341 static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1342 {
1343 struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1344
1345 if (fimc == NULL)
1346 return;
1347
1348 mutex_lock(&fimc->lock);
1349
1350 if (video_is_registered(&fimc->ve.vdev)) {
1351 video_unregister_device(&fimc->ve.vdev);
1352 media_entity_cleanup(&fimc->ve.vdev.entity);
1353 fimc->ve.pipe = NULL;
1354 }
1355
1356 mutex_unlock(&fimc->lock);
1357 }
1358
1359 static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1360 .registered = fimc_lite_subdev_registered,
1361 .unregistered = fimc_lite_subdev_unregistered,
1362 };
1363
1364 static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1365 .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1366 .get_selection = fimc_lite_subdev_get_selection,
1367 .set_selection = fimc_lite_subdev_set_selection,
1368 .get_fmt = fimc_lite_subdev_get_fmt,
1369 .set_fmt = fimc_lite_subdev_set_fmt,
1370 };
1371
1372 static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1373 .s_stream = fimc_lite_subdev_s_stream,
1374 };
1375
1376 static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
1377 .log_status = fimc_lite_log_status,
1378 };
1379
1380 static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1381 .core = &fimc_lite_core_ops,
1382 .video = &fimc_lite_subdev_video_ops,
1383 .pad = &fimc_lite_subdev_pad_ops,
1384 };
1385
1386 static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1387 {
1388 struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1389 ctrl_handler);
1390 set_bit(ST_FLITE_CONFIG, &fimc->state);
1391 return 0;
1392 }
1393
1394 static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1395 .s_ctrl = fimc_lite_s_ctrl,
1396 };
1397
1398 static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1399 .ops = &fimc_lite_ctrl_ops,
1400 .id = V4L2_CTRL_CLASS_USER | 0x1001,
1401 .type = V4L2_CTRL_TYPE_BOOLEAN,
1402 .name = "Test Pattern 640x480",
1403 .step = 1,
1404 };
1405
1406 static void fimc_lite_set_default_config(struct fimc_lite *fimc)
1407 {
1408 struct flite_frame *sink = &fimc->inp_frame;
1409 struct flite_frame *source = &fimc->out_frame;
1410
1411 sink->fmt = &fimc_lite_formats[0];
1412 sink->f_width = FLITE_DEFAULT_WIDTH;
1413 sink->f_height = FLITE_DEFAULT_HEIGHT;
1414
1415 sink->rect.width = FLITE_DEFAULT_WIDTH;
1416 sink->rect.height = FLITE_DEFAULT_HEIGHT;
1417 sink->rect.left = 0;
1418 sink->rect.top = 0;
1419
1420 *source = *sink;
1421 }
1422
1423 static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1424 {
1425 struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1426 struct v4l2_subdev *sd = &fimc->subdev;
1427 int ret;
1428
1429 v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
1430 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1431 snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1432
1433 fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1434 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1435 fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1436 ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
1437 fimc->subdev_pads, 0);
1438 if (ret)
1439 return ret;
1440
1441 v4l2_ctrl_handler_init(handler, 1);
1442 fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1443 NULL);
1444 if (handler->error) {
1445 media_entity_cleanup(&sd->entity);
1446 return handler->error;
1447 }
1448
1449 sd->ctrl_handler = handler;
1450 sd->internal_ops = &fimc_lite_subdev_internal_ops;
1451 sd->entity.ops = &fimc_lite_subdev_media_ops;
1452 sd->owner = THIS_MODULE;
1453 v4l2_set_subdevdata(sd, fimc);
1454
1455 return 0;
1456 }
1457
1458 static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1459 {
1460 struct v4l2_subdev *sd = &fimc->subdev;
1461
1462 v4l2_device_unregister_subdev(sd);
1463 media_entity_cleanup(&sd->entity);
1464 v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1465 v4l2_set_subdevdata(sd, NULL);
1466 }
1467
1468 static void fimc_lite_clk_put(struct fimc_lite *fimc)
1469 {
1470 if (IS_ERR(fimc->clock))
1471 return;
1472
1473 clk_unprepare(fimc->clock);
1474 clk_put(fimc->clock);
1475 fimc->clock = ERR_PTR(-EINVAL);
1476 }
1477
1478 static int fimc_lite_clk_get(struct fimc_lite *fimc)
1479 {
1480 int ret;
1481
1482 fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1483 if (IS_ERR(fimc->clock))
1484 return PTR_ERR(fimc->clock);
1485
1486 ret = clk_prepare(fimc->clock);
1487 if (ret < 0) {
1488 clk_put(fimc->clock);
1489 fimc->clock = ERR_PTR(-EINVAL);
1490 }
1491 return ret;
1492 }
1493
1494 static const struct of_device_id flite_of_match[];
1495
1496 static int fimc_lite_probe(struct platform_device *pdev)
1497 {
1498 struct flite_drvdata *drv_data = NULL;
1499 struct device *dev = &pdev->dev;
1500 const struct of_device_id *of_id;
1501 struct fimc_lite *fimc;
1502 struct resource *res;
1503 int ret;
1504
1505 if (!dev->of_node)
1506 return -ENODEV;
1507
1508 fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
1509 if (!fimc)
1510 return -ENOMEM;
1511
1512 of_id = of_match_node(flite_of_match, dev->of_node);
1513 if (of_id)
1514 drv_data = (struct flite_drvdata *)of_id->data;
1515 fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
1516
1517 if (!drv_data || fimc->index >= drv_data->num_instances ||
1518 fimc->index < 0) {
1519 dev_err(dev, "Wrong %s node alias\n",
1520 dev->of_node->full_name);
1521 return -EINVAL;
1522 }
1523
1524 fimc->dd = drv_data;
1525 fimc->pdev = pdev;
1526
1527 init_waitqueue_head(&fimc->irq_queue);
1528 spin_lock_init(&fimc->slock);
1529 mutex_init(&fimc->lock);
1530
1531 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1532 fimc->regs = devm_ioremap_resource(dev, res);
1533 if (IS_ERR(fimc->regs))
1534 return PTR_ERR(fimc->regs);
1535
1536 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1537 if (res == NULL) {
1538 dev_err(dev, "Failed to get IRQ resource\n");
1539 return -ENXIO;
1540 }
1541
1542 ret = fimc_lite_clk_get(fimc);
1543 if (ret)
1544 return ret;
1545
1546 ret = devm_request_irq(dev, res->start, flite_irq_handler,
1547 0, dev_name(dev), fimc);
1548 if (ret) {
1549 dev_err(dev, "Failed to install irq (%d)\n", ret);
1550 goto err_clk_put;
1551 }
1552
1553 /* The video node will be created within the subdev's registered() op */
1554 ret = fimc_lite_create_capture_subdev(fimc);
1555 if (ret)
1556 goto err_clk_put;
1557
1558 platform_set_drvdata(pdev, fimc);
1559 pm_runtime_enable(dev);
1560
1561 if (!pm_runtime_enabled(dev)) {
1562 ret = clk_enable(fimc->clock);
1563 if (ret < 0)
1564 goto err_sd;
1565 }
1566
1567 fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
1568 if (IS_ERR(fimc->alloc_ctx)) {
1569 ret = PTR_ERR(fimc->alloc_ctx);
1570 goto err_clk_dis;
1571 }
1572
1573 fimc_lite_set_default_config(fimc);
1574
1575 dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
1576 fimc->index);
1577 return 0;
1578
1579 err_clk_dis:
1580 if (!pm_runtime_enabled(dev))
1581 clk_disable(fimc->clock);
1582 err_sd:
1583 fimc_lite_unregister_capture_subdev(fimc);
1584 err_clk_put:
1585 fimc_lite_clk_put(fimc);
1586 return ret;
1587 }
1588
1589 #ifdef CONFIG_PM
1590 static int fimc_lite_runtime_resume(struct device *dev)
1591 {
1592 struct fimc_lite *fimc = dev_get_drvdata(dev);
1593
1594 clk_enable(fimc->clock);
1595 return 0;
1596 }
1597
1598 static int fimc_lite_runtime_suspend(struct device *dev)
1599 {
1600 struct fimc_lite *fimc = dev_get_drvdata(dev);
1601
1602 clk_disable(fimc->clock);
1603 return 0;
1604 }
1605 #endif
1606
1607 #ifdef CONFIG_PM_SLEEP
1608 static int fimc_lite_resume(struct device *dev)
1609 {
1610 struct fimc_lite *fimc = dev_get_drvdata(dev);
1611 struct flite_buffer *buf;
1612 unsigned long flags;
1613 int i;
1614
1615 spin_lock_irqsave(&fimc->slock, flags);
1616 if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1617 !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1618 spin_unlock_irqrestore(&fimc->slock, flags);
1619 return 0;
1620 }
1621 flite_hw_reset(fimc);
1622 spin_unlock_irqrestore(&fimc->slock, flags);
1623
1624 if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1625 return 0;
1626
1627 INIT_LIST_HEAD(&fimc->active_buf_q);
1628 fimc_pipeline_call(&fimc->ve, open,
1629 &fimc->ve.vdev.entity, false);
1630 fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
1631 clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1632
1633 for (i = 0; i < fimc->reqbufs_count; i++) {
1634 if (list_empty(&fimc->pending_buf_q))
1635 break;
1636 buf = fimc_lite_pending_queue_pop(fimc);
1637 buffer_queue(&buf->vb.vb2_buf);
1638 }
1639 return 0;
1640 }
1641
1642 static int fimc_lite_suspend(struct device *dev)
1643 {
1644 struct fimc_lite *fimc = dev_get_drvdata(dev);
1645 bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1646 int ret;
1647
1648 if (test_and_set_bit(ST_LPM, &fimc->state))
1649 return 0;
1650
1651 ret = fimc_lite_stop_capture(fimc, suspend);
1652 if (ret < 0 || !fimc_lite_active(fimc))
1653 return ret;
1654
1655 return fimc_pipeline_call(&fimc->ve, close);
1656 }
1657 #endif /* CONFIG_PM_SLEEP */
1658
1659 static int fimc_lite_remove(struct platform_device *pdev)
1660 {
1661 struct fimc_lite *fimc = platform_get_drvdata(pdev);
1662 struct device *dev = &pdev->dev;
1663
1664 pm_runtime_disable(dev);
1665 pm_runtime_set_suspended(dev);
1666 fimc_lite_unregister_capture_subdev(fimc);
1667 vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
1668 fimc_lite_clk_put(fimc);
1669
1670 dev_info(dev, "Driver unloaded\n");
1671 return 0;
1672 }
1673
1674 static const struct dev_pm_ops fimc_lite_pm_ops = {
1675 SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1676 SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1677 NULL)
1678 };
1679
1680 /* EXYNOS4212, EXYNOS4412 */
1681 static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
1682 .max_width = 8192,
1683 .max_height = 8192,
1684 .out_width_align = 8,
1685 .win_hor_offs_align = 2,
1686 .out_hor_offs_align = 8,
1687 .max_dma_bufs = 1,
1688 .num_instances = 2,
1689 };
1690
1691 /* EXYNOS5250 */
1692 static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
1693 .max_width = 8192,
1694 .max_height = 8192,
1695 .out_width_align = 8,
1696 .win_hor_offs_align = 2,
1697 .out_hor_offs_align = 8,
1698 .max_dma_bufs = 32,
1699 .num_instances = 3,
1700 };
1701
1702 static const struct of_device_id flite_of_match[] = {
1703 {
1704 .compatible = "samsung,exynos4212-fimc-lite",
1705 .data = &fimc_lite_drvdata_exynos4,
1706 },
1707 {
1708 .compatible = "samsung,exynos5250-fimc-lite",
1709 .data = &fimc_lite_drvdata_exynos5,
1710 },
1711 { /* sentinel */ },
1712 };
1713 MODULE_DEVICE_TABLE(of, flite_of_match);
1714
1715 static struct platform_driver fimc_lite_driver = {
1716 .probe = fimc_lite_probe,
1717 .remove = fimc_lite_remove,
1718 .driver = {
1719 .of_match_table = flite_of_match,
1720 .name = FIMC_LITE_DRV_NAME,
1721 .pm = &fimc_lite_pm_ops,
1722 }
1723 };
1724 module_platform_driver(fimc_lite_driver);
1725 MODULE_LICENSE("GPL");
1726 MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);
Linux kernel - Deliverables
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