projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'jg-20061012-00' of git://electric-eye.fr.zoreil.com/home/romieu/linux...
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 char e1000_driver_name[] = "e1000";
32 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
33 #ifndef CONFIG_E1000_NAPI
34 #define DRIVERNAPI
35 #else
36 #define DRIVERNAPI "-NAPI"
37 #endif
38 #define DRV_VERSION "7.2.9-k2"DRIVERNAPI
39 char e1000_driver_version[] = DRV_VERSION;
40 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
41
42 /* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49 static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
106 /* required last entry */
107 {0,}
108 };
109
110 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
112 int e1000_up(struct e1000_adapter *adapter);
113 void e1000_down(struct e1000_adapter *adapter);
114 void e1000_reinit_locked(struct e1000_adapter *adapter);
115 void e1000_reset(struct e1000_adapter *adapter);
116 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
121 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *txdr);
123 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rxdr);
125 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 void e1000_update_stats(struct e1000_adapter *adapter);
130
131 static int e1000_init_module(void);
132 static void e1000_exit_module(void);
133 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134 static void __devexit e1000_remove(struct pci_dev *pdev);
135 static int e1000_alloc_queues(struct e1000_adapter *adapter);
136 static int e1000_sw_init(struct e1000_adapter *adapter);
137 static int e1000_open(struct net_device *netdev);
138 static int e1000_close(struct net_device *netdev);
139 static void e1000_configure_tx(struct e1000_adapter *adapter);
140 static void e1000_configure_rx(struct e1000_adapter *adapter);
141 static void e1000_setup_rctl(struct e1000_adapter *adapter);
142 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
148 static void e1000_set_multi(struct net_device *netdev);
149 static void e1000_update_phy_info(unsigned long data);
150 static void e1000_watchdog(unsigned long data);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
176 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
179 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
182 void e1000_set_ethtool_ops(struct net_device *netdev);
183 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185 static void e1000_tx_timeout(struct net_device *dev);
186 static void e1000_reset_task(struct net_device *dev);
187 static void e1000_smartspeed(struct e1000_adapter *adapter);
188 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
190
191 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194 static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
196 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
197 #ifdef CONFIG_PM
198 static int e1000_resume(struct pci_dev *pdev);
199 #endif
200 static void e1000_shutdown(struct pci_dev *pdev);
201
202 #ifdef CONFIG_NET_POLL_CONTROLLER
203 /* for netdump / net console */
204 static void e1000_netpoll (struct net_device *netdev);
205 #endif
206
207 extern void e1000_check_options(struct e1000_adapter *adapter);
208
209 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212 static void e1000_io_resume(struct pci_dev *pdev);
213
214 static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218 };
219
220 static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
225 #ifdef CONFIG_PM
226 /* Power Managment Hooks */
227 .suspend = e1000_suspend,
228 .resume = e1000_resume,
229 #endif
230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
232 };
233
234 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236 MODULE_LICENSE("GPL");
237 MODULE_VERSION(DRV_VERSION);
238
239 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240 module_param(debug, int, 0);
241 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243 /**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250 static int __init
251 e1000_init_module(void)
252 {
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
259 ret = pci_register_driver(&e1000_driver);
260
261 return ret;
262 }
263
264 module_init(e1000_init_module);
265
266 /**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273 static void __exit
274 e1000_exit_module(void)
275 {
276 pci_unregister_driver(&e1000_driver);
277 }
278
279 module_exit(e1000_exit_module);
280
281 static int e1000_request_irq(struct e1000_adapter *adapter)
282 {
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
286 flags = IRQF_SHARED;
287 #ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
297 flags &= ~IRQF_SHARED;
298 #endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305 }
306
307 static void e1000_free_irq(struct e1000_adapter *adapter)
308 {
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313 #ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316 #endif
317 }
318
319 /**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
324 static void
325 e1000_irq_disable(struct e1000_adapter *adapter)
326 {
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331 }
332
333 /**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
338 static void
339 e1000_irq_enable(struct e1000_adapter *adapter)
340 {
341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345 }
346
347 static void
348 e1000_update_mng_vlan(struct e1000_adapter *adapter)
349 {
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
366 } else
367 adapter->mng_vlan_id = vid;
368 }
369 }
370
371 /**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
379 *
380 **/
381
382 static void
383 e1000_release_hw_control(struct e1000_adapter *adapter)
384 {
385 uint32_t ctrl_ext;
386 uint32_t swsm;
387 uint32_t extcnf;
388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
393 case e1000_80003es2lan:
394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
407 default:
408 break;
409 }
410 }
411
412 /**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
419 * of the f/w this means that the netowrk i/f is open.
420 *
421 **/
422
423 static void
424 e1000_get_hw_control(struct e1000_adapter *adapter)
425 {
426 uint32_t ctrl_ext;
427 uint32_t swsm;
428 uint32_t extcnf;
429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
433 case e1000_80003es2lan:
434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
448 default:
449 break;
450 }
451 }
452
453 int
454 e1000_up(struct e1000_adapter *adapter)
455 {
456 struct net_device *netdev = adapter->netdev;
457 int i;
458
459 /* hardware has been reset, we need to reload some things */
460
461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
471 for (i = 0; i < adapter->num_rx_queues; i++) {
472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
475 }
476
477 adapter->tx_queue_len = netdev->tx_queue_len;
478
479 #ifdef CONFIG_E1000_NAPI
480 netif_poll_enable(netdev);
481 #endif
482 e1000_irq_enable(adapter);
483
484 clear_bit(__E1000_DOWN, &adapter->flags);
485
486 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
487 return 0;
488 }
489
490 /**
491 * e1000_power_up_phy - restore link in case the phy was powered down
492 * @adapter: address of board private structure
493 *
494 * The phy may be powered down to save power and turn off link when the
495 * driver is unloaded and wake on lan is not enabled (among others)
496 * *** this routine MUST be followed by a call to e1000_reset ***
497 *
498 **/
499
500 void e1000_power_up_phy(struct e1000_adapter *adapter)
501 {
502 uint16_t mii_reg = 0;
503
504 /* Just clear the power down bit to wake the phy back up */
505 if (adapter->hw.media_type == e1000_media_type_copper) {
506 /* according to the manual, the phy will retain its
507 * settings across a power-down/up cycle */
508 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
509 mii_reg &= ~MII_CR_POWER_DOWN;
510 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
511 }
512 }
513
514 static void e1000_power_down_phy(struct e1000_adapter *adapter)
515 {
516 /* Power down the PHY so no link is implied when interface is down *
517 * The PHY cannot be powered down if any of the following is TRUE *
518 * (a) WoL is enabled
519 * (b) AMT is active
520 * (c) SoL/IDER session is active */
521 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
522 adapter->hw.media_type == e1000_media_type_copper) {
523 uint16_t mii_reg = 0;
524
525 switch (adapter->hw.mac_type) {
526 case e1000_82540:
527 case e1000_82545:
528 case e1000_82545_rev_3:
529 case e1000_82546:
530 case e1000_82546_rev_3:
531 case e1000_82541:
532 case e1000_82541_rev_2:
533 case e1000_82547:
534 case e1000_82547_rev_2:
535 if (E1000_READ_REG(&adapter->hw, MANC) &
536 E1000_MANC_SMBUS_EN)
537 goto out;
538 break;
539 case e1000_82571:
540 case e1000_82572:
541 case e1000_82573:
542 case e1000_80003es2lan:
543 case e1000_ich8lan:
544 if (e1000_check_mng_mode(&adapter->hw) ||
545 e1000_check_phy_reset_block(&adapter->hw))
546 goto out;
547 break;
548 default:
549 goto out;
550 }
551 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
552 mii_reg |= MII_CR_POWER_DOWN;
553 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
554 mdelay(1);
555 }
556 out:
557 return;
558 }
559
560 void
561 e1000_down(struct e1000_adapter *adapter)
562 {
563 struct net_device *netdev = adapter->netdev;
564
565 /* signal that we're down so the interrupt handler does not
566 * reschedule our watchdog timer */
567 set_bit(__E1000_DOWN, &adapter->flags);
568
569 e1000_irq_disable(adapter);
570
571 del_timer_sync(&adapter->tx_fifo_stall_timer);
572 del_timer_sync(&adapter->watchdog_timer);
573 del_timer_sync(&adapter->phy_info_timer);
574
575 #ifdef CONFIG_E1000_NAPI
576 netif_poll_disable(netdev);
577 #endif
578 netdev->tx_queue_len = adapter->tx_queue_len;
579 adapter->link_speed = 0;
580 adapter->link_duplex = 0;
581 netif_carrier_off(netdev);
582 netif_stop_queue(netdev);
583
584 e1000_reset(adapter);
585 e1000_clean_all_tx_rings(adapter);
586 e1000_clean_all_rx_rings(adapter);
587 }
588
589 void
590 e1000_reinit_locked(struct e1000_adapter *adapter)
591 {
592 WARN_ON(in_interrupt());
593 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
594 msleep(1);
595 e1000_down(adapter);
596 e1000_up(adapter);
597 clear_bit(__E1000_RESETTING, &adapter->flags);
598 }
599
600 void
601 e1000_reset(struct e1000_adapter *adapter)
602 {
603 uint32_t pba, manc;
604 #ifdef DISABLE_MULR
605 uint32_t tctl;
606 #endif
607 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
608
609 /* Repartition Pba for greater than 9k mtu
610 * To take effect CTRL.RST is required.
611 */
612
613 switch (adapter->hw.mac_type) {
614 case e1000_82547:
615 case e1000_82547_rev_2:
616 pba = E1000_PBA_30K;
617 break;
618 case e1000_82571:
619 case e1000_82572:
620 case e1000_80003es2lan:
621 pba = E1000_PBA_38K;
622 break;
623 case e1000_82573:
624 pba = E1000_PBA_12K;
625 break;
626 case e1000_ich8lan:
627 pba = E1000_PBA_8K;
628 break;
629 default:
630 pba = E1000_PBA_48K;
631 break;
632 }
633
634 if ((adapter->hw.mac_type != e1000_82573) &&
635 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
636 pba -= 8; /* allocate more FIFO for Tx */
637
638
639 if (adapter->hw.mac_type == e1000_82547) {
640 adapter->tx_fifo_head = 0;
641 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
642 adapter->tx_fifo_size =
643 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
644 atomic_set(&adapter->tx_fifo_stall, 0);
645 }
646
647 E1000_WRITE_REG(&adapter->hw, PBA, pba);
648
649 /* flow control settings */
650 /* Set the FC high water mark to 90% of the FIFO size.
651 * Required to clear last 3 LSB */
652 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
653 /* We can't use 90% on small FIFOs because the remainder
654 * would be less than 1 full frame. In this case, we size
655 * it to allow at least a full frame above the high water
656 * mark. */
657 if (pba < E1000_PBA_16K)
658 fc_high_water_mark = (pba * 1024) - 1600;
659
660 adapter->hw.fc_high_water = fc_high_water_mark;
661 adapter->hw.fc_low_water = fc_high_water_mark - 8;
662 if (adapter->hw.mac_type == e1000_80003es2lan)
663 adapter->hw.fc_pause_time = 0xFFFF;
664 else
665 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
666 adapter->hw.fc_send_xon = 1;
667 adapter->hw.fc = adapter->hw.original_fc;
668
669 /* Allow time for pending master requests to run */
670 e1000_reset_hw(&adapter->hw);
671 if (adapter->hw.mac_type >= e1000_82544)
672 E1000_WRITE_REG(&adapter->hw, WUC, 0);
673 #ifdef DISABLE_MULR
674 /* disable Multiple Reads in Transmit Control Register for debugging */
675 tctl = E1000_READ_REG(hw, TCTL);
676 E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
677
678 #endif
679 if (e1000_init_hw(&adapter->hw))
680 DPRINTK(PROBE, ERR, "Hardware Error\n");
681 e1000_update_mng_vlan(adapter);
682 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
683 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
684
685 e1000_reset_adaptive(&adapter->hw);
686 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
687
688 if (!adapter->smart_power_down &&
689 (adapter->hw.mac_type == e1000_82571 ||
690 adapter->hw.mac_type == e1000_82572)) {
691 uint16_t phy_data = 0;
692 /* speed up time to link by disabling smart power down, ignore
693 * the return value of this function because there is nothing
694 * different we would do if it failed */
695 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
696 &phy_data);
697 phy_data &= ~IGP02E1000_PM_SPD;
698 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
699 phy_data);
700 }
701
702 if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) {
703 manc = E1000_READ_REG(&adapter->hw, MANC);
704 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
705 E1000_WRITE_REG(&adapter->hw, MANC, manc);
706 }
707 }
708
709 /**
710 * e1000_probe - Device Initialization Routine
711 * @pdev: PCI device information struct
712 * @ent: entry in e1000_pci_tbl
713 *
714 * Returns 0 on success, negative on failure
715 *
716 * e1000_probe initializes an adapter identified by a pci_dev structure.
717 * The OS initialization, configuring of the adapter private structure,
718 * and a hardware reset occur.
719 **/
720
721 static int __devinit
722 e1000_probe(struct pci_dev *pdev,
723 const struct pci_device_id *ent)
724 {
725 struct net_device *netdev;
726 struct e1000_adapter *adapter;
727 unsigned long mmio_start, mmio_len;
728 unsigned long flash_start, flash_len;
729
730 static int cards_found = 0;
731 static int global_quad_port_a = 0; /* global ksp3 port a indication */
732 int i, err, pci_using_dac;
733 uint16_t eeprom_data = 0;
734 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
735 if ((err = pci_enable_device(pdev)))
736 return err;
737
738 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
739 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
740 pci_using_dac = 1;
741 } else {
742 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
743 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
744 E1000_ERR("No usable DMA configuration, aborting\n");
745 goto err_dma;
746 }
747 pci_using_dac = 0;
748 }
749
750 if ((err = pci_request_regions(pdev, e1000_driver_name)))
751 goto err_pci_reg;
752
753 pci_set_master(pdev);
754
755 err = -ENOMEM;
756 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
757 if (!netdev)
758 goto err_alloc_etherdev;
759
760 SET_MODULE_OWNER(netdev);
761 SET_NETDEV_DEV(netdev, &pdev->dev);
762
763 pci_set_drvdata(pdev, netdev);
764 adapter = netdev_priv(netdev);
765 adapter->netdev = netdev;
766 adapter->pdev = pdev;
767 adapter->hw.back = adapter;
768 adapter->msg_enable = (1 << debug) - 1;
769
770 mmio_start = pci_resource_start(pdev, BAR_0);
771 mmio_len = pci_resource_len(pdev, BAR_0);
772
773 err = -EIO;
774 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
775 if (!adapter->hw.hw_addr)
776 goto err_ioremap;
777
778 for (i = BAR_1; i <= BAR_5; i++) {
779 if (pci_resource_len(pdev, i) == 0)
780 continue;
781 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
782 adapter->hw.io_base = pci_resource_start(pdev, i);
783 break;
784 }
785 }
786
787 netdev->open = &e1000_open;
788 netdev->stop = &e1000_close;
789 netdev->hard_start_xmit = &e1000_xmit_frame;
790 netdev->get_stats = &e1000_get_stats;
791 netdev->set_multicast_list = &e1000_set_multi;
792 netdev->set_mac_address = &e1000_set_mac;
793 netdev->change_mtu = &e1000_change_mtu;
794 netdev->do_ioctl = &e1000_ioctl;
795 e1000_set_ethtool_ops(netdev);
796 netdev->tx_timeout = &e1000_tx_timeout;
797 netdev->watchdog_timeo = 5 * HZ;
798 #ifdef CONFIG_E1000_NAPI
799 netdev->poll = &e1000_clean;
800 netdev->weight = 64;
801 #endif
802 netdev->vlan_rx_register = e1000_vlan_rx_register;
803 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
804 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
805 #ifdef CONFIG_NET_POLL_CONTROLLER
806 netdev->poll_controller = e1000_netpoll;
807 #endif
808 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
809
810 netdev->mem_start = mmio_start;
811 netdev->mem_end = mmio_start + mmio_len;
812 netdev->base_addr = adapter->hw.io_base;
813
814 adapter->bd_number = cards_found;
815
816 /* setup the private structure */
817
818 if ((err = e1000_sw_init(adapter)))
819 goto err_sw_init;
820
821 err = -EIO;
822 /* Flash BAR mapping must happen after e1000_sw_init
823 * because it depends on mac_type */
824 if ((adapter->hw.mac_type == e1000_ich8lan) &&
825 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
826 flash_start = pci_resource_start(pdev, 1);
827 flash_len = pci_resource_len(pdev, 1);
828 adapter->hw.flash_address = ioremap(flash_start, flash_len);
829 if (!adapter->hw.flash_address)
830 goto err_flashmap;
831 }
832
833 if (e1000_check_phy_reset_block(&adapter->hw))
834 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
835
836 if (adapter->hw.mac_type >= e1000_82543) {
837 netdev->features = NETIF_F_SG |
838 NETIF_F_HW_CSUM |
839 NETIF_F_HW_VLAN_TX |
840 NETIF_F_HW_VLAN_RX |
841 NETIF_F_HW_VLAN_FILTER;
842 if (adapter->hw.mac_type == e1000_ich8lan)
843 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
844 }
845
846 #ifdef NETIF_F_TSO
847 if ((adapter->hw.mac_type >= e1000_82544) &&
848 (adapter->hw.mac_type != e1000_82547))
849 netdev->features |= NETIF_F_TSO;
850
851 #ifdef NETIF_F_TSO_IPV6
852 if (adapter->hw.mac_type > e1000_82547_rev_2)
853 netdev->features |= NETIF_F_TSO_IPV6;
854 #endif
855 #endif
856 if (pci_using_dac)
857 netdev->features |= NETIF_F_HIGHDMA;
858
859 netdev->features |= NETIF_F_LLTX;
860
861 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
862
863 /* initialize eeprom parameters */
864
865 if (e1000_init_eeprom_params(&adapter->hw)) {
866 E1000_ERR("EEPROM initialization failed\n");
867 goto err_eeprom;
868 }
869
870 /* before reading the EEPROM, reset the controller to
871 * put the device in a known good starting state */
872
873 e1000_reset_hw(&adapter->hw);
874
875 /* make sure the EEPROM is good */
876
877 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
878 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
879 goto err_eeprom;
880 }
881
882 /* copy the MAC address out of the EEPROM */
883
884 if (e1000_read_mac_addr(&adapter->hw))
885 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
886 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
887 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
888
889 if (!is_valid_ether_addr(netdev->perm_addr)) {
890 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
891 goto err_eeprom;
892 }
893
894 e1000_get_bus_info(&adapter->hw);
895
896 init_timer(&adapter->tx_fifo_stall_timer);
897 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
898 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
899
900 init_timer(&adapter->watchdog_timer);
901 adapter->watchdog_timer.function = &e1000_watchdog;
902 adapter->watchdog_timer.data = (unsigned long) adapter;
903
904 init_timer(&adapter->phy_info_timer);
905 adapter->phy_info_timer.function = &e1000_update_phy_info;
906 adapter->phy_info_timer.data = (unsigned long) adapter;
907
908 INIT_WORK(&adapter->reset_task,
909 (void (*)(void *))e1000_reset_task, netdev);
910
911 e1000_check_options(adapter);
912
913 /* Initial Wake on LAN setting
914 * If APM wake is enabled in the EEPROM,
915 * enable the ACPI Magic Packet filter
916 */
917
918 switch (adapter->hw.mac_type) {
919 case e1000_82542_rev2_0:
920 case e1000_82542_rev2_1:
921 case e1000_82543:
922 break;
923 case e1000_82544:
924 e1000_read_eeprom(&adapter->hw,
925 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
926 eeprom_apme_mask = E1000_EEPROM_82544_APM;
927 break;
928 case e1000_ich8lan:
929 e1000_read_eeprom(&adapter->hw,
930 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
931 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
932 break;
933 case e1000_82546:
934 case e1000_82546_rev_3:
935 case e1000_82571:
936 case e1000_80003es2lan:
937 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
938 e1000_read_eeprom(&adapter->hw,
939 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
940 break;
941 }
942 /* Fall Through */
943 default:
944 e1000_read_eeprom(&adapter->hw,
945 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
946 break;
947 }
948 if (eeprom_data & eeprom_apme_mask)
949 adapter->eeprom_wol |= E1000_WUFC_MAG;
950
951 /* now that we have the eeprom settings, apply the special cases
952 * where the eeprom may be wrong or the board simply won't support
953 * wake on lan on a particular port */
954 switch (pdev->device) {
955 case E1000_DEV_ID_82546GB_PCIE:
956 adapter->eeprom_wol = 0;
957 break;
958 case E1000_DEV_ID_82546EB_FIBER:
959 case E1000_DEV_ID_82546GB_FIBER:
960 case E1000_DEV_ID_82571EB_FIBER:
961 /* Wake events only supported on port A for dual fiber
962 * regardless of eeprom setting */
963 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
964 adapter->eeprom_wol = 0;
965 break;
966 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
967 case E1000_DEV_ID_82571EB_QUAD_COPPER:
968 /* if quad port adapter, disable WoL on all but port A */
969 if (global_quad_port_a != 0)
970 adapter->eeprom_wol = 0;
971 else
972 adapter->quad_port_a = 1;
973 /* Reset for multiple quad port adapters */
974 if (++global_quad_port_a == 4)
975 global_quad_port_a = 0;
976 break;
977 }
978
979 /* initialize the wol settings based on the eeprom settings */
980 adapter->wol = adapter->eeprom_wol;
981
982 /* print bus type/speed/width info */
983 {
984 struct e1000_hw *hw = &adapter->hw;
985 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
986 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
987 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
988 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
989 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
990 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
991 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
992 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
993 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
994 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
995 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
996 "32-bit"));
997 }
998
999 for (i = 0; i < 6; i++)
1000 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1001
1002 /* reset the hardware with the new settings */
1003 e1000_reset(adapter);
1004
1005 /* If the controller is 82573 and f/w is AMT, do not set
1006 * DRV_LOAD until the interface is up. For all other cases,
1007 * let the f/w know that the h/w is now under the control
1008 * of the driver. */
1009 if (adapter->hw.mac_type != e1000_82573 ||
1010 !e1000_check_mng_mode(&adapter->hw))
1011 e1000_get_hw_control(adapter);
1012
1013 strcpy(netdev->name, "eth%d");
1014 if ((err = register_netdev(netdev)))
1015 goto err_register;
1016
1017 /* tell the stack to leave us alone until e1000_open() is called */
1018 netif_carrier_off(netdev);
1019 netif_stop_queue(netdev);
1020
1021 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1022
1023 cards_found++;
1024 return 0;
1025
1026 err_register:
1027 e1000_release_hw_control(adapter);
1028 err_eeprom:
1029 if (!e1000_check_phy_reset_block(&adapter->hw))
1030 e1000_phy_hw_reset(&adapter->hw);
1031
1032 if (adapter->hw.flash_address)
1033 iounmap(adapter->hw.flash_address);
1034 err_flashmap:
1035 #ifdef CONFIG_E1000_NAPI
1036 for (i = 0; i < adapter->num_rx_queues; i++)
1037 dev_put(&adapter->polling_netdev[i]);
1038 #endif
1039
1040 kfree(adapter->tx_ring);
1041 kfree(adapter->rx_ring);
1042 #ifdef CONFIG_E1000_NAPI
1043 kfree(adapter->polling_netdev);
1044 #endif
1045 err_sw_init:
1046 iounmap(adapter->hw.hw_addr);
1047 err_ioremap:
1048 free_netdev(netdev);
1049 err_alloc_etherdev:
1050 pci_release_regions(pdev);
1051 err_pci_reg:
1052 err_dma:
1053 pci_disable_device(pdev);
1054 return err;
1055 }
1056
1057 /**
1058 * e1000_remove - Device Removal Routine
1059 * @pdev: PCI device information struct
1060 *
1061 * e1000_remove is called by the PCI subsystem to alert the driver
1062 * that it should release a PCI device. The could be caused by a
1063 * Hot-Plug event, or because the driver is going to be removed from
1064 * memory.
1065 **/
1066
1067 static void __devexit
1068 e1000_remove(struct pci_dev *pdev)
1069 {
1070 struct net_device *netdev = pci_get_drvdata(pdev);
1071 struct e1000_adapter *adapter = netdev_priv(netdev);
1072 uint32_t manc;
1073 #ifdef CONFIG_E1000_NAPI
1074 int i;
1075 #endif
1076
1077 flush_scheduled_work();
1078
1079 if (adapter->hw.mac_type < e1000_82571 &&
1080 adapter->hw.media_type == e1000_media_type_copper) {
1081 manc = E1000_READ_REG(&adapter->hw, MANC);
1082 if (manc & E1000_MANC_SMBUS_EN) {
1083 manc |= E1000_MANC_ARP_EN;
1084 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1085 }
1086 }
1087
1088 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1089 * would have already happened in close and is redundant. */
1090 e1000_release_hw_control(adapter);
1091
1092 unregister_netdev(netdev);
1093 #ifdef CONFIG_E1000_NAPI
1094 for (i = 0; i < adapter->num_rx_queues; i++)
1095 dev_put(&adapter->polling_netdev[i]);
1096 #endif
1097
1098 if (!e1000_check_phy_reset_block(&adapter->hw))
1099 e1000_phy_hw_reset(&adapter->hw);
1100
1101 kfree(adapter->tx_ring);
1102 kfree(adapter->rx_ring);
1103 #ifdef CONFIG_E1000_NAPI
1104 kfree(adapter->polling_netdev);
1105 #endif
1106
1107 iounmap(adapter->hw.hw_addr);
1108 if (adapter->hw.flash_address)
1109 iounmap(adapter->hw.flash_address);
1110 pci_release_regions(pdev);
1111
1112 free_netdev(netdev);
1113
1114 pci_disable_device(pdev);
1115 }
1116
1117 /**
1118 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1119 * @adapter: board private structure to initialize
1120 *
1121 * e1000_sw_init initializes the Adapter private data structure.
1122 * Fields are initialized based on PCI device information and
1123 * OS network device settings (MTU size).
1124 **/
1125
1126 static int __devinit
1127 e1000_sw_init(struct e1000_adapter *adapter)
1128 {
1129 struct e1000_hw *hw = &adapter->hw;
1130 struct net_device *netdev = adapter->netdev;
1131 struct pci_dev *pdev = adapter->pdev;
1132 #ifdef CONFIG_E1000_NAPI
1133 int i;
1134 #endif
1135
1136 /* PCI config space info */
1137
1138 hw->vendor_id = pdev->vendor;
1139 hw->device_id = pdev->device;
1140 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1141 hw->subsystem_id = pdev->subsystem_device;
1142
1143 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1144
1145 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1146
1147 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1148 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1149 hw->max_frame_size = netdev->mtu +
1150 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1151 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1152
1153 /* identify the MAC */
1154
1155 if (e1000_set_mac_type(hw)) {
1156 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1157 return -EIO;
1158 }
1159
1160 switch (hw->mac_type) {
1161 default:
1162 break;
1163 case e1000_82541:
1164 case e1000_82547:
1165 case e1000_82541_rev_2:
1166 case e1000_82547_rev_2:
1167 hw->phy_init_script = 1;
1168 break;
1169 }
1170
1171 e1000_set_media_type(hw);
1172
1173 hw->wait_autoneg_complete = FALSE;
1174 hw->tbi_compatibility_en = TRUE;
1175 hw->adaptive_ifs = TRUE;
1176
1177 /* Copper options */
1178
1179 if (hw->media_type == e1000_media_type_copper) {
1180 hw->mdix = AUTO_ALL_MODES;
1181 hw->disable_polarity_correction = FALSE;
1182 hw->master_slave = E1000_MASTER_SLAVE;
1183 }
1184
1185 adapter->num_tx_queues = 1;
1186 adapter->num_rx_queues = 1;
1187
1188 if (e1000_alloc_queues(adapter)) {
1189 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1190 return -ENOMEM;
1191 }
1192
1193 #ifdef CONFIG_E1000_NAPI
1194 for (i = 0; i < adapter->num_rx_queues; i++) {
1195 adapter->polling_netdev[i].priv = adapter;
1196 adapter->polling_netdev[i].poll = &e1000_clean;
1197 adapter->polling_netdev[i].weight = 64;
1198 dev_hold(&adapter->polling_netdev[i]);
1199 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1200 }
1201 spin_lock_init(&adapter->tx_queue_lock);
1202 #endif
1203
1204 atomic_set(&adapter->irq_sem, 1);
1205 spin_lock_init(&adapter->stats_lock);
1206
1207 set_bit(__E1000_DOWN, &adapter->flags);
1208
1209 return 0;
1210 }
1211
1212 /**
1213 * e1000_alloc_queues - Allocate memory for all rings
1214 * @adapter: board private structure to initialize
1215 *
1216 * We allocate one ring per queue at run-time since we don't know the
1217 * number of queues at compile-time. The polling_netdev array is
1218 * intended for Multiqueue, but should work fine with a single queue.
1219 **/
1220
1221 static int __devinit
1222 e1000_alloc_queues(struct e1000_adapter *adapter)
1223 {
1224 int size;
1225
1226 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1227 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1228 if (!adapter->tx_ring)
1229 return -ENOMEM;
1230 memset(adapter->tx_ring, 0, size);
1231
1232 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1233 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1234 if (!adapter->rx_ring) {
1235 kfree(adapter->tx_ring);
1236 return -ENOMEM;
1237 }
1238 memset(adapter->rx_ring, 0, size);
1239
1240 #ifdef CONFIG_E1000_NAPI
1241 size = sizeof(struct net_device) * adapter->num_rx_queues;
1242 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1243 if (!adapter->polling_netdev) {
1244 kfree(adapter->tx_ring);
1245 kfree(adapter->rx_ring);
1246 return -ENOMEM;
1247 }
1248 memset(adapter->polling_netdev, 0, size);
1249 #endif
1250
1251 return E1000_SUCCESS;
1252 }
1253
1254 /**
1255 * e1000_open - Called when a network interface is made active
1256 * @netdev: network interface device structure
1257 *
1258 * Returns 0 on success, negative value on failure
1259 *
1260 * The open entry point is called when a network interface is made
1261 * active by the system (IFF_UP). At this point all resources needed
1262 * for transmit and receive operations are allocated, the interrupt
1263 * handler is registered with the OS, the watchdog timer is started,
1264 * and the stack is notified that the interface is ready.
1265 **/
1266
1267 static int
1268 e1000_open(struct net_device *netdev)
1269 {
1270 struct e1000_adapter *adapter = netdev_priv(netdev);
1271 int err;
1272
1273 /* disallow open during test */
1274 if (test_bit(__E1000_TESTING, &adapter->flags))
1275 return -EBUSY;
1276
1277 /* allocate transmit descriptors */
1278
1279 if ((err = e1000_setup_all_tx_resources(adapter)))
1280 goto err_setup_tx;
1281
1282 /* allocate receive descriptors */
1283
1284 if ((err = e1000_setup_all_rx_resources(adapter)))
1285 goto err_setup_rx;
1286
1287 err = e1000_request_irq(adapter);
1288 if (err)
1289 goto err_req_irq;
1290
1291 e1000_power_up_phy(adapter);
1292
1293 if ((err = e1000_up(adapter)))
1294 goto err_up;
1295 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1296 if ((adapter->hw.mng_cookie.status &
1297 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1298 e1000_update_mng_vlan(adapter);
1299 }
1300
1301 /* If AMT is enabled, let the firmware know that the network
1302 * interface is now open */
1303 if (adapter->hw.mac_type == e1000_82573 &&
1304 e1000_check_mng_mode(&adapter->hw))
1305 e1000_get_hw_control(adapter);
1306
1307 return E1000_SUCCESS;
1308
1309 err_up:
1310 e1000_power_down_phy(adapter);
1311 e1000_free_irq(adapter);
1312 err_req_irq:
1313 e1000_free_all_rx_resources(adapter);
1314 err_setup_rx:
1315 e1000_free_all_tx_resources(adapter);
1316 err_setup_tx:
1317 e1000_reset(adapter);
1318
1319 return err;
1320 }
1321
1322 /**
1323 * e1000_close - Disables a network interface
1324 * @netdev: network interface device structure
1325 *
1326 * Returns 0, this is not allowed to fail
1327 *
1328 * The close entry point is called when an interface is de-activated
1329 * by the OS. The hardware is still under the drivers control, but
1330 * needs to be disabled. A global MAC reset is issued to stop the
1331 * hardware, and all transmit and receive resources are freed.
1332 **/
1333
1334 static int
1335 e1000_close(struct net_device *netdev)
1336 {
1337 struct e1000_adapter *adapter = netdev_priv(netdev);
1338
1339 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1340 e1000_down(adapter);
1341 e1000_power_down_phy(adapter);
1342 e1000_free_irq(adapter);
1343
1344 e1000_free_all_tx_resources(adapter);
1345 e1000_free_all_rx_resources(adapter);
1346
1347 /* kill manageability vlan ID if supported, but not if a vlan with
1348 * the same ID is registered on the host OS (let 8021q kill it) */
1349 if ((adapter->hw.mng_cookie.status &
1350 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1351 !(adapter->vlgrp &&
1352 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1353 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1354 }
1355
1356 /* If AMT is enabled, let the firmware know that the network
1357 * interface is now closed */
1358 if (adapter->hw.mac_type == e1000_82573 &&
1359 e1000_check_mng_mode(&adapter->hw))
1360 e1000_release_hw_control(adapter);
1361
1362 return 0;
1363 }
1364
1365 /**
1366 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1367 * @adapter: address of board private structure
1368 * @start: address of beginning of memory
1369 * @len: length of memory
1370 **/
1371 static boolean_t
1372 e1000_check_64k_bound(struct e1000_adapter *adapter,
1373 void *start, unsigned long len)
1374 {
1375 unsigned long begin = (unsigned long) start;
1376 unsigned long end = begin + len;
1377
1378 /* First rev 82545 and 82546 need to not allow any memory
1379 * write location to cross 64k boundary due to errata 23 */
1380 if (adapter->hw.mac_type == e1000_82545 ||
1381 adapter->hw.mac_type == e1000_82546) {
1382 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1383 }
1384
1385 return TRUE;
1386 }
1387
1388 /**
1389 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1390 * @adapter: board private structure
1391 * @txdr: tx descriptor ring (for a specific queue) to setup
1392 *
1393 * Return 0 on success, negative on failure
1394 **/
1395
1396 static int
1397 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1398 struct e1000_tx_ring *txdr)
1399 {
1400 struct pci_dev *pdev = adapter->pdev;
1401 int size;
1402
1403 size = sizeof(struct e1000_buffer) * txdr->count;
1404 txdr->buffer_info = vmalloc(size);
1405 if (!txdr->buffer_info) {
1406 DPRINTK(PROBE, ERR,
1407 "Unable to allocate memory for the transmit descriptor ring\n");
1408 return -ENOMEM;
1409 }
1410 memset(txdr->buffer_info, 0, size);
1411
1412 /* round up to nearest 4K */
1413
1414 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1415 E1000_ROUNDUP(txdr->size, 4096);
1416
1417 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1418 if (!txdr->desc) {
1419 setup_tx_desc_die:
1420 vfree(txdr->buffer_info);
1421 DPRINTK(PROBE, ERR,
1422 "Unable to allocate memory for the transmit descriptor ring\n");
1423 return -ENOMEM;
1424 }
1425
1426 /* Fix for errata 23, can't cross 64kB boundary */
1427 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1428 void *olddesc = txdr->desc;
1429 dma_addr_t olddma = txdr->dma;
1430 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1431 "at %p\n", txdr->size, txdr->desc);
1432 /* Try again, without freeing the previous */
1433 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1434 /* Failed allocation, critical failure */
1435 if (!txdr->desc) {
1436 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1437 goto setup_tx_desc_die;
1438 }
1439
1440 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1441 /* give up */
1442 pci_free_consistent(pdev, txdr->size, txdr->desc,
1443 txdr->dma);
1444 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1445 DPRINTK(PROBE, ERR,
1446 "Unable to allocate aligned memory "
1447 "for the transmit descriptor ring\n");
1448 vfree(txdr->buffer_info);
1449 return -ENOMEM;
1450 } else {
1451 /* Free old allocation, new allocation was successful */
1452 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1453 }
1454 }
1455 memset(txdr->desc, 0, txdr->size);
1456
1457 txdr->next_to_use = 0;
1458 txdr->next_to_clean = 0;
1459 spin_lock_init(&txdr->tx_lock);
1460
1461 return 0;
1462 }
1463
1464 /**
1465 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1466 * (Descriptors) for all queues
1467 * @adapter: board private structure
1468 *
1469 * Return 0 on success, negative on failure
1470 **/
1471
1472 int
1473 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1474 {
1475 int i, err = 0;
1476
1477 for (i = 0; i < adapter->num_tx_queues; i++) {
1478 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1479 if (err) {
1480 DPRINTK(PROBE, ERR,
1481 "Allocation for Tx Queue %u failed\n", i);
1482 for (i-- ; i >= 0; i--)
1483 e1000_free_tx_resources(adapter,
1484 &adapter->tx_ring[i]);
1485 break;
1486 }
1487 }
1488
1489 return err;
1490 }
1491
1492 /**
1493 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1494 * @adapter: board private structure
1495 *
1496 * Configure the Tx unit of the MAC after a reset.
1497 **/
1498
1499 static void
1500 e1000_configure_tx(struct e1000_adapter *adapter)
1501 {
1502 uint64_t tdba;
1503 struct e1000_hw *hw = &adapter->hw;
1504 uint32_t tdlen, tctl, tipg, tarc;
1505 uint32_t ipgr1, ipgr2;
1506
1507 /* Setup the HW Tx Head and Tail descriptor pointers */
1508
1509 switch (adapter->num_tx_queues) {
1510 case 1:
1511 default:
1512 tdba = adapter->tx_ring[0].dma;
1513 tdlen = adapter->tx_ring[0].count *
1514 sizeof(struct e1000_tx_desc);
1515 E1000_WRITE_REG(hw, TDLEN, tdlen);
1516 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1517 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1518 E1000_WRITE_REG(hw, TDT, 0);
1519 E1000_WRITE_REG(hw, TDH, 0);
1520 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1521 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1522 break;
1523 }
1524
1525 /* Set the default values for the Tx Inter Packet Gap timer */
1526
1527 if (hw->media_type == e1000_media_type_fiber ||
1528 hw->media_type == e1000_media_type_internal_serdes)
1529 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1530 else
1531 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1532
1533 switch (hw->mac_type) {
1534 case e1000_82542_rev2_0:
1535 case e1000_82542_rev2_1:
1536 tipg = DEFAULT_82542_TIPG_IPGT;
1537 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1538 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1539 break;
1540 case e1000_80003es2lan:
1541 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1542 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1543 break;
1544 default:
1545 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1546 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1547 break;
1548 }
1549 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1550 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1551 E1000_WRITE_REG(hw, TIPG, tipg);
1552
1553 /* Set the Tx Interrupt Delay register */
1554
1555 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1556 if (hw->mac_type >= e1000_82540)
1557 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1558
1559 /* Program the Transmit Control Register */
1560
1561 tctl = E1000_READ_REG(hw, TCTL);
1562 tctl &= ~E1000_TCTL_CT;
1563 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1564 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1565
1566 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1567 tarc = E1000_READ_REG(hw, TARC0);
1568 tarc |= (1 << 21);
1569 E1000_WRITE_REG(hw, TARC0, tarc);
1570 } else if (hw->mac_type == e1000_80003es2lan) {
1571 tarc = E1000_READ_REG(hw, TARC0);
1572 tarc |= 1;
1573 E1000_WRITE_REG(hw, TARC0, tarc);
1574 tarc = E1000_READ_REG(hw, TARC1);
1575 tarc |= 1;
1576 E1000_WRITE_REG(hw, TARC1, tarc);
1577 }
1578
1579 e1000_config_collision_dist(hw);
1580
1581 /* Setup Transmit Descriptor Settings for eop descriptor */
1582 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1583 E1000_TXD_CMD_IFCS;
1584
1585 if (hw->mac_type < e1000_82543)
1586 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1587 else
1588 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1589
1590 /* Cache if we're 82544 running in PCI-X because we'll
1591 * need this to apply a workaround later in the send path. */
1592 if (hw->mac_type == e1000_82544 &&
1593 hw->bus_type == e1000_bus_type_pcix)
1594 adapter->pcix_82544 = 1;
1595
1596 E1000_WRITE_REG(hw, TCTL, tctl);
1597
1598 }
1599
1600 /**
1601 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1602 * @adapter: board private structure
1603 * @rxdr: rx descriptor ring (for a specific queue) to setup
1604 *
1605 * Returns 0 on success, negative on failure
1606 **/
1607
1608 static int
1609 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1610 struct e1000_rx_ring *rxdr)
1611 {
1612 struct pci_dev *pdev = adapter->pdev;
1613 int size, desc_len;
1614
1615 size = sizeof(struct e1000_buffer) * rxdr->count;
1616 rxdr->buffer_info = vmalloc(size);
1617 if (!rxdr->buffer_info) {
1618 DPRINTK(PROBE, ERR,
1619 "Unable to allocate memory for the receive descriptor ring\n");
1620 return -ENOMEM;
1621 }
1622 memset(rxdr->buffer_info, 0, size);
1623
1624 size = sizeof(struct e1000_ps_page) * rxdr->count;
1625 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1626 if (!rxdr->ps_page) {
1627 vfree(rxdr->buffer_info);
1628 DPRINTK(PROBE, ERR,
1629 "Unable to allocate memory for the receive descriptor ring\n");
1630 return -ENOMEM;
1631 }
1632 memset(rxdr->ps_page, 0, size);
1633
1634 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1635 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1636 if (!rxdr->ps_page_dma) {
1637 vfree(rxdr->buffer_info);
1638 kfree(rxdr->ps_page);
1639 DPRINTK(PROBE, ERR,
1640 "Unable to allocate memory for the receive descriptor ring\n");
1641 return -ENOMEM;
1642 }
1643 memset(rxdr->ps_page_dma, 0, size);
1644
1645 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1646 desc_len = sizeof(struct e1000_rx_desc);
1647 else
1648 desc_len = sizeof(union e1000_rx_desc_packet_split);
1649
1650 /* Round up to nearest 4K */
1651
1652 rxdr->size = rxdr->count * desc_len;
1653 E1000_ROUNDUP(rxdr->size, 4096);
1654
1655 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1656
1657 if (!rxdr->desc) {
1658 DPRINTK(PROBE, ERR,
1659 "Unable to allocate memory for the receive descriptor ring\n");
1660 setup_rx_desc_die:
1661 vfree(rxdr->buffer_info);
1662 kfree(rxdr->ps_page);
1663 kfree(rxdr->ps_page_dma);
1664 return -ENOMEM;
1665 }
1666
1667 /* Fix for errata 23, can't cross 64kB boundary */
1668 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1669 void *olddesc = rxdr->desc;
1670 dma_addr_t olddma = rxdr->dma;
1671 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1672 "at %p\n", rxdr->size, rxdr->desc);
1673 /* Try again, without freeing the previous */
1674 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1675 /* Failed allocation, critical failure */
1676 if (!rxdr->desc) {
1677 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1678 DPRINTK(PROBE, ERR,
1679 "Unable to allocate memory "
1680 "for the receive descriptor ring\n");
1681 goto setup_rx_desc_die;
1682 }
1683
1684 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1685 /* give up */
1686 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1687 rxdr->dma);
1688 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1689 DPRINTK(PROBE, ERR,
1690 "Unable to allocate aligned memory "
1691 "for the receive descriptor ring\n");
1692 goto setup_rx_desc_die;
1693 } else {
1694 /* Free old allocation, new allocation was successful */
1695 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1696 }
1697 }
1698 memset(rxdr->desc, 0, rxdr->size);
1699
1700 rxdr->next_to_clean = 0;
1701 rxdr->next_to_use = 0;
1702
1703 return 0;
1704 }
1705
1706 /**
1707 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1708 * (Descriptors) for all queues
1709 * @adapter: board private structure
1710 *
1711 * Return 0 on success, negative on failure
1712 **/
1713
1714 int
1715 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1716 {
1717 int i, err = 0;
1718
1719 for (i = 0; i < adapter->num_rx_queues; i++) {
1720 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1721 if (err) {
1722 DPRINTK(PROBE, ERR,
1723 "Allocation for Rx Queue %u failed\n", i);
1724 for (i-- ; i >= 0; i--)
1725 e1000_free_rx_resources(adapter,
1726 &adapter->rx_ring[i]);
1727 break;
1728 }
1729 }
1730
1731 return err;
1732 }
1733
1734 /**
1735 * e1000_setup_rctl - configure the receive control registers
1736 * @adapter: Board private structure
1737 **/
1738 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1739 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1740 static void
1741 e1000_setup_rctl(struct e1000_adapter *adapter)
1742 {
1743 uint32_t rctl, rfctl;
1744 uint32_t psrctl = 0;
1745 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1746 uint32_t pages = 0;
1747 #endif
1748
1749 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1750
1751 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1752
1753 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1754 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1755 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1756
1757 if (adapter->hw.tbi_compatibility_on == 1)
1758 rctl |= E1000_RCTL_SBP;
1759 else
1760 rctl &= ~E1000_RCTL_SBP;
1761
1762 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1763 rctl &= ~E1000_RCTL_LPE;
1764 else
1765 rctl |= E1000_RCTL_LPE;
1766
1767 /* Setup buffer sizes */
1768 rctl &= ~E1000_RCTL_SZ_4096;
1769 rctl |= E1000_RCTL_BSEX;
1770 switch (adapter->rx_buffer_len) {
1771 case E1000_RXBUFFER_256:
1772 rctl |= E1000_RCTL_SZ_256;
1773 rctl &= ~E1000_RCTL_BSEX;
1774 break;
1775 case E1000_RXBUFFER_512:
1776 rctl |= E1000_RCTL_SZ_512;
1777 rctl &= ~E1000_RCTL_BSEX;
1778 break;
1779 case E1000_RXBUFFER_1024:
1780 rctl |= E1000_RCTL_SZ_1024;
1781 rctl &= ~E1000_RCTL_BSEX;
1782 break;
1783 case E1000_RXBUFFER_2048:
1784 default:
1785 rctl |= E1000_RCTL_SZ_2048;
1786 rctl &= ~E1000_RCTL_BSEX;
1787 break;
1788 case E1000_RXBUFFER_4096:
1789 rctl |= E1000_RCTL_SZ_4096;
1790 break;
1791 case E1000_RXBUFFER_8192:
1792 rctl |= E1000_RCTL_SZ_8192;
1793 break;
1794 case E1000_RXBUFFER_16384:
1795 rctl |= E1000_RCTL_SZ_16384;
1796 break;
1797 }
1798
1799 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1800 /* 82571 and greater support packet-split where the protocol
1801 * header is placed in skb->data and the packet data is
1802 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1803 * In the case of a non-split, skb->data is linearly filled,
1804 * followed by the page buffers. Therefore, skb->data is
1805 * sized to hold the largest protocol header.
1806 */
1807 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1808 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1809 PAGE_SIZE <= 16384)
1810 adapter->rx_ps_pages = pages;
1811 else
1812 adapter->rx_ps_pages = 0;
1813 #endif
1814 if (adapter->rx_ps_pages) {
1815 /* Configure extra packet-split registers */
1816 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1817 rfctl |= E1000_RFCTL_EXTEN;
1818 /* disable IPv6 packet split support */
1819 rfctl |= E1000_RFCTL_IPV6_DIS;
1820 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1821
1822 rctl |= E1000_RCTL_DTYP_PS;
1823
1824 psrctl |= adapter->rx_ps_bsize0 >>
1825 E1000_PSRCTL_BSIZE0_SHIFT;
1826
1827 switch (adapter->rx_ps_pages) {
1828 case 3:
1829 psrctl |= PAGE_SIZE <<
1830 E1000_PSRCTL_BSIZE3_SHIFT;
1831 case 2:
1832 psrctl |= PAGE_SIZE <<
1833 E1000_PSRCTL_BSIZE2_SHIFT;
1834 case 1:
1835 psrctl |= PAGE_SIZE >>
1836 E1000_PSRCTL_BSIZE1_SHIFT;
1837 break;
1838 }
1839
1840 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1841 }
1842
1843 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1844 }
1845
1846 /**
1847 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1848 * @adapter: board private structure
1849 *
1850 * Configure the Rx unit of the MAC after a reset.
1851 **/
1852
1853 static void
1854 e1000_configure_rx(struct e1000_adapter *adapter)
1855 {
1856 uint64_t rdba;
1857 struct e1000_hw *hw = &adapter->hw;
1858 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1859
1860 if (adapter->rx_ps_pages) {
1861 /* this is a 32 byte descriptor */
1862 rdlen = adapter->rx_ring[0].count *
1863 sizeof(union e1000_rx_desc_packet_split);
1864 adapter->clean_rx = e1000_clean_rx_irq_ps;
1865 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1866 } else {
1867 rdlen = adapter->rx_ring[0].count *
1868 sizeof(struct e1000_rx_desc);
1869 adapter->clean_rx = e1000_clean_rx_irq;
1870 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1871 }
1872
1873 /* disable receives while setting up the descriptors */
1874 rctl = E1000_READ_REG(hw, RCTL);
1875 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1876
1877 /* set the Receive Delay Timer Register */
1878 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1879
1880 if (hw->mac_type >= e1000_82540) {
1881 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1882 if (adapter->itr > 1)
1883 E1000_WRITE_REG(hw, ITR,
1884 1000000000 / (adapter->itr * 256));
1885 }
1886
1887 if (hw->mac_type >= e1000_82571) {
1888 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1889 /* Reset delay timers after every interrupt */
1890 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1891 #ifdef CONFIG_E1000_NAPI
1892 /* Auto-Mask interrupts upon ICR read. */
1893 ctrl_ext |= E1000_CTRL_EXT_IAME;
1894 #endif
1895 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1896 E1000_WRITE_REG(hw, IAM, ~0);
1897 E1000_WRITE_FLUSH(hw);
1898 }
1899
1900 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1901 * the Base and Length of the Rx Descriptor Ring */
1902 switch (adapter->num_rx_queues) {
1903 case 1:
1904 default:
1905 rdba = adapter->rx_ring[0].dma;
1906 E1000_WRITE_REG(hw, RDLEN, rdlen);
1907 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1908 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1909 E1000_WRITE_REG(hw, RDT, 0);
1910 E1000_WRITE_REG(hw, RDH, 0);
1911 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1912 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1913 break;
1914 }
1915
1916 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1917 if (hw->mac_type >= e1000_82543) {
1918 rxcsum = E1000_READ_REG(hw, RXCSUM);
1919 if (adapter->rx_csum == TRUE) {
1920 rxcsum |= E1000_RXCSUM_TUOFL;
1921
1922 /* Enable 82571 IPv4 payload checksum for UDP fragments
1923 * Must be used in conjunction with packet-split. */
1924 if ((hw->mac_type >= e1000_82571) &&
1925 (adapter->rx_ps_pages)) {
1926 rxcsum |= E1000_RXCSUM_IPPCSE;
1927 }
1928 } else {
1929 rxcsum &= ~E1000_RXCSUM_TUOFL;
1930 /* don't need to clear IPPCSE as it defaults to 0 */
1931 }
1932 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1933 }
1934
1935 /* Enable Receives */
1936 E1000_WRITE_REG(hw, RCTL, rctl);
1937 }
1938
1939 /**
1940 * e1000_free_tx_resources - Free Tx Resources per Queue
1941 * @adapter: board private structure
1942 * @tx_ring: Tx descriptor ring for a specific queue
1943 *
1944 * Free all transmit software resources
1945 **/
1946
1947 static void
1948 e1000_free_tx_resources(struct e1000_adapter *adapter,
1949 struct e1000_tx_ring *tx_ring)
1950 {
1951 struct pci_dev *pdev = adapter->pdev;
1952
1953 e1000_clean_tx_ring(adapter, tx_ring);
1954
1955 vfree(tx_ring->buffer_info);
1956 tx_ring->buffer_info = NULL;
1957
1958 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1959
1960 tx_ring->desc = NULL;
1961 }
1962
1963 /**
1964 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1965 * @adapter: board private structure
1966 *
1967 * Free all transmit software resources
1968 **/
1969
1970 void
1971 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1972 {
1973 int i;
1974
1975 for (i = 0; i < adapter->num_tx_queues; i++)
1976 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1977 }
1978
1979 static void
1980 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1981 struct e1000_buffer *buffer_info)
1982 {
1983 if (buffer_info->dma) {
1984 pci_unmap_page(adapter->pdev,
1985 buffer_info->dma,
1986 buffer_info->length,
1987 PCI_DMA_TODEVICE);
1988 }
1989 if (buffer_info->skb)
1990 dev_kfree_skb_any(buffer_info->skb);
1991 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1992 }
1993
1994 /**
1995 * e1000_clean_tx_ring - Free Tx Buffers
1996 * @adapter: board private structure
1997 * @tx_ring: ring to be cleaned
1998 **/
1999
2000 static void
2001 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2002 struct e1000_tx_ring *tx_ring)
2003 {
2004 struct e1000_buffer *buffer_info;
2005 unsigned long size;
2006 unsigned int i;
2007
2008 /* Free all the Tx ring sk_buffs */
2009
2010 for (i = 0; i < tx_ring->count; i++) {
2011 buffer_info = &tx_ring->buffer_info[i];
2012 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2013 }
2014
2015 size = sizeof(struct e1000_buffer) * tx_ring->count;
2016 memset(tx_ring->buffer_info, 0, size);
2017
2018 /* Zero out the descriptor ring */
2019
2020 memset(tx_ring->desc, 0, tx_ring->size);
2021
2022 tx_ring->next_to_use = 0;
2023 tx_ring->next_to_clean = 0;
2024 tx_ring->last_tx_tso = 0;
2025
2026 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2027 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2028 }
2029
2030 /**
2031 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2032 * @adapter: board private structure
2033 **/
2034
2035 static void
2036 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2037 {
2038 int i;
2039
2040 for (i = 0; i < adapter->num_tx_queues; i++)
2041 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2042 }
2043
2044 /**
2045 * e1000_free_rx_resources - Free Rx Resources
2046 * @adapter: board private structure
2047 * @rx_ring: ring to clean the resources from
2048 *
2049 * Free all receive software resources
2050 **/
2051
2052 static void
2053 e1000_free_rx_resources(struct e1000_adapter *adapter,
2054 struct e1000_rx_ring *rx_ring)
2055 {
2056 struct pci_dev *pdev = adapter->pdev;
2057
2058 e1000_clean_rx_ring(adapter, rx_ring);
2059
2060 vfree(rx_ring->buffer_info);
2061 rx_ring->buffer_info = NULL;
2062 kfree(rx_ring->ps_page);
2063 rx_ring->ps_page = NULL;
2064 kfree(rx_ring->ps_page_dma);
2065 rx_ring->ps_page_dma = NULL;
2066
2067 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2068
2069 rx_ring->desc = NULL;
2070 }
2071
2072 /**
2073 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2074 * @adapter: board private structure
2075 *
2076 * Free all receive software resources
2077 **/
2078
2079 void
2080 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2081 {
2082 int i;
2083
2084 for (i = 0; i < adapter->num_rx_queues; i++)
2085 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2086 }
2087
2088 /**
2089 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2090 * @adapter: board private structure
2091 * @rx_ring: ring to free buffers from
2092 **/
2093
2094 static void
2095 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2096 struct e1000_rx_ring *rx_ring)
2097 {
2098 struct e1000_buffer *buffer_info;
2099 struct e1000_ps_page *ps_page;
2100 struct e1000_ps_page_dma *ps_page_dma;
2101 struct pci_dev *pdev = adapter->pdev;
2102 unsigned long size;
2103 unsigned int i, j;
2104
2105 /* Free all the Rx ring sk_buffs */
2106 for (i = 0; i < rx_ring->count; i++) {
2107 buffer_info = &rx_ring->buffer_info[i];
2108 if (buffer_info->skb) {
2109 pci_unmap_single(pdev,
2110 buffer_info->dma,
2111 buffer_info->length,
2112 PCI_DMA_FROMDEVICE);
2113
2114 dev_kfree_skb(buffer_info->skb);
2115 buffer_info->skb = NULL;
2116 }
2117 ps_page = &rx_ring->ps_page[i];
2118 ps_page_dma = &rx_ring->ps_page_dma[i];
2119 for (j = 0; j < adapter->rx_ps_pages; j++) {
2120 if (!ps_page->ps_page[j]) break;
2121 pci_unmap_page(pdev,
2122 ps_page_dma->ps_page_dma[j],
2123 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2124 ps_page_dma->ps_page_dma[j] = 0;
2125 put_page(ps_page->ps_page[j]);
2126 ps_page->ps_page[j] = NULL;
2127 }
2128 }
2129
2130 size = sizeof(struct e1000_buffer) * rx_ring->count;
2131 memset(rx_ring->buffer_info, 0, size);
2132 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2133 memset(rx_ring->ps_page, 0, size);
2134 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2135 memset(rx_ring->ps_page_dma, 0, size);
2136
2137 /* Zero out the descriptor ring */
2138
2139 memset(rx_ring->desc, 0, rx_ring->size);
2140
2141 rx_ring->next_to_clean = 0;
2142 rx_ring->next_to_use = 0;
2143
2144 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2145 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2146 }
2147
2148 /**
2149 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2150 * @adapter: board private structure
2151 **/
2152
2153 static void
2154 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2155 {
2156 int i;
2157
2158 for (i = 0; i < adapter->num_rx_queues; i++)
2159 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2160 }
2161
2162 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2163 * and memory write and invalidate disabled for certain operations
2164 */
2165 static void
2166 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2167 {
2168 struct net_device *netdev = adapter->netdev;
2169 uint32_t rctl;
2170
2171 e1000_pci_clear_mwi(&adapter->hw);
2172
2173 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2174 rctl |= E1000_RCTL_RST;
2175 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2176 E1000_WRITE_FLUSH(&adapter->hw);
2177 mdelay(5);
2178
2179 if (netif_running(netdev))
2180 e1000_clean_all_rx_rings(adapter);
2181 }
2182
2183 static void
2184 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2185 {
2186 struct net_device *netdev = adapter->netdev;
2187 uint32_t rctl;
2188
2189 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2190 rctl &= ~E1000_RCTL_RST;
2191 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2192 E1000_WRITE_FLUSH(&adapter->hw);
2193 mdelay(5);
2194
2195 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2196 e1000_pci_set_mwi(&adapter->hw);
2197
2198 if (netif_running(netdev)) {
2199 /* No need to loop, because 82542 supports only 1 queue */
2200 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2201 e1000_configure_rx(adapter);
2202 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2203 }
2204 }
2205
2206 /**
2207 * e1000_set_mac - Change the Ethernet Address of the NIC
2208 * @netdev: network interface device structure
2209 * @p: pointer to an address structure
2210 *
2211 * Returns 0 on success, negative on failure
2212 **/
2213
2214 static int
2215 e1000_set_mac(struct net_device *netdev, void *p)
2216 {
2217 struct e1000_adapter *adapter = netdev_priv(netdev);
2218 struct sockaddr *addr = p;
2219
2220 if (!is_valid_ether_addr(addr->sa_data))
2221 return -EADDRNOTAVAIL;
2222
2223 /* 82542 2.0 needs to be in reset to write receive address registers */
2224
2225 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2226 e1000_enter_82542_rst(adapter);
2227
2228 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2229 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2230
2231 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2232
2233 /* With 82571 controllers, LAA may be overwritten (with the default)
2234 * due to controller reset from the other port. */
2235 if (adapter->hw.mac_type == e1000_82571) {
2236 /* activate the work around */
2237 adapter->hw.laa_is_present = 1;
2238
2239 /* Hold a copy of the LAA in RAR[14] This is done so that
2240 * between the time RAR[0] gets clobbered and the time it
2241 * gets fixed (in e1000_watchdog), the actual LAA is in one
2242 * of the RARs and no incoming packets directed to this port
2243 * are dropped. Eventaully the LAA will be in RAR[0] and
2244 * RAR[14] */
2245 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2246 E1000_RAR_ENTRIES - 1);
2247 }
2248
2249 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2250 e1000_leave_82542_rst(adapter);
2251
2252 return 0;
2253 }
2254
2255 /**
2256 * e1000_set_multi - Multicast and Promiscuous mode set
2257 * @netdev: network interface device structure
2258 *
2259 * The set_multi entry point is called whenever the multicast address
2260 * list or the network interface flags are updated. This routine is
2261 * responsible for configuring the hardware for proper multicast,
2262 * promiscuous mode, and all-multi behavior.
2263 **/
2264
2265 static void
2266 e1000_set_multi(struct net_device *netdev)
2267 {
2268 struct e1000_adapter *adapter = netdev_priv(netdev);
2269 struct e1000_hw *hw = &adapter->hw;
2270 struct dev_mc_list *mc_ptr;
2271 uint32_t rctl;
2272 uint32_t hash_value;
2273 int i, rar_entries = E1000_RAR_ENTRIES;
2274 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2275 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2276 E1000_NUM_MTA_REGISTERS;
2277
2278 if (adapter->hw.mac_type == e1000_ich8lan)
2279 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2280
2281 /* reserve RAR[14] for LAA over-write work-around */
2282 if (adapter->hw.mac_type == e1000_82571)
2283 rar_entries--;
2284
2285 /* Check for Promiscuous and All Multicast modes */
2286
2287 rctl = E1000_READ_REG(hw, RCTL);
2288
2289 if (netdev->flags & IFF_PROMISC) {
2290 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2291 } else if (netdev->flags & IFF_ALLMULTI) {
2292 rctl |= E1000_RCTL_MPE;
2293 rctl &= ~E1000_RCTL_UPE;
2294 } else {
2295 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2296 }
2297
2298 E1000_WRITE_REG(hw, RCTL, rctl);
2299
2300 /* 82542 2.0 needs to be in reset to write receive address registers */
2301
2302 if (hw->mac_type == e1000_82542_rev2_0)
2303 e1000_enter_82542_rst(adapter);
2304
2305 /* load the first 14 multicast address into the exact filters 1-14
2306 * RAR 0 is used for the station MAC adddress
2307 * if there are not 14 addresses, go ahead and clear the filters
2308 * -- with 82571 controllers only 0-13 entries are filled here
2309 */
2310 mc_ptr = netdev->mc_list;
2311
2312 for (i = 1; i < rar_entries; i++) {
2313 if (mc_ptr) {
2314 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2315 mc_ptr = mc_ptr->next;
2316 } else {
2317 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2318 E1000_WRITE_FLUSH(hw);
2319 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2320 E1000_WRITE_FLUSH(hw);
2321 }
2322 }
2323
2324 /* clear the old settings from the multicast hash table */
2325
2326 for (i = 0; i < mta_reg_count; i++) {
2327 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2328 E1000_WRITE_FLUSH(hw);
2329 }
2330
2331 /* load any remaining addresses into the hash table */
2332
2333 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2334 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2335 e1000_mta_set(hw, hash_value);
2336 }
2337
2338 if (hw->mac_type == e1000_82542_rev2_0)
2339 e1000_leave_82542_rst(adapter);
2340 }
2341
2342 /* Need to wait a few seconds after link up to get diagnostic information from
2343 * the phy */
2344
2345 static void
2346 e1000_update_phy_info(unsigned long data)
2347 {
2348 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2349 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2350 }
2351
2352 /**
2353 * e1000_82547_tx_fifo_stall - Timer Call-back
2354 * @data: pointer to adapter cast into an unsigned long
2355 **/
2356
2357 static void
2358 e1000_82547_tx_fifo_stall(unsigned long data)
2359 {
2360 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2361 struct net_device *netdev = adapter->netdev;
2362 uint32_t tctl;
2363
2364 if (atomic_read(&adapter->tx_fifo_stall)) {
2365 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2366 E1000_READ_REG(&adapter->hw, TDH)) &&
2367 (E1000_READ_REG(&adapter->hw, TDFT) ==
2368 E1000_READ_REG(&adapter->hw, TDFH)) &&
2369 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2370 E1000_READ_REG(&adapter->hw, TDFHS))) {
2371 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2372 E1000_WRITE_REG(&adapter->hw, TCTL,
2373 tctl & ~E1000_TCTL_EN);
2374 E1000_WRITE_REG(&adapter->hw, TDFT,
2375 adapter->tx_head_addr);
2376 E1000_WRITE_REG(&adapter->hw, TDFH,
2377 adapter->tx_head_addr);
2378 E1000_WRITE_REG(&adapter->hw, TDFTS,
2379 adapter->tx_head_addr);
2380 E1000_WRITE_REG(&adapter->hw, TDFHS,
2381 adapter->tx_head_addr);
2382 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2383 E1000_WRITE_FLUSH(&adapter->hw);
2384
2385 adapter->tx_fifo_head = 0;
2386 atomic_set(&adapter->tx_fifo_stall, 0);
2387 netif_wake_queue(netdev);
2388 } else {
2389 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2390 }
2391 }
2392 }
2393
2394 /**
2395 * e1000_watchdog - Timer Call-back
2396 * @data: pointer to adapter cast into an unsigned long
2397 **/
2398 static void
2399 e1000_watchdog(unsigned long data)
2400 {
2401 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2402 struct net_device *netdev = adapter->netdev;
2403 struct e1000_tx_ring *txdr = adapter->tx_ring;
2404 uint32_t link, tctl;
2405 int32_t ret_val;
2406
2407 ret_val = e1000_check_for_link(&adapter->hw);
2408 if ((ret_val == E1000_ERR_PHY) &&
2409 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2410 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2411 /* See e1000_kumeran_lock_loss_workaround() */
2412 DPRINTK(LINK, INFO,
2413 "Gigabit has been disabled, downgrading speed\n");
2414 }
2415 if (adapter->hw.mac_type == e1000_82573) {
2416 e1000_enable_tx_pkt_filtering(&adapter->hw);
2417 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2418 e1000_update_mng_vlan(adapter);
2419 }
2420
2421 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2422 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2423 link = !adapter->hw.serdes_link_down;
2424 else
2425 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2426
2427 if (link) {
2428 if (!netif_carrier_ok(netdev)) {
2429 boolean_t txb2b = 1;
2430 e1000_get_speed_and_duplex(&adapter->hw,
2431 &adapter->link_speed,
2432 &adapter->link_duplex);
2433
2434 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2435 adapter->link_speed,
2436 adapter->link_duplex == FULL_DUPLEX ?
2437 "Full Duplex" : "Half Duplex");
2438
2439 /* tweak tx_queue_len according to speed/duplex
2440 * and adjust the timeout factor */
2441 netdev->tx_queue_len = adapter->tx_queue_len;
2442 adapter->tx_timeout_factor = 1;
2443 switch (adapter->link_speed) {
2444 case SPEED_10:
2445 txb2b = 0;
2446 netdev->tx_queue_len = 10;
2447 adapter->tx_timeout_factor = 8;
2448 break;
2449 case SPEED_100:
2450 txb2b = 0;
2451 netdev->tx_queue_len = 100;
2452 /* maybe add some timeout factor ? */
2453 break;
2454 }
2455
2456 if ((adapter->hw.mac_type == e1000_82571 ||
2457 adapter->hw.mac_type == e1000_82572) &&
2458 txb2b == 0) {
2459 #define SPEED_MODE_BIT (1 << 21)
2460 uint32_t tarc0;
2461 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2462 tarc0 &= ~SPEED_MODE_BIT;
2463 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2464 }
2465
2466 #ifdef NETIF_F_TSO
2467 /* disable TSO for pcie and 10/100 speeds, to avoid
2468 * some hardware issues */
2469 if (!adapter->tso_force &&
2470 adapter->hw.bus_type == e1000_bus_type_pci_express){
2471 switch (adapter->link_speed) {
2472 case SPEED_10:
2473 case SPEED_100:
2474 DPRINTK(PROBE,INFO,
2475 "10/100 speed: disabling TSO\n");
2476 netdev->features &= ~NETIF_F_TSO;
2477 break;
2478 case SPEED_1000:
2479 netdev->features |= NETIF_F_TSO;
2480 break;
2481 default:
2482 /* oops */
2483 break;
2484 }
2485 }
2486 #endif
2487
2488 /* enable transmits in the hardware, need to do this
2489 * after setting TARC0 */
2490 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2491 tctl |= E1000_TCTL_EN;
2492 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2493
2494 netif_carrier_on(netdev);
2495 netif_wake_queue(netdev);
2496 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2497 adapter->smartspeed = 0;
2498 }
2499 } else {
2500 if (netif_carrier_ok(netdev)) {
2501 adapter->link_speed = 0;
2502 adapter->link_duplex = 0;
2503 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2504 netif_carrier_off(netdev);
2505 netif_stop_queue(netdev);
2506 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2507
2508 /* 80003ES2LAN workaround--
2509 * For packet buffer work-around on link down event;
2510 * disable receives in the ISR and
2511 * reset device here in the watchdog
2512 */
2513 if (adapter->hw.mac_type == e1000_80003es2lan)
2514 /* reset device */
2515 schedule_work(&adapter->reset_task);
2516 }
2517
2518 e1000_smartspeed(adapter);
2519 }
2520
2521 e1000_update_stats(adapter);
2522
2523 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2524 adapter->tpt_old = adapter->stats.tpt;
2525 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2526 adapter->colc_old = adapter->stats.colc;
2527
2528 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2529 adapter->gorcl_old = adapter->stats.gorcl;
2530 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2531 adapter->gotcl_old = adapter->stats.gotcl;
2532
2533 e1000_update_adaptive(&adapter->hw);
2534
2535 if (!netif_carrier_ok(netdev)) {
2536 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2537 /* We've lost link, so the controller stops DMA,
2538 * but we've got queued Tx work that's never going
2539 * to get done, so reset controller to flush Tx.
2540 * (Do the reset outside of interrupt context). */
2541 adapter->tx_timeout_count++;
2542 schedule_work(&adapter->reset_task);
2543 }
2544 }
2545
2546 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2547 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2548 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2549 * asymmetrical Tx or Rx gets ITR=8000; everyone
2550 * else is between 2000-8000. */
2551 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2552 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2553 adapter->gotcl - adapter->gorcl :
2554 adapter->gorcl - adapter->gotcl) / 10000;
2555 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2556 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2557 }
2558
2559 /* Cause software interrupt to ensure rx ring is cleaned */
2560 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2561
2562 /* Force detection of hung controller every watchdog period */
2563 adapter->detect_tx_hung = TRUE;
2564
2565 /* With 82571 controllers, LAA may be overwritten due to controller
2566 * reset from the other port. Set the appropriate LAA in RAR[0] */
2567 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2568 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2569
2570 /* Reset the timer */
2571 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2572 }
2573
2574 #define E1000_TX_FLAGS_CSUM 0x00000001
2575 #define E1000_TX_FLAGS_VLAN 0x00000002
2576 #define E1000_TX_FLAGS_TSO 0x00000004
2577 #define E1000_TX_FLAGS_IPV4 0x00000008
2578 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2579 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2580
2581 static int
2582 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2583 struct sk_buff *skb)
2584 {
2585 #ifdef NETIF_F_TSO
2586 struct e1000_context_desc *context_desc;
2587 struct e1000_buffer *buffer_info;
2588 unsigned int i;
2589 uint32_t cmd_length = 0;
2590 uint16_t ipcse = 0, tucse, mss;
2591 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2592 int err;
2593
2594 if (skb_is_gso(skb)) {
2595 if (skb_header_cloned(skb)) {
2596 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2597 if (err)
2598 return err;
2599 }
2600
2601 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2602 mss = skb_shinfo(skb)->gso_size;
2603 if (skb->protocol == htons(ETH_P_IP)) {
2604 skb->nh.iph->tot_len = 0;
2605 skb->nh.iph->check = 0;
2606 skb->h.th->check =
2607 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2608 skb->nh.iph->daddr,
2609 0,
2610 IPPROTO_TCP,
2611 0);
2612 cmd_length = E1000_TXD_CMD_IP;
2613 ipcse = skb->h.raw - skb->data - 1;
2614 #ifdef NETIF_F_TSO_IPV6
2615 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2616 skb->nh.ipv6h->payload_len = 0;
2617 skb->h.th->check =
2618 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2619 &skb->nh.ipv6h->daddr,
2620 0,
2621 IPPROTO_TCP,
2622 0);
2623 ipcse = 0;
2624 #endif
2625 }
2626 ipcss = skb->nh.raw - skb->data;
2627 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2628 tucss = skb->h.raw - skb->data;
2629 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2630 tucse = 0;
2631
2632 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2633 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2634
2635 i = tx_ring->next_to_use;
2636 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2637 buffer_info = &tx_ring->buffer_info[i];
2638
2639 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2640 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2641 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2642 context_desc->upper_setup.tcp_fields.tucss = tucss;
2643 context_desc->upper_setup.tcp_fields.tucso = tucso;
2644 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2645 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2646 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2647 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2648
2649 buffer_info->time_stamp = jiffies;
2650
2651 if (++i == tx_ring->count) i = 0;
2652 tx_ring->next_to_use = i;
2653
2654 return TRUE;
2655 }
2656 #endif
2657
2658 return FALSE;
2659 }
2660
2661 static boolean_t
2662 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2663 struct sk_buff *skb)
2664 {
2665 struct e1000_context_desc *context_desc;
2666 struct e1000_buffer *buffer_info;
2667 unsigned int i;
2668 uint8_t css;
2669
2670 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2671 css = skb->h.raw - skb->data;
2672
2673 i = tx_ring->next_to_use;
2674 buffer_info = &tx_ring->buffer_info[i];
2675 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2676
2677 context_desc->upper_setup.tcp_fields.tucss = css;
2678 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2679 context_desc->upper_setup.tcp_fields.tucse = 0;
2680 context_desc->tcp_seg_setup.data = 0;
2681 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2682
2683 buffer_info->time_stamp = jiffies;
2684
2685 if (unlikely(++i == tx_ring->count)) i = 0;
2686 tx_ring->next_to_use = i;
2687
2688 return TRUE;
2689 }
2690
2691 return FALSE;
2692 }
2693
2694 #define E1000_MAX_TXD_PWR 12
2695 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2696
2697 static int
2698 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2699 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2700 unsigned int nr_frags, unsigned int mss)
2701 {
2702 struct e1000_buffer *buffer_info;
2703 unsigned int len = skb->len;
2704 unsigned int offset = 0, size, count = 0, i;
2705 unsigned int f;
2706 len -= skb->data_len;
2707
2708 i = tx_ring->next_to_use;
2709
2710 while (len) {
2711 buffer_info = &tx_ring->buffer_info[i];
2712 size = min(len, max_per_txd);
2713 #ifdef NETIF_F_TSO
2714 /* Workaround for Controller erratum --
2715 * descriptor for non-tso packet in a linear SKB that follows a
2716 * tso gets written back prematurely before the data is fully
2717 * DMA'd to the controller */
2718 if (!skb->data_len && tx_ring->last_tx_tso &&
2719 !skb_is_gso(skb)) {
2720 tx_ring->last_tx_tso = 0;
2721 size -= 4;
2722 }
2723
2724 /* Workaround for premature desc write-backs
2725 * in TSO mode. Append 4-byte sentinel desc */
2726 if (unlikely(mss && !nr_frags && size == len && size > 8))
2727 size -= 4;
2728 #endif
2729 /* work-around for errata 10 and it applies
2730 * to all controllers in PCI-X mode
2731 * The fix is to make sure that the first descriptor of a
2732 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2733 */
2734 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2735 (size > 2015) && count == 0))
2736 size = 2015;
2737
2738 /* Workaround for potential 82544 hang in PCI-X. Avoid
2739 * terminating buffers within evenly-aligned dwords. */
2740 if (unlikely(adapter->pcix_82544 &&
2741 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2742 size > 4))
2743 size -= 4;
2744
2745 buffer_info->length = size;
2746 buffer_info->dma =
2747 pci_map_single(adapter->pdev,
2748 skb->data + offset,
2749 size,
2750 PCI_DMA_TODEVICE);
2751 buffer_info->time_stamp = jiffies;
2752
2753 len -= size;
2754 offset += size;
2755 count++;
2756 if (unlikely(++i == tx_ring->count)) i = 0;
2757 }
2758
2759 for (f = 0; f < nr_frags; f++) {
2760 struct skb_frag_struct *frag;
2761
2762 frag = &skb_shinfo(skb)->frags[f];
2763 len = frag->size;
2764 offset = frag->page_offset;
2765
2766 while (len) {
2767 buffer_info = &tx_ring->buffer_info[i];
2768 size = min(len, max_per_txd);
2769 #ifdef NETIF_F_TSO
2770 /* Workaround for premature desc write-backs
2771 * in TSO mode. Append 4-byte sentinel desc */
2772 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2773 size -= 4;
2774 #endif
2775 /* Workaround for potential 82544 hang in PCI-X.
2776 * Avoid terminating buffers within evenly-aligned
2777 * dwords. */
2778 if (unlikely(adapter->pcix_82544 &&
2779 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2780 size > 4))
2781 size -= 4;
2782
2783 buffer_info->length = size;
2784 buffer_info->dma =
2785 pci_map_page(adapter->pdev,
2786 frag->page,
2787 offset,
2788 size,
2789 PCI_DMA_TODEVICE);
2790 buffer_info->time_stamp = jiffies;
2791
2792 len -= size;
2793 offset += size;
2794 count++;
2795 if (unlikely(++i == tx_ring->count)) i = 0;
2796 }
2797 }
2798
2799 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2800 tx_ring->buffer_info[i].skb = skb;
2801 tx_ring->buffer_info[first].next_to_watch = i;
2802
2803 return count;
2804 }
2805
2806 static void
2807 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2808 int tx_flags, int count)
2809 {
2810 struct e1000_tx_desc *tx_desc = NULL;
2811 struct e1000_buffer *buffer_info;
2812 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2813 unsigned int i;
2814
2815 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2816 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2817 E1000_TXD_CMD_TSE;
2818 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2819
2820 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2821 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2822 }
2823
2824 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2825 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2826 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2827 }
2828
2829 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2830 txd_lower |= E1000_TXD_CMD_VLE;
2831 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2832 }
2833
2834 i = tx_ring->next_to_use;
2835
2836 while (count--) {
2837 buffer_info = &tx_ring->buffer_info[i];
2838 tx_desc = E1000_TX_DESC(*tx_ring, i);
2839 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2840 tx_desc->lower.data =
2841 cpu_to_le32(txd_lower | buffer_info->length);
2842 tx_desc->upper.data = cpu_to_le32(txd_upper);
2843 if (unlikely(++i == tx_ring->count)) i = 0;
2844 }
2845
2846 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2847
2848 /* Force memory writes to complete before letting h/w
2849 * know there are new descriptors to fetch. (Only
2850 * applicable for weak-ordered memory model archs,
2851 * such as IA-64). */
2852 wmb();
2853
2854 tx_ring->next_to_use = i;
2855 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2856 }
2857
2858 /**
2859 * 82547 workaround to avoid controller hang in half-duplex environment.
2860 * The workaround is to avoid queuing a large packet that would span
2861 * the internal Tx FIFO ring boundary by notifying the stack to resend
2862 * the packet at a later time. This gives the Tx FIFO an opportunity to
2863 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2864 * to the beginning of the Tx FIFO.
2865 **/
2866
2867 #define E1000_FIFO_HDR 0x10
2868 #define E1000_82547_PAD_LEN 0x3E0
2869
2870 static int
2871 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2872 {
2873 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2874 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2875
2876 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2877
2878 if (adapter->link_duplex != HALF_DUPLEX)
2879 goto no_fifo_stall_required;
2880
2881 if (atomic_read(&adapter->tx_fifo_stall))
2882 return 1;
2883
2884 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2885 atomic_set(&adapter->tx_fifo_stall, 1);
2886 return 1;
2887 }
2888
2889 no_fifo_stall_required:
2890 adapter->tx_fifo_head += skb_fifo_len;
2891 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2892 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2893 return 0;
2894 }
2895
2896 #define MINIMUM_DHCP_PACKET_SIZE 282
2897 static int
2898 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2899 {
2900 struct e1000_hw *hw = &adapter->hw;
2901 uint16_t length, offset;
2902 if (vlan_tx_tag_present(skb)) {
2903 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2904 ( adapter->hw.mng_cookie.status &
2905 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2906 return 0;
2907 }
2908 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2909 struct ethhdr *eth = (struct ethhdr *) skb->data;
2910 if ((htons(ETH_P_IP) == eth->h_proto)) {
2911 const struct iphdr *ip =
2912 (struct iphdr *)((uint8_t *)skb->data+14);
2913 if (IPPROTO_UDP == ip->protocol) {
2914 struct udphdr *udp =
2915 (struct udphdr *)((uint8_t *)ip +
2916 (ip->ihl << 2));
2917 if (ntohs(udp->dest) == 67) {
2918 offset = (uint8_t *)udp + 8 - skb->data;
2919 length = skb->len - offset;
2920
2921 return e1000_mng_write_dhcp_info(hw,
2922 (uint8_t *)udp + 8,
2923 length);
2924 }
2925 }
2926 }
2927 }
2928 return 0;
2929 }
2930
2931 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2932 {
2933 struct e1000_adapter *adapter = netdev_priv(netdev);
2934 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2935
2936 netif_stop_queue(netdev);
2937 /* Herbert's original patch had:
2938 * smp_mb__after_netif_stop_queue();
2939 * but since that doesn't exist yet, just open code it. */
2940 smp_mb();
2941
2942 /* We need to check again in a case another CPU has just
2943 * made room available. */
2944 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2945 return -EBUSY;
2946
2947 /* A reprieve! */
2948 netif_start_queue(netdev);
2949 return 0;
2950 }
2951
2952 static int e1000_maybe_stop_tx(struct net_device *netdev,
2953 struct e1000_tx_ring *tx_ring, int size)
2954 {
2955 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2956 return 0;
2957 return __e1000_maybe_stop_tx(netdev, size);
2958 }
2959
2960 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2961 static int
2962 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2963 {
2964 struct e1000_adapter *adapter = netdev_priv(netdev);
2965 struct e1000_tx_ring *tx_ring;
2966 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2967 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2968 unsigned int tx_flags = 0;
2969 unsigned int len = skb->len;
2970 unsigned long flags;
2971 unsigned int nr_frags = 0;
2972 unsigned int mss = 0;
2973 int count = 0;
2974 int tso;
2975 unsigned int f;
2976 len -= skb->data_len;
2977
2978 /* This goes back to the question of how to logically map a tx queue
2979 * to a flow. Right now, performance is impacted slightly negatively
2980 * if using multiple tx queues. If the stack breaks away from a
2981 * single qdisc implementation, we can look at this again. */
2982 tx_ring = adapter->tx_ring;
2983
2984 if (unlikely(skb->len <= 0)) {
2985 dev_kfree_skb_any(skb);
2986 return NETDEV_TX_OK;
2987 }
2988
2989 #ifdef NETIF_F_TSO
2990 mss = skb_shinfo(skb)->gso_size;
2991 /* The controller does a simple calculation to
2992 * make sure there is enough room in the FIFO before
2993 * initiating the DMA for each buffer. The calc is:
2994 * 4 = ceil(buffer len/mss). To make sure we don't
2995 * overrun the FIFO, adjust the max buffer len if mss
2996 * drops. */
2997 if (mss) {
2998 uint8_t hdr_len;
2999 max_per_txd = min(mss << 2, max_per_txd);
3000 max_txd_pwr = fls(max_per_txd) - 1;
3001
3002 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3003 * points to just header, pull a few bytes of payload from
3004 * frags into skb->data */
3005 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3006 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3007 switch (adapter->hw.mac_type) {
3008 unsigned int pull_size;
3009 case e1000_82571:
3010 case e1000_82572:
3011 case e1000_82573:
3012 case e1000_ich8lan:
3013 pull_size = min((unsigned int)4, skb->data_len);
3014 if (!__pskb_pull_tail(skb, pull_size)) {
3015 DPRINTK(DRV, ERR,
3016 "__pskb_pull_tail failed.\n");
3017 dev_kfree_skb_any(skb);
3018 return NETDEV_TX_OK;
3019 }
3020 len = skb->len - skb->data_len;
3021 break;
3022 default:
3023 /* do nothing */
3024 break;
3025 }
3026 }
3027 }
3028
3029 /* reserve a descriptor for the offload context */
3030 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3031 count++;
3032 count++;
3033 #else
3034 if (skb->ip_summed == CHECKSUM_PARTIAL)
3035 count++;
3036 #endif
3037
3038 #ifdef NETIF_F_TSO
3039 /* Controller Erratum workaround */
3040 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3041 count++;
3042 #endif
3043
3044 count += TXD_USE_COUNT(len, max_txd_pwr);
3045
3046 if (adapter->pcix_82544)
3047 count++;
3048
3049 /* work-around for errata 10 and it applies to all controllers
3050 * in PCI-X mode, so add one more descriptor to the count
3051 */
3052 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3053 (len > 2015)))
3054 count++;
3055
3056 nr_frags = skb_shinfo(skb)->nr_frags;
3057 for (f = 0; f < nr_frags; f++)
3058 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3059 max_txd_pwr);
3060 if (adapter->pcix_82544)
3061 count += nr_frags;
3062
3063
3064 if (adapter->hw.tx_pkt_filtering &&
3065 (adapter->hw.mac_type == e1000_82573))
3066 e1000_transfer_dhcp_info(adapter, skb);
3067
3068 local_irq_save(flags);
3069 if (!spin_trylock(&tx_ring->tx_lock)) {
3070 /* Collision - tell upper layer to requeue */
3071 local_irq_restore(flags);
3072 return NETDEV_TX_LOCKED;
3073 }
3074
3075 /* need: count + 2 desc gap to keep tail from touching
3076 * head, otherwise try next time */
3077 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3078 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3079 return NETDEV_TX_BUSY;
3080 }
3081
3082 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3083 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3084 netif_stop_queue(netdev);
3085 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3086 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3087 return NETDEV_TX_BUSY;
3088 }
3089 }
3090
3091 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3092 tx_flags |= E1000_TX_FLAGS_VLAN;
3093 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3094 }
3095
3096 first = tx_ring->next_to_use;
3097
3098 tso = e1000_tso(adapter, tx_ring, skb);
3099 if (tso < 0) {
3100 dev_kfree_skb_any(skb);
3101 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3102 return NETDEV_TX_OK;
3103 }
3104
3105 if (likely(tso)) {
3106 tx_ring->last_tx_tso = 1;
3107 tx_flags |= E1000_TX_FLAGS_TSO;
3108 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3109 tx_flags |= E1000_TX_FLAGS_CSUM;
3110
3111 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3112 * 82571 hardware supports TSO capabilities for IPv6 as well...
3113 * no longer assume, we must. */
3114 if (likely(skb->protocol == htons(ETH_P_IP)))
3115 tx_flags |= E1000_TX_FLAGS_IPV4;
3116
3117 e1000_tx_queue(adapter, tx_ring, tx_flags,
3118 e1000_tx_map(adapter, tx_ring, skb, first,
3119 max_per_txd, nr_frags, mss));
3120
3121 netdev->trans_start = jiffies;
3122
3123 /* Make sure there is space in the ring for the next send. */
3124 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3125
3126 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3127 return NETDEV_TX_OK;
3128 }
3129
3130 /**
3131 * e1000_tx_timeout - Respond to a Tx Hang
3132 * @netdev: network interface device structure
3133 **/
3134
3135 static void
3136 e1000_tx_timeout(struct net_device *netdev)
3137 {
3138 struct e1000_adapter *adapter = netdev_priv(netdev);
3139
3140 /* Do the reset outside of interrupt context */
3141 adapter->tx_timeout_count++;
3142 schedule_work(&adapter->reset_task);
3143 }
3144
3145 static void
3146 e1000_reset_task(struct net_device *netdev)
3147 {
3148 struct e1000_adapter *adapter = netdev_priv(netdev);
3149
3150 e1000_reinit_locked(adapter);
3151 }
3152
3153 /**
3154 * e1000_get_stats - Get System Network Statistics
3155 * @netdev: network interface device structure
3156 *
3157 * Returns the address of the device statistics structure.
3158 * The statistics are actually updated from the timer callback.
3159 **/
3160
3161 static struct net_device_stats *
3162 e1000_get_stats(struct net_device *netdev)
3163 {
3164 struct e1000_adapter *adapter = netdev_priv(netdev);
3165
3166 /* only return the current stats */
3167 return &adapter->net_stats;
3168 }
3169
3170 /**
3171 * e1000_change_mtu - Change the Maximum Transfer Unit
3172 * @netdev: network interface device structure
3173 * @new_mtu: new value for maximum frame size
3174 *
3175 * Returns 0 on success, negative on failure
3176 **/
3177
3178 static int
3179 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3180 {
3181 struct e1000_adapter *adapter = netdev_priv(netdev);
3182 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3183 uint16_t eeprom_data = 0;
3184
3185 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3186 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3187 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3188 return -EINVAL;
3189 }
3190
3191 /* Adapter-specific max frame size limits. */
3192 switch (adapter->hw.mac_type) {
3193 case e1000_undefined ... e1000_82542_rev2_1:
3194 case e1000_ich8lan:
3195 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3196 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3197 return -EINVAL;
3198 }
3199 break;
3200 case e1000_82573:
3201 /* Jumbo Frames not supported if:
3202 * - this is not an 82573L device
3203 * - ASPM is enabled in any way (0x1A bits 3:2) */
3204 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3205 &eeprom_data);
3206 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3207 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3208 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3209 DPRINTK(PROBE, ERR,
3210 "Jumbo Frames not supported.\n");
3211 return -EINVAL;
3212 }
3213 break;
3214 }
3215 /* ERT will be enabled later to enable wire speed receives */
3216
3217 /* fall through to get support */
3218 case e1000_82571:
3219 case e1000_82572:
3220 case e1000_80003es2lan:
3221 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3222 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3223 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3224 return -EINVAL;
3225 }
3226 break;
3227 default:
3228 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3229 break;
3230 }
3231
3232 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3233 * means we reserve 2 more, this pushes us to allocate from the next
3234 * larger slab size
3235 * i.e. RXBUFFER_2048 --> size-4096 slab */
3236
3237 if (max_frame <= E1000_RXBUFFER_256)
3238 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3239 else if (max_frame <= E1000_RXBUFFER_512)
3240 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3241 else if (max_frame <= E1000_RXBUFFER_1024)
3242 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3243 else if (max_frame <= E1000_RXBUFFER_2048)
3244 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3245 else if (max_frame <= E1000_RXBUFFER_4096)
3246 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3247 else if (max_frame <= E1000_RXBUFFER_8192)
3248 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3249 else if (max_frame <= E1000_RXBUFFER_16384)
3250 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3251
3252 /* adjust allocation if LPE protects us, and we aren't using SBP */
3253 if (!adapter->hw.tbi_compatibility_on &&
3254 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3255 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3256 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3257
3258 netdev->mtu = new_mtu;
3259
3260 if (netif_running(netdev))
3261 e1000_reinit_locked(adapter);
3262
3263 adapter->hw.max_frame_size = max_frame;
3264
3265 return 0;
3266 }
3267
3268 /**
3269 * e1000_update_stats - Update the board statistics counters
3270 * @adapter: board private structure
3271 **/
3272
3273 void
3274 e1000_update_stats(struct e1000_adapter *adapter)
3275 {
3276 struct e1000_hw *hw = &adapter->hw;
3277 struct pci_dev *pdev = adapter->pdev;
3278 unsigned long flags;
3279 uint16_t phy_tmp;
3280
3281 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3282
3283 /*
3284 * Prevent stats update while adapter is being reset, or if the pci
3285 * connection is down.
3286 */
3287 if (adapter->link_speed == 0)
3288 return;
3289 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3290 return;
3291
3292 spin_lock_irqsave(&adapter->stats_lock, flags);
3293
3294 /* these counters are modified from e1000_adjust_tbi_stats,
3295 * called from the interrupt context, so they must only
3296 * be written while holding adapter->stats_lock
3297 */
3298
3299 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3300 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3301 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3302 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3303 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3304 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3305 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3306
3307 if (adapter->hw.mac_type != e1000_ich8lan) {
3308 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3309 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3310 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3311 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3312 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3313 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3314 }
3315
3316 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3317 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3318 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3319 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3320 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3321 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3322 adapter->stats.dc += E1000_READ_REG(hw, DC);
3323 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3324 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3325 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3326 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3327 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3328 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3329 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3330 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3331 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3332 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3333 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3334 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3335 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3336 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3337 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3338 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3339 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3340 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3341 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3342
3343 if (adapter->hw.mac_type != e1000_ich8lan) {
3344 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3345 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3346 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3347 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3348 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3349 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3350 }
3351
3352 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3353 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3354
3355 /* used for adaptive IFS */
3356
3357 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3358 adapter->stats.tpt += hw->tx_packet_delta;
3359 hw->collision_delta = E1000_READ_REG(hw, COLC);
3360 adapter->stats.colc += hw->collision_delta;
3361
3362 if (hw->mac_type >= e1000_82543) {
3363 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3364 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3365 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3366 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3367 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3368 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3369 }
3370 if (hw->mac_type > e1000_82547_rev_2) {
3371 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3372 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3373
3374 if (adapter->hw.mac_type != e1000_ich8lan) {
3375 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3376 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3377 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3378 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3379 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3380 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3381 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3382 }
3383 }
3384
3385 /* Fill out the OS statistics structure */
3386
3387 adapter->net_stats.rx_packets = adapter->stats.gprc;
3388 adapter->net_stats.tx_packets = adapter->stats.gptc;
3389 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3390 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3391 adapter->net_stats.multicast = adapter->stats.mprc;
3392 adapter->net_stats.collisions = adapter->stats.colc;
3393
3394 /* Rx Errors */
3395
3396 /* RLEC on some newer hardware can be incorrect so build
3397 * our own version based on RUC and ROC */
3398 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3399 adapter->stats.crcerrs + adapter->stats.algnerrc +
3400 adapter->stats.ruc + adapter->stats.roc +
3401 adapter->stats.cexterr;
3402 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3403 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3404 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3405 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3406 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3407
3408 /* Tx Errors */
3409 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3410 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3411 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3412 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3413 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3414
3415 /* Tx Dropped needs to be maintained elsewhere */
3416
3417 /* Phy Stats */
3418
3419 if (hw->media_type == e1000_media_type_copper) {
3420 if ((adapter->link_speed == SPEED_1000) &&
3421 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3422 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3423 adapter->phy_stats.idle_errors += phy_tmp;
3424 }
3425
3426 if ((hw->mac_type <= e1000_82546) &&
3427 (hw->phy_type == e1000_phy_m88) &&
3428 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3429 adapter->phy_stats.receive_errors += phy_tmp;
3430 }
3431
3432 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3433 }
3434
3435 /**
3436 * e1000_intr - Interrupt Handler
3437 * @irq: interrupt number
3438 * @data: pointer to a network interface device structure
3439 **/
3440
3441 static irqreturn_t
3442 e1000_intr(int irq, void *data)
3443 {
3444 struct net_device *netdev = data;
3445 struct e1000_adapter *adapter = netdev_priv(netdev);
3446 struct e1000_hw *hw = &adapter->hw;
3447 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3448 #ifndef CONFIG_E1000_NAPI
3449 int i;
3450 #else
3451 /* Interrupt Auto-Mask...upon reading ICR,
3452 * interrupts are masked. No need for the
3453 * IMC write, but it does mean we should
3454 * account for it ASAP. */
3455 if (likely(hw->mac_type >= e1000_82571))
3456 atomic_inc(&adapter->irq_sem);
3457 #endif
3458
3459 if (unlikely(!icr)) {
3460 #ifdef CONFIG_E1000_NAPI
3461 if (hw->mac_type >= e1000_82571)
3462 e1000_irq_enable(adapter);
3463 #endif
3464 return IRQ_NONE; /* Not our interrupt */
3465 }
3466
3467 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3468 hw->get_link_status = 1;
3469 /* 80003ES2LAN workaround--
3470 * For packet buffer work-around on link down event;
3471 * disable receives here in the ISR and
3472 * reset adapter in watchdog
3473 */
3474 if (netif_carrier_ok(netdev) &&
3475 (adapter->hw.mac_type == e1000_80003es2lan)) {
3476 /* disable receives */
3477 rctl = E1000_READ_REG(hw, RCTL);
3478 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3479 }
3480 /* guard against interrupt when we're going down */
3481 if (!test_bit(__E1000_DOWN, &adapter->flags))
3482 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3483 }
3484
3485 #ifdef CONFIG_E1000_NAPI
3486 if (unlikely(hw->mac_type < e1000_82571)) {
3487 atomic_inc(&adapter->irq_sem);
3488 E1000_WRITE_REG(hw, IMC, ~0);
3489 E1000_WRITE_FLUSH(hw);
3490 }
3491 if (likely(netif_rx_schedule_prep(netdev)))
3492 __netif_rx_schedule(netdev);
3493 else
3494 e1000_irq_enable(adapter);
3495 #else
3496 /* Writing IMC and IMS is needed for 82547.
3497 * Due to Hub Link bus being occupied, an interrupt
3498 * de-assertion message is not able to be sent.
3499 * When an interrupt assertion message is generated later,
3500 * two messages are re-ordered and sent out.
3501 * That causes APIC to think 82547 is in de-assertion
3502 * state, while 82547 is in assertion state, resulting
3503 * in dead lock. Writing IMC forces 82547 into
3504 * de-assertion state.
3505 */
3506 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3507 atomic_inc(&adapter->irq_sem);
3508 E1000_WRITE_REG(hw, IMC, ~0);
3509 }
3510
3511 for (i = 0; i < E1000_MAX_INTR; i++)
3512 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3513 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3514 break;
3515
3516 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3517 e1000_irq_enable(adapter);
3518
3519 #endif
3520
3521 return IRQ_HANDLED;
3522 }
3523
3524 #ifdef CONFIG_E1000_NAPI
3525 /**
3526 * e1000_clean - NAPI Rx polling callback
3527 * @adapter: board private structure
3528 **/
3529
3530 static int
3531 e1000_clean(struct net_device *poll_dev, int *budget)
3532 {
3533 struct e1000_adapter *adapter;
3534 int work_to_do = min(*budget, poll_dev->quota);
3535 int tx_cleaned = 0, work_done = 0;
3536
3537 /* Must NOT use netdev_priv macro here. */
3538 adapter = poll_dev->priv;
3539
3540 /* Keep link state information with original netdev */
3541 if (!netif_carrier_ok(poll_dev))
3542 goto quit_polling;
3543
3544 /* e1000_clean is called per-cpu. This lock protects
3545 * tx_ring[0] from being cleaned by multiple cpus
3546 * simultaneously. A failure obtaining the lock means
3547 * tx_ring[0] is currently being cleaned anyway. */
3548 if (spin_trylock(&adapter->tx_queue_lock)) {
3549 tx_cleaned = e1000_clean_tx_irq(adapter,
3550 &adapter->tx_ring[0]);
3551 spin_unlock(&adapter->tx_queue_lock);
3552 }
3553
3554 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3555 &work_done, work_to_do);
3556
3557 *budget -= work_done;
3558 poll_dev->quota -= work_done;
3559
3560 /* If no Tx and not enough Rx work done, exit the polling mode */
3561 if ((!tx_cleaned && (work_done == 0)) ||
3562 !netif_running(poll_dev)) {
3563 quit_polling:
3564 netif_rx_complete(poll_dev);
3565 e1000_irq_enable(adapter);
3566 return 0;
3567 }
3568
3569 return 1;
3570 }
3571
3572 #endif
3573 /**
3574 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3575 * @adapter: board private structure
3576 **/
3577
3578 static boolean_t
3579 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3580 struct e1000_tx_ring *tx_ring)
3581 {
3582 struct net_device *netdev = adapter->netdev;
3583 struct e1000_tx_desc *tx_desc, *eop_desc;
3584 struct e1000_buffer *buffer_info;
3585 unsigned int i, eop;
3586 #ifdef CONFIG_E1000_NAPI
3587 unsigned int count = 0;
3588 #endif
3589 boolean_t cleaned = FALSE;
3590
3591 i = tx_ring->next_to_clean;
3592 eop = tx_ring->buffer_info[i].next_to_watch;
3593 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3594
3595 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3596 for (cleaned = FALSE; !cleaned; ) {
3597 tx_desc = E1000_TX_DESC(*tx_ring, i);
3598 buffer_info = &tx_ring->buffer_info[i];
3599 cleaned = (i == eop);
3600
3601 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3602 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
3603
3604 if (unlikely(++i == tx_ring->count)) i = 0;
3605 }
3606
3607
3608 eop = tx_ring->buffer_info[i].next_to_watch;
3609 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3610 #ifdef CONFIG_E1000_NAPI
3611 #define E1000_TX_WEIGHT 64
3612 /* weight of a sort for tx, to avoid endless transmit cleanup */
3613 if (count++ == E1000_TX_WEIGHT) break;
3614 #endif
3615 }
3616
3617 tx_ring->next_to_clean = i;
3618
3619 #define TX_WAKE_THRESHOLD 32
3620 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3621 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3622 /* Make sure that anybody stopping the queue after this
3623 * sees the new next_to_clean.
3624 */
3625 smp_mb();
3626 if (netif_queue_stopped(netdev))
3627 netif_wake_queue(netdev);
3628 }
3629
3630 if (adapter->detect_tx_hung) {
3631 /* Detect a transmit hang in hardware, this serializes the
3632 * check with the clearing of time_stamp and movement of i */
3633 adapter->detect_tx_hung = FALSE;
3634 if (tx_ring->buffer_info[eop].dma &&
3635 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3636 (adapter->tx_timeout_factor * HZ))
3637 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3638 E1000_STATUS_TXOFF)) {
3639
3640 /* detected Tx unit hang */
3641 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3642 " Tx Queue <%lu>\n"
3643 " TDH <%x>\n"
3644 " TDT <%x>\n"
3645 " next_to_use <%x>\n"
3646 " next_to_clean <%x>\n"
3647 "buffer_info[next_to_clean]\n"
3648 " time_stamp <%lx>\n"
3649 " next_to_watch <%x>\n"
3650 " jiffies <%lx>\n"
3651 " next_to_watch.status <%x>\n",
3652 (unsigned long)((tx_ring - adapter->tx_ring) /
3653 sizeof(struct e1000_tx_ring)),
3654 readl(adapter->hw.hw_addr + tx_ring->tdh),
3655 readl(adapter->hw.hw_addr + tx_ring->tdt),
3656 tx_ring->next_to_use,
3657 tx_ring->next_to_clean,
3658 tx_ring->buffer_info[eop].time_stamp,
3659 eop,
3660 jiffies,
3661 eop_desc->upper.fields.status);
3662 netif_stop_queue(netdev);
3663 }
3664 }
3665 return cleaned;
3666 }
3667
3668 /**
3669 * e1000_rx_checksum - Receive Checksum Offload for 82543
3670 * @adapter: board private structure
3671 * @status_err: receive descriptor status and error fields
3672 * @csum: receive descriptor csum field
3673 * @sk_buff: socket buffer with received data
3674 **/
3675
3676 static void
3677 e1000_rx_checksum(struct e1000_adapter *adapter,
3678 uint32_t status_err, uint32_t csum,
3679 struct sk_buff *skb)
3680 {
3681 uint16_t status = (uint16_t)status_err;
3682 uint8_t errors = (uint8_t)(status_err >> 24);
3683 skb->ip_summed = CHECKSUM_NONE;
3684
3685 /* 82543 or newer only */
3686 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3687 /* Ignore Checksum bit is set */
3688 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3689 /* TCP/UDP checksum error bit is set */
3690 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3691 /* let the stack verify checksum errors */
3692 adapter->hw_csum_err++;
3693 return;
3694 }
3695 /* TCP/UDP Checksum has not been calculated */
3696 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3697 if (!(status & E1000_RXD_STAT_TCPCS))
3698 return;
3699 } else {
3700 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3701 return;
3702 }
3703 /* It must be a TCP or UDP packet with a valid checksum */
3704 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3705 /* TCP checksum is good */
3706 skb->ip_summed = CHECKSUM_UNNECESSARY;
3707 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3708 /* IP fragment with UDP payload */
3709 /* Hardware complements the payload checksum, so we undo it
3710 * and then put the value in host order for further stack use.
3711 */
3712 csum = ntohl(csum ^ 0xFFFF);
3713 skb->csum = csum;
3714 skb->ip_summed = CHECKSUM_COMPLETE;
3715 }
3716 adapter->hw_csum_good++;
3717 }
3718
3719 /**
3720 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3721 * @adapter: board private structure
3722 **/
3723
3724 static boolean_t
3725 #ifdef CONFIG_E1000_NAPI
3726 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3727 struct e1000_rx_ring *rx_ring,
3728 int *work_done, int work_to_do)
3729 #else
3730 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3731 struct e1000_rx_ring *rx_ring)
3732 #endif
3733 {
3734 struct net_device *netdev = adapter->netdev;
3735 struct pci_dev *pdev = adapter->pdev;
3736 struct e1000_rx_desc *rx_desc, *next_rxd;
3737 struct e1000_buffer *buffer_info, *next_buffer;
3738 unsigned long flags;
3739 uint32_t length;
3740 uint8_t last_byte;
3741 unsigned int i;
3742 int cleaned_count = 0;
3743 boolean_t cleaned = FALSE;
3744
3745 i = rx_ring->next_to_clean;
3746 rx_desc = E1000_RX_DESC(*rx_ring, i);
3747 buffer_info = &rx_ring->buffer_info[i];
3748
3749 while (rx_desc->status & E1000_RXD_STAT_DD) {
3750 struct sk_buff *skb;
3751 u8 status;
3752 #ifdef CONFIG_E1000_NAPI
3753 if (*work_done >= work_to_do)
3754 break;
3755 (*work_done)++;
3756 #endif
3757 status = rx_desc->status;
3758 skb = buffer_info->skb;
3759 buffer_info->skb = NULL;
3760
3761 prefetch(skb->data - NET_IP_ALIGN);
3762
3763 if (++i == rx_ring->count) i = 0;
3764 next_rxd = E1000_RX_DESC(*rx_ring, i);
3765 prefetch(next_rxd);
3766
3767 next_buffer = &rx_ring->buffer_info[i];
3768
3769 cleaned = TRUE;
3770 cleaned_count++;
3771 pci_unmap_single(pdev,
3772 buffer_info->dma,
3773 buffer_info->length,
3774 PCI_DMA_FROMDEVICE);
3775
3776 length = le16_to_cpu(rx_desc->length);
3777
3778 /* adjust length to remove Ethernet CRC */
3779 length -= 4;
3780
3781 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3782 /* All receives must fit into a single buffer */
3783 E1000_DBG("%s: Receive packet consumed multiple"
3784 " buffers\n", netdev->name);
3785 /* recycle */
3786 buffer_info->skb = skb;
3787 goto next_desc;
3788 }
3789
3790 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3791 last_byte = *(skb->data + length - 1);
3792 if (TBI_ACCEPT(&adapter->hw, status,
3793 rx_desc->errors, length, last_byte)) {
3794 spin_lock_irqsave(&adapter->stats_lock, flags);
3795 e1000_tbi_adjust_stats(&adapter->hw,
3796 &adapter->stats,
3797 length, skb->data);
3798 spin_unlock_irqrestore(&adapter->stats_lock,
3799 flags);
3800 length--;
3801 } else {
3802 /* recycle */
3803 buffer_info->skb = skb;
3804 goto next_desc;
3805 }
3806 }
3807
3808 /* code added for copybreak, this should improve
3809 * performance for small packets with large amounts
3810 * of reassembly being done in the stack */
3811 #define E1000_CB_LENGTH 256
3812 if (length < E1000_CB_LENGTH) {
3813 struct sk_buff *new_skb =
3814 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
3815 if (new_skb) {
3816 skb_reserve(new_skb, NET_IP_ALIGN);
3817 memcpy(new_skb->data - NET_IP_ALIGN,
3818 skb->data - NET_IP_ALIGN,
3819 length + NET_IP_ALIGN);
3820 /* save the skb in buffer_info as good */
3821 buffer_info->skb = skb;
3822 skb = new_skb;
3823 skb_put(skb, length);
3824 }
3825 } else
3826 skb_put(skb, length);
3827
3828 /* end copybreak code */
3829
3830 /* Receive Checksum Offload */
3831 e1000_rx_checksum(adapter,
3832 (uint32_t)(status) |
3833 ((uint32_t)(rx_desc->errors) << 24),
3834 le16_to_cpu(rx_desc->csum), skb);
3835
3836 skb->protocol = eth_type_trans(skb, netdev);
3837 #ifdef CONFIG_E1000_NAPI
3838 if (unlikely(adapter->vlgrp &&
3839 (status & E1000_RXD_STAT_VP))) {
3840 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3841 le16_to_cpu(rx_desc->special) &
3842 E1000_RXD_SPC_VLAN_MASK);
3843 } else {
3844 netif_receive_skb(skb);
3845 }
3846 #else /* CONFIG_E1000_NAPI */
3847 if (unlikely(adapter->vlgrp &&
3848 (status & E1000_RXD_STAT_VP))) {
3849 vlan_hwaccel_rx(skb, adapter->vlgrp,
3850 le16_to_cpu(rx_desc->special) &
3851 E1000_RXD_SPC_VLAN_MASK);
3852 } else {
3853 netif_rx(skb);
3854 }
3855 #endif /* CONFIG_E1000_NAPI */
3856 netdev->last_rx = jiffies;
3857
3858 next_desc:
3859 rx_desc->status = 0;
3860
3861 /* return some buffers to hardware, one at a time is too slow */
3862 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3863 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3864 cleaned_count = 0;
3865 }
3866
3867 /* use prefetched values */
3868 rx_desc = next_rxd;
3869 buffer_info = next_buffer;
3870 }
3871 rx_ring->next_to_clean = i;
3872
3873 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3874 if (cleaned_count)
3875 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3876
3877 return cleaned;
3878 }
3879
3880 /**
3881 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3882 * @adapter: board private structure
3883 **/
3884
3885 static boolean_t
3886 #ifdef CONFIG_E1000_NAPI
3887 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3888 struct e1000_rx_ring *rx_ring,
3889 int *work_done, int work_to_do)
3890 #else
3891 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3892 struct e1000_rx_ring *rx_ring)
3893 #endif
3894 {
3895 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3896 struct net_device *netdev = adapter->netdev;
3897 struct pci_dev *pdev = adapter->pdev;
3898 struct e1000_buffer *buffer_info, *next_buffer;
3899 struct e1000_ps_page *ps_page;
3900 struct e1000_ps_page_dma *ps_page_dma;
3901 struct sk_buff *skb;
3902 unsigned int i, j;
3903 uint32_t length, staterr;
3904 int cleaned_count = 0;
3905 boolean_t cleaned = FALSE;
3906
3907 i = rx_ring->next_to_clean;
3908 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3909 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3910 buffer_info = &rx_ring->buffer_info[i];
3911
3912 while (staterr & E1000_RXD_STAT_DD) {
3913 ps_page = &rx_ring->ps_page[i];
3914 ps_page_dma = &rx_ring->ps_page_dma[i];
3915 #ifdef CONFIG_E1000_NAPI
3916 if (unlikely(*work_done >= work_to_do))
3917 break;
3918 (*work_done)++;
3919 #endif
3920 skb = buffer_info->skb;
3921
3922 /* in the packet split case this is header only */
3923 prefetch(skb->data - NET_IP_ALIGN);
3924
3925 if (++i == rx_ring->count) i = 0;
3926 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3927 prefetch(next_rxd);
3928
3929 next_buffer = &rx_ring->buffer_info[i];
3930
3931 cleaned = TRUE;
3932 cleaned_count++;
3933 pci_unmap_single(pdev, buffer_info->dma,
3934 buffer_info->length,
3935 PCI_DMA_FROMDEVICE);
3936
3937 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3938 E1000_DBG("%s: Packet Split buffers didn't pick up"
3939 " the full packet\n", netdev->name);
3940 dev_kfree_skb_irq(skb);
3941 goto next_desc;
3942 }
3943
3944 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3945 dev_kfree_skb_irq(skb);
3946 goto next_desc;
3947 }
3948
3949 length = le16_to_cpu(rx_desc->wb.middle.length0);
3950
3951 if (unlikely(!length)) {
3952 E1000_DBG("%s: Last part of the packet spanning"
3953 " multiple descriptors\n", netdev->name);
3954 dev_kfree_skb_irq(skb);
3955 goto next_desc;
3956 }
3957
3958 /* Good Receive */
3959 skb_put(skb, length);
3960
3961 {
3962 /* this looks ugly, but it seems compiler issues make it
3963 more efficient than reusing j */
3964 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3965
3966 /* page alloc/put takes too long and effects small packet
3967 * throughput, so unsplit small packets and save the alloc/put*/
3968 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
3969 u8 *vaddr;
3970 /* there is no documentation about how to call
3971 * kmap_atomic, so we can't hold the mapping
3972 * very long */
3973 pci_dma_sync_single_for_cpu(pdev,
3974 ps_page_dma->ps_page_dma[0],
3975 PAGE_SIZE,
3976 PCI_DMA_FROMDEVICE);
3977 vaddr = kmap_atomic(ps_page->ps_page[0],
3978 KM_SKB_DATA_SOFTIRQ);
3979 memcpy(skb->tail, vaddr, l1);
3980 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3981 pci_dma_sync_single_for_device(pdev,
3982 ps_page_dma->ps_page_dma[0],
3983 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3984 /* remove the CRC */
3985 l1 -= 4;
3986 skb_put(skb, l1);
3987 goto copydone;
3988 } /* if */
3989 }
3990
3991 for (j = 0; j < adapter->rx_ps_pages; j++) {
3992 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
3993 break;
3994 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3995 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3996 ps_page_dma->ps_page_dma[j] = 0;
3997 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3998 length);
3999 ps_page->ps_page[j] = NULL;
4000 skb->len += length;
4001 skb->data_len += length;
4002 skb->truesize += length;
4003 }
4004
4005 /* strip the ethernet crc, problem is we're using pages now so
4006 * this whole operation can get a little cpu intensive */
4007 pskb_trim(skb, skb->len - 4);
4008
4009 copydone:
4010 e1000_rx_checksum(adapter, staterr,
4011 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4012 skb->protocol = eth_type_trans(skb, netdev);
4013
4014 if (likely(rx_desc->wb.upper.header_status &
4015 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4016 adapter->rx_hdr_split++;
4017 #ifdef CONFIG_E1000_NAPI
4018 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4019 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4020 le16_to_cpu(rx_desc->wb.middle.vlan) &
4021 E1000_RXD_SPC_VLAN_MASK);
4022 } else {
4023 netif_receive_skb(skb);
4024 }
4025 #else /* CONFIG_E1000_NAPI */
4026 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4027 vlan_hwaccel_rx(skb, adapter->vlgrp,
4028 le16_to_cpu(rx_desc->wb.middle.vlan) &
4029 E1000_RXD_SPC_VLAN_MASK);
4030 } else {
4031 netif_rx(skb);
4032 }
4033 #endif /* CONFIG_E1000_NAPI */
4034 netdev->last_rx = jiffies;
4035
4036 next_desc:
4037 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4038 buffer_info->skb = NULL;
4039
4040 /* return some buffers to hardware, one at a time is too slow */
4041 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4042 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4043 cleaned_count = 0;
4044 }
4045
4046 /* use prefetched values */
4047 rx_desc = next_rxd;
4048 buffer_info = next_buffer;
4049
4050 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4051 }
4052 rx_ring->next_to_clean = i;
4053
4054 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4055 if (cleaned_count)
4056 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4057
4058 return cleaned;
4059 }
4060
4061 /**
4062 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4063 * @adapter: address of board private structure
4064 **/
4065
4066 static void
4067 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4068 struct e1000_rx_ring *rx_ring,
4069 int cleaned_count)
4070 {
4071 struct net_device *netdev = adapter->netdev;
4072 struct pci_dev *pdev = adapter->pdev;
4073 struct e1000_rx_desc *rx_desc;
4074 struct e1000_buffer *buffer_info;
4075 struct sk_buff *skb;
4076 unsigned int i;
4077 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4078
4079 i = rx_ring->next_to_use;
4080 buffer_info = &rx_ring->buffer_info[i];
4081
4082 while (cleaned_count--) {
4083 skb = buffer_info->skb;
4084 if (skb) {
4085 skb_trim(skb, 0);
4086 goto map_skb;
4087 }
4088
4089 skb = netdev_alloc_skb(netdev, bufsz);
4090 if (unlikely(!skb)) {
4091 /* Better luck next round */
4092 adapter->alloc_rx_buff_failed++;
4093 break;
4094 }
4095
4096 /* Fix for errata 23, can't cross 64kB boundary */
4097 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4098 struct sk_buff *oldskb = skb;
4099 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4100 "at %p\n", bufsz, skb->data);
4101 /* Try again, without freeing the previous */
4102 skb = netdev_alloc_skb(netdev, bufsz);
4103 /* Failed allocation, critical failure */
4104 if (!skb) {
4105 dev_kfree_skb(oldskb);
4106 break;
4107 }
4108
4109 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4110 /* give up */
4111 dev_kfree_skb(skb);
4112 dev_kfree_skb(oldskb);
4113 break; /* while !buffer_info->skb */
4114 }
4115
4116 /* Use new allocation */
4117 dev_kfree_skb(oldskb);
4118 }
4119 /* Make buffer alignment 2 beyond a 16 byte boundary
4120 * this will result in a 16 byte aligned IP header after
4121 * the 14 byte MAC header is removed
4122 */
4123 skb_reserve(skb, NET_IP_ALIGN);
4124
4125 buffer_info->skb = skb;
4126 buffer_info->length = adapter->rx_buffer_len;
4127 map_skb:
4128 buffer_info->dma = pci_map_single(pdev,
4129 skb->data,
4130 adapter->rx_buffer_len,
4131 PCI_DMA_FROMDEVICE);
4132
4133 /* Fix for errata 23, can't cross 64kB boundary */
4134 if (!e1000_check_64k_bound(adapter,
4135 (void *)(unsigned long)buffer_info->dma,
4136 adapter->rx_buffer_len)) {
4137 DPRINTK(RX_ERR, ERR,
4138 "dma align check failed: %u bytes at %p\n",
4139 adapter->rx_buffer_len,
4140 (void *)(unsigned long)buffer_info->dma);
4141 dev_kfree_skb(skb);
4142 buffer_info->skb = NULL;
4143
4144 pci_unmap_single(pdev, buffer_info->dma,
4145 adapter->rx_buffer_len,
4146 PCI_DMA_FROMDEVICE);
4147
4148 break; /* while !buffer_info->skb */
4149 }
4150 rx_desc = E1000_RX_DESC(*rx_ring, i);
4151 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4152
4153 if (unlikely(++i == rx_ring->count))
4154 i = 0;
4155 buffer_info = &rx_ring->buffer_info[i];
4156 }
4157
4158 if (likely(rx_ring->next_to_use != i)) {
4159 rx_ring->next_to_use = i;
4160 if (unlikely(i-- == 0))
4161 i = (rx_ring->count - 1);
4162
4163 /* Force memory writes to complete before letting h/w
4164 * know there are new descriptors to fetch. (Only
4165 * applicable for weak-ordered memory model archs,
4166 * such as IA-64). */
4167 wmb();
4168 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4169 }
4170 }
4171
4172 /**
4173 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4174 * @adapter: address of board private structure
4175 **/
4176
4177 static void
4178 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4179 struct e1000_rx_ring *rx_ring,
4180 int cleaned_count)
4181 {
4182 struct net_device *netdev = adapter->netdev;
4183 struct pci_dev *pdev = adapter->pdev;
4184 union e1000_rx_desc_packet_split *rx_desc;
4185 struct e1000_buffer *buffer_info;
4186 struct e1000_ps_page *ps_page;
4187 struct e1000_ps_page_dma *ps_page_dma;
4188 struct sk_buff *skb;
4189 unsigned int i, j;
4190
4191 i = rx_ring->next_to_use;
4192 buffer_info = &rx_ring->buffer_info[i];
4193 ps_page = &rx_ring->ps_page[i];
4194 ps_page_dma = &rx_ring->ps_page_dma[i];
4195
4196 while (cleaned_count--) {
4197 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4198
4199 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4200 if (j < adapter->rx_ps_pages) {
4201 if (likely(!ps_page->ps_page[j])) {
4202 ps_page->ps_page[j] =
4203 alloc_page(GFP_ATOMIC);
4204 if (unlikely(!ps_page->ps_page[j])) {
4205 adapter->alloc_rx_buff_failed++;
4206 goto no_buffers;
4207 }
4208 ps_page_dma->ps_page_dma[j] =
4209 pci_map_page(pdev,
4210 ps_page->ps_page[j],
4211 0, PAGE_SIZE,
4212 PCI_DMA_FROMDEVICE);
4213 }
4214 /* Refresh the desc even if buffer_addrs didn't
4215 * change because each write-back erases
4216 * this info.
4217 */
4218 rx_desc->read.buffer_addr[j+1] =
4219 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4220 } else
4221 rx_desc->read.buffer_addr[j+1] = ~0;
4222 }
4223
4224 skb = netdev_alloc_skb(netdev,
4225 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4226
4227 if (unlikely(!skb)) {
4228 adapter->alloc_rx_buff_failed++;
4229 break;
4230 }
4231
4232 /* Make buffer alignment 2 beyond a 16 byte boundary
4233 * this will result in a 16 byte aligned IP header after
4234 * the 14 byte MAC header is removed
4235 */
4236 skb_reserve(skb, NET_IP_ALIGN);
4237
4238 buffer_info->skb = skb;
4239 buffer_info->length = adapter->rx_ps_bsize0;
4240 buffer_info->dma = pci_map_single(pdev, skb->data,
4241 adapter->rx_ps_bsize0,
4242 PCI_DMA_FROMDEVICE);
4243
4244 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4245
4246 if (unlikely(++i == rx_ring->count)) i = 0;
4247 buffer_info = &rx_ring->buffer_info[i];
4248 ps_page = &rx_ring->ps_page[i];
4249 ps_page_dma = &rx_ring->ps_page_dma[i];
4250 }
4251
4252 no_buffers:
4253 if (likely(rx_ring->next_to_use != i)) {
4254 rx_ring->next_to_use = i;
4255 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4256
4257 /* Force memory writes to complete before letting h/w
4258 * know there are new descriptors to fetch. (Only
4259 * applicable for weak-ordered memory model archs,
4260 * such as IA-64). */
4261 wmb();
4262 /* Hardware increments by 16 bytes, but packet split
4263 * descriptors are 32 bytes...so we increment tail
4264 * twice as much.
4265 */
4266 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4267 }
4268 }
4269
4270 /**
4271 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4272 * @adapter:
4273 **/
4274
4275 static void
4276 e1000_smartspeed(struct e1000_adapter *adapter)
4277 {
4278 uint16_t phy_status;
4279 uint16_t phy_ctrl;
4280
4281 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4282 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4283 return;
4284
4285 if (adapter->smartspeed == 0) {
4286 /* If Master/Slave config fault is asserted twice,
4287 * we assume back-to-back */
4288 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4289 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4290 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4291 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4292 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4293 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4294 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4295 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4296 phy_ctrl);
4297 adapter->smartspeed++;
4298 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4299 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4300 &phy_ctrl)) {
4301 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4302 MII_CR_RESTART_AUTO_NEG);
4303 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4304 phy_ctrl);
4305 }
4306 }
4307 return;
4308 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4309 /* If still no link, perhaps using 2/3 pair cable */
4310 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4311 phy_ctrl |= CR_1000T_MS_ENABLE;
4312 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4313 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4314 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4315 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4316 MII_CR_RESTART_AUTO_NEG);
4317 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4318 }
4319 }
4320 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4321 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4322 adapter->smartspeed = 0;
4323 }
4324
4325 /**
4326 * e1000_ioctl -
4327 * @netdev:
4328 * @ifreq:
4329 * @cmd:
4330 **/
4331
4332 static int
4333 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4334 {
4335 switch (cmd) {
4336 case SIOCGMIIPHY:
4337 case SIOCGMIIREG:
4338 case SIOCSMIIREG:
4339 return e1000_mii_ioctl(netdev, ifr, cmd);
4340 default:
4341 return -EOPNOTSUPP;
4342 }
4343 }
4344
4345 /**
4346 * e1000_mii_ioctl -
4347 * @netdev:
4348 * @ifreq:
4349 * @cmd:
4350 **/
4351
4352 static int
4353 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4354 {
4355 struct e1000_adapter *adapter = netdev_priv(netdev);
4356 struct mii_ioctl_data *data = if_mii(ifr);
4357 int retval;
4358 uint16_t mii_reg;
4359 uint16_t spddplx;
4360 unsigned long flags;
4361
4362 if (adapter->hw.media_type != e1000_media_type_copper)
4363 return -EOPNOTSUPP;
4364
4365 switch (cmd) {
4366 case SIOCGMIIPHY:
4367 data->phy_id = adapter->hw.phy_addr;
4368 break;
4369 case SIOCGMIIREG:
4370 if (!capable(CAP_NET_ADMIN))
4371 return -EPERM;
4372 spin_lock_irqsave(&adapter->stats_lock, flags);
4373 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4374 &data->val_out)) {
4375 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4376 return -EIO;
4377 }
4378 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4379 break;
4380 case SIOCSMIIREG:
4381 if (!capable(CAP_NET_ADMIN))
4382 return -EPERM;
4383 if (data->reg_num & ~(0x1F))
4384 return -EFAULT;
4385 mii_reg = data->val_in;
4386 spin_lock_irqsave(&adapter->stats_lock, flags);
4387 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4388 mii_reg)) {
4389 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4390 return -EIO;
4391 }
4392 if (adapter->hw.media_type == e1000_media_type_copper) {
4393 switch (data->reg_num) {
4394 case PHY_CTRL:
4395 if (mii_reg & MII_CR_POWER_DOWN)
4396 break;
4397 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4398 adapter->hw.autoneg = 1;
4399 adapter->hw.autoneg_advertised = 0x2F;
4400 } else {
4401 if (mii_reg & 0x40)
4402 spddplx = SPEED_1000;
4403 else if (mii_reg & 0x2000)
4404 spddplx = SPEED_100;
4405 else
4406 spddplx = SPEED_10;
4407 spddplx += (mii_reg & 0x100)
4408 ? DUPLEX_FULL :
4409 DUPLEX_HALF;
4410 retval = e1000_set_spd_dplx(adapter,
4411 spddplx);
4412 if (retval) {
4413 spin_unlock_irqrestore(
4414 &adapter->stats_lock,
4415 flags);
4416 return retval;
4417 }
4418 }
4419 if (netif_running(adapter->netdev))
4420 e1000_reinit_locked(adapter);
4421 else
4422 e1000_reset(adapter);
4423 break;
4424 case M88E1000_PHY_SPEC_CTRL:
4425 case M88E1000_EXT_PHY_SPEC_CTRL:
4426 if (e1000_phy_reset(&adapter->hw)) {
4427 spin_unlock_irqrestore(
4428 &adapter->stats_lock, flags);
4429 return -EIO;
4430 }
4431 break;
4432 }
4433 } else {
4434 switch (data->reg_num) {
4435 case PHY_CTRL:
4436 if (mii_reg & MII_CR_POWER_DOWN)
4437 break;
4438 if (netif_running(adapter->netdev))
4439 e1000_reinit_locked(adapter);
4440 else
4441 e1000_reset(adapter);
4442 break;
4443 }
4444 }
4445 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4446 break;
4447 default:
4448 return -EOPNOTSUPP;
4449 }
4450 return E1000_SUCCESS;
4451 }
4452
4453 void
4454 e1000_pci_set_mwi(struct e1000_hw *hw)
4455 {
4456 struct e1000_adapter *adapter = hw->back;
4457 int ret_val = pci_set_mwi(adapter->pdev);
4458
4459 if (ret_val)
4460 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4461 }
4462
4463 void
4464 e1000_pci_clear_mwi(struct e1000_hw *hw)
4465 {
4466 struct e1000_adapter *adapter = hw->back;
4467
4468 pci_clear_mwi(adapter->pdev);
4469 }
4470
4471 void
4472 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4473 {
4474 struct e1000_adapter *adapter = hw->back;
4475
4476 pci_read_config_word(adapter->pdev, reg, value);
4477 }
4478
4479 void
4480 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4481 {
4482 struct e1000_adapter *adapter = hw->back;
4483
4484 pci_write_config_word(adapter->pdev, reg, *value);
4485 }
4486
4487 int32_t
4488 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4489 {
4490 struct e1000_adapter *adapter = hw->back;
4491 uint16_t cap_offset;
4492
4493 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4494 if (!cap_offset)
4495 return -E1000_ERR_CONFIG;
4496
4497 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4498
4499 return E1000_SUCCESS;
4500 }
4501
4502
4503 void
4504 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4505 {
4506 outl(value, port);
4507 }
4508
4509 static void
4510 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4511 {
4512 struct e1000_adapter *adapter = netdev_priv(netdev);
4513 uint32_t ctrl, rctl;
4514
4515 e1000_irq_disable(adapter);
4516 adapter->vlgrp = grp;
4517
4518 if (grp) {
4519 /* enable VLAN tag insert/strip */
4520 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4521 ctrl |= E1000_CTRL_VME;
4522 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4523
4524 if (adapter->hw.mac_type != e1000_ich8lan) {
4525 /* enable VLAN receive filtering */
4526 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4527 rctl |= E1000_RCTL_VFE;
4528 rctl &= ~E1000_RCTL_CFIEN;
4529 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4530 e1000_update_mng_vlan(adapter);
4531 }
4532 } else {
4533 /* disable VLAN tag insert/strip */
4534 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4535 ctrl &= ~E1000_CTRL_VME;
4536 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4537
4538 if (adapter->hw.mac_type != e1000_ich8lan) {
4539 /* disable VLAN filtering */
4540 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4541 rctl &= ~E1000_RCTL_VFE;
4542 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4543 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4544 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4545 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4546 }
4547 }
4548 }
4549
4550 e1000_irq_enable(adapter);
4551 }
4552
4553 static void
4554 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4555 {
4556 struct e1000_adapter *adapter = netdev_priv(netdev);
4557 uint32_t vfta, index;
4558
4559 if ((adapter->hw.mng_cookie.status &
4560 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4561 (vid == adapter->mng_vlan_id))
4562 return;
4563 /* add VID to filter table */
4564 index = (vid >> 5) & 0x7F;
4565 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4566 vfta |= (1 << (vid & 0x1F));
4567 e1000_write_vfta(&adapter->hw, index, vfta);
4568 }
4569
4570 static void
4571 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4572 {
4573 struct e1000_adapter *adapter = netdev_priv(netdev);
4574 uint32_t vfta, index;
4575
4576 e1000_irq_disable(adapter);
4577
4578 if (adapter->vlgrp)
4579 adapter->vlgrp->vlan_devices[vid] = NULL;
4580
4581 e1000_irq_enable(adapter);
4582
4583 if ((adapter->hw.mng_cookie.status &
4584 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4585 (vid == adapter->mng_vlan_id)) {
4586 /* release control to f/w */
4587 e1000_release_hw_control(adapter);
4588 return;
4589 }
4590
4591 /* remove VID from filter table */
4592 index = (vid >> 5) & 0x7F;
4593 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4594 vfta &= ~(1 << (vid & 0x1F));
4595 e1000_write_vfta(&adapter->hw, index, vfta);
4596 }
4597
4598 static void
4599 e1000_restore_vlan(struct e1000_adapter *adapter)
4600 {
4601 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4602
4603 if (adapter->vlgrp) {
4604 uint16_t vid;
4605 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4606 if (!adapter->vlgrp->vlan_devices[vid])
4607 continue;
4608 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4609 }
4610 }
4611 }
4612
4613 int
4614 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4615 {
4616 adapter->hw.autoneg = 0;
4617
4618 /* Fiber NICs only allow 1000 gbps Full duplex */
4619 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4620 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4621 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4622 return -EINVAL;
4623 }
4624
4625 switch (spddplx) {
4626 case SPEED_10 + DUPLEX_HALF:
4627 adapter->hw.forced_speed_duplex = e1000_10_half;
4628 break;
4629 case SPEED_10 + DUPLEX_FULL:
4630 adapter->hw.forced_speed_duplex = e1000_10_full;
4631 break;
4632 case SPEED_100 + DUPLEX_HALF:
4633 adapter->hw.forced_speed_duplex = e1000_100_half;
4634 break;
4635 case SPEED_100 + DUPLEX_FULL:
4636 adapter->hw.forced_speed_duplex = e1000_100_full;
4637 break;
4638 case SPEED_1000 + DUPLEX_FULL:
4639 adapter->hw.autoneg = 1;
4640 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4641 break;
4642 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4643 default:
4644 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4645 return -EINVAL;
4646 }
4647 return 0;
4648 }
4649
4650 #ifdef CONFIG_PM
4651 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4652 * bus we're on (PCI(X) vs. PCI-E)
4653 */
4654 #define PCIE_CONFIG_SPACE_LEN 256
4655 #define PCI_CONFIG_SPACE_LEN 64
4656 static int
4657 e1000_pci_save_state(struct e1000_adapter *adapter)
4658 {
4659 struct pci_dev *dev = adapter->pdev;
4660 int size;
4661 int i;
4662
4663 if (adapter->hw.mac_type >= e1000_82571)
4664 size = PCIE_CONFIG_SPACE_LEN;
4665 else
4666 size = PCI_CONFIG_SPACE_LEN;
4667
4668 WARN_ON(adapter->config_space != NULL);
4669
4670 adapter->config_space = kmalloc(size, GFP_KERNEL);
4671 if (!adapter->config_space) {
4672 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4673 return -ENOMEM;
4674 }
4675 for (i = 0; i < (size / 4); i++)
4676 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4677 return 0;
4678 }
4679
4680 static void
4681 e1000_pci_restore_state(struct e1000_adapter *adapter)
4682 {
4683 struct pci_dev *dev = adapter->pdev;
4684 int size;
4685 int i;
4686
4687 if (adapter->config_space == NULL)
4688 return;
4689
4690 if (adapter->hw.mac_type >= e1000_82571)
4691 size = PCIE_CONFIG_SPACE_LEN;
4692 else
4693 size = PCI_CONFIG_SPACE_LEN;
4694 for (i = 0; i < (size / 4); i++)
4695 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4696 kfree(adapter->config_space);
4697 adapter->config_space = NULL;
4698 return;
4699 }
4700 #endif /* CONFIG_PM */
4701
4702 static int
4703 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4704 {
4705 struct net_device *netdev = pci_get_drvdata(pdev);
4706 struct e1000_adapter *adapter = netdev_priv(netdev);
4707 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4708 uint32_t wufc = adapter->wol;
4709 #ifdef CONFIG_PM
4710 int retval = 0;
4711 #endif
4712
4713 netif_device_detach(netdev);
4714
4715 if (netif_running(netdev)) {
4716 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4717 e1000_down(adapter);
4718 }
4719
4720 #ifdef CONFIG_PM
4721 /* Implement our own version of pci_save_state(pdev) because pci-
4722 * express adapters have 256-byte config spaces. */
4723 retval = e1000_pci_save_state(adapter);
4724 if (retval)
4725 return retval;
4726 #endif
4727
4728 status = E1000_READ_REG(&adapter->hw, STATUS);
4729 if (status & E1000_STATUS_LU)
4730 wufc &= ~E1000_WUFC_LNKC;
4731
4732 if (wufc) {
4733 e1000_setup_rctl(adapter);
4734 e1000_set_multi(netdev);
4735
4736 /* turn on all-multi mode if wake on multicast is enabled */
4737 if (wufc & E1000_WUFC_MC) {
4738 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4739 rctl |= E1000_RCTL_MPE;
4740 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4741 }
4742
4743 if (adapter->hw.mac_type >= e1000_82540) {
4744 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4745 /* advertise wake from D3Cold */
4746 #define E1000_CTRL_ADVD3WUC 0x00100000
4747 /* phy power management enable */
4748 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4749 ctrl |= E1000_CTRL_ADVD3WUC |
4750 E1000_CTRL_EN_PHY_PWR_MGMT;
4751 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4752 }
4753
4754 if (adapter->hw.media_type == e1000_media_type_fiber ||
4755 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4756 /* keep the laser running in D3 */
4757 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4758 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4759 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4760 }
4761
4762 /* Allow time for pending master requests to run */
4763 e1000_disable_pciex_master(&adapter->hw);
4764
4765 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4766 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4767 pci_enable_wake(pdev, PCI_D3hot, 1);
4768 pci_enable_wake(pdev, PCI_D3cold, 1);
4769 } else {
4770 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4771 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4772 pci_enable_wake(pdev, PCI_D3hot, 0);
4773 pci_enable_wake(pdev, PCI_D3cold, 0);
4774 }
4775
4776 if (adapter->hw.mac_type < e1000_82571 &&
4777 adapter->hw.media_type == e1000_media_type_copper) {
4778 manc = E1000_READ_REG(&adapter->hw, MANC);
4779 if (manc & E1000_MANC_SMBUS_EN) {
4780 manc |= E1000_MANC_ARP_EN;
4781 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4782 pci_enable_wake(pdev, PCI_D3hot, 1);
4783 pci_enable_wake(pdev, PCI_D3cold, 1);
4784 }
4785 }
4786
4787 if (adapter->hw.phy_type == e1000_phy_igp_3)
4788 e1000_phy_powerdown_workaround(&adapter->hw);
4789
4790 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4791 * would have already happened in close and is redundant. */
4792 e1000_release_hw_control(adapter);
4793
4794 pci_disable_device(pdev);
4795
4796 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4797
4798 return 0;
4799 }
4800
4801 #ifdef CONFIG_PM
4802 static int
4803 e1000_resume(struct pci_dev *pdev)
4804 {
4805 struct net_device *netdev = pci_get_drvdata(pdev);
4806 struct e1000_adapter *adapter = netdev_priv(netdev);
4807 uint32_t manc, err;
4808
4809 pci_set_power_state(pdev, PCI_D0);
4810 e1000_pci_restore_state(adapter);
4811 if ((err = pci_enable_device(pdev))) {
4812 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4813 return err;
4814 }
4815 pci_set_master(pdev);
4816
4817 pci_enable_wake(pdev, PCI_D3hot, 0);
4818 pci_enable_wake(pdev, PCI_D3cold, 0);
4819
4820 e1000_reset(adapter);
4821 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4822
4823 if (netif_running(netdev))
4824 e1000_up(adapter);
4825
4826 netif_device_attach(netdev);
4827
4828 if (adapter->hw.mac_type < e1000_82571 &&
4829 adapter->hw.media_type == e1000_media_type_copper) {
4830 manc = E1000_READ_REG(&adapter->hw, MANC);
4831 manc &= ~(E1000_MANC_ARP_EN);
4832 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4833 }
4834
4835 /* If the controller is 82573 and f/w is AMT, do not set
4836 * DRV_LOAD until the interface is up. For all other cases,
4837 * let the f/w know that the h/w is now under the control
4838 * of the driver. */
4839 if (adapter->hw.mac_type != e1000_82573 ||
4840 !e1000_check_mng_mode(&adapter->hw))
4841 e1000_get_hw_control(adapter);
4842
4843 return 0;
4844 }
4845 #endif
4846
4847 static void e1000_shutdown(struct pci_dev *pdev)
4848 {
4849 e1000_suspend(pdev, PMSG_SUSPEND);
4850 }
4851
4852 #ifdef CONFIG_NET_POLL_CONTROLLER
4853 /*
4854 * Polling 'interrupt' - used by things like netconsole to send skbs
4855 * without having to re-enable interrupts. It's not called while
4856 * the interrupt routine is executing.
4857 */
4858 static void
4859 e1000_netpoll(struct net_device *netdev)
4860 {
4861 struct e1000_adapter *adapter = netdev_priv(netdev);
4862
4863 disable_irq(adapter->pdev->irq);
4864 e1000_intr(adapter->pdev->irq, netdev);
4865 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4866 #ifndef CONFIG_E1000_NAPI
4867 adapter->clean_rx(adapter, adapter->rx_ring);
4868 #endif
4869 enable_irq(adapter->pdev->irq);
4870 }
4871 #endif
4872
4873 /**
4874 * e1000_io_error_detected - called when PCI error is detected
4875 * @pdev: Pointer to PCI device
4876 * @state: The current pci conneection state
4877 *
4878 * This function is called after a PCI bus error affecting
4879 * this device has been detected.
4880 */
4881 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4882 {
4883 struct net_device *netdev = pci_get_drvdata(pdev);
4884 struct e1000_adapter *adapter = netdev->priv;
4885
4886 netif_device_detach(netdev);
4887
4888 if (netif_running(netdev))
4889 e1000_down(adapter);
4890 pci_disable_device(pdev);
4891
4892 /* Request a slot slot reset. */
4893 return PCI_ERS_RESULT_NEED_RESET;
4894 }
4895
4896 /**
4897 * e1000_io_slot_reset - called after the pci bus has been reset.
4898 * @pdev: Pointer to PCI device
4899 *
4900 * Restart the card from scratch, as if from a cold-boot. Implementation
4901 * resembles the first-half of the e1000_resume routine.
4902 */
4903 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4904 {
4905 struct net_device *netdev = pci_get_drvdata(pdev);
4906 struct e1000_adapter *adapter = netdev->priv;
4907
4908 if (pci_enable_device(pdev)) {
4909 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4910 return PCI_ERS_RESULT_DISCONNECT;
4911 }
4912 pci_set_master(pdev);
4913
4914 pci_enable_wake(pdev, PCI_D3hot, 0);
4915 pci_enable_wake(pdev, PCI_D3cold, 0);
4916
4917 e1000_reset(adapter);
4918 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4919
4920 return PCI_ERS_RESULT_RECOVERED;
4921 }
4922
4923 /**
4924 * e1000_io_resume - called when traffic can start flowing again.
4925 * @pdev: Pointer to PCI device
4926 *
4927 * This callback is called when the error recovery driver tells us that
4928 * its OK to resume normal operation. Implementation resembles the
4929 * second-half of the e1000_resume routine.
4930 */
4931 static void e1000_io_resume(struct pci_dev *pdev)
4932 {
4933 struct net_device *netdev = pci_get_drvdata(pdev);
4934 struct e1000_adapter *adapter = netdev->priv;
4935 uint32_t manc, swsm;
4936
4937 if (netif_running(netdev)) {
4938 if (e1000_up(adapter)) {
4939 printk("e1000: can't bring device back up after reset\n");
4940 return;
4941 }
4942 }
4943
4944 netif_device_attach(netdev);
4945
4946 if (adapter->hw.mac_type >= e1000_82540 &&
4947 adapter->hw.media_type == e1000_media_type_copper) {
4948 manc = E1000_READ_REG(&adapter->hw, MANC);
4949 manc &= ~(E1000_MANC_ARP_EN);
4950 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4951 }
4952
4953 switch (adapter->hw.mac_type) {
4954 case e1000_82573:
4955 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4956 E1000_WRITE_REG(&adapter->hw, SWSM,
4957 swsm | E1000_SWSM_DRV_LOAD);
4958 break;
4959 default:
4960 break;
4961 }
4962
4963 if (netif_running(netdev))
4964 mod_timer(&adapter->watchdog_timer, jiffies);
4965 }
4966
4967 /* e1000_main.c */
Linux kernel - Deliverables
This page took 0.20357 seconds and 6 git commands to generate.