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e1000: add multicast stats counters
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 char e1000_driver_name[] = "e1000";
32 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
33 #ifndef CONFIG_E1000_NAPI
34 #define DRIVERNAPI
35 #else
36 #define DRIVERNAPI "-NAPI"
37 #endif
38 #define DRV_VERSION "7.2.7-k2"DRIVERNAPI
39 char e1000_driver_version[] = DRV_VERSION;
40 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
41
42 /* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49 static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
106 /* required last entry */
107 {0,}
108 };
109
110 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
112 int e1000_up(struct e1000_adapter *adapter);
113 void e1000_down(struct e1000_adapter *adapter);
114 void e1000_reinit_locked(struct e1000_adapter *adapter);
115 void e1000_reset(struct e1000_adapter *adapter);
116 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
121 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *txdr);
123 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rxdr);
125 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 void e1000_update_stats(struct e1000_adapter *adapter);
130
131 static int e1000_init_module(void);
132 static void e1000_exit_module(void);
133 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134 static void __devexit e1000_remove(struct pci_dev *pdev);
135 static int e1000_alloc_queues(struct e1000_adapter *adapter);
136 static int e1000_sw_init(struct e1000_adapter *adapter);
137 static int e1000_open(struct net_device *netdev);
138 static int e1000_close(struct net_device *netdev);
139 static void e1000_configure_tx(struct e1000_adapter *adapter);
140 static void e1000_configure_rx(struct e1000_adapter *adapter);
141 static void e1000_setup_rctl(struct e1000_adapter *adapter);
142 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
148 static void e1000_set_multi(struct net_device *netdev);
149 static void e1000_update_phy_info(unsigned long data);
150 static void e1000_watchdog(unsigned long data);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
176 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
179 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
182 void e1000_set_ethtool_ops(struct net_device *netdev);
183 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185 static void e1000_tx_timeout(struct net_device *dev);
186 static void e1000_reset_task(struct net_device *dev);
187 static void e1000_smartspeed(struct e1000_adapter *adapter);
188 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
190
191 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194 static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
196 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
197 #ifdef CONFIG_PM
198 static int e1000_resume(struct pci_dev *pdev);
199 #endif
200 static void e1000_shutdown(struct pci_dev *pdev);
201
202 #ifdef CONFIG_NET_POLL_CONTROLLER
203 /* for netdump / net console */
204 static void e1000_netpoll (struct net_device *netdev);
205 #endif
206
207 extern void e1000_check_options(struct e1000_adapter *adapter);
208
209 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212 static void e1000_io_resume(struct pci_dev *pdev);
213
214 static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218 };
219
220 static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
225 #ifdef CONFIG_PM
226 /* Power Managment Hooks */
227 .suspend = e1000_suspend,
228 .resume = e1000_resume,
229 #endif
230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
232 };
233
234 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236 MODULE_LICENSE("GPL");
237 MODULE_VERSION(DRV_VERSION);
238
239 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240 module_param(debug, int, 0);
241 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243 /**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250 static int __init
251 e1000_init_module(void)
252 {
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
259 ret = pci_register_driver(&e1000_driver);
260
261 return ret;
262 }
263
264 module_init(e1000_init_module);
265
266 /**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273 static void __exit
274 e1000_exit_module(void)
275 {
276 pci_unregister_driver(&e1000_driver);
277 }
278
279 module_exit(e1000_exit_module);
280
281 static int e1000_request_irq(struct e1000_adapter *adapter)
282 {
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
286 flags = IRQF_SHARED;
287 #ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
297 flags &= ~IRQF_SHARED;
298 #endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305 }
306
307 static void e1000_free_irq(struct e1000_adapter *adapter)
308 {
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313 #ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316 #endif
317 }
318
319 /**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
324 static void
325 e1000_irq_disable(struct e1000_adapter *adapter)
326 {
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331 }
332
333 /**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
338 static void
339 e1000_irq_enable(struct e1000_adapter *adapter)
340 {
341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345 }
346
347 static void
348 e1000_update_mng_vlan(struct e1000_adapter *adapter)
349 {
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
366 } else
367 adapter->mng_vlan_id = vid;
368 }
369 }
370
371 /**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
379 *
380 **/
381
382 static void
383 e1000_release_hw_control(struct e1000_adapter *adapter)
384 {
385 uint32_t ctrl_ext;
386 uint32_t swsm;
387 uint32_t extcnf;
388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
393 case e1000_80003es2lan:
394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
407 default:
408 break;
409 }
410 }
411
412 /**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
419 * of the f/w this means that the netowrk i/f is open.
420 *
421 **/
422
423 static void
424 e1000_get_hw_control(struct e1000_adapter *adapter)
425 {
426 uint32_t ctrl_ext;
427 uint32_t swsm;
428 uint32_t extcnf;
429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
433 case e1000_80003es2lan:
434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
448 default:
449 break;
450 }
451 }
452
453 int
454 e1000_up(struct e1000_adapter *adapter)
455 {
456 struct net_device *netdev = adapter->netdev;
457 int i;
458
459 /* hardware has been reset, we need to reload some things */
460
461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
471 for (i = 0; i < adapter->num_rx_queues; i++) {
472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
475 }
476
477 adapter->tx_queue_len = netdev->tx_queue_len;
478
479 mod_timer(&adapter->watchdog_timer, jiffies);
480
481 #ifdef CONFIG_E1000_NAPI
482 netif_poll_enable(netdev);
483 #endif
484 e1000_irq_enable(adapter);
485
486 return 0;
487 }
488
489 /**
490 * e1000_power_up_phy - restore link in case the phy was powered down
491 * @adapter: address of board private structure
492 *
493 * The phy may be powered down to save power and turn off link when the
494 * driver is unloaded and wake on lan is not enabled (among others)
495 * *** this routine MUST be followed by a call to e1000_reset ***
496 *
497 **/
498
499 void e1000_power_up_phy(struct e1000_adapter *adapter)
500 {
501 uint16_t mii_reg = 0;
502
503 /* Just clear the power down bit to wake the phy back up */
504 if (adapter->hw.media_type == e1000_media_type_copper) {
505 /* according to the manual, the phy will retain its
506 * settings across a power-down/up cycle */
507 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
508 mii_reg &= ~MII_CR_POWER_DOWN;
509 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
510 }
511 }
512
513 static void e1000_power_down_phy(struct e1000_adapter *adapter)
514 {
515 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
516 e1000_check_mng_mode(&adapter->hw);
517 /* Power down the PHY so no link is implied when interface is down
518 * The PHY cannot be powered down if any of the following is TRUE
519 * (a) WoL is enabled
520 * (b) AMT is active
521 * (c) SoL/IDER session is active */
522 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
523 adapter->hw.mac_type != e1000_ich8lan &&
524 adapter->hw.media_type == e1000_media_type_copper &&
525 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
526 !mng_mode_enabled &&
527 !e1000_check_phy_reset_block(&adapter->hw)) {
528 uint16_t mii_reg = 0;
529 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
530 mii_reg |= MII_CR_POWER_DOWN;
531 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
532 mdelay(1);
533 }
534 }
535
536 void
537 e1000_down(struct e1000_adapter *adapter)
538 {
539 struct net_device *netdev = adapter->netdev;
540
541 e1000_irq_disable(adapter);
542
543 del_timer_sync(&adapter->tx_fifo_stall_timer);
544 del_timer_sync(&adapter->watchdog_timer);
545 del_timer_sync(&adapter->phy_info_timer);
546
547 #ifdef CONFIG_E1000_NAPI
548 netif_poll_disable(netdev);
549 #endif
550 netdev->tx_queue_len = adapter->tx_queue_len;
551 adapter->link_speed = 0;
552 adapter->link_duplex = 0;
553 netif_carrier_off(netdev);
554 netif_stop_queue(netdev);
555
556 e1000_reset(adapter);
557 e1000_clean_all_tx_rings(adapter);
558 e1000_clean_all_rx_rings(adapter);
559 }
560
561 void
562 e1000_reinit_locked(struct e1000_adapter *adapter)
563 {
564 WARN_ON(in_interrupt());
565 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
566 msleep(1);
567 e1000_down(adapter);
568 e1000_up(adapter);
569 clear_bit(__E1000_RESETTING, &adapter->flags);
570 }
571
572 void
573 e1000_reset(struct e1000_adapter *adapter)
574 {
575 uint32_t pba, manc;
576 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
577
578 /* Repartition Pba for greater than 9k mtu
579 * To take effect CTRL.RST is required.
580 */
581
582 switch (adapter->hw.mac_type) {
583 case e1000_82547:
584 case e1000_82547_rev_2:
585 pba = E1000_PBA_30K;
586 break;
587 case e1000_82571:
588 case e1000_82572:
589 case e1000_80003es2lan:
590 pba = E1000_PBA_38K;
591 break;
592 case e1000_82573:
593 pba = E1000_PBA_12K;
594 break;
595 case e1000_ich8lan:
596 pba = E1000_PBA_8K;
597 break;
598 default:
599 pba = E1000_PBA_48K;
600 break;
601 }
602
603 if ((adapter->hw.mac_type != e1000_82573) &&
604 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
605 pba -= 8; /* allocate more FIFO for Tx */
606
607
608 if (adapter->hw.mac_type == e1000_82547) {
609 adapter->tx_fifo_head = 0;
610 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
611 adapter->tx_fifo_size =
612 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
613 atomic_set(&adapter->tx_fifo_stall, 0);
614 }
615
616 E1000_WRITE_REG(&adapter->hw, PBA, pba);
617
618 /* flow control settings */
619 /* Set the FC high water mark to 90% of the FIFO size.
620 * Required to clear last 3 LSB */
621 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
622 /* We can't use 90% on small FIFOs because the remainder
623 * would be less than 1 full frame. In this case, we size
624 * it to allow at least a full frame above the high water
625 * mark. */
626 if (pba < E1000_PBA_16K)
627 fc_high_water_mark = (pba * 1024) - 1600;
628
629 adapter->hw.fc_high_water = fc_high_water_mark;
630 adapter->hw.fc_low_water = fc_high_water_mark - 8;
631 if (adapter->hw.mac_type == e1000_80003es2lan)
632 adapter->hw.fc_pause_time = 0xFFFF;
633 else
634 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
635 adapter->hw.fc_send_xon = 1;
636 adapter->hw.fc = adapter->hw.original_fc;
637
638 /* Allow time for pending master requests to run */
639 e1000_reset_hw(&adapter->hw);
640 if (adapter->hw.mac_type >= e1000_82544)
641 E1000_WRITE_REG(&adapter->hw, WUC, 0);
642 if (e1000_init_hw(&adapter->hw))
643 DPRINTK(PROBE, ERR, "Hardware Error\n");
644 e1000_update_mng_vlan(adapter);
645 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
646 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
647
648 e1000_reset_adaptive(&adapter->hw);
649 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
650
651 if (!adapter->smart_power_down &&
652 (adapter->hw.mac_type == e1000_82571 ||
653 adapter->hw.mac_type == e1000_82572)) {
654 uint16_t phy_data = 0;
655 /* speed up time to link by disabling smart power down, ignore
656 * the return value of this function because there is nothing
657 * different we would do if it failed */
658 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
659 &phy_data);
660 phy_data &= ~IGP02E1000_PM_SPD;
661 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
662 phy_data);
663 }
664
665 if (adapter->hw.mac_type < e1000_ich8lan)
666 /* FIXME: this code is duplicate and wrong for PCI Express */
667 if (adapter->en_mng_pt) {
668 manc = E1000_READ_REG(&adapter->hw, MANC);
669 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
670 E1000_WRITE_REG(&adapter->hw, MANC, manc);
671 }
672 }
673
674 /**
675 * e1000_probe - Device Initialization Routine
676 * @pdev: PCI device information struct
677 * @ent: entry in e1000_pci_tbl
678 *
679 * Returns 0 on success, negative on failure
680 *
681 * e1000_probe initializes an adapter identified by a pci_dev structure.
682 * The OS initialization, configuring of the adapter private structure,
683 * and a hardware reset occur.
684 **/
685
686 static int __devinit
687 e1000_probe(struct pci_dev *pdev,
688 const struct pci_device_id *ent)
689 {
690 struct net_device *netdev;
691 struct e1000_adapter *adapter;
692 unsigned long mmio_start, mmio_len;
693 unsigned long flash_start, flash_len;
694
695 static int cards_found = 0;
696 static int global_quad_port_a = 0; /* global ksp3 port a indication */
697 int i, err, pci_using_dac;
698 uint16_t eeprom_data = 0;
699 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
700 if ((err = pci_enable_device(pdev)))
701 return err;
702
703 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
704 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
705 pci_using_dac = 1;
706 } else {
707 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
708 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
709 E1000_ERR("No usable DMA configuration, aborting\n");
710 goto err_dma;
711 }
712 pci_using_dac = 0;
713 }
714
715 if ((err = pci_request_regions(pdev, e1000_driver_name)))
716 goto err_pci_reg;
717
718 pci_set_master(pdev);
719
720 err = -ENOMEM;
721 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
722 if (!netdev)
723 goto err_alloc_etherdev;
724
725 SET_MODULE_OWNER(netdev);
726 SET_NETDEV_DEV(netdev, &pdev->dev);
727
728 pci_set_drvdata(pdev, netdev);
729 adapter = netdev_priv(netdev);
730 adapter->netdev = netdev;
731 adapter->pdev = pdev;
732 adapter->hw.back = adapter;
733 adapter->msg_enable = (1 << debug) - 1;
734
735 mmio_start = pci_resource_start(pdev, BAR_0);
736 mmio_len = pci_resource_len(pdev, BAR_0);
737
738 err = -EIO;
739 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
740 if (!adapter->hw.hw_addr)
741 goto err_ioremap;
742
743 for (i = BAR_1; i <= BAR_5; i++) {
744 if (pci_resource_len(pdev, i) == 0)
745 continue;
746 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
747 adapter->hw.io_base = pci_resource_start(pdev, i);
748 break;
749 }
750 }
751
752 netdev->open = &e1000_open;
753 netdev->stop = &e1000_close;
754 netdev->hard_start_xmit = &e1000_xmit_frame;
755 netdev->get_stats = &e1000_get_stats;
756 netdev->set_multicast_list = &e1000_set_multi;
757 netdev->set_mac_address = &e1000_set_mac;
758 netdev->change_mtu = &e1000_change_mtu;
759 netdev->do_ioctl = &e1000_ioctl;
760 e1000_set_ethtool_ops(netdev);
761 netdev->tx_timeout = &e1000_tx_timeout;
762 netdev->watchdog_timeo = 5 * HZ;
763 #ifdef CONFIG_E1000_NAPI
764 netdev->poll = &e1000_clean;
765 netdev->weight = 64;
766 #endif
767 netdev->vlan_rx_register = e1000_vlan_rx_register;
768 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
769 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
770 #ifdef CONFIG_NET_POLL_CONTROLLER
771 netdev->poll_controller = e1000_netpoll;
772 #endif
773 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
774
775 netdev->mem_start = mmio_start;
776 netdev->mem_end = mmio_start + mmio_len;
777 netdev->base_addr = adapter->hw.io_base;
778
779 adapter->bd_number = cards_found;
780
781 /* setup the private structure */
782
783 if ((err = e1000_sw_init(adapter)))
784 goto err_sw_init;
785
786 err = -EIO;
787 /* Flash BAR mapping must happen after e1000_sw_init
788 * because it depends on mac_type */
789 if ((adapter->hw.mac_type == e1000_ich8lan) &&
790 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
791 flash_start = pci_resource_start(pdev, 1);
792 flash_len = pci_resource_len(pdev, 1);
793 adapter->hw.flash_address = ioremap(flash_start, flash_len);
794 if (!adapter->hw.flash_address)
795 goto err_flashmap;
796 }
797
798 if (e1000_check_phy_reset_block(&adapter->hw))
799 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
800
801 if (adapter->hw.mac_type >= e1000_82543) {
802 netdev->features = NETIF_F_SG |
803 NETIF_F_HW_CSUM |
804 NETIF_F_HW_VLAN_TX |
805 NETIF_F_HW_VLAN_RX |
806 NETIF_F_HW_VLAN_FILTER;
807 if (adapter->hw.mac_type == e1000_ich8lan)
808 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
809 }
810
811 #ifdef NETIF_F_TSO
812 if ((adapter->hw.mac_type >= e1000_82544) &&
813 (adapter->hw.mac_type != e1000_82547))
814 netdev->features |= NETIF_F_TSO;
815
816 #ifdef NETIF_F_TSO_IPV6
817 if (adapter->hw.mac_type > e1000_82547_rev_2)
818 netdev->features |= NETIF_F_TSO_IPV6;
819 #endif
820 #endif
821 if (pci_using_dac)
822 netdev->features |= NETIF_F_HIGHDMA;
823
824 netdev->features |= NETIF_F_LLTX;
825
826 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
827
828 /* initialize eeprom parameters */
829
830 if (e1000_init_eeprom_params(&adapter->hw)) {
831 E1000_ERR("EEPROM initialization failed\n");
832 goto err_eeprom;
833 }
834
835 /* before reading the EEPROM, reset the controller to
836 * put the device in a known good starting state */
837
838 e1000_reset_hw(&adapter->hw);
839
840 /* make sure the EEPROM is good */
841
842 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
843 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
844 goto err_eeprom;
845 }
846
847 /* copy the MAC address out of the EEPROM */
848
849 if (e1000_read_mac_addr(&adapter->hw))
850 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
851 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
852 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
853
854 if (!is_valid_ether_addr(netdev->perm_addr)) {
855 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
856 goto err_eeprom;
857 }
858
859 e1000_get_bus_info(&adapter->hw);
860
861 init_timer(&adapter->tx_fifo_stall_timer);
862 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
863 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
864
865 init_timer(&adapter->watchdog_timer);
866 adapter->watchdog_timer.function = &e1000_watchdog;
867 adapter->watchdog_timer.data = (unsigned long) adapter;
868
869 init_timer(&adapter->phy_info_timer);
870 adapter->phy_info_timer.function = &e1000_update_phy_info;
871 adapter->phy_info_timer.data = (unsigned long) adapter;
872
873 INIT_WORK(&adapter->reset_task,
874 (void (*)(void *))e1000_reset_task, netdev);
875
876 /* we're going to reset, so assume we have no link for now */
877
878 netif_carrier_off(netdev);
879 netif_stop_queue(netdev);
880
881 e1000_check_options(adapter);
882
883 /* Initial Wake on LAN setting
884 * If APM wake is enabled in the EEPROM,
885 * enable the ACPI Magic Packet filter
886 */
887
888 switch (adapter->hw.mac_type) {
889 case e1000_82542_rev2_0:
890 case e1000_82542_rev2_1:
891 case e1000_82543:
892 break;
893 case e1000_82544:
894 e1000_read_eeprom(&adapter->hw,
895 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
896 eeprom_apme_mask = E1000_EEPROM_82544_APM;
897 break;
898 case e1000_ich8lan:
899 e1000_read_eeprom(&adapter->hw,
900 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
901 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
902 break;
903 case e1000_82546:
904 case e1000_82546_rev_3:
905 case e1000_82571:
906 case e1000_80003es2lan:
907 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
908 e1000_read_eeprom(&adapter->hw,
909 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
910 break;
911 }
912 /* Fall Through */
913 default:
914 e1000_read_eeprom(&adapter->hw,
915 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
916 break;
917 }
918 if (eeprom_data & eeprom_apme_mask)
919 adapter->eeprom_wol |= E1000_WUFC_MAG;
920
921 /* now that we have the eeprom settings, apply the special cases
922 * where the eeprom may be wrong or the board simply won't support
923 * wake on lan on a particular port */
924 switch (pdev->device) {
925 case E1000_DEV_ID_82546GB_PCIE:
926 adapter->eeprom_wol = 0;
927 break;
928 case E1000_DEV_ID_82546EB_FIBER:
929 case E1000_DEV_ID_82546GB_FIBER:
930 case E1000_DEV_ID_82571EB_FIBER:
931 /* Wake events only supported on port A for dual fiber
932 * regardless of eeprom setting */
933 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
934 adapter->eeprom_wol = 0;
935 break;
936 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
937 case E1000_DEV_ID_82571EB_QUAD_COPPER:
938 /* if quad port adapter, disable WoL on all but port A */
939 if (global_quad_port_a != 0)
940 adapter->eeprom_wol = 0;
941 else
942 adapter->quad_port_a = 1;
943 /* Reset for multiple quad port adapters */
944 if (++global_quad_port_a == 4)
945 global_quad_port_a = 0;
946 break;
947 }
948
949 /* initialize the wol settings based on the eeprom settings */
950 adapter->wol = adapter->eeprom_wol;
951
952 /* print bus type/speed/width info */
953 {
954 struct e1000_hw *hw = &adapter->hw;
955 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
956 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
957 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
958 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
959 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
960 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
961 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
962 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
963 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
964 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
965 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
966 "32-bit"));
967 }
968
969 for (i = 0; i < 6; i++)
970 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
971
972 /* reset the hardware with the new settings */
973 e1000_reset(adapter);
974
975 /* If the controller is 82573 and f/w is AMT, do not set
976 * DRV_LOAD until the interface is up. For all other cases,
977 * let the f/w know that the h/w is now under the control
978 * of the driver. */
979 if (adapter->hw.mac_type != e1000_82573 ||
980 !e1000_check_mng_mode(&adapter->hw))
981 e1000_get_hw_control(adapter);
982
983 strcpy(netdev->name, "eth%d");
984 if ((err = register_netdev(netdev)))
985 goto err_register;
986
987 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
988
989 cards_found++;
990 return 0;
991
992 err_register:
993 e1000_release_hw_control(adapter);
994 err_eeprom:
995 if (!e1000_check_phy_reset_block(&adapter->hw))
996 e1000_phy_hw_reset(&adapter->hw);
997
998 if (adapter->hw.flash_address)
999 iounmap(adapter->hw.flash_address);
1000 err_flashmap:
1001 #ifdef CONFIG_E1000_NAPI
1002 for (i = 0; i < adapter->num_rx_queues; i++)
1003 dev_put(&adapter->polling_netdev[i]);
1004 #endif
1005
1006 kfree(adapter->tx_ring);
1007 kfree(adapter->rx_ring);
1008 #ifdef CONFIG_E1000_NAPI
1009 kfree(adapter->polling_netdev);
1010 #endif
1011 err_sw_init:
1012 iounmap(adapter->hw.hw_addr);
1013 err_ioremap:
1014 free_netdev(netdev);
1015 err_alloc_etherdev:
1016 pci_release_regions(pdev);
1017 err_pci_reg:
1018 err_dma:
1019 pci_disable_device(pdev);
1020 return err;
1021 }
1022
1023 /**
1024 * e1000_remove - Device Removal Routine
1025 * @pdev: PCI device information struct
1026 *
1027 * e1000_remove is called by the PCI subsystem to alert the driver
1028 * that it should release a PCI device. The could be caused by a
1029 * Hot-Plug event, or because the driver is going to be removed from
1030 * memory.
1031 **/
1032
1033 static void __devexit
1034 e1000_remove(struct pci_dev *pdev)
1035 {
1036 struct net_device *netdev = pci_get_drvdata(pdev);
1037 struct e1000_adapter *adapter = netdev_priv(netdev);
1038 uint32_t manc;
1039 #ifdef CONFIG_E1000_NAPI
1040 int i;
1041 #endif
1042
1043 flush_scheduled_work();
1044
1045 if (adapter->hw.mac_type >= e1000_82540 &&
1046 adapter->hw.mac_type != e1000_ich8lan &&
1047 adapter->hw.media_type == e1000_media_type_copper) {
1048 manc = E1000_READ_REG(&adapter->hw, MANC);
1049 if (manc & E1000_MANC_SMBUS_EN) {
1050 manc |= E1000_MANC_ARP_EN;
1051 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1052 }
1053 }
1054
1055 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1056 * would have already happened in close and is redundant. */
1057 e1000_release_hw_control(adapter);
1058
1059 unregister_netdev(netdev);
1060 #ifdef CONFIG_E1000_NAPI
1061 for (i = 0; i < adapter->num_rx_queues; i++)
1062 dev_put(&adapter->polling_netdev[i]);
1063 #endif
1064
1065 if (!e1000_check_phy_reset_block(&adapter->hw))
1066 e1000_phy_hw_reset(&adapter->hw);
1067
1068 kfree(adapter->tx_ring);
1069 kfree(adapter->rx_ring);
1070 #ifdef CONFIG_E1000_NAPI
1071 kfree(adapter->polling_netdev);
1072 #endif
1073
1074 iounmap(adapter->hw.hw_addr);
1075 if (adapter->hw.flash_address)
1076 iounmap(adapter->hw.flash_address);
1077 pci_release_regions(pdev);
1078
1079 free_netdev(netdev);
1080
1081 pci_disable_device(pdev);
1082 }
1083
1084 /**
1085 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1086 * @adapter: board private structure to initialize
1087 *
1088 * e1000_sw_init initializes the Adapter private data structure.
1089 * Fields are initialized based on PCI device information and
1090 * OS network device settings (MTU size).
1091 **/
1092
1093 static int __devinit
1094 e1000_sw_init(struct e1000_adapter *adapter)
1095 {
1096 struct e1000_hw *hw = &adapter->hw;
1097 struct net_device *netdev = adapter->netdev;
1098 struct pci_dev *pdev = adapter->pdev;
1099 #ifdef CONFIG_E1000_NAPI
1100 int i;
1101 #endif
1102
1103 /* PCI config space info */
1104
1105 hw->vendor_id = pdev->vendor;
1106 hw->device_id = pdev->device;
1107 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1108 hw->subsystem_id = pdev->subsystem_device;
1109
1110 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1111
1112 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1113
1114 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1115 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1116 hw->max_frame_size = netdev->mtu +
1117 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1118 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1119
1120 /* identify the MAC */
1121
1122 if (e1000_set_mac_type(hw)) {
1123 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1124 return -EIO;
1125 }
1126
1127 switch (hw->mac_type) {
1128 default:
1129 break;
1130 case e1000_82541:
1131 case e1000_82547:
1132 case e1000_82541_rev_2:
1133 case e1000_82547_rev_2:
1134 hw->phy_init_script = 1;
1135 break;
1136 }
1137
1138 e1000_set_media_type(hw);
1139
1140 hw->wait_autoneg_complete = FALSE;
1141 hw->tbi_compatibility_en = TRUE;
1142 hw->adaptive_ifs = TRUE;
1143
1144 /* Copper options */
1145
1146 if (hw->media_type == e1000_media_type_copper) {
1147 hw->mdix = AUTO_ALL_MODES;
1148 hw->disable_polarity_correction = FALSE;
1149 hw->master_slave = E1000_MASTER_SLAVE;
1150 }
1151
1152 adapter->num_tx_queues = 1;
1153 adapter->num_rx_queues = 1;
1154
1155 if (e1000_alloc_queues(adapter)) {
1156 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1157 return -ENOMEM;
1158 }
1159
1160 #ifdef CONFIG_E1000_NAPI
1161 for (i = 0; i < adapter->num_rx_queues; i++) {
1162 adapter->polling_netdev[i].priv = adapter;
1163 adapter->polling_netdev[i].poll = &e1000_clean;
1164 adapter->polling_netdev[i].weight = 64;
1165 dev_hold(&adapter->polling_netdev[i]);
1166 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1167 }
1168 spin_lock_init(&adapter->tx_queue_lock);
1169 #endif
1170
1171 atomic_set(&adapter->irq_sem, 1);
1172 spin_lock_init(&adapter->stats_lock);
1173
1174 return 0;
1175 }
1176
1177 /**
1178 * e1000_alloc_queues - Allocate memory for all rings
1179 * @adapter: board private structure to initialize
1180 *
1181 * We allocate one ring per queue at run-time since we don't know the
1182 * number of queues at compile-time. The polling_netdev array is
1183 * intended for Multiqueue, but should work fine with a single queue.
1184 **/
1185
1186 static int __devinit
1187 e1000_alloc_queues(struct e1000_adapter *adapter)
1188 {
1189 int size;
1190
1191 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1192 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1193 if (!adapter->tx_ring)
1194 return -ENOMEM;
1195 memset(adapter->tx_ring, 0, size);
1196
1197 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1198 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1199 if (!adapter->rx_ring) {
1200 kfree(adapter->tx_ring);
1201 return -ENOMEM;
1202 }
1203 memset(adapter->rx_ring, 0, size);
1204
1205 #ifdef CONFIG_E1000_NAPI
1206 size = sizeof(struct net_device) * adapter->num_rx_queues;
1207 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1208 if (!adapter->polling_netdev) {
1209 kfree(adapter->tx_ring);
1210 kfree(adapter->rx_ring);
1211 return -ENOMEM;
1212 }
1213 memset(adapter->polling_netdev, 0, size);
1214 #endif
1215
1216 return E1000_SUCCESS;
1217 }
1218
1219 /**
1220 * e1000_open - Called when a network interface is made active
1221 * @netdev: network interface device structure
1222 *
1223 * Returns 0 on success, negative value on failure
1224 *
1225 * The open entry point is called when a network interface is made
1226 * active by the system (IFF_UP). At this point all resources needed
1227 * for transmit and receive operations are allocated, the interrupt
1228 * handler is registered with the OS, the watchdog timer is started,
1229 * and the stack is notified that the interface is ready.
1230 **/
1231
1232 static int
1233 e1000_open(struct net_device *netdev)
1234 {
1235 struct e1000_adapter *adapter = netdev_priv(netdev);
1236 int err;
1237
1238 /* disallow open during test */
1239 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1240 return -EBUSY;
1241
1242 /* allocate transmit descriptors */
1243
1244 if ((err = e1000_setup_all_tx_resources(adapter)))
1245 goto err_setup_tx;
1246
1247 /* allocate receive descriptors */
1248
1249 if ((err = e1000_setup_all_rx_resources(adapter)))
1250 goto err_setup_rx;
1251
1252 err = e1000_request_irq(adapter);
1253 if (err)
1254 goto err_req_irq;
1255
1256 e1000_power_up_phy(adapter);
1257
1258 if ((err = e1000_up(adapter)))
1259 goto err_up;
1260 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1261 if ((adapter->hw.mng_cookie.status &
1262 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1263 e1000_update_mng_vlan(adapter);
1264 }
1265
1266 /* If AMT is enabled, let the firmware know that the network
1267 * interface is now open */
1268 if (adapter->hw.mac_type == e1000_82573 &&
1269 e1000_check_mng_mode(&adapter->hw))
1270 e1000_get_hw_control(adapter);
1271
1272 return E1000_SUCCESS;
1273
1274 err_up:
1275 e1000_power_down_phy(adapter);
1276 e1000_free_irq(adapter);
1277 err_req_irq:
1278 e1000_free_all_rx_resources(adapter);
1279 err_setup_rx:
1280 e1000_free_all_tx_resources(adapter);
1281 err_setup_tx:
1282 e1000_reset(adapter);
1283
1284 return err;
1285 }
1286
1287 /**
1288 * e1000_close - Disables a network interface
1289 * @netdev: network interface device structure
1290 *
1291 * Returns 0, this is not allowed to fail
1292 *
1293 * The close entry point is called when an interface is de-activated
1294 * by the OS. The hardware is still under the drivers control, but
1295 * needs to be disabled. A global MAC reset is issued to stop the
1296 * hardware, and all transmit and receive resources are freed.
1297 **/
1298
1299 static int
1300 e1000_close(struct net_device *netdev)
1301 {
1302 struct e1000_adapter *adapter = netdev_priv(netdev);
1303
1304 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1305 e1000_down(adapter);
1306 e1000_power_down_phy(adapter);
1307 e1000_free_irq(adapter);
1308
1309 e1000_free_all_tx_resources(adapter);
1310 e1000_free_all_rx_resources(adapter);
1311
1312 if ((adapter->hw.mng_cookie.status &
1313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1314 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1315 }
1316
1317 /* If AMT is enabled, let the firmware know that the network
1318 * interface is now closed */
1319 if (adapter->hw.mac_type == e1000_82573 &&
1320 e1000_check_mng_mode(&adapter->hw))
1321 e1000_release_hw_control(adapter);
1322
1323 return 0;
1324 }
1325
1326 /**
1327 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1328 * @adapter: address of board private structure
1329 * @start: address of beginning of memory
1330 * @len: length of memory
1331 **/
1332 static boolean_t
1333 e1000_check_64k_bound(struct e1000_adapter *adapter,
1334 void *start, unsigned long len)
1335 {
1336 unsigned long begin = (unsigned long) start;
1337 unsigned long end = begin + len;
1338
1339 /* First rev 82545 and 82546 need to not allow any memory
1340 * write location to cross 64k boundary due to errata 23 */
1341 if (adapter->hw.mac_type == e1000_82545 ||
1342 adapter->hw.mac_type == e1000_82546) {
1343 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1344 }
1345
1346 return TRUE;
1347 }
1348
1349 /**
1350 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1351 * @adapter: board private structure
1352 * @txdr: tx descriptor ring (for a specific queue) to setup
1353 *
1354 * Return 0 on success, negative on failure
1355 **/
1356
1357 static int
1358 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1359 struct e1000_tx_ring *txdr)
1360 {
1361 struct pci_dev *pdev = adapter->pdev;
1362 int size;
1363
1364 size = sizeof(struct e1000_buffer) * txdr->count;
1365 txdr->buffer_info = vmalloc(size);
1366 if (!txdr->buffer_info) {
1367 DPRINTK(PROBE, ERR,
1368 "Unable to allocate memory for the transmit descriptor ring\n");
1369 return -ENOMEM;
1370 }
1371 memset(txdr->buffer_info, 0, size);
1372
1373 /* round up to nearest 4K */
1374
1375 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1376 E1000_ROUNDUP(txdr->size, 4096);
1377
1378 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1379 if (!txdr->desc) {
1380 setup_tx_desc_die:
1381 vfree(txdr->buffer_info);
1382 DPRINTK(PROBE, ERR,
1383 "Unable to allocate memory for the transmit descriptor ring\n");
1384 return -ENOMEM;
1385 }
1386
1387 /* Fix for errata 23, can't cross 64kB boundary */
1388 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1389 void *olddesc = txdr->desc;
1390 dma_addr_t olddma = txdr->dma;
1391 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1392 "at %p\n", txdr->size, txdr->desc);
1393 /* Try again, without freeing the previous */
1394 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1395 /* Failed allocation, critical failure */
1396 if (!txdr->desc) {
1397 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1398 goto setup_tx_desc_die;
1399 }
1400
1401 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1402 /* give up */
1403 pci_free_consistent(pdev, txdr->size, txdr->desc,
1404 txdr->dma);
1405 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1406 DPRINTK(PROBE, ERR,
1407 "Unable to allocate aligned memory "
1408 "for the transmit descriptor ring\n");
1409 vfree(txdr->buffer_info);
1410 return -ENOMEM;
1411 } else {
1412 /* Free old allocation, new allocation was successful */
1413 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1414 }
1415 }
1416 memset(txdr->desc, 0, txdr->size);
1417
1418 txdr->next_to_use = 0;
1419 txdr->next_to_clean = 0;
1420 spin_lock_init(&txdr->tx_lock);
1421
1422 return 0;
1423 }
1424
1425 /**
1426 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1427 * (Descriptors) for all queues
1428 * @adapter: board private structure
1429 *
1430 * Return 0 on success, negative on failure
1431 **/
1432
1433 int
1434 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1435 {
1436 int i, err = 0;
1437
1438 for (i = 0; i < adapter->num_tx_queues; i++) {
1439 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1440 if (err) {
1441 DPRINTK(PROBE, ERR,
1442 "Allocation for Tx Queue %u failed\n", i);
1443 for (i-- ; i >= 0; i--)
1444 e1000_free_tx_resources(adapter,
1445 &adapter->tx_ring[i]);
1446 break;
1447 }
1448 }
1449
1450 return err;
1451 }
1452
1453 /**
1454 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1455 * @adapter: board private structure
1456 *
1457 * Configure the Tx unit of the MAC after a reset.
1458 **/
1459
1460 static void
1461 e1000_configure_tx(struct e1000_adapter *adapter)
1462 {
1463 uint64_t tdba;
1464 struct e1000_hw *hw = &adapter->hw;
1465 uint32_t tdlen, tctl, tipg, tarc;
1466 uint32_t ipgr1, ipgr2;
1467
1468 /* Setup the HW Tx Head and Tail descriptor pointers */
1469
1470 switch (adapter->num_tx_queues) {
1471 case 1:
1472 default:
1473 tdba = adapter->tx_ring[0].dma;
1474 tdlen = adapter->tx_ring[0].count *
1475 sizeof(struct e1000_tx_desc);
1476 E1000_WRITE_REG(hw, TDLEN, tdlen);
1477 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1478 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1479 E1000_WRITE_REG(hw, TDT, 0);
1480 E1000_WRITE_REG(hw, TDH, 0);
1481 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1482 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1483 break;
1484 }
1485
1486 /* Set the default values for the Tx Inter Packet Gap timer */
1487
1488 if (hw->media_type == e1000_media_type_fiber ||
1489 hw->media_type == e1000_media_type_internal_serdes)
1490 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1491 else
1492 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1493
1494 switch (hw->mac_type) {
1495 case e1000_82542_rev2_0:
1496 case e1000_82542_rev2_1:
1497 tipg = DEFAULT_82542_TIPG_IPGT;
1498 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1499 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1500 break;
1501 case e1000_80003es2lan:
1502 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1503 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1504 break;
1505 default:
1506 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1507 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1508 break;
1509 }
1510 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1511 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1512 E1000_WRITE_REG(hw, TIPG, tipg);
1513
1514 /* Set the Tx Interrupt Delay register */
1515
1516 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1517 if (hw->mac_type >= e1000_82540)
1518 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1519
1520 /* Program the Transmit Control Register */
1521
1522 tctl = E1000_READ_REG(hw, TCTL);
1523
1524 tctl &= ~E1000_TCTL_CT;
1525 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1526 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1527
1528 #ifdef DISABLE_MULR
1529 /* disable Multiple Reads for debugging */
1530 tctl &= ~E1000_TCTL_MULR;
1531 #endif
1532
1533 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1534 tarc = E1000_READ_REG(hw, TARC0);
1535 tarc |= ((1 << 25) | (1 << 21));
1536 E1000_WRITE_REG(hw, TARC0, tarc);
1537 tarc = E1000_READ_REG(hw, TARC1);
1538 tarc |= (1 << 25);
1539 if (tctl & E1000_TCTL_MULR)
1540 tarc &= ~(1 << 28);
1541 else
1542 tarc |= (1 << 28);
1543 E1000_WRITE_REG(hw, TARC1, tarc);
1544 } else if (hw->mac_type == e1000_80003es2lan) {
1545 tarc = E1000_READ_REG(hw, TARC0);
1546 tarc |= 1;
1547 E1000_WRITE_REG(hw, TARC0, tarc);
1548 tarc = E1000_READ_REG(hw, TARC1);
1549 tarc |= 1;
1550 E1000_WRITE_REG(hw, TARC1, tarc);
1551 }
1552
1553 e1000_config_collision_dist(hw);
1554
1555 /* Setup Transmit Descriptor Settings for eop descriptor */
1556 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1557 E1000_TXD_CMD_IFCS;
1558
1559 if (hw->mac_type < e1000_82543)
1560 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1561 else
1562 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1563
1564 /* Cache if we're 82544 running in PCI-X because we'll
1565 * need this to apply a workaround later in the send path. */
1566 if (hw->mac_type == e1000_82544 &&
1567 hw->bus_type == e1000_bus_type_pcix)
1568 adapter->pcix_82544 = 1;
1569
1570 E1000_WRITE_REG(hw, TCTL, tctl);
1571
1572 }
1573
1574 /**
1575 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1576 * @adapter: board private structure
1577 * @rxdr: rx descriptor ring (for a specific queue) to setup
1578 *
1579 * Returns 0 on success, negative on failure
1580 **/
1581
1582 static int
1583 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1584 struct e1000_rx_ring *rxdr)
1585 {
1586 struct pci_dev *pdev = adapter->pdev;
1587 int size, desc_len;
1588
1589 size = sizeof(struct e1000_buffer) * rxdr->count;
1590 rxdr->buffer_info = vmalloc(size);
1591 if (!rxdr->buffer_info) {
1592 DPRINTK(PROBE, ERR,
1593 "Unable to allocate memory for the receive descriptor ring\n");
1594 return -ENOMEM;
1595 }
1596 memset(rxdr->buffer_info, 0, size);
1597
1598 size = sizeof(struct e1000_ps_page) * rxdr->count;
1599 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1600 if (!rxdr->ps_page) {
1601 vfree(rxdr->buffer_info);
1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory for the receive descriptor ring\n");
1604 return -ENOMEM;
1605 }
1606 memset(rxdr->ps_page, 0, size);
1607
1608 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1609 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1610 if (!rxdr->ps_page_dma) {
1611 vfree(rxdr->buffer_info);
1612 kfree(rxdr->ps_page);
1613 DPRINTK(PROBE, ERR,
1614 "Unable to allocate memory for the receive descriptor ring\n");
1615 return -ENOMEM;
1616 }
1617 memset(rxdr->ps_page_dma, 0, size);
1618
1619 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1620 desc_len = sizeof(struct e1000_rx_desc);
1621 else
1622 desc_len = sizeof(union e1000_rx_desc_packet_split);
1623
1624 /* Round up to nearest 4K */
1625
1626 rxdr->size = rxdr->count * desc_len;
1627 E1000_ROUNDUP(rxdr->size, 4096);
1628
1629 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1630
1631 if (!rxdr->desc) {
1632 DPRINTK(PROBE, ERR,
1633 "Unable to allocate memory for the receive descriptor ring\n");
1634 setup_rx_desc_die:
1635 vfree(rxdr->buffer_info);
1636 kfree(rxdr->ps_page);
1637 kfree(rxdr->ps_page_dma);
1638 return -ENOMEM;
1639 }
1640
1641 /* Fix for errata 23, can't cross 64kB boundary */
1642 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1643 void *olddesc = rxdr->desc;
1644 dma_addr_t olddma = rxdr->dma;
1645 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1646 "at %p\n", rxdr->size, rxdr->desc);
1647 /* Try again, without freeing the previous */
1648 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1649 /* Failed allocation, critical failure */
1650 if (!rxdr->desc) {
1651 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1652 DPRINTK(PROBE, ERR,
1653 "Unable to allocate memory "
1654 "for the receive descriptor ring\n");
1655 goto setup_rx_desc_die;
1656 }
1657
1658 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1659 /* give up */
1660 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1661 rxdr->dma);
1662 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1663 DPRINTK(PROBE, ERR,
1664 "Unable to allocate aligned memory "
1665 "for the receive descriptor ring\n");
1666 goto setup_rx_desc_die;
1667 } else {
1668 /* Free old allocation, new allocation was successful */
1669 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1670 }
1671 }
1672 memset(rxdr->desc, 0, rxdr->size);
1673
1674 rxdr->next_to_clean = 0;
1675 rxdr->next_to_use = 0;
1676
1677 return 0;
1678 }
1679
1680 /**
1681 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1682 * (Descriptors) for all queues
1683 * @adapter: board private structure
1684 *
1685 * Return 0 on success, negative on failure
1686 **/
1687
1688 int
1689 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1690 {
1691 int i, err = 0;
1692
1693 for (i = 0; i < adapter->num_rx_queues; i++) {
1694 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1695 if (err) {
1696 DPRINTK(PROBE, ERR,
1697 "Allocation for Rx Queue %u failed\n", i);
1698 for (i-- ; i >= 0; i--)
1699 e1000_free_rx_resources(adapter,
1700 &adapter->rx_ring[i]);
1701 break;
1702 }
1703 }
1704
1705 return err;
1706 }
1707
1708 /**
1709 * e1000_setup_rctl - configure the receive control registers
1710 * @adapter: Board private structure
1711 **/
1712 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1713 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1714 static void
1715 e1000_setup_rctl(struct e1000_adapter *adapter)
1716 {
1717 uint32_t rctl, rfctl;
1718 uint32_t psrctl = 0;
1719 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1720 uint32_t pages = 0;
1721 #endif
1722
1723 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1724
1725 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1726
1727 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1728 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1729 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1730
1731 if (adapter->hw.tbi_compatibility_on == 1)
1732 rctl |= E1000_RCTL_SBP;
1733 else
1734 rctl &= ~E1000_RCTL_SBP;
1735
1736 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1737 rctl &= ~E1000_RCTL_LPE;
1738 else
1739 rctl |= E1000_RCTL_LPE;
1740
1741 /* Setup buffer sizes */
1742 rctl &= ~E1000_RCTL_SZ_4096;
1743 rctl |= E1000_RCTL_BSEX;
1744 switch (adapter->rx_buffer_len) {
1745 case E1000_RXBUFFER_256:
1746 rctl |= E1000_RCTL_SZ_256;
1747 rctl &= ~E1000_RCTL_BSEX;
1748 break;
1749 case E1000_RXBUFFER_512:
1750 rctl |= E1000_RCTL_SZ_512;
1751 rctl &= ~E1000_RCTL_BSEX;
1752 break;
1753 case E1000_RXBUFFER_1024:
1754 rctl |= E1000_RCTL_SZ_1024;
1755 rctl &= ~E1000_RCTL_BSEX;
1756 break;
1757 case E1000_RXBUFFER_2048:
1758 default:
1759 rctl |= E1000_RCTL_SZ_2048;
1760 rctl &= ~E1000_RCTL_BSEX;
1761 break;
1762 case E1000_RXBUFFER_4096:
1763 rctl |= E1000_RCTL_SZ_4096;
1764 break;
1765 case E1000_RXBUFFER_8192:
1766 rctl |= E1000_RCTL_SZ_8192;
1767 break;
1768 case E1000_RXBUFFER_16384:
1769 rctl |= E1000_RCTL_SZ_16384;
1770 break;
1771 }
1772
1773 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1774 /* 82571 and greater support packet-split where the protocol
1775 * header is placed in skb->data and the packet data is
1776 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1777 * In the case of a non-split, skb->data is linearly filled,
1778 * followed by the page buffers. Therefore, skb->data is
1779 * sized to hold the largest protocol header.
1780 */
1781 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1782 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1783 PAGE_SIZE <= 16384)
1784 adapter->rx_ps_pages = pages;
1785 else
1786 adapter->rx_ps_pages = 0;
1787 #endif
1788 if (adapter->rx_ps_pages) {
1789 /* Configure extra packet-split registers */
1790 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1791 rfctl |= E1000_RFCTL_EXTEN;
1792 /* disable IPv6 packet split support */
1793 rfctl |= E1000_RFCTL_IPV6_DIS;
1794 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1795
1796 rctl |= E1000_RCTL_DTYP_PS;
1797
1798 psrctl |= adapter->rx_ps_bsize0 >>
1799 E1000_PSRCTL_BSIZE0_SHIFT;
1800
1801 switch (adapter->rx_ps_pages) {
1802 case 3:
1803 psrctl |= PAGE_SIZE <<
1804 E1000_PSRCTL_BSIZE3_SHIFT;
1805 case 2:
1806 psrctl |= PAGE_SIZE <<
1807 E1000_PSRCTL_BSIZE2_SHIFT;
1808 case 1:
1809 psrctl |= PAGE_SIZE >>
1810 E1000_PSRCTL_BSIZE1_SHIFT;
1811 break;
1812 }
1813
1814 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1815 }
1816
1817 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1818 }
1819
1820 /**
1821 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1822 * @adapter: board private structure
1823 *
1824 * Configure the Rx unit of the MAC after a reset.
1825 **/
1826
1827 static void
1828 e1000_configure_rx(struct e1000_adapter *adapter)
1829 {
1830 uint64_t rdba;
1831 struct e1000_hw *hw = &adapter->hw;
1832 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1833
1834 if (adapter->rx_ps_pages) {
1835 /* this is a 32 byte descriptor */
1836 rdlen = adapter->rx_ring[0].count *
1837 sizeof(union e1000_rx_desc_packet_split);
1838 adapter->clean_rx = e1000_clean_rx_irq_ps;
1839 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1840 } else {
1841 rdlen = adapter->rx_ring[0].count *
1842 sizeof(struct e1000_rx_desc);
1843 adapter->clean_rx = e1000_clean_rx_irq;
1844 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1845 }
1846
1847 /* disable receives while setting up the descriptors */
1848 rctl = E1000_READ_REG(hw, RCTL);
1849 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1850
1851 /* set the Receive Delay Timer Register */
1852 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1853
1854 if (hw->mac_type >= e1000_82540) {
1855 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1856 if (adapter->itr > 1)
1857 E1000_WRITE_REG(hw, ITR,
1858 1000000000 / (adapter->itr * 256));
1859 }
1860
1861 if (hw->mac_type >= e1000_82571) {
1862 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1863 /* Reset delay timers after every interrupt */
1864 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1865 #ifdef CONFIG_E1000_NAPI
1866 /* Auto-Mask interrupts upon ICR read. */
1867 ctrl_ext |= E1000_CTRL_EXT_IAME;
1868 #endif
1869 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1870 E1000_WRITE_REG(hw, IAM, ~0);
1871 E1000_WRITE_FLUSH(hw);
1872 }
1873
1874 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1875 * the Base and Length of the Rx Descriptor Ring */
1876 switch (adapter->num_rx_queues) {
1877 case 1:
1878 default:
1879 rdba = adapter->rx_ring[0].dma;
1880 E1000_WRITE_REG(hw, RDLEN, rdlen);
1881 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1882 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1883 E1000_WRITE_REG(hw, RDT, 0);
1884 E1000_WRITE_REG(hw, RDH, 0);
1885 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1886 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1887 break;
1888 }
1889
1890 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1891 if (hw->mac_type >= e1000_82543) {
1892 rxcsum = E1000_READ_REG(hw, RXCSUM);
1893 if (adapter->rx_csum == TRUE) {
1894 rxcsum |= E1000_RXCSUM_TUOFL;
1895
1896 /* Enable 82571 IPv4 payload checksum for UDP fragments
1897 * Must be used in conjunction with packet-split. */
1898 if ((hw->mac_type >= e1000_82571) &&
1899 (adapter->rx_ps_pages)) {
1900 rxcsum |= E1000_RXCSUM_IPPCSE;
1901 }
1902 } else {
1903 rxcsum &= ~E1000_RXCSUM_TUOFL;
1904 /* don't need to clear IPPCSE as it defaults to 0 */
1905 }
1906 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1907 }
1908
1909 /* Enable Receives */
1910 E1000_WRITE_REG(hw, RCTL, rctl);
1911 }
1912
1913 /**
1914 * e1000_free_tx_resources - Free Tx Resources per Queue
1915 * @adapter: board private structure
1916 * @tx_ring: Tx descriptor ring for a specific queue
1917 *
1918 * Free all transmit software resources
1919 **/
1920
1921 static void
1922 e1000_free_tx_resources(struct e1000_adapter *adapter,
1923 struct e1000_tx_ring *tx_ring)
1924 {
1925 struct pci_dev *pdev = adapter->pdev;
1926
1927 e1000_clean_tx_ring(adapter, tx_ring);
1928
1929 vfree(tx_ring->buffer_info);
1930 tx_ring->buffer_info = NULL;
1931
1932 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1933
1934 tx_ring->desc = NULL;
1935 }
1936
1937 /**
1938 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1939 * @adapter: board private structure
1940 *
1941 * Free all transmit software resources
1942 **/
1943
1944 void
1945 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1946 {
1947 int i;
1948
1949 for (i = 0; i < adapter->num_tx_queues; i++)
1950 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1951 }
1952
1953 static void
1954 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1955 struct e1000_buffer *buffer_info)
1956 {
1957 if (buffer_info->dma) {
1958 pci_unmap_page(adapter->pdev,
1959 buffer_info->dma,
1960 buffer_info->length,
1961 PCI_DMA_TODEVICE);
1962 }
1963 if (buffer_info->skb)
1964 dev_kfree_skb_any(buffer_info->skb);
1965 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1966 }
1967
1968 /**
1969 * e1000_clean_tx_ring - Free Tx Buffers
1970 * @adapter: board private structure
1971 * @tx_ring: ring to be cleaned
1972 **/
1973
1974 static void
1975 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1976 struct e1000_tx_ring *tx_ring)
1977 {
1978 struct e1000_buffer *buffer_info;
1979 unsigned long size;
1980 unsigned int i;
1981
1982 /* Free all the Tx ring sk_buffs */
1983
1984 for (i = 0; i < tx_ring->count; i++) {
1985 buffer_info = &tx_ring->buffer_info[i];
1986 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1987 }
1988
1989 size = sizeof(struct e1000_buffer) * tx_ring->count;
1990 memset(tx_ring->buffer_info, 0, size);
1991
1992 /* Zero out the descriptor ring */
1993
1994 memset(tx_ring->desc, 0, tx_ring->size);
1995
1996 tx_ring->next_to_use = 0;
1997 tx_ring->next_to_clean = 0;
1998 tx_ring->last_tx_tso = 0;
1999
2000 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2001 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2002 }
2003
2004 /**
2005 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2006 * @adapter: board private structure
2007 **/
2008
2009 static void
2010 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2011 {
2012 int i;
2013
2014 for (i = 0; i < adapter->num_tx_queues; i++)
2015 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2016 }
2017
2018 /**
2019 * e1000_free_rx_resources - Free Rx Resources
2020 * @adapter: board private structure
2021 * @rx_ring: ring to clean the resources from
2022 *
2023 * Free all receive software resources
2024 **/
2025
2026 static void
2027 e1000_free_rx_resources(struct e1000_adapter *adapter,
2028 struct e1000_rx_ring *rx_ring)
2029 {
2030 struct pci_dev *pdev = adapter->pdev;
2031
2032 e1000_clean_rx_ring(adapter, rx_ring);
2033
2034 vfree(rx_ring->buffer_info);
2035 rx_ring->buffer_info = NULL;
2036 kfree(rx_ring->ps_page);
2037 rx_ring->ps_page = NULL;
2038 kfree(rx_ring->ps_page_dma);
2039 rx_ring->ps_page_dma = NULL;
2040
2041 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2042
2043 rx_ring->desc = NULL;
2044 }
2045
2046 /**
2047 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2048 * @adapter: board private structure
2049 *
2050 * Free all receive software resources
2051 **/
2052
2053 void
2054 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2055 {
2056 int i;
2057
2058 for (i = 0; i < adapter->num_rx_queues; i++)
2059 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2060 }
2061
2062 /**
2063 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2064 * @adapter: board private structure
2065 * @rx_ring: ring to free buffers from
2066 **/
2067
2068 static void
2069 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2070 struct e1000_rx_ring *rx_ring)
2071 {
2072 struct e1000_buffer *buffer_info;
2073 struct e1000_ps_page *ps_page;
2074 struct e1000_ps_page_dma *ps_page_dma;
2075 struct pci_dev *pdev = adapter->pdev;
2076 unsigned long size;
2077 unsigned int i, j;
2078
2079 /* Free all the Rx ring sk_buffs */
2080 for (i = 0; i < rx_ring->count; i++) {
2081 buffer_info = &rx_ring->buffer_info[i];
2082 if (buffer_info->skb) {
2083 pci_unmap_single(pdev,
2084 buffer_info->dma,
2085 buffer_info->length,
2086 PCI_DMA_FROMDEVICE);
2087
2088 dev_kfree_skb(buffer_info->skb);
2089 buffer_info->skb = NULL;
2090 }
2091 ps_page = &rx_ring->ps_page[i];
2092 ps_page_dma = &rx_ring->ps_page_dma[i];
2093 for (j = 0; j < adapter->rx_ps_pages; j++) {
2094 if (!ps_page->ps_page[j]) break;
2095 pci_unmap_page(pdev,
2096 ps_page_dma->ps_page_dma[j],
2097 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2098 ps_page_dma->ps_page_dma[j] = 0;
2099 put_page(ps_page->ps_page[j]);
2100 ps_page->ps_page[j] = NULL;
2101 }
2102 }
2103
2104 size = sizeof(struct e1000_buffer) * rx_ring->count;
2105 memset(rx_ring->buffer_info, 0, size);
2106 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2107 memset(rx_ring->ps_page, 0, size);
2108 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2109 memset(rx_ring->ps_page_dma, 0, size);
2110
2111 /* Zero out the descriptor ring */
2112
2113 memset(rx_ring->desc, 0, rx_ring->size);
2114
2115 rx_ring->next_to_clean = 0;
2116 rx_ring->next_to_use = 0;
2117
2118 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2119 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2120 }
2121
2122 /**
2123 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2124 * @adapter: board private structure
2125 **/
2126
2127 static void
2128 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2129 {
2130 int i;
2131
2132 for (i = 0; i < adapter->num_rx_queues; i++)
2133 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2134 }
2135
2136 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2137 * and memory write and invalidate disabled for certain operations
2138 */
2139 static void
2140 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2141 {
2142 struct net_device *netdev = adapter->netdev;
2143 uint32_t rctl;
2144
2145 e1000_pci_clear_mwi(&adapter->hw);
2146
2147 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2148 rctl |= E1000_RCTL_RST;
2149 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2150 E1000_WRITE_FLUSH(&adapter->hw);
2151 mdelay(5);
2152
2153 if (netif_running(netdev))
2154 e1000_clean_all_rx_rings(adapter);
2155 }
2156
2157 static void
2158 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2159 {
2160 struct net_device *netdev = adapter->netdev;
2161 uint32_t rctl;
2162
2163 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2164 rctl &= ~E1000_RCTL_RST;
2165 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2166 E1000_WRITE_FLUSH(&adapter->hw);
2167 mdelay(5);
2168
2169 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2170 e1000_pci_set_mwi(&adapter->hw);
2171
2172 if (netif_running(netdev)) {
2173 /* No need to loop, because 82542 supports only 1 queue */
2174 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2175 e1000_configure_rx(adapter);
2176 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2177 }
2178 }
2179
2180 /**
2181 * e1000_set_mac - Change the Ethernet Address of the NIC
2182 * @netdev: network interface device structure
2183 * @p: pointer to an address structure
2184 *
2185 * Returns 0 on success, negative on failure
2186 **/
2187
2188 static int
2189 e1000_set_mac(struct net_device *netdev, void *p)
2190 {
2191 struct e1000_adapter *adapter = netdev_priv(netdev);
2192 struct sockaddr *addr = p;
2193
2194 if (!is_valid_ether_addr(addr->sa_data))
2195 return -EADDRNOTAVAIL;
2196
2197 /* 82542 2.0 needs to be in reset to write receive address registers */
2198
2199 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2200 e1000_enter_82542_rst(adapter);
2201
2202 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2203 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2204
2205 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2206
2207 /* With 82571 controllers, LAA may be overwritten (with the default)
2208 * due to controller reset from the other port. */
2209 if (adapter->hw.mac_type == e1000_82571) {
2210 /* activate the work around */
2211 adapter->hw.laa_is_present = 1;
2212
2213 /* Hold a copy of the LAA in RAR[14] This is done so that
2214 * between the time RAR[0] gets clobbered and the time it
2215 * gets fixed (in e1000_watchdog), the actual LAA is in one
2216 * of the RARs and no incoming packets directed to this port
2217 * are dropped. Eventaully the LAA will be in RAR[0] and
2218 * RAR[14] */
2219 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2220 E1000_RAR_ENTRIES - 1);
2221 }
2222
2223 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2224 e1000_leave_82542_rst(adapter);
2225
2226 return 0;
2227 }
2228
2229 /**
2230 * e1000_set_multi - Multicast and Promiscuous mode set
2231 * @netdev: network interface device structure
2232 *
2233 * The set_multi entry point is called whenever the multicast address
2234 * list or the network interface flags are updated. This routine is
2235 * responsible for configuring the hardware for proper multicast,
2236 * promiscuous mode, and all-multi behavior.
2237 **/
2238
2239 static void
2240 e1000_set_multi(struct net_device *netdev)
2241 {
2242 struct e1000_adapter *adapter = netdev_priv(netdev);
2243 struct e1000_hw *hw = &adapter->hw;
2244 struct dev_mc_list *mc_ptr;
2245 uint32_t rctl;
2246 uint32_t hash_value;
2247 int i, rar_entries = E1000_RAR_ENTRIES;
2248 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2249 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2250 E1000_NUM_MTA_REGISTERS;
2251
2252 if (adapter->hw.mac_type == e1000_ich8lan)
2253 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2254
2255 /* reserve RAR[14] for LAA over-write work-around */
2256 if (adapter->hw.mac_type == e1000_82571)
2257 rar_entries--;
2258
2259 /* Check for Promiscuous and All Multicast modes */
2260
2261 rctl = E1000_READ_REG(hw, RCTL);
2262
2263 if (netdev->flags & IFF_PROMISC) {
2264 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2265 } else if (netdev->flags & IFF_ALLMULTI) {
2266 rctl |= E1000_RCTL_MPE;
2267 rctl &= ~E1000_RCTL_UPE;
2268 } else {
2269 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2270 }
2271
2272 E1000_WRITE_REG(hw, RCTL, rctl);
2273
2274 /* 82542 2.0 needs to be in reset to write receive address registers */
2275
2276 if (hw->mac_type == e1000_82542_rev2_0)
2277 e1000_enter_82542_rst(adapter);
2278
2279 /* load the first 14 multicast address into the exact filters 1-14
2280 * RAR 0 is used for the station MAC adddress
2281 * if there are not 14 addresses, go ahead and clear the filters
2282 * -- with 82571 controllers only 0-13 entries are filled here
2283 */
2284 mc_ptr = netdev->mc_list;
2285
2286 for (i = 1; i < rar_entries; i++) {
2287 if (mc_ptr) {
2288 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2289 mc_ptr = mc_ptr->next;
2290 } else {
2291 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2292 E1000_WRITE_FLUSH(hw);
2293 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2294 E1000_WRITE_FLUSH(hw);
2295 }
2296 }
2297
2298 /* clear the old settings from the multicast hash table */
2299
2300 for (i = 0; i < mta_reg_count; i++) {
2301 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2302 E1000_WRITE_FLUSH(hw);
2303 }
2304
2305 /* load any remaining addresses into the hash table */
2306
2307 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2308 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2309 e1000_mta_set(hw, hash_value);
2310 }
2311
2312 if (hw->mac_type == e1000_82542_rev2_0)
2313 e1000_leave_82542_rst(adapter);
2314 }
2315
2316 /* Need to wait a few seconds after link up to get diagnostic information from
2317 * the phy */
2318
2319 static void
2320 e1000_update_phy_info(unsigned long data)
2321 {
2322 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2323 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2324 }
2325
2326 /**
2327 * e1000_82547_tx_fifo_stall - Timer Call-back
2328 * @data: pointer to adapter cast into an unsigned long
2329 **/
2330
2331 static void
2332 e1000_82547_tx_fifo_stall(unsigned long data)
2333 {
2334 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2335 struct net_device *netdev = adapter->netdev;
2336 uint32_t tctl;
2337
2338 if (atomic_read(&adapter->tx_fifo_stall)) {
2339 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2340 E1000_READ_REG(&adapter->hw, TDH)) &&
2341 (E1000_READ_REG(&adapter->hw, TDFT) ==
2342 E1000_READ_REG(&adapter->hw, TDFH)) &&
2343 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2344 E1000_READ_REG(&adapter->hw, TDFHS))) {
2345 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2346 E1000_WRITE_REG(&adapter->hw, TCTL,
2347 tctl & ~E1000_TCTL_EN);
2348 E1000_WRITE_REG(&adapter->hw, TDFT,
2349 adapter->tx_head_addr);
2350 E1000_WRITE_REG(&adapter->hw, TDFH,
2351 adapter->tx_head_addr);
2352 E1000_WRITE_REG(&adapter->hw, TDFTS,
2353 adapter->tx_head_addr);
2354 E1000_WRITE_REG(&adapter->hw, TDFHS,
2355 adapter->tx_head_addr);
2356 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2357 E1000_WRITE_FLUSH(&adapter->hw);
2358
2359 adapter->tx_fifo_head = 0;
2360 atomic_set(&adapter->tx_fifo_stall, 0);
2361 netif_wake_queue(netdev);
2362 } else {
2363 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2364 }
2365 }
2366 }
2367
2368 /**
2369 * e1000_watchdog - Timer Call-back
2370 * @data: pointer to adapter cast into an unsigned long
2371 **/
2372 static void
2373 e1000_watchdog(unsigned long data)
2374 {
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2376 struct net_device *netdev = adapter->netdev;
2377 struct e1000_tx_ring *txdr = adapter->tx_ring;
2378 uint32_t link, tctl;
2379 int32_t ret_val;
2380
2381 ret_val = e1000_check_for_link(&adapter->hw);
2382 if ((ret_val == E1000_ERR_PHY) &&
2383 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2384 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2385 /* See e1000_kumeran_lock_loss_workaround() */
2386 DPRINTK(LINK, INFO,
2387 "Gigabit has been disabled, downgrading speed\n");
2388 }
2389 if (adapter->hw.mac_type == e1000_82573) {
2390 e1000_enable_tx_pkt_filtering(&adapter->hw);
2391 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2392 e1000_update_mng_vlan(adapter);
2393 }
2394
2395 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2396 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2397 link = !adapter->hw.serdes_link_down;
2398 else
2399 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2400
2401 if (link) {
2402 if (!netif_carrier_ok(netdev)) {
2403 boolean_t txb2b = 1;
2404 e1000_get_speed_and_duplex(&adapter->hw,
2405 &adapter->link_speed,
2406 &adapter->link_duplex);
2407
2408 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2409 adapter->link_speed,
2410 adapter->link_duplex == FULL_DUPLEX ?
2411 "Full Duplex" : "Half Duplex");
2412
2413 /* tweak tx_queue_len according to speed/duplex
2414 * and adjust the timeout factor */
2415 netdev->tx_queue_len = adapter->tx_queue_len;
2416 adapter->tx_timeout_factor = 1;
2417 switch (adapter->link_speed) {
2418 case SPEED_10:
2419 txb2b = 0;
2420 netdev->tx_queue_len = 10;
2421 adapter->tx_timeout_factor = 8;
2422 break;
2423 case SPEED_100:
2424 txb2b = 0;
2425 netdev->tx_queue_len = 100;
2426 /* maybe add some timeout factor ? */
2427 break;
2428 }
2429
2430 if ((adapter->hw.mac_type == e1000_82571 ||
2431 adapter->hw.mac_type == e1000_82572) &&
2432 txb2b == 0) {
2433 #define SPEED_MODE_BIT (1 << 21)
2434 uint32_t tarc0;
2435 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2436 tarc0 &= ~SPEED_MODE_BIT;
2437 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2438 }
2439
2440 #ifdef NETIF_F_TSO
2441 /* disable TSO for pcie and 10/100 speeds, to avoid
2442 * some hardware issues */
2443 if (!adapter->tso_force &&
2444 adapter->hw.bus_type == e1000_bus_type_pci_express){
2445 switch (adapter->link_speed) {
2446 case SPEED_10:
2447 case SPEED_100:
2448 DPRINTK(PROBE,INFO,
2449 "10/100 speed: disabling TSO\n");
2450 netdev->features &= ~NETIF_F_TSO;
2451 break;
2452 case SPEED_1000:
2453 netdev->features |= NETIF_F_TSO;
2454 break;
2455 default:
2456 /* oops */
2457 break;
2458 }
2459 }
2460 #endif
2461
2462 /* enable transmits in the hardware, need to do this
2463 * after setting TARC0 */
2464 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2465 tctl |= E1000_TCTL_EN;
2466 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2467
2468 netif_carrier_on(netdev);
2469 netif_wake_queue(netdev);
2470 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2471 adapter->smartspeed = 0;
2472 }
2473 } else {
2474 if (netif_carrier_ok(netdev)) {
2475 adapter->link_speed = 0;
2476 adapter->link_duplex = 0;
2477 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2478 netif_carrier_off(netdev);
2479 netif_stop_queue(netdev);
2480 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2481
2482 /* 80003ES2LAN workaround--
2483 * For packet buffer work-around on link down event;
2484 * disable receives in the ISR and
2485 * reset device here in the watchdog
2486 */
2487 if (adapter->hw.mac_type == e1000_80003es2lan)
2488 /* reset device */
2489 schedule_work(&adapter->reset_task);
2490 }
2491
2492 e1000_smartspeed(adapter);
2493 }
2494
2495 e1000_update_stats(adapter);
2496
2497 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2498 adapter->tpt_old = adapter->stats.tpt;
2499 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2500 adapter->colc_old = adapter->stats.colc;
2501
2502 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2503 adapter->gorcl_old = adapter->stats.gorcl;
2504 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2505 adapter->gotcl_old = adapter->stats.gotcl;
2506
2507 e1000_update_adaptive(&adapter->hw);
2508
2509 if (!netif_carrier_ok(netdev)) {
2510 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2511 /* We've lost link, so the controller stops DMA,
2512 * but we've got queued Tx work that's never going
2513 * to get done, so reset controller to flush Tx.
2514 * (Do the reset outside of interrupt context). */
2515 adapter->tx_timeout_count++;
2516 schedule_work(&adapter->reset_task);
2517 }
2518 }
2519
2520 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2521 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2522 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2523 * asymmetrical Tx or Rx gets ITR=8000; everyone
2524 * else is between 2000-8000. */
2525 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2526 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2527 adapter->gotcl - adapter->gorcl :
2528 adapter->gorcl - adapter->gotcl) / 10000;
2529 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2530 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2531 }
2532
2533 /* Cause software interrupt to ensure rx ring is cleaned */
2534 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2535
2536 /* Force detection of hung controller every watchdog period */
2537 adapter->detect_tx_hung = TRUE;
2538
2539 /* With 82571 controllers, LAA may be overwritten due to controller
2540 * reset from the other port. Set the appropriate LAA in RAR[0] */
2541 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2542 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2543
2544 /* Reset the timer */
2545 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2546 }
2547
2548 #define E1000_TX_FLAGS_CSUM 0x00000001
2549 #define E1000_TX_FLAGS_VLAN 0x00000002
2550 #define E1000_TX_FLAGS_TSO 0x00000004
2551 #define E1000_TX_FLAGS_IPV4 0x00000008
2552 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2553 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2554
2555 static int
2556 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2557 struct sk_buff *skb)
2558 {
2559 #ifdef NETIF_F_TSO
2560 struct e1000_context_desc *context_desc;
2561 struct e1000_buffer *buffer_info;
2562 unsigned int i;
2563 uint32_t cmd_length = 0;
2564 uint16_t ipcse = 0, tucse, mss;
2565 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2566 int err;
2567
2568 if (skb_is_gso(skb)) {
2569 if (skb_header_cloned(skb)) {
2570 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2571 if (err)
2572 return err;
2573 }
2574
2575 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2576 mss = skb_shinfo(skb)->gso_size;
2577 if (skb->protocol == htons(ETH_P_IP)) {
2578 skb->nh.iph->tot_len = 0;
2579 skb->nh.iph->check = 0;
2580 skb->h.th->check =
2581 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2582 skb->nh.iph->daddr,
2583 0,
2584 IPPROTO_TCP,
2585 0);
2586 cmd_length = E1000_TXD_CMD_IP;
2587 ipcse = skb->h.raw - skb->data - 1;
2588 #ifdef NETIF_F_TSO_IPV6
2589 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2590 skb->nh.ipv6h->payload_len = 0;
2591 skb->h.th->check =
2592 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2593 &skb->nh.ipv6h->daddr,
2594 0,
2595 IPPROTO_TCP,
2596 0);
2597 ipcse = 0;
2598 #endif
2599 }
2600 ipcss = skb->nh.raw - skb->data;
2601 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2602 tucss = skb->h.raw - skb->data;
2603 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2604 tucse = 0;
2605
2606 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2607 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2608
2609 i = tx_ring->next_to_use;
2610 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2611 buffer_info = &tx_ring->buffer_info[i];
2612
2613 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2614 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2615 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2616 context_desc->upper_setup.tcp_fields.tucss = tucss;
2617 context_desc->upper_setup.tcp_fields.tucso = tucso;
2618 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2619 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2620 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2621 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2622
2623 buffer_info->time_stamp = jiffies;
2624
2625 if (++i == tx_ring->count) i = 0;
2626 tx_ring->next_to_use = i;
2627
2628 return TRUE;
2629 }
2630 #endif
2631
2632 return FALSE;
2633 }
2634
2635 static boolean_t
2636 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2637 struct sk_buff *skb)
2638 {
2639 struct e1000_context_desc *context_desc;
2640 struct e1000_buffer *buffer_info;
2641 unsigned int i;
2642 uint8_t css;
2643
2644 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2645 css = skb->h.raw - skb->data;
2646
2647 i = tx_ring->next_to_use;
2648 buffer_info = &tx_ring->buffer_info[i];
2649 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2650
2651 context_desc->upper_setup.tcp_fields.tucss = css;
2652 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2653 context_desc->upper_setup.tcp_fields.tucse = 0;
2654 context_desc->tcp_seg_setup.data = 0;
2655 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2656
2657 buffer_info->time_stamp = jiffies;
2658
2659 if (unlikely(++i == tx_ring->count)) i = 0;
2660 tx_ring->next_to_use = i;
2661
2662 return TRUE;
2663 }
2664
2665 return FALSE;
2666 }
2667
2668 #define E1000_MAX_TXD_PWR 12
2669 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2670
2671 static int
2672 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2673 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2674 unsigned int nr_frags, unsigned int mss)
2675 {
2676 struct e1000_buffer *buffer_info;
2677 unsigned int len = skb->len;
2678 unsigned int offset = 0, size, count = 0, i;
2679 unsigned int f;
2680 len -= skb->data_len;
2681
2682 i = tx_ring->next_to_use;
2683
2684 while (len) {
2685 buffer_info = &tx_ring->buffer_info[i];
2686 size = min(len, max_per_txd);
2687 #ifdef NETIF_F_TSO
2688 /* Workaround for Controller erratum --
2689 * descriptor for non-tso packet in a linear SKB that follows a
2690 * tso gets written back prematurely before the data is fully
2691 * DMA'd to the controller */
2692 if (!skb->data_len && tx_ring->last_tx_tso &&
2693 !skb_is_gso(skb)) {
2694 tx_ring->last_tx_tso = 0;
2695 size -= 4;
2696 }
2697
2698 /* Workaround for premature desc write-backs
2699 * in TSO mode. Append 4-byte sentinel desc */
2700 if (unlikely(mss && !nr_frags && size == len && size > 8))
2701 size -= 4;
2702 #endif
2703 /* work-around for errata 10 and it applies
2704 * to all controllers in PCI-X mode
2705 * The fix is to make sure that the first descriptor of a
2706 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2707 */
2708 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2709 (size > 2015) && count == 0))
2710 size = 2015;
2711
2712 /* Workaround for potential 82544 hang in PCI-X. Avoid
2713 * terminating buffers within evenly-aligned dwords. */
2714 if (unlikely(adapter->pcix_82544 &&
2715 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2716 size > 4))
2717 size -= 4;
2718
2719 buffer_info->length = size;
2720 buffer_info->dma =
2721 pci_map_single(adapter->pdev,
2722 skb->data + offset,
2723 size,
2724 PCI_DMA_TODEVICE);
2725 buffer_info->time_stamp = jiffies;
2726
2727 len -= size;
2728 offset += size;
2729 count++;
2730 if (unlikely(++i == tx_ring->count)) i = 0;
2731 }
2732
2733 for (f = 0; f < nr_frags; f++) {
2734 struct skb_frag_struct *frag;
2735
2736 frag = &skb_shinfo(skb)->frags[f];
2737 len = frag->size;
2738 offset = frag->page_offset;
2739
2740 while (len) {
2741 buffer_info = &tx_ring->buffer_info[i];
2742 size = min(len, max_per_txd);
2743 #ifdef NETIF_F_TSO
2744 /* Workaround for premature desc write-backs
2745 * in TSO mode. Append 4-byte sentinel desc */
2746 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2747 size -= 4;
2748 #endif
2749 /* Workaround for potential 82544 hang in PCI-X.
2750 * Avoid terminating buffers within evenly-aligned
2751 * dwords. */
2752 if (unlikely(adapter->pcix_82544 &&
2753 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2754 size > 4))
2755 size -= 4;
2756
2757 buffer_info->length = size;
2758 buffer_info->dma =
2759 pci_map_page(adapter->pdev,
2760 frag->page,
2761 offset,
2762 size,
2763 PCI_DMA_TODEVICE);
2764 buffer_info->time_stamp = jiffies;
2765
2766 len -= size;
2767 offset += size;
2768 count++;
2769 if (unlikely(++i == tx_ring->count)) i = 0;
2770 }
2771 }
2772
2773 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2774 tx_ring->buffer_info[i].skb = skb;
2775 tx_ring->buffer_info[first].next_to_watch = i;
2776
2777 return count;
2778 }
2779
2780 static void
2781 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2782 int tx_flags, int count)
2783 {
2784 struct e1000_tx_desc *tx_desc = NULL;
2785 struct e1000_buffer *buffer_info;
2786 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2787 unsigned int i;
2788
2789 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2790 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2791 E1000_TXD_CMD_TSE;
2792 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2793
2794 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2795 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2796 }
2797
2798 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2799 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2800 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2801 }
2802
2803 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2804 txd_lower |= E1000_TXD_CMD_VLE;
2805 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2806 }
2807
2808 i = tx_ring->next_to_use;
2809
2810 while (count--) {
2811 buffer_info = &tx_ring->buffer_info[i];
2812 tx_desc = E1000_TX_DESC(*tx_ring, i);
2813 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2814 tx_desc->lower.data =
2815 cpu_to_le32(txd_lower | buffer_info->length);
2816 tx_desc->upper.data = cpu_to_le32(txd_upper);
2817 if (unlikely(++i == tx_ring->count)) i = 0;
2818 }
2819
2820 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2821
2822 /* Force memory writes to complete before letting h/w
2823 * know there are new descriptors to fetch. (Only
2824 * applicable for weak-ordered memory model archs,
2825 * such as IA-64). */
2826 wmb();
2827
2828 tx_ring->next_to_use = i;
2829 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2830 }
2831
2832 /**
2833 * 82547 workaround to avoid controller hang in half-duplex environment.
2834 * The workaround is to avoid queuing a large packet that would span
2835 * the internal Tx FIFO ring boundary by notifying the stack to resend
2836 * the packet at a later time. This gives the Tx FIFO an opportunity to
2837 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2838 * to the beginning of the Tx FIFO.
2839 **/
2840
2841 #define E1000_FIFO_HDR 0x10
2842 #define E1000_82547_PAD_LEN 0x3E0
2843
2844 static int
2845 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2846 {
2847 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2848 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2849
2850 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2851
2852 if (adapter->link_duplex != HALF_DUPLEX)
2853 goto no_fifo_stall_required;
2854
2855 if (atomic_read(&adapter->tx_fifo_stall))
2856 return 1;
2857
2858 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2859 atomic_set(&adapter->tx_fifo_stall, 1);
2860 return 1;
2861 }
2862
2863 no_fifo_stall_required:
2864 adapter->tx_fifo_head += skb_fifo_len;
2865 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2866 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2867 return 0;
2868 }
2869
2870 #define MINIMUM_DHCP_PACKET_SIZE 282
2871 static int
2872 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2873 {
2874 struct e1000_hw *hw = &adapter->hw;
2875 uint16_t length, offset;
2876 if (vlan_tx_tag_present(skb)) {
2877 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2878 ( adapter->hw.mng_cookie.status &
2879 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2880 return 0;
2881 }
2882 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2883 struct ethhdr *eth = (struct ethhdr *) skb->data;
2884 if ((htons(ETH_P_IP) == eth->h_proto)) {
2885 const struct iphdr *ip =
2886 (struct iphdr *)((uint8_t *)skb->data+14);
2887 if (IPPROTO_UDP == ip->protocol) {
2888 struct udphdr *udp =
2889 (struct udphdr *)((uint8_t *)ip +
2890 (ip->ihl << 2));
2891 if (ntohs(udp->dest) == 67) {
2892 offset = (uint8_t *)udp + 8 - skb->data;
2893 length = skb->len - offset;
2894
2895 return e1000_mng_write_dhcp_info(hw,
2896 (uint8_t *)udp + 8,
2897 length);
2898 }
2899 }
2900 }
2901 }
2902 return 0;
2903 }
2904
2905 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2906 static int
2907 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2908 {
2909 struct e1000_adapter *adapter = netdev_priv(netdev);
2910 struct e1000_tx_ring *tx_ring;
2911 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2912 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2913 unsigned int tx_flags = 0;
2914 unsigned int len = skb->len;
2915 unsigned long flags;
2916 unsigned int nr_frags = 0;
2917 unsigned int mss = 0;
2918 int count = 0;
2919 int tso;
2920 unsigned int f;
2921 len -= skb->data_len;
2922
2923 tx_ring = adapter->tx_ring;
2924
2925 if (unlikely(skb->len <= 0)) {
2926 dev_kfree_skb_any(skb);
2927 return NETDEV_TX_OK;
2928 }
2929
2930 #ifdef NETIF_F_TSO
2931 mss = skb_shinfo(skb)->gso_size;
2932 /* The controller does a simple calculation to
2933 * make sure there is enough room in the FIFO before
2934 * initiating the DMA for each buffer. The calc is:
2935 * 4 = ceil(buffer len/mss). To make sure we don't
2936 * overrun the FIFO, adjust the max buffer len if mss
2937 * drops. */
2938 if (mss) {
2939 uint8_t hdr_len;
2940 max_per_txd = min(mss << 2, max_per_txd);
2941 max_txd_pwr = fls(max_per_txd) - 1;
2942
2943 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
2944 * points to just header, pull a few bytes of payload from
2945 * frags into skb->data */
2946 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2947 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2948 switch (adapter->hw.mac_type) {
2949 unsigned int pull_size;
2950 case e1000_82571:
2951 case e1000_82572:
2952 case e1000_82573:
2953 case e1000_ich8lan:
2954 pull_size = min((unsigned int)4, skb->data_len);
2955 if (!__pskb_pull_tail(skb, pull_size)) {
2956 DPRINTK(DRV, ERR,
2957 "__pskb_pull_tail failed.\n");
2958 dev_kfree_skb_any(skb);
2959 return NETDEV_TX_OK;
2960 }
2961 len = skb->len - skb->data_len;
2962 break;
2963 default:
2964 /* do nothing */
2965 break;
2966 }
2967 }
2968 }
2969
2970 /* reserve a descriptor for the offload context */
2971 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
2972 count++;
2973 count++;
2974 #else
2975 if (skb->ip_summed == CHECKSUM_PARTIAL)
2976 count++;
2977 #endif
2978
2979 #ifdef NETIF_F_TSO
2980 /* Controller Erratum workaround */
2981 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
2982 count++;
2983 #endif
2984
2985 count += TXD_USE_COUNT(len, max_txd_pwr);
2986
2987 if (adapter->pcix_82544)
2988 count++;
2989
2990 /* work-around for errata 10 and it applies to all controllers
2991 * in PCI-X mode, so add one more descriptor to the count
2992 */
2993 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2994 (len > 2015)))
2995 count++;
2996
2997 nr_frags = skb_shinfo(skb)->nr_frags;
2998 for (f = 0; f < nr_frags; f++)
2999 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3000 max_txd_pwr);
3001 if (adapter->pcix_82544)
3002 count += nr_frags;
3003
3004
3005 if (adapter->hw.tx_pkt_filtering &&
3006 (adapter->hw.mac_type == e1000_82573))
3007 e1000_transfer_dhcp_info(adapter, skb);
3008
3009 local_irq_save(flags);
3010 if (!spin_trylock(&tx_ring->tx_lock)) {
3011 /* Collision - tell upper layer to requeue */
3012 local_irq_restore(flags);
3013 return NETDEV_TX_LOCKED;
3014 }
3015
3016 /* need: count + 2 desc gap to keep tail from touching
3017 * head, otherwise try next time */
3018 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
3019 netif_stop_queue(netdev);
3020 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3021 return NETDEV_TX_BUSY;
3022 }
3023
3024 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3025 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3026 netif_stop_queue(netdev);
3027 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
3028 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3029 return NETDEV_TX_BUSY;
3030 }
3031 }
3032
3033 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3034 tx_flags |= E1000_TX_FLAGS_VLAN;
3035 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3036 }
3037
3038 first = tx_ring->next_to_use;
3039
3040 tso = e1000_tso(adapter, tx_ring, skb);
3041 if (tso < 0) {
3042 dev_kfree_skb_any(skb);
3043 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3044 return NETDEV_TX_OK;
3045 }
3046
3047 if (likely(tso)) {
3048 tx_ring->last_tx_tso = 1;
3049 tx_flags |= E1000_TX_FLAGS_TSO;
3050 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3051 tx_flags |= E1000_TX_FLAGS_CSUM;
3052
3053 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3054 * 82571 hardware supports TSO capabilities for IPv6 as well...
3055 * no longer assume, we must. */
3056 if (likely(skb->protocol == htons(ETH_P_IP)))
3057 tx_flags |= E1000_TX_FLAGS_IPV4;
3058
3059 e1000_tx_queue(adapter, tx_ring, tx_flags,
3060 e1000_tx_map(adapter, tx_ring, skb, first,
3061 max_per_txd, nr_frags, mss));
3062
3063 netdev->trans_start = jiffies;
3064
3065 /* Make sure there is space in the ring for the next send. */
3066 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
3067 netif_stop_queue(netdev);
3068
3069 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3070 return NETDEV_TX_OK;
3071 }
3072
3073 /**
3074 * e1000_tx_timeout - Respond to a Tx Hang
3075 * @netdev: network interface device structure
3076 **/
3077
3078 static void
3079 e1000_tx_timeout(struct net_device *netdev)
3080 {
3081 struct e1000_adapter *adapter = netdev_priv(netdev);
3082
3083 /* Do the reset outside of interrupt context */
3084 adapter->tx_timeout_count++;
3085 schedule_work(&adapter->reset_task);
3086 }
3087
3088 static void
3089 e1000_reset_task(struct net_device *netdev)
3090 {
3091 struct e1000_adapter *adapter = netdev_priv(netdev);
3092
3093 e1000_reinit_locked(adapter);
3094 }
3095
3096 /**
3097 * e1000_get_stats - Get System Network Statistics
3098 * @netdev: network interface device structure
3099 *
3100 * Returns the address of the device statistics structure.
3101 * The statistics are actually updated from the timer callback.
3102 **/
3103
3104 static struct net_device_stats *
3105 e1000_get_stats(struct net_device *netdev)
3106 {
3107 struct e1000_adapter *adapter = netdev_priv(netdev);
3108
3109 /* only return the current stats */
3110 return &adapter->net_stats;
3111 }
3112
3113 /**
3114 * e1000_change_mtu - Change the Maximum Transfer Unit
3115 * @netdev: network interface device structure
3116 * @new_mtu: new value for maximum frame size
3117 *
3118 * Returns 0 on success, negative on failure
3119 **/
3120
3121 static int
3122 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3123 {
3124 struct e1000_adapter *adapter = netdev_priv(netdev);
3125 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3126 uint16_t eeprom_data = 0;
3127
3128 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3129 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3130 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3131 return -EINVAL;
3132 }
3133
3134 /* Adapter-specific max frame size limits. */
3135 switch (adapter->hw.mac_type) {
3136 case e1000_undefined ... e1000_82542_rev2_1:
3137 case e1000_ich8lan:
3138 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3139 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3140 return -EINVAL;
3141 }
3142 break;
3143 case e1000_82573:
3144 /* only enable jumbo frames if ASPM is disabled completely
3145 * this means both bits must be zero in 0x1A bits 3:2 */
3146 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3147 &eeprom_data);
3148 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3149 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3150 DPRINTK(PROBE, ERR,
3151 "Jumbo Frames not supported.\n");
3152 return -EINVAL;
3153 }
3154 break;
3155 }
3156 /* fall through to get support */
3157 case e1000_82571:
3158 case e1000_82572:
3159 case e1000_80003es2lan:
3160 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3161 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3162 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3163 return -EINVAL;
3164 }
3165 break;
3166 default:
3167 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3168 break;
3169 }
3170
3171 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3172 * means we reserve 2 more, this pushes us to allocate from the next
3173 * larger slab size
3174 * i.e. RXBUFFER_2048 --> size-4096 slab */
3175
3176 if (max_frame <= E1000_RXBUFFER_256)
3177 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3178 else if (max_frame <= E1000_RXBUFFER_512)
3179 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3180 else if (max_frame <= E1000_RXBUFFER_1024)
3181 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3182 else if (max_frame <= E1000_RXBUFFER_2048)
3183 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3184 else if (max_frame <= E1000_RXBUFFER_4096)
3185 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3186 else if (max_frame <= E1000_RXBUFFER_8192)
3187 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3188 else if (max_frame <= E1000_RXBUFFER_16384)
3189 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3190
3191 /* adjust allocation if LPE protects us, and we aren't using SBP */
3192 if (!adapter->hw.tbi_compatibility_on &&
3193 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3194 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3195 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3196
3197 netdev->mtu = new_mtu;
3198
3199 if (netif_running(netdev))
3200 e1000_reinit_locked(adapter);
3201
3202 adapter->hw.max_frame_size = max_frame;
3203
3204 return 0;
3205 }
3206
3207 /**
3208 * e1000_update_stats - Update the board statistics counters
3209 * @adapter: board private structure
3210 **/
3211
3212 void
3213 e1000_update_stats(struct e1000_adapter *adapter)
3214 {
3215 struct e1000_hw *hw = &adapter->hw;
3216 struct pci_dev *pdev = adapter->pdev;
3217 unsigned long flags;
3218 uint16_t phy_tmp;
3219
3220 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3221
3222 /*
3223 * Prevent stats update while adapter is being reset, or if the pci
3224 * connection is down.
3225 */
3226 if (adapter->link_speed == 0)
3227 return;
3228 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3229 return;
3230
3231 spin_lock_irqsave(&adapter->stats_lock, flags);
3232
3233 /* these counters are modified from e1000_adjust_tbi_stats,
3234 * called from the interrupt context, so they must only
3235 * be written while holding adapter->stats_lock
3236 */
3237
3238 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3239 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3240 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3241 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3242 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3243 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3244 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3245
3246 if (adapter->hw.mac_type != e1000_ich8lan) {
3247 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3248 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3249 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3250 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3251 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3252 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3253 }
3254
3255 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3256 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3257 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3258 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3259 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3260 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3261 adapter->stats.dc += E1000_READ_REG(hw, DC);
3262 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3263 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3264 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3265 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3266 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3267 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3268 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3269 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3270 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3271 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3272 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3273 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3274 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3275 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3276 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3277 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3278 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3279 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3280 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3281
3282 if (adapter->hw.mac_type != e1000_ich8lan) {
3283 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3284 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3285 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3286 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3287 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3288 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3289 }
3290
3291 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3292 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3293
3294 /* used for adaptive IFS */
3295
3296 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3297 adapter->stats.tpt += hw->tx_packet_delta;
3298 hw->collision_delta = E1000_READ_REG(hw, COLC);
3299 adapter->stats.colc += hw->collision_delta;
3300
3301 if (hw->mac_type >= e1000_82543) {
3302 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3303 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3304 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3305 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3306 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3307 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3308 }
3309 if (hw->mac_type > e1000_82547_rev_2) {
3310 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3311 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3312
3313 if (adapter->hw.mac_type != e1000_ich8lan) {
3314 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3315 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3316 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3317 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3318 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3319 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3320 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3321 }
3322 }
3323
3324 /* Fill out the OS statistics structure */
3325
3326 adapter->net_stats.rx_packets = adapter->stats.gprc;
3327 adapter->net_stats.tx_packets = adapter->stats.gptc;
3328 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3329 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3330 adapter->net_stats.multicast = adapter->stats.mprc;
3331 adapter->net_stats.collisions = adapter->stats.colc;
3332
3333 /* Rx Errors */
3334
3335 /* RLEC on some newer hardware can be incorrect so build
3336 * our own version based on RUC and ROC */
3337 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3338 adapter->stats.crcerrs + adapter->stats.algnerrc +
3339 adapter->stats.ruc + adapter->stats.roc +
3340 adapter->stats.cexterr;
3341 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3342 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3343 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3344 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3345 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3346
3347 /* Tx Errors */
3348 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3349 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3350 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3351 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3352 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3353
3354 /* Tx Dropped needs to be maintained elsewhere */
3355
3356 /* Phy Stats */
3357
3358 if (hw->media_type == e1000_media_type_copper) {
3359 if ((adapter->link_speed == SPEED_1000) &&
3360 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3361 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3362 adapter->phy_stats.idle_errors += phy_tmp;
3363 }
3364
3365 if ((hw->mac_type <= e1000_82546) &&
3366 (hw->phy_type == e1000_phy_m88) &&
3367 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3368 adapter->phy_stats.receive_errors += phy_tmp;
3369 }
3370
3371 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3372 }
3373
3374 /**
3375 * e1000_intr - Interrupt Handler
3376 * @irq: interrupt number
3377 * @data: pointer to a network interface device structure
3378 * @pt_regs: CPU registers structure
3379 **/
3380
3381 static irqreturn_t
3382 e1000_intr(int irq, void *data, struct pt_regs *regs)
3383 {
3384 struct net_device *netdev = data;
3385 struct e1000_adapter *adapter = netdev_priv(netdev);
3386 struct e1000_hw *hw = &adapter->hw;
3387 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3388 #ifndef CONFIG_E1000_NAPI
3389 int i;
3390 #else
3391 /* Interrupt Auto-Mask...upon reading ICR,
3392 * interrupts are masked. No need for the
3393 * IMC write, but it does mean we should
3394 * account for it ASAP. */
3395 if (likely(hw->mac_type >= e1000_82571))
3396 atomic_inc(&adapter->irq_sem);
3397 #endif
3398
3399 if (unlikely(!icr)) {
3400 #ifdef CONFIG_E1000_NAPI
3401 if (hw->mac_type >= e1000_82571)
3402 e1000_irq_enable(adapter);
3403 #endif
3404 return IRQ_NONE; /* Not our interrupt */
3405 }
3406
3407 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3408 hw->get_link_status = 1;
3409 /* 80003ES2LAN workaround--
3410 * For packet buffer work-around on link down event;
3411 * disable receives here in the ISR and
3412 * reset adapter in watchdog
3413 */
3414 if (netif_carrier_ok(netdev) &&
3415 (adapter->hw.mac_type == e1000_80003es2lan)) {
3416 /* disable receives */
3417 rctl = E1000_READ_REG(hw, RCTL);
3418 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3419 }
3420 mod_timer(&adapter->watchdog_timer, jiffies);
3421 }
3422
3423 #ifdef CONFIG_E1000_NAPI
3424 if (unlikely(hw->mac_type < e1000_82571)) {
3425 atomic_inc(&adapter->irq_sem);
3426 E1000_WRITE_REG(hw, IMC, ~0);
3427 E1000_WRITE_FLUSH(hw);
3428 }
3429 if (likely(netif_rx_schedule_prep(netdev)))
3430 __netif_rx_schedule(netdev);
3431 else
3432 e1000_irq_enable(adapter);
3433 #else
3434 /* Writing IMC and IMS is needed for 82547.
3435 * Due to Hub Link bus being occupied, an interrupt
3436 * de-assertion message is not able to be sent.
3437 * When an interrupt assertion message is generated later,
3438 * two messages are re-ordered and sent out.
3439 * That causes APIC to think 82547 is in de-assertion
3440 * state, while 82547 is in assertion state, resulting
3441 * in dead lock. Writing IMC forces 82547 into
3442 * de-assertion state.
3443 */
3444 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3445 atomic_inc(&adapter->irq_sem);
3446 E1000_WRITE_REG(hw, IMC, ~0);
3447 }
3448
3449 for (i = 0; i < E1000_MAX_INTR; i++)
3450 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3451 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3452 break;
3453
3454 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3455 e1000_irq_enable(adapter);
3456
3457 #endif
3458
3459 return IRQ_HANDLED;
3460 }
3461
3462 #ifdef CONFIG_E1000_NAPI
3463 /**
3464 * e1000_clean - NAPI Rx polling callback
3465 * @adapter: board private structure
3466 **/
3467
3468 static int
3469 e1000_clean(struct net_device *poll_dev, int *budget)
3470 {
3471 struct e1000_adapter *adapter;
3472 int work_to_do = min(*budget, poll_dev->quota);
3473 int tx_cleaned = 0, work_done = 0;
3474
3475 /* Must NOT use netdev_priv macro here. */
3476 adapter = poll_dev->priv;
3477
3478 /* Keep link state information with original netdev */
3479 if (!netif_carrier_ok(poll_dev))
3480 goto quit_polling;
3481
3482 /* e1000_clean is called per-cpu. This lock protects
3483 * tx_ring[0] from being cleaned by multiple cpus
3484 * simultaneously. A failure obtaining the lock means
3485 * tx_ring[0] is currently being cleaned anyway. */
3486 if (spin_trylock(&adapter->tx_queue_lock)) {
3487 tx_cleaned = e1000_clean_tx_irq(adapter,
3488 &adapter->tx_ring[0]);
3489 spin_unlock(&adapter->tx_queue_lock);
3490 }
3491
3492 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3493 &work_done, work_to_do);
3494
3495 *budget -= work_done;
3496 poll_dev->quota -= work_done;
3497
3498 /* If no Tx and not enough Rx work done, exit the polling mode */
3499 if ((!tx_cleaned && (work_done == 0)) ||
3500 !netif_running(poll_dev)) {
3501 quit_polling:
3502 netif_rx_complete(poll_dev);
3503 e1000_irq_enable(adapter);
3504 return 0;
3505 }
3506
3507 return 1;
3508 }
3509
3510 #endif
3511 /**
3512 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3513 * @adapter: board private structure
3514 **/
3515
3516 static boolean_t
3517 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3518 struct e1000_tx_ring *tx_ring)
3519 {
3520 struct net_device *netdev = adapter->netdev;
3521 struct e1000_tx_desc *tx_desc, *eop_desc;
3522 struct e1000_buffer *buffer_info;
3523 unsigned int i, eop;
3524 #ifdef CONFIG_E1000_NAPI
3525 unsigned int count = 0;
3526 #endif
3527 boolean_t cleaned = FALSE;
3528
3529 i = tx_ring->next_to_clean;
3530 eop = tx_ring->buffer_info[i].next_to_watch;
3531 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3532
3533 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3534 for (cleaned = FALSE; !cleaned; ) {
3535 tx_desc = E1000_TX_DESC(*tx_ring, i);
3536 buffer_info = &tx_ring->buffer_info[i];
3537 cleaned = (i == eop);
3538
3539 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3540 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
3541
3542 if (unlikely(++i == tx_ring->count)) i = 0;
3543 }
3544
3545
3546 eop = tx_ring->buffer_info[i].next_to_watch;
3547 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3548 #ifdef CONFIG_E1000_NAPI
3549 #define E1000_TX_WEIGHT 64
3550 /* weight of a sort for tx, to avoid endless transmit cleanup */
3551 if (count++ == E1000_TX_WEIGHT) break;
3552 #endif
3553 }
3554
3555 tx_ring->next_to_clean = i;
3556
3557 #define TX_WAKE_THRESHOLD 32
3558 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
3559 netif_carrier_ok(netdev))) {
3560 spin_lock(&tx_ring->tx_lock);
3561 if (netif_queue_stopped(netdev) &&
3562 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3563 netif_wake_queue(netdev);
3564 spin_unlock(&tx_ring->tx_lock);
3565 }
3566
3567 if (adapter->detect_tx_hung) {
3568 /* Detect a transmit hang in hardware, this serializes the
3569 * check with the clearing of time_stamp and movement of i */
3570 adapter->detect_tx_hung = FALSE;
3571 if (tx_ring->buffer_info[eop].dma &&
3572 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3573 (adapter->tx_timeout_factor * HZ))
3574 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3575 E1000_STATUS_TXOFF)) {
3576
3577 /* detected Tx unit hang */
3578 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3579 " Tx Queue <%lu>\n"
3580 " TDH <%x>\n"
3581 " TDT <%x>\n"
3582 " next_to_use <%x>\n"
3583 " next_to_clean <%x>\n"
3584 "buffer_info[next_to_clean]\n"
3585 " time_stamp <%lx>\n"
3586 " next_to_watch <%x>\n"
3587 " jiffies <%lx>\n"
3588 " next_to_watch.status <%x>\n",
3589 (unsigned long)((tx_ring - adapter->tx_ring) /
3590 sizeof(struct e1000_tx_ring)),
3591 readl(adapter->hw.hw_addr + tx_ring->tdh),
3592 readl(adapter->hw.hw_addr + tx_ring->tdt),
3593 tx_ring->next_to_use,
3594 tx_ring->next_to_clean,
3595 tx_ring->buffer_info[eop].time_stamp,
3596 eop,
3597 jiffies,
3598 eop_desc->upper.fields.status);
3599 netif_stop_queue(netdev);
3600 }
3601 }
3602 return cleaned;
3603 }
3604
3605 /**
3606 * e1000_rx_checksum - Receive Checksum Offload for 82543
3607 * @adapter: board private structure
3608 * @status_err: receive descriptor status and error fields
3609 * @csum: receive descriptor csum field
3610 * @sk_buff: socket buffer with received data
3611 **/
3612
3613 static void
3614 e1000_rx_checksum(struct e1000_adapter *adapter,
3615 uint32_t status_err, uint32_t csum,
3616 struct sk_buff *skb)
3617 {
3618 uint16_t status = (uint16_t)status_err;
3619 uint8_t errors = (uint8_t)(status_err >> 24);
3620 skb->ip_summed = CHECKSUM_NONE;
3621
3622 /* 82543 or newer only */
3623 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3624 /* Ignore Checksum bit is set */
3625 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3626 /* TCP/UDP checksum error bit is set */
3627 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3628 /* let the stack verify checksum errors */
3629 adapter->hw_csum_err++;
3630 return;
3631 }
3632 /* TCP/UDP Checksum has not been calculated */
3633 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3634 if (!(status & E1000_RXD_STAT_TCPCS))
3635 return;
3636 } else {
3637 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3638 return;
3639 }
3640 /* It must be a TCP or UDP packet with a valid checksum */
3641 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3642 /* TCP checksum is good */
3643 skb->ip_summed = CHECKSUM_UNNECESSARY;
3644 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3645 /* IP fragment with UDP payload */
3646 /* Hardware complements the payload checksum, so we undo it
3647 * and then put the value in host order for further stack use.
3648 */
3649 csum = ntohl(csum ^ 0xFFFF);
3650 skb->csum = csum;
3651 skb->ip_summed = CHECKSUM_COMPLETE;
3652 }
3653 adapter->hw_csum_good++;
3654 }
3655
3656 /**
3657 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3658 * @adapter: board private structure
3659 **/
3660
3661 static boolean_t
3662 #ifdef CONFIG_E1000_NAPI
3663 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3664 struct e1000_rx_ring *rx_ring,
3665 int *work_done, int work_to_do)
3666 #else
3667 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3668 struct e1000_rx_ring *rx_ring)
3669 #endif
3670 {
3671 struct net_device *netdev = adapter->netdev;
3672 struct pci_dev *pdev = adapter->pdev;
3673 struct e1000_rx_desc *rx_desc, *next_rxd;
3674 struct e1000_buffer *buffer_info, *next_buffer;
3675 unsigned long flags;
3676 uint32_t length;
3677 uint8_t last_byte;
3678 unsigned int i;
3679 int cleaned_count = 0;
3680 boolean_t cleaned = FALSE;
3681
3682 i = rx_ring->next_to_clean;
3683 rx_desc = E1000_RX_DESC(*rx_ring, i);
3684 buffer_info = &rx_ring->buffer_info[i];
3685
3686 while (rx_desc->status & E1000_RXD_STAT_DD) {
3687 struct sk_buff *skb;
3688 u8 status;
3689 #ifdef CONFIG_E1000_NAPI
3690 if (*work_done >= work_to_do)
3691 break;
3692 (*work_done)++;
3693 #endif
3694 status = rx_desc->status;
3695 skb = buffer_info->skb;
3696 buffer_info->skb = NULL;
3697
3698 prefetch(skb->data - NET_IP_ALIGN);
3699
3700 if (++i == rx_ring->count) i = 0;
3701 next_rxd = E1000_RX_DESC(*rx_ring, i);
3702 prefetch(next_rxd);
3703
3704 next_buffer = &rx_ring->buffer_info[i];
3705
3706 cleaned = TRUE;
3707 cleaned_count++;
3708 pci_unmap_single(pdev,
3709 buffer_info->dma,
3710 buffer_info->length,
3711 PCI_DMA_FROMDEVICE);
3712
3713 length = le16_to_cpu(rx_desc->length);
3714
3715 /* adjust length to remove Ethernet CRC */
3716 length -= 4;
3717
3718 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3719 /* All receives must fit into a single buffer */
3720 E1000_DBG("%s: Receive packet consumed multiple"
3721 " buffers\n", netdev->name);
3722 /* recycle */
3723 buffer_info->skb = skb;
3724 goto next_desc;
3725 }
3726
3727 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3728 last_byte = *(skb->data + length - 1);
3729 if (TBI_ACCEPT(&adapter->hw, status,
3730 rx_desc->errors, length, last_byte)) {
3731 spin_lock_irqsave(&adapter->stats_lock, flags);
3732 e1000_tbi_adjust_stats(&adapter->hw,
3733 &adapter->stats,
3734 length, skb->data);
3735 spin_unlock_irqrestore(&adapter->stats_lock,
3736 flags);
3737 length--;
3738 } else {
3739 /* recycle */
3740 buffer_info->skb = skb;
3741 goto next_desc;
3742 }
3743 }
3744
3745 /* code added for copybreak, this should improve
3746 * performance for small packets with large amounts
3747 * of reassembly being done in the stack */
3748 #define E1000_CB_LENGTH 256
3749 if (length < E1000_CB_LENGTH) {
3750 struct sk_buff *new_skb =
3751 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
3752 if (new_skb) {
3753 skb_reserve(new_skb, NET_IP_ALIGN);
3754 memcpy(new_skb->data - NET_IP_ALIGN,
3755 skb->data - NET_IP_ALIGN,
3756 length + NET_IP_ALIGN);
3757 /* save the skb in buffer_info as good */
3758 buffer_info->skb = skb;
3759 skb = new_skb;
3760 skb_put(skb, length);
3761 }
3762 } else
3763 skb_put(skb, length);
3764
3765 /* end copybreak code */
3766
3767 /* Receive Checksum Offload */
3768 e1000_rx_checksum(adapter,
3769 (uint32_t)(status) |
3770 ((uint32_t)(rx_desc->errors) << 24),
3771 le16_to_cpu(rx_desc->csum), skb);
3772
3773 skb->protocol = eth_type_trans(skb, netdev);
3774 #ifdef CONFIG_E1000_NAPI
3775 if (unlikely(adapter->vlgrp &&
3776 (status & E1000_RXD_STAT_VP))) {
3777 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3778 le16_to_cpu(rx_desc->special) &
3779 E1000_RXD_SPC_VLAN_MASK);
3780 } else {
3781 netif_receive_skb(skb);
3782 }
3783 #else /* CONFIG_E1000_NAPI */
3784 if (unlikely(adapter->vlgrp &&
3785 (status & E1000_RXD_STAT_VP))) {
3786 vlan_hwaccel_rx(skb, adapter->vlgrp,
3787 le16_to_cpu(rx_desc->special) &
3788 E1000_RXD_SPC_VLAN_MASK);
3789 } else {
3790 netif_rx(skb);
3791 }
3792 #endif /* CONFIG_E1000_NAPI */
3793 netdev->last_rx = jiffies;
3794
3795 next_desc:
3796 rx_desc->status = 0;
3797
3798 /* return some buffers to hardware, one at a time is too slow */
3799 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3800 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3801 cleaned_count = 0;
3802 }
3803
3804 /* use prefetched values */
3805 rx_desc = next_rxd;
3806 buffer_info = next_buffer;
3807 }
3808 rx_ring->next_to_clean = i;
3809
3810 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3811 if (cleaned_count)
3812 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3813
3814 return cleaned;
3815 }
3816
3817 /**
3818 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3819 * @adapter: board private structure
3820 **/
3821
3822 static boolean_t
3823 #ifdef CONFIG_E1000_NAPI
3824 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3825 struct e1000_rx_ring *rx_ring,
3826 int *work_done, int work_to_do)
3827 #else
3828 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3829 struct e1000_rx_ring *rx_ring)
3830 #endif
3831 {
3832 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3833 struct net_device *netdev = adapter->netdev;
3834 struct pci_dev *pdev = adapter->pdev;
3835 struct e1000_buffer *buffer_info, *next_buffer;
3836 struct e1000_ps_page *ps_page;
3837 struct e1000_ps_page_dma *ps_page_dma;
3838 struct sk_buff *skb;
3839 unsigned int i, j;
3840 uint32_t length, staterr;
3841 int cleaned_count = 0;
3842 boolean_t cleaned = FALSE;
3843
3844 i = rx_ring->next_to_clean;
3845 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3846 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3847 buffer_info = &rx_ring->buffer_info[i];
3848
3849 while (staterr & E1000_RXD_STAT_DD) {
3850 ps_page = &rx_ring->ps_page[i];
3851 ps_page_dma = &rx_ring->ps_page_dma[i];
3852 #ifdef CONFIG_E1000_NAPI
3853 if (unlikely(*work_done >= work_to_do))
3854 break;
3855 (*work_done)++;
3856 #endif
3857 skb = buffer_info->skb;
3858
3859 /* in the packet split case this is header only */
3860 prefetch(skb->data - NET_IP_ALIGN);
3861
3862 if (++i == rx_ring->count) i = 0;
3863 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3864 prefetch(next_rxd);
3865
3866 next_buffer = &rx_ring->buffer_info[i];
3867
3868 cleaned = TRUE;
3869 cleaned_count++;
3870 pci_unmap_single(pdev, buffer_info->dma,
3871 buffer_info->length,
3872 PCI_DMA_FROMDEVICE);
3873
3874 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3875 E1000_DBG("%s: Packet Split buffers didn't pick up"
3876 " the full packet\n", netdev->name);
3877 dev_kfree_skb_irq(skb);
3878 goto next_desc;
3879 }
3880
3881 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3882 dev_kfree_skb_irq(skb);
3883 goto next_desc;
3884 }
3885
3886 length = le16_to_cpu(rx_desc->wb.middle.length0);
3887
3888 if (unlikely(!length)) {
3889 E1000_DBG("%s: Last part of the packet spanning"
3890 " multiple descriptors\n", netdev->name);
3891 dev_kfree_skb_irq(skb);
3892 goto next_desc;
3893 }
3894
3895 /* Good Receive */
3896 skb_put(skb, length);
3897
3898 {
3899 /* this looks ugly, but it seems compiler issues make it
3900 more efficient than reusing j */
3901 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3902
3903 /* page alloc/put takes too long and effects small packet
3904 * throughput, so unsplit small packets and save the alloc/put*/
3905 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
3906 u8 *vaddr;
3907 /* there is no documentation about how to call
3908 * kmap_atomic, so we can't hold the mapping
3909 * very long */
3910 pci_dma_sync_single_for_cpu(pdev,
3911 ps_page_dma->ps_page_dma[0],
3912 PAGE_SIZE,
3913 PCI_DMA_FROMDEVICE);
3914 vaddr = kmap_atomic(ps_page->ps_page[0],
3915 KM_SKB_DATA_SOFTIRQ);
3916 memcpy(skb->tail, vaddr, l1);
3917 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3918 pci_dma_sync_single_for_device(pdev,
3919 ps_page_dma->ps_page_dma[0],
3920 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3921 /* remove the CRC */
3922 l1 -= 4;
3923 skb_put(skb, l1);
3924 goto copydone;
3925 } /* if */
3926 }
3927
3928 for (j = 0; j < adapter->rx_ps_pages; j++) {
3929 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
3930 break;
3931 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3932 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3933 ps_page_dma->ps_page_dma[j] = 0;
3934 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3935 length);
3936 ps_page->ps_page[j] = NULL;
3937 skb->len += length;
3938 skb->data_len += length;
3939 skb->truesize += length;
3940 }
3941
3942 /* strip the ethernet crc, problem is we're using pages now so
3943 * this whole operation can get a little cpu intensive */
3944 pskb_trim(skb, skb->len - 4);
3945
3946 copydone:
3947 e1000_rx_checksum(adapter, staterr,
3948 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
3949 skb->protocol = eth_type_trans(skb, netdev);
3950
3951 if (likely(rx_desc->wb.upper.header_status &
3952 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
3953 adapter->rx_hdr_split++;
3954 #ifdef CONFIG_E1000_NAPI
3955 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3956 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3957 le16_to_cpu(rx_desc->wb.middle.vlan) &
3958 E1000_RXD_SPC_VLAN_MASK);
3959 } else {
3960 netif_receive_skb(skb);
3961 }
3962 #else /* CONFIG_E1000_NAPI */
3963 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3964 vlan_hwaccel_rx(skb, adapter->vlgrp,
3965 le16_to_cpu(rx_desc->wb.middle.vlan) &
3966 E1000_RXD_SPC_VLAN_MASK);
3967 } else {
3968 netif_rx(skb);
3969 }
3970 #endif /* CONFIG_E1000_NAPI */
3971 netdev->last_rx = jiffies;
3972
3973 next_desc:
3974 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
3975 buffer_info->skb = NULL;
3976
3977 /* return some buffers to hardware, one at a time is too slow */
3978 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3979 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3980 cleaned_count = 0;
3981 }
3982
3983 /* use prefetched values */
3984 rx_desc = next_rxd;
3985 buffer_info = next_buffer;
3986
3987 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3988 }
3989 rx_ring->next_to_clean = i;
3990
3991 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3992 if (cleaned_count)
3993 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3994
3995 return cleaned;
3996 }
3997
3998 /**
3999 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4000 * @adapter: address of board private structure
4001 **/
4002
4003 static void
4004 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4005 struct e1000_rx_ring *rx_ring,
4006 int cleaned_count)
4007 {
4008 struct net_device *netdev = adapter->netdev;
4009 struct pci_dev *pdev = adapter->pdev;
4010 struct e1000_rx_desc *rx_desc;
4011 struct e1000_buffer *buffer_info;
4012 struct sk_buff *skb;
4013 unsigned int i;
4014 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4015
4016 i = rx_ring->next_to_use;
4017 buffer_info = &rx_ring->buffer_info[i];
4018
4019 while (cleaned_count--) {
4020 skb = buffer_info->skb;
4021 if (skb) {
4022 skb_trim(skb, 0);
4023 goto map_skb;
4024 }
4025
4026 skb = netdev_alloc_skb(netdev, bufsz);
4027 if (unlikely(!skb)) {
4028 /* Better luck next round */
4029 adapter->alloc_rx_buff_failed++;
4030 break;
4031 }
4032
4033 /* Fix for errata 23, can't cross 64kB boundary */
4034 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4035 struct sk_buff *oldskb = skb;
4036 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4037 "at %p\n", bufsz, skb->data);
4038 /* Try again, without freeing the previous */
4039 skb = netdev_alloc_skb(netdev, bufsz);
4040 /* Failed allocation, critical failure */
4041 if (!skb) {
4042 dev_kfree_skb(oldskb);
4043 break;
4044 }
4045
4046 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4047 /* give up */
4048 dev_kfree_skb(skb);
4049 dev_kfree_skb(oldskb);
4050 break; /* while !buffer_info->skb */
4051 }
4052
4053 /* Use new allocation */
4054 dev_kfree_skb(oldskb);
4055 }
4056 /* Make buffer alignment 2 beyond a 16 byte boundary
4057 * this will result in a 16 byte aligned IP header after
4058 * the 14 byte MAC header is removed
4059 */
4060 skb_reserve(skb, NET_IP_ALIGN);
4061
4062 buffer_info->skb = skb;
4063 buffer_info->length = adapter->rx_buffer_len;
4064 map_skb:
4065 buffer_info->dma = pci_map_single(pdev,
4066 skb->data,
4067 adapter->rx_buffer_len,
4068 PCI_DMA_FROMDEVICE);
4069
4070 /* Fix for errata 23, can't cross 64kB boundary */
4071 if (!e1000_check_64k_bound(adapter,
4072 (void *)(unsigned long)buffer_info->dma,
4073 adapter->rx_buffer_len)) {
4074 DPRINTK(RX_ERR, ERR,
4075 "dma align check failed: %u bytes at %p\n",
4076 adapter->rx_buffer_len,
4077 (void *)(unsigned long)buffer_info->dma);
4078 dev_kfree_skb(skb);
4079 buffer_info->skb = NULL;
4080
4081 pci_unmap_single(pdev, buffer_info->dma,
4082 adapter->rx_buffer_len,
4083 PCI_DMA_FROMDEVICE);
4084
4085 break; /* while !buffer_info->skb */
4086 }
4087 rx_desc = E1000_RX_DESC(*rx_ring, i);
4088 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4089
4090 if (unlikely(++i == rx_ring->count))
4091 i = 0;
4092 buffer_info = &rx_ring->buffer_info[i];
4093 }
4094
4095 if (likely(rx_ring->next_to_use != i)) {
4096 rx_ring->next_to_use = i;
4097 if (unlikely(i-- == 0))
4098 i = (rx_ring->count - 1);
4099
4100 /* Force memory writes to complete before letting h/w
4101 * know there are new descriptors to fetch. (Only
4102 * applicable for weak-ordered memory model archs,
4103 * such as IA-64). */
4104 wmb();
4105 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4106 }
4107 }
4108
4109 /**
4110 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4111 * @adapter: address of board private structure
4112 **/
4113
4114 static void
4115 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4116 struct e1000_rx_ring *rx_ring,
4117 int cleaned_count)
4118 {
4119 struct net_device *netdev = adapter->netdev;
4120 struct pci_dev *pdev = adapter->pdev;
4121 union e1000_rx_desc_packet_split *rx_desc;
4122 struct e1000_buffer *buffer_info;
4123 struct e1000_ps_page *ps_page;
4124 struct e1000_ps_page_dma *ps_page_dma;
4125 struct sk_buff *skb;
4126 unsigned int i, j;
4127
4128 i = rx_ring->next_to_use;
4129 buffer_info = &rx_ring->buffer_info[i];
4130 ps_page = &rx_ring->ps_page[i];
4131 ps_page_dma = &rx_ring->ps_page_dma[i];
4132
4133 while (cleaned_count--) {
4134 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4135
4136 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4137 if (j < adapter->rx_ps_pages) {
4138 if (likely(!ps_page->ps_page[j])) {
4139 ps_page->ps_page[j] =
4140 alloc_page(GFP_ATOMIC);
4141 if (unlikely(!ps_page->ps_page[j])) {
4142 adapter->alloc_rx_buff_failed++;
4143 goto no_buffers;
4144 }
4145 ps_page_dma->ps_page_dma[j] =
4146 pci_map_page(pdev,
4147 ps_page->ps_page[j],
4148 0, PAGE_SIZE,
4149 PCI_DMA_FROMDEVICE);
4150 }
4151 /* Refresh the desc even if buffer_addrs didn't
4152 * change because each write-back erases
4153 * this info.
4154 */
4155 rx_desc->read.buffer_addr[j+1] =
4156 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4157 } else
4158 rx_desc->read.buffer_addr[j+1] = ~0;
4159 }
4160
4161 skb = netdev_alloc_skb(netdev,
4162 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4163
4164 if (unlikely(!skb)) {
4165 adapter->alloc_rx_buff_failed++;
4166 break;
4167 }
4168
4169 /* Make buffer alignment 2 beyond a 16 byte boundary
4170 * this will result in a 16 byte aligned IP header after
4171 * the 14 byte MAC header is removed
4172 */
4173 skb_reserve(skb, NET_IP_ALIGN);
4174
4175 buffer_info->skb = skb;
4176 buffer_info->length = adapter->rx_ps_bsize0;
4177 buffer_info->dma = pci_map_single(pdev, skb->data,
4178 adapter->rx_ps_bsize0,
4179 PCI_DMA_FROMDEVICE);
4180
4181 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4182
4183 if (unlikely(++i == rx_ring->count)) i = 0;
4184 buffer_info = &rx_ring->buffer_info[i];
4185 ps_page = &rx_ring->ps_page[i];
4186 ps_page_dma = &rx_ring->ps_page_dma[i];
4187 }
4188
4189 no_buffers:
4190 if (likely(rx_ring->next_to_use != i)) {
4191 rx_ring->next_to_use = i;
4192 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4193
4194 /* Force memory writes to complete before letting h/w
4195 * know there are new descriptors to fetch. (Only
4196 * applicable for weak-ordered memory model archs,
4197 * such as IA-64). */
4198 wmb();
4199 /* Hardware increments by 16 bytes, but packet split
4200 * descriptors are 32 bytes...so we increment tail
4201 * twice as much.
4202 */
4203 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4204 }
4205 }
4206
4207 /**
4208 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4209 * @adapter:
4210 **/
4211
4212 static void
4213 e1000_smartspeed(struct e1000_adapter *adapter)
4214 {
4215 uint16_t phy_status;
4216 uint16_t phy_ctrl;
4217
4218 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4219 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4220 return;
4221
4222 if (adapter->smartspeed == 0) {
4223 /* If Master/Slave config fault is asserted twice,
4224 * we assume back-to-back */
4225 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4226 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4227 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4228 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4229 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4230 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4231 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4232 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4233 phy_ctrl);
4234 adapter->smartspeed++;
4235 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4236 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4237 &phy_ctrl)) {
4238 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4239 MII_CR_RESTART_AUTO_NEG);
4240 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4241 phy_ctrl);
4242 }
4243 }
4244 return;
4245 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4246 /* If still no link, perhaps using 2/3 pair cable */
4247 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4248 phy_ctrl |= CR_1000T_MS_ENABLE;
4249 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4250 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4251 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4252 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4253 MII_CR_RESTART_AUTO_NEG);
4254 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4255 }
4256 }
4257 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4258 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4259 adapter->smartspeed = 0;
4260 }
4261
4262 /**
4263 * e1000_ioctl -
4264 * @netdev:
4265 * @ifreq:
4266 * @cmd:
4267 **/
4268
4269 static int
4270 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4271 {
4272 switch (cmd) {
4273 case SIOCGMIIPHY:
4274 case SIOCGMIIREG:
4275 case SIOCSMIIREG:
4276 return e1000_mii_ioctl(netdev, ifr, cmd);
4277 default:
4278 return -EOPNOTSUPP;
4279 }
4280 }
4281
4282 /**
4283 * e1000_mii_ioctl -
4284 * @netdev:
4285 * @ifreq:
4286 * @cmd:
4287 **/
4288
4289 static int
4290 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4291 {
4292 struct e1000_adapter *adapter = netdev_priv(netdev);
4293 struct mii_ioctl_data *data = if_mii(ifr);
4294 int retval;
4295 uint16_t mii_reg;
4296 uint16_t spddplx;
4297 unsigned long flags;
4298
4299 if (adapter->hw.media_type != e1000_media_type_copper)
4300 return -EOPNOTSUPP;
4301
4302 switch (cmd) {
4303 case SIOCGMIIPHY:
4304 data->phy_id = adapter->hw.phy_addr;
4305 break;
4306 case SIOCGMIIREG:
4307 if (!capable(CAP_NET_ADMIN))
4308 return -EPERM;
4309 spin_lock_irqsave(&adapter->stats_lock, flags);
4310 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4311 &data->val_out)) {
4312 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4313 return -EIO;
4314 }
4315 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4316 break;
4317 case SIOCSMIIREG:
4318 if (!capable(CAP_NET_ADMIN))
4319 return -EPERM;
4320 if (data->reg_num & ~(0x1F))
4321 return -EFAULT;
4322 mii_reg = data->val_in;
4323 spin_lock_irqsave(&adapter->stats_lock, flags);
4324 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4325 mii_reg)) {
4326 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4327 return -EIO;
4328 }
4329 if (adapter->hw.media_type == e1000_media_type_copper) {
4330 switch (data->reg_num) {
4331 case PHY_CTRL:
4332 if (mii_reg & MII_CR_POWER_DOWN)
4333 break;
4334 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4335 adapter->hw.autoneg = 1;
4336 adapter->hw.autoneg_advertised = 0x2F;
4337 } else {
4338 if (mii_reg & 0x40)
4339 spddplx = SPEED_1000;
4340 else if (mii_reg & 0x2000)
4341 spddplx = SPEED_100;
4342 else
4343 spddplx = SPEED_10;
4344 spddplx += (mii_reg & 0x100)
4345 ? DUPLEX_FULL :
4346 DUPLEX_HALF;
4347 retval = e1000_set_spd_dplx(adapter,
4348 spddplx);
4349 if (retval) {
4350 spin_unlock_irqrestore(
4351 &adapter->stats_lock,
4352 flags);
4353 return retval;
4354 }
4355 }
4356 if (netif_running(adapter->netdev))
4357 e1000_reinit_locked(adapter);
4358 else
4359 e1000_reset(adapter);
4360 break;
4361 case M88E1000_PHY_SPEC_CTRL:
4362 case M88E1000_EXT_PHY_SPEC_CTRL:
4363 if (e1000_phy_reset(&adapter->hw)) {
4364 spin_unlock_irqrestore(
4365 &adapter->stats_lock, flags);
4366 return -EIO;
4367 }
4368 break;
4369 }
4370 } else {
4371 switch (data->reg_num) {
4372 case PHY_CTRL:
4373 if (mii_reg & MII_CR_POWER_DOWN)
4374 break;
4375 if (netif_running(adapter->netdev))
4376 e1000_reinit_locked(adapter);
4377 else
4378 e1000_reset(adapter);
4379 break;
4380 }
4381 }
4382 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4383 break;
4384 default:
4385 return -EOPNOTSUPP;
4386 }
4387 return E1000_SUCCESS;
4388 }
4389
4390 void
4391 e1000_pci_set_mwi(struct e1000_hw *hw)
4392 {
4393 struct e1000_adapter *adapter = hw->back;
4394 int ret_val = pci_set_mwi(adapter->pdev);
4395
4396 if (ret_val)
4397 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4398 }
4399
4400 void
4401 e1000_pci_clear_mwi(struct e1000_hw *hw)
4402 {
4403 struct e1000_adapter *adapter = hw->back;
4404
4405 pci_clear_mwi(adapter->pdev);
4406 }
4407
4408 void
4409 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4410 {
4411 struct e1000_adapter *adapter = hw->back;
4412
4413 pci_read_config_word(adapter->pdev, reg, value);
4414 }
4415
4416 void
4417 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4418 {
4419 struct e1000_adapter *adapter = hw->back;
4420
4421 pci_write_config_word(adapter->pdev, reg, *value);
4422 }
4423
4424 void
4425 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4426 {
4427 outl(value, port);
4428 }
4429
4430 static void
4431 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4432 {
4433 struct e1000_adapter *adapter = netdev_priv(netdev);
4434 uint32_t ctrl, rctl;
4435
4436 e1000_irq_disable(adapter);
4437 adapter->vlgrp = grp;
4438
4439 if (grp) {
4440 /* enable VLAN tag insert/strip */
4441 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4442 ctrl |= E1000_CTRL_VME;
4443 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4444
4445 if (adapter->hw.mac_type != e1000_ich8lan) {
4446 /* enable VLAN receive filtering */
4447 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4448 rctl |= E1000_RCTL_VFE;
4449 rctl &= ~E1000_RCTL_CFIEN;
4450 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4451 e1000_update_mng_vlan(adapter);
4452 }
4453 } else {
4454 /* disable VLAN tag insert/strip */
4455 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4456 ctrl &= ~E1000_CTRL_VME;
4457 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4458
4459 if (adapter->hw.mac_type != e1000_ich8lan) {
4460 /* disable VLAN filtering */
4461 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4462 rctl &= ~E1000_RCTL_VFE;
4463 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4464 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4465 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4466 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4467 }
4468 }
4469 }
4470
4471 e1000_irq_enable(adapter);
4472 }
4473
4474 static void
4475 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4476 {
4477 struct e1000_adapter *adapter = netdev_priv(netdev);
4478 uint32_t vfta, index;
4479
4480 if ((adapter->hw.mng_cookie.status &
4481 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4482 (vid == adapter->mng_vlan_id))
4483 return;
4484 /* add VID to filter table */
4485 index = (vid >> 5) & 0x7F;
4486 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4487 vfta |= (1 << (vid & 0x1F));
4488 e1000_write_vfta(&adapter->hw, index, vfta);
4489 }
4490
4491 static void
4492 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4493 {
4494 struct e1000_adapter *adapter = netdev_priv(netdev);
4495 uint32_t vfta, index;
4496
4497 e1000_irq_disable(adapter);
4498
4499 if (adapter->vlgrp)
4500 adapter->vlgrp->vlan_devices[vid] = NULL;
4501
4502 e1000_irq_enable(adapter);
4503
4504 if ((adapter->hw.mng_cookie.status &
4505 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4506 (vid == adapter->mng_vlan_id)) {
4507 /* release control to f/w */
4508 e1000_release_hw_control(adapter);
4509 return;
4510 }
4511
4512 /* remove VID from filter table */
4513 index = (vid >> 5) & 0x7F;
4514 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4515 vfta &= ~(1 << (vid & 0x1F));
4516 e1000_write_vfta(&adapter->hw, index, vfta);
4517 }
4518
4519 static void
4520 e1000_restore_vlan(struct e1000_adapter *adapter)
4521 {
4522 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4523
4524 if (adapter->vlgrp) {
4525 uint16_t vid;
4526 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4527 if (!adapter->vlgrp->vlan_devices[vid])
4528 continue;
4529 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4530 }
4531 }
4532 }
4533
4534 int
4535 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4536 {
4537 adapter->hw.autoneg = 0;
4538
4539 /* Fiber NICs only allow 1000 gbps Full duplex */
4540 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4541 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4542 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4543 return -EINVAL;
4544 }
4545
4546 switch (spddplx) {
4547 case SPEED_10 + DUPLEX_HALF:
4548 adapter->hw.forced_speed_duplex = e1000_10_half;
4549 break;
4550 case SPEED_10 + DUPLEX_FULL:
4551 adapter->hw.forced_speed_duplex = e1000_10_full;
4552 break;
4553 case SPEED_100 + DUPLEX_HALF:
4554 adapter->hw.forced_speed_duplex = e1000_100_half;
4555 break;
4556 case SPEED_100 + DUPLEX_FULL:
4557 adapter->hw.forced_speed_duplex = e1000_100_full;
4558 break;
4559 case SPEED_1000 + DUPLEX_FULL:
4560 adapter->hw.autoneg = 1;
4561 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4562 break;
4563 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4564 default:
4565 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4566 return -EINVAL;
4567 }
4568 return 0;
4569 }
4570
4571 #ifdef CONFIG_PM
4572 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4573 * bus we're on (PCI(X) vs. PCI-E)
4574 */
4575 #define PCIE_CONFIG_SPACE_LEN 256
4576 #define PCI_CONFIG_SPACE_LEN 64
4577 static int
4578 e1000_pci_save_state(struct e1000_adapter *adapter)
4579 {
4580 struct pci_dev *dev = adapter->pdev;
4581 int size;
4582 int i;
4583
4584 if (adapter->hw.mac_type >= e1000_82571)
4585 size = PCIE_CONFIG_SPACE_LEN;
4586 else
4587 size = PCI_CONFIG_SPACE_LEN;
4588
4589 WARN_ON(adapter->config_space != NULL);
4590
4591 adapter->config_space = kmalloc(size, GFP_KERNEL);
4592 if (!adapter->config_space) {
4593 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4594 return -ENOMEM;
4595 }
4596 for (i = 0; i < (size / 4); i++)
4597 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4598 return 0;
4599 }
4600
4601 static void
4602 e1000_pci_restore_state(struct e1000_adapter *adapter)
4603 {
4604 struct pci_dev *dev = adapter->pdev;
4605 int size;
4606 int i;
4607
4608 if (adapter->config_space == NULL)
4609 return;
4610
4611 if (adapter->hw.mac_type >= e1000_82571)
4612 size = PCIE_CONFIG_SPACE_LEN;
4613 else
4614 size = PCI_CONFIG_SPACE_LEN;
4615 for (i = 0; i < (size / 4); i++)
4616 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4617 kfree(adapter->config_space);
4618 adapter->config_space = NULL;
4619 return;
4620 }
4621 #endif /* CONFIG_PM */
4622
4623 static int
4624 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4625 {
4626 struct net_device *netdev = pci_get_drvdata(pdev);
4627 struct e1000_adapter *adapter = netdev_priv(netdev);
4628 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4629 uint32_t wufc = adapter->wol;
4630 #ifdef CONFIG_PM
4631 int retval = 0;
4632 #endif
4633
4634 netif_device_detach(netdev);
4635
4636 if (netif_running(netdev)) {
4637 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4638 e1000_down(adapter);
4639 }
4640
4641 #ifdef CONFIG_PM
4642 /* Implement our own version of pci_save_state(pdev) because pci-
4643 * express adapters have 256-byte config spaces. */
4644 retval = e1000_pci_save_state(adapter);
4645 if (retval)
4646 return retval;
4647 #endif
4648
4649 status = E1000_READ_REG(&adapter->hw, STATUS);
4650 if (status & E1000_STATUS_LU)
4651 wufc &= ~E1000_WUFC_LNKC;
4652
4653 if (wufc) {
4654 e1000_setup_rctl(adapter);
4655 e1000_set_multi(netdev);
4656
4657 /* turn on all-multi mode if wake on multicast is enabled */
4658 if (wufc & E1000_WUFC_MC) {
4659 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4660 rctl |= E1000_RCTL_MPE;
4661 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4662 }
4663
4664 if (adapter->hw.mac_type >= e1000_82540) {
4665 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4666 /* advertise wake from D3Cold */
4667 #define E1000_CTRL_ADVD3WUC 0x00100000
4668 /* phy power management enable */
4669 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4670 ctrl |= E1000_CTRL_ADVD3WUC |
4671 E1000_CTRL_EN_PHY_PWR_MGMT;
4672 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4673 }
4674
4675 if (adapter->hw.media_type == e1000_media_type_fiber ||
4676 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4677 /* keep the laser running in D3 */
4678 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4679 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4680 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4681 }
4682
4683 /* Allow time for pending master requests to run */
4684 e1000_disable_pciex_master(&adapter->hw);
4685
4686 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4687 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4688 pci_enable_wake(pdev, PCI_D3hot, 1);
4689 pci_enable_wake(pdev, PCI_D3cold, 1);
4690 } else {
4691 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4692 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4693 pci_enable_wake(pdev, PCI_D3hot, 0);
4694 pci_enable_wake(pdev, PCI_D3cold, 0);
4695 }
4696
4697 /* FIXME: this code is incorrect for PCI Express */
4698 if (adapter->hw.mac_type >= e1000_82540 &&
4699 adapter->hw.mac_type != e1000_ich8lan &&
4700 adapter->hw.media_type == e1000_media_type_copper) {
4701 manc = E1000_READ_REG(&adapter->hw, MANC);
4702 if (manc & E1000_MANC_SMBUS_EN) {
4703 manc |= E1000_MANC_ARP_EN;
4704 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4705 pci_enable_wake(pdev, PCI_D3hot, 1);
4706 pci_enable_wake(pdev, PCI_D3cold, 1);
4707 }
4708 }
4709
4710 if (adapter->hw.phy_type == e1000_phy_igp_3)
4711 e1000_phy_powerdown_workaround(&adapter->hw);
4712
4713 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4714 * would have already happened in close and is redundant. */
4715 e1000_release_hw_control(adapter);
4716
4717 pci_disable_device(pdev);
4718
4719 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4720
4721 return 0;
4722 }
4723
4724 #ifdef CONFIG_PM
4725 static int
4726 e1000_resume(struct pci_dev *pdev)
4727 {
4728 struct net_device *netdev = pci_get_drvdata(pdev);
4729 struct e1000_adapter *adapter = netdev_priv(netdev);
4730 uint32_t manc, err;
4731
4732 pci_set_power_state(pdev, PCI_D0);
4733 e1000_pci_restore_state(adapter);
4734 if ((err = pci_enable_device(pdev))) {
4735 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4736 return err;
4737 }
4738 pci_set_master(pdev);
4739
4740 pci_enable_wake(pdev, PCI_D3hot, 0);
4741 pci_enable_wake(pdev, PCI_D3cold, 0);
4742
4743 e1000_reset(adapter);
4744 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4745
4746 if (netif_running(netdev))
4747 e1000_up(adapter);
4748
4749 netif_device_attach(netdev);
4750
4751 /* FIXME: this code is incorrect for PCI Express */
4752 if (adapter->hw.mac_type >= e1000_82540 &&
4753 adapter->hw.mac_type != e1000_ich8lan &&
4754 adapter->hw.media_type == e1000_media_type_copper) {
4755 manc = E1000_READ_REG(&adapter->hw, MANC);
4756 manc &= ~(E1000_MANC_ARP_EN);
4757 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4758 }
4759
4760 /* If the controller is 82573 and f/w is AMT, do not set
4761 * DRV_LOAD until the interface is up. For all other cases,
4762 * let the f/w know that the h/w is now under the control
4763 * of the driver. */
4764 if (adapter->hw.mac_type != e1000_82573 ||
4765 !e1000_check_mng_mode(&adapter->hw))
4766 e1000_get_hw_control(adapter);
4767
4768 return 0;
4769 }
4770 #endif
4771
4772 static void e1000_shutdown(struct pci_dev *pdev)
4773 {
4774 e1000_suspend(pdev, PMSG_SUSPEND);
4775 }
4776
4777 #ifdef CONFIG_NET_POLL_CONTROLLER
4778 /*
4779 * Polling 'interrupt' - used by things like netconsole to send skbs
4780 * without having to re-enable interrupts. It's not called while
4781 * the interrupt routine is executing.
4782 */
4783 static void
4784 e1000_netpoll(struct net_device *netdev)
4785 {
4786 struct e1000_adapter *adapter = netdev_priv(netdev);
4787
4788 disable_irq(adapter->pdev->irq);
4789 e1000_intr(adapter->pdev->irq, netdev, NULL);
4790 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4791 #ifndef CONFIG_E1000_NAPI
4792 adapter->clean_rx(adapter, adapter->rx_ring);
4793 #endif
4794 enable_irq(adapter->pdev->irq);
4795 }
4796 #endif
4797
4798 /**
4799 * e1000_io_error_detected - called when PCI error is detected
4800 * @pdev: Pointer to PCI device
4801 * @state: The current pci conneection state
4802 *
4803 * This function is called after a PCI bus error affecting
4804 * this device has been detected.
4805 */
4806 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4807 {
4808 struct net_device *netdev = pci_get_drvdata(pdev);
4809 struct e1000_adapter *adapter = netdev->priv;
4810
4811 netif_device_detach(netdev);
4812
4813 if (netif_running(netdev))
4814 e1000_down(adapter);
4815 pci_disable_device(pdev);
4816
4817 /* Request a slot slot reset. */
4818 return PCI_ERS_RESULT_NEED_RESET;
4819 }
4820
4821 /**
4822 * e1000_io_slot_reset - called after the pci bus has been reset.
4823 * @pdev: Pointer to PCI device
4824 *
4825 * Restart the card from scratch, as if from a cold-boot. Implementation
4826 * resembles the first-half of the e1000_resume routine.
4827 */
4828 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4829 {
4830 struct net_device *netdev = pci_get_drvdata(pdev);
4831 struct e1000_adapter *adapter = netdev->priv;
4832
4833 if (pci_enable_device(pdev)) {
4834 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4835 return PCI_ERS_RESULT_DISCONNECT;
4836 }
4837 pci_set_master(pdev);
4838
4839 pci_enable_wake(pdev, 3, 0);
4840 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4841
4842 /* Perform card reset only on one instance of the card */
4843 if (PCI_FUNC (pdev->devfn) != 0)
4844 return PCI_ERS_RESULT_RECOVERED;
4845
4846 e1000_reset(adapter);
4847 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4848
4849 return PCI_ERS_RESULT_RECOVERED;
4850 }
4851
4852 /**
4853 * e1000_io_resume - called when traffic can start flowing again.
4854 * @pdev: Pointer to PCI device
4855 *
4856 * This callback is called when the error recovery driver tells us that
4857 * its OK to resume normal operation. Implementation resembles the
4858 * second-half of the e1000_resume routine.
4859 */
4860 static void e1000_io_resume(struct pci_dev *pdev)
4861 {
4862 struct net_device *netdev = pci_get_drvdata(pdev);
4863 struct e1000_adapter *adapter = netdev->priv;
4864 uint32_t manc, swsm;
4865
4866 if (netif_running(netdev)) {
4867 if (e1000_up(adapter)) {
4868 printk("e1000: can't bring device back up after reset\n");
4869 return;
4870 }
4871 }
4872
4873 netif_device_attach(netdev);
4874
4875 if (adapter->hw.mac_type >= e1000_82540 &&
4876 adapter->hw.media_type == e1000_media_type_copper) {
4877 manc = E1000_READ_REG(&adapter->hw, MANC);
4878 manc &= ~(E1000_MANC_ARP_EN);
4879 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4880 }
4881
4882 switch (adapter->hw.mac_type) {
4883 case e1000_82573:
4884 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4885 E1000_WRITE_REG(&adapter->hw, SWSM,
4886 swsm | E1000_SWSM_DRV_LOAD);
4887 break;
4888 default:
4889 break;
4890 }
4891
4892 if (netif_running(netdev))
4893 mod_timer(&adapter->watchdog_timer, jiffies);
4894 }
4895
4896 /* e1000_main.c */
Linux kernel - Deliverables
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