Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq
[deliverable/linux.git] / drivers / net / qlcnic / qlcnic_ctx.c
1 /*
2 * Copyright (C) 2009 - QLogic Corporation.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
22 *
23 */
24
25 #include "qlcnic.h"
26
27 static u32
28 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
29 {
30 u32 rsp;
31 int timeout = 0;
32
33 do {
34 /* give atleast 1ms for firmware to respond */
35 msleep(1);
36
37 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
38 return QLCNIC_CDRP_RSP_TIMEOUT;
39
40 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
41 } while (!QLCNIC_CDRP_IS_RSP(rsp));
42
43 return rsp;
44 }
45
46 u32
47 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
48 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
49 {
50 u32 rsp;
51 u32 signature;
52 u32 rcode = QLCNIC_RCODE_SUCCESS;
53 struct pci_dev *pdev = adapter->pdev;
54
55 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
56
57 /* Acquire semaphore before accessing CRB */
58 if (qlcnic_api_lock(adapter))
59 return QLCNIC_RCODE_TIMEOUT;
60
61 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
62 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
63 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
64 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
65 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
66
67 rsp = qlcnic_poll_rsp(adapter);
68
69 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
70 dev_err(&pdev->dev, "card response timeout.\n");
71 rcode = QLCNIC_RCODE_TIMEOUT;
72 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
73 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
74 dev_err(&pdev->dev, "failed card response code:0x%x\n",
75 rcode);
76 }
77
78 /* Release semaphore */
79 qlcnic_api_unlock(adapter);
80
81 return rcode;
82 }
83
84 int
85 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
86 {
87 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
88
89 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
90 if (qlcnic_issue_cmd(adapter,
91 adapter->ahw.pci_func,
92 adapter->fw_hal_version,
93 recv_ctx->context_id,
94 mtu,
95 0,
96 QLCNIC_CDRP_CMD_SET_MTU)) {
97
98 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
99 return -EIO;
100 }
101 }
102
103 return 0;
104 }
105
106 static int
107 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
108 {
109 void *addr;
110 struct qlcnic_hostrq_rx_ctx *prq;
111 struct qlcnic_cardrsp_rx_ctx *prsp;
112 struct qlcnic_hostrq_rds_ring *prq_rds;
113 struct qlcnic_hostrq_sds_ring *prq_sds;
114 struct qlcnic_cardrsp_rds_ring *prsp_rds;
115 struct qlcnic_cardrsp_sds_ring *prsp_sds;
116 struct qlcnic_host_rds_ring *rds_ring;
117 struct qlcnic_host_sds_ring *sds_ring;
118
119 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
120 u64 phys_addr;
121
122 int i, nrds_rings, nsds_rings;
123 size_t rq_size, rsp_size;
124 u32 cap, reg, val, reg2;
125 int err;
126
127 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
128
129 nrds_rings = adapter->max_rds_rings;
130 nsds_rings = adapter->max_sds_rings;
131
132 rq_size =
133 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
134 nsds_rings);
135 rsp_size =
136 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
137 nsds_rings);
138
139 addr = pci_alloc_consistent(adapter->pdev,
140 rq_size, &hostrq_phys_addr);
141 if (addr == NULL)
142 return -ENOMEM;
143 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
144
145 addr = pci_alloc_consistent(adapter->pdev,
146 rsp_size, &cardrsp_phys_addr);
147 if (addr == NULL) {
148 err = -ENOMEM;
149 goto out_free_rq;
150 }
151 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
152
153 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
154
155 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
156 | QLCNIC_CAP0_VALIDOFF);
157 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
158
159 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
160 msix_handler);
161 prq->txrx_sds_binding = nsds_rings - 1;
162
163 prq->capabilities[0] = cpu_to_le32(cap);
164 prq->host_int_crb_mode =
165 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
166 prq->host_rds_crb_mode =
167 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
168
169 prq->num_rds_rings = cpu_to_le16(nrds_rings);
170 prq->num_sds_rings = cpu_to_le16(nsds_rings);
171 prq->rds_ring_offset = cpu_to_le32(0);
172
173 val = le32_to_cpu(prq->rds_ring_offset) +
174 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
175 prq->sds_ring_offset = cpu_to_le32(val);
176
177 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
178 le32_to_cpu(prq->rds_ring_offset));
179
180 for (i = 0; i < nrds_rings; i++) {
181
182 rds_ring = &recv_ctx->rds_rings[i];
183 rds_ring->producer = 0;
184
185 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
186 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
187 prq_rds[i].ring_kind = cpu_to_le32(i);
188 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
189 }
190
191 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
192 le32_to_cpu(prq->sds_ring_offset));
193
194 for (i = 0; i < nsds_rings; i++) {
195
196 sds_ring = &recv_ctx->sds_rings[i];
197 sds_ring->consumer = 0;
198 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
199
200 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
201 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
202 prq_sds[i].msi_index = cpu_to_le16(i);
203 }
204
205 phys_addr = hostrq_phys_addr;
206 err = qlcnic_issue_cmd(adapter,
207 adapter->ahw.pci_func,
208 adapter->fw_hal_version,
209 (u32)(phys_addr >> 32),
210 (u32)(phys_addr & 0xffffffff),
211 rq_size,
212 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
213 if (err) {
214 dev_err(&adapter->pdev->dev,
215 "Failed to create rx ctx in firmware%d\n", err);
216 goto out_free_rsp;
217 }
218
219
220 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
221 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
222
223 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
224 rds_ring = &recv_ctx->rds_rings[i];
225
226 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
227 rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 + reg;
228 }
229
230 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
231 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
232
233 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
234 sds_ring = &recv_ctx->sds_rings[i];
235
236 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
237 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
238
239 sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 + reg;
240 sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2;
241 }
242
243 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
244 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
245 recv_ctx->virt_port = prsp->virt_port;
246
247 out_free_rsp:
248 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
249 out_free_rq:
250 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
251 return err;
252 }
253
254 static void
255 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
256 {
257 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
258
259 if (qlcnic_issue_cmd(adapter,
260 adapter->ahw.pci_func,
261 adapter->fw_hal_version,
262 recv_ctx->context_id,
263 QLCNIC_DESTROY_CTX_RESET,
264 0,
265 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
266
267 dev_err(&adapter->pdev->dev,
268 "Failed to destroy rx ctx in firmware\n");
269 }
270
271 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
272 }
273
274 static int
275 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
276 {
277 struct qlcnic_hostrq_tx_ctx *prq;
278 struct qlcnic_hostrq_cds_ring *prq_cds;
279 struct qlcnic_cardrsp_tx_ctx *prsp;
280 void *rq_addr, *rsp_addr;
281 size_t rq_size, rsp_size;
282 u32 temp;
283 int err;
284 u64 phys_addr;
285 dma_addr_t rq_phys_addr, rsp_phys_addr;
286 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
287
288 /* reset host resources */
289 tx_ring->producer = 0;
290 tx_ring->sw_consumer = 0;
291 *(tx_ring->hw_consumer) = 0;
292
293 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
294 rq_addr = pci_alloc_consistent(adapter->pdev,
295 rq_size, &rq_phys_addr);
296 if (!rq_addr)
297 return -ENOMEM;
298
299 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
300 rsp_addr = pci_alloc_consistent(adapter->pdev,
301 rsp_size, &rsp_phys_addr);
302 if (!rsp_addr) {
303 err = -ENOMEM;
304 goto out_free_rq;
305 }
306
307 memset(rq_addr, 0, rq_size);
308 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
309
310 memset(rsp_addr, 0, rsp_size);
311 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
312
313 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
314
315 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
316 QLCNIC_CAP0_LSO);
317 prq->capabilities[0] = cpu_to_le32(temp);
318
319 prq->host_int_crb_mode =
320 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
321
322 prq->interrupt_ctl = 0;
323 prq->msi_index = 0;
324 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
325
326 prq_cds = &prq->cds_ring;
327
328 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
329 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
330
331 phys_addr = rq_phys_addr;
332 err = qlcnic_issue_cmd(adapter,
333 adapter->ahw.pci_func,
334 adapter->fw_hal_version,
335 (u32)(phys_addr >> 32),
336 ((u32)phys_addr & 0xffffffff),
337 rq_size,
338 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
339
340 if (err == QLCNIC_RCODE_SUCCESS) {
341 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
342 tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 + temp;
343
344 adapter->tx_context_id =
345 le16_to_cpu(prsp->context_id);
346 } else {
347 dev_err(&adapter->pdev->dev,
348 "Failed to create tx ctx in firmware%d\n", err);
349 err = -EIO;
350 }
351
352 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
353
354 out_free_rq:
355 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
356
357 return err;
358 }
359
360 static void
361 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
362 {
363 if (qlcnic_issue_cmd(adapter,
364 adapter->ahw.pci_func,
365 adapter->fw_hal_version,
366 adapter->tx_context_id,
367 QLCNIC_DESTROY_CTX_RESET,
368 0,
369 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
370
371 dev_err(&adapter->pdev->dev,
372 "Failed to destroy tx ctx in firmware\n");
373 }
374 }
375
376 int
377 qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val)
378 {
379
380 if (qlcnic_issue_cmd(adapter,
381 adapter->ahw.pci_func,
382 adapter->fw_hal_version,
383 reg,
384 0,
385 0,
386 QLCNIC_CDRP_CMD_READ_PHY)) {
387
388 return -EIO;
389 }
390
391 return QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
392 }
393
394 int
395 qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val)
396 {
397 return qlcnic_issue_cmd(adapter,
398 adapter->ahw.pci_func,
399 adapter->fw_hal_version,
400 reg,
401 val,
402 0,
403 QLCNIC_CDRP_CMD_WRITE_PHY);
404 }
405
406 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
407 {
408 void *addr;
409 int err;
410 int ring;
411 struct qlcnic_recv_context *recv_ctx;
412 struct qlcnic_host_rds_ring *rds_ring;
413 struct qlcnic_host_sds_ring *sds_ring;
414 struct qlcnic_host_tx_ring *tx_ring;
415
416 struct pci_dev *pdev = adapter->pdev;
417
418 recv_ctx = &adapter->recv_ctx;
419 tx_ring = adapter->tx_ring;
420
421 tx_ring->hw_consumer = (__le32 *)pci_alloc_consistent(pdev, sizeof(u32),
422 &tx_ring->hw_cons_phys_addr);
423 if (tx_ring->hw_consumer == NULL) {
424 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
425 return -ENOMEM;
426 }
427 *(tx_ring->hw_consumer) = 0;
428
429 /* cmd desc ring */
430 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
431 &tx_ring->phys_addr);
432
433 if (addr == NULL) {
434 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
435 err = -ENOMEM;
436 goto err_out_free;
437 }
438
439 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
440
441 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
442 rds_ring = &recv_ctx->rds_rings[ring];
443 addr = pci_alloc_consistent(adapter->pdev,
444 RCV_DESC_RINGSIZE(rds_ring),
445 &rds_ring->phys_addr);
446 if (addr == NULL) {
447 dev_err(&pdev->dev,
448 "failed to allocate rds ring [%d]\n", ring);
449 err = -ENOMEM;
450 goto err_out_free;
451 }
452 rds_ring->desc_head = (struct rcv_desc *)addr;
453
454 }
455
456 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
457 sds_ring = &recv_ctx->sds_rings[ring];
458
459 addr = pci_alloc_consistent(adapter->pdev,
460 STATUS_DESC_RINGSIZE(sds_ring),
461 &sds_ring->phys_addr);
462 if (addr == NULL) {
463 dev_err(&pdev->dev,
464 "failed to allocate sds ring [%d]\n", ring);
465 err = -ENOMEM;
466 goto err_out_free;
467 }
468 sds_ring->desc_head = (struct status_desc *)addr;
469 }
470
471 return 0;
472
473 err_out_free:
474 qlcnic_free_hw_resources(adapter);
475 return err;
476 }
477
478
479 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
480 {
481 int err;
482
483 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
484 if (err)
485 return err;
486
487 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
488 if (err) {
489 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
490 return err;
491 }
492
493 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
494 return 0;
495 }
496
497 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
498 {
499 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
500 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
501 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
502
503 /* Allow dma queues to drain after context reset */
504 msleep(20);
505 }
506 }
507
508 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
509 {
510 struct qlcnic_recv_context *recv_ctx;
511 struct qlcnic_host_rds_ring *rds_ring;
512 struct qlcnic_host_sds_ring *sds_ring;
513 struct qlcnic_host_tx_ring *tx_ring;
514 int ring;
515
516 recv_ctx = &adapter->recv_ctx;
517
518 tx_ring = adapter->tx_ring;
519 if (tx_ring->hw_consumer != NULL) {
520 pci_free_consistent(adapter->pdev,
521 sizeof(u32),
522 tx_ring->hw_consumer,
523 tx_ring->hw_cons_phys_addr);
524 tx_ring->hw_consumer = NULL;
525 }
526
527 if (tx_ring->desc_head != NULL) {
528 pci_free_consistent(adapter->pdev,
529 TX_DESC_RINGSIZE(tx_ring),
530 tx_ring->desc_head, tx_ring->phys_addr);
531 tx_ring->desc_head = NULL;
532 }
533
534 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
535 rds_ring = &recv_ctx->rds_rings[ring];
536
537 if (rds_ring->desc_head != NULL) {
538 pci_free_consistent(adapter->pdev,
539 RCV_DESC_RINGSIZE(rds_ring),
540 rds_ring->desc_head,
541 rds_ring->phys_addr);
542 rds_ring->desc_head = NULL;
543 }
544 }
545
546 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
547 sds_ring = &recv_ctx->sds_rings[ring];
548
549 if (sds_ring->desc_head != NULL) {
550 pci_free_consistent(adapter->pdev,
551 STATUS_DESC_RINGSIZE(sds_ring),
552 sds_ring->desc_head,
553 sds_ring->phys_addr);
554 sds_ring->desc_head = NULL;
555 }
556 }
557 }
558
559 /* Set MAC address of a NIC partition */
560 int qlcnic_set_mac_address(struct qlcnic_adapter *adapter, u8* mac)
561 {
562 int err = 0;
563 u32 arg1, arg2, arg3;
564
565 arg1 = adapter->ahw.pci_func | BIT_9;
566 arg2 = mac[0] | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24);
567 arg3 = mac[4] | (mac[5] << 16);
568
569 err = qlcnic_issue_cmd(adapter,
570 adapter->ahw.pci_func,
571 adapter->fw_hal_version,
572 arg1,
573 arg2,
574 arg3,
575 QLCNIC_CDRP_CMD_MAC_ADDRESS);
576
577 if (err != QLCNIC_RCODE_SUCCESS) {
578 dev_err(&adapter->pdev->dev,
579 "Failed to set mac address%d\n", err);
580 err = -EIO;
581 }
582
583 return err;
584 }
585
586 /* Get MAC address of a NIC partition */
587 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
588 {
589 int err;
590 u32 arg1;
591
592 arg1 = adapter->ahw.pci_func | BIT_8;
593 err = qlcnic_issue_cmd(adapter,
594 adapter->ahw.pci_func,
595 adapter->fw_hal_version,
596 arg1,
597 0,
598 0,
599 QLCNIC_CDRP_CMD_MAC_ADDRESS);
600
601 if (err == QLCNIC_RCODE_SUCCESS)
602 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
603 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
604 else {
605 dev_err(&adapter->pdev->dev,
606 "Failed to get mac address%d\n", err);
607 err = -EIO;
608 }
609
610 return err;
611 }
612
613 /* Get info of a NIC partition */
614 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
615 struct qlcnic_info *npar_info, u8 func_id)
616 {
617 int err;
618 dma_addr_t nic_dma_t;
619 struct qlcnic_info *nic_info;
620 void *nic_info_addr;
621 size_t nic_size = sizeof(struct qlcnic_info);
622
623 nic_info_addr = pci_alloc_consistent(adapter->pdev,
624 nic_size, &nic_dma_t);
625 if (!nic_info_addr)
626 return -ENOMEM;
627 memset(nic_info_addr, 0, nic_size);
628
629 nic_info = (struct qlcnic_info *) nic_info_addr;
630 err = qlcnic_issue_cmd(adapter,
631 adapter->ahw.pci_func,
632 adapter->fw_hal_version,
633 MSD(nic_dma_t),
634 LSD(nic_dma_t),
635 (func_id << 16 | nic_size),
636 QLCNIC_CDRP_CMD_GET_NIC_INFO);
637
638 if (err == QLCNIC_RCODE_SUCCESS) {
639 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
640 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
641 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
642 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
643 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
644 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
645 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
646 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
647 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
648 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
649
650 dev_info(&adapter->pdev->dev,
651 "phy port: %d switch_mode: %d,\n"
652 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
653 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
654 npar_info->phys_port, npar_info->switch_mode,
655 npar_info->max_tx_ques, npar_info->max_rx_ques,
656 npar_info->min_tx_bw, npar_info->max_tx_bw,
657 npar_info->max_mtu, npar_info->capabilities);
658 } else {
659 dev_err(&adapter->pdev->dev,
660 "Failed to get nic info%d\n", err);
661 err = -EIO;
662 }
663
664 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
665 return err;
666 }
667
668 /* Configure a NIC partition */
669 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
670 {
671 int err = -EIO;
672 dma_addr_t nic_dma_t;
673 void *nic_info_addr;
674 struct qlcnic_info *nic_info;
675 size_t nic_size = sizeof(struct qlcnic_info);
676
677 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
678 return err;
679
680 nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size,
681 &nic_dma_t);
682 if (!nic_info_addr)
683 return -ENOMEM;
684
685 memset(nic_info_addr, 0, nic_size);
686 nic_info = (struct qlcnic_info *)nic_info_addr;
687
688 nic_info->pci_func = cpu_to_le16(nic->pci_func);
689 nic_info->op_mode = cpu_to_le16(nic->op_mode);
690 nic_info->phys_port = cpu_to_le16(nic->phys_port);
691 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
692 nic_info->capabilities = cpu_to_le32(nic->capabilities);
693 nic_info->max_mac_filters = nic->max_mac_filters;
694 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
695 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
696 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
697 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
698
699 err = qlcnic_issue_cmd(adapter,
700 adapter->ahw.pci_func,
701 adapter->fw_hal_version,
702 MSD(nic_dma_t),
703 LSD(nic_dma_t),
704 ((nic->pci_func << 16) | nic_size),
705 QLCNIC_CDRP_CMD_SET_NIC_INFO);
706
707 if (err != QLCNIC_RCODE_SUCCESS) {
708 dev_err(&adapter->pdev->dev,
709 "Failed to set nic info%d\n", err);
710 err = -EIO;
711 }
712
713 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
714 return err;
715 }
716
717 /* Get PCI Info of a partition */
718 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
719 struct qlcnic_pci_info *pci_info)
720 {
721 int err = 0, i;
722 dma_addr_t pci_info_dma_t;
723 struct qlcnic_pci_info *npar;
724 void *pci_info_addr;
725 size_t npar_size = sizeof(struct qlcnic_pci_info);
726 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
727
728 pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size,
729 &pci_info_dma_t);
730 if (!pci_info_addr)
731 return -ENOMEM;
732 memset(pci_info_addr, 0, pci_size);
733
734 npar = (struct qlcnic_pci_info *) pci_info_addr;
735 err = qlcnic_issue_cmd(adapter,
736 adapter->ahw.pci_func,
737 adapter->fw_hal_version,
738 MSD(pci_info_dma_t),
739 LSD(pci_info_dma_t),
740 pci_size,
741 QLCNIC_CDRP_CMD_GET_PCI_INFO);
742
743 if (err == QLCNIC_RCODE_SUCCESS) {
744 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
745 pci_info->id = le32_to_cpu(npar->id);
746 pci_info->active = le32_to_cpu(npar->active);
747 pci_info->type = le32_to_cpu(npar->type);
748 pci_info->default_port =
749 le32_to_cpu(npar->default_port);
750 pci_info->tx_min_bw =
751 le32_to_cpu(npar->tx_min_bw);
752 pci_info->tx_max_bw =
753 le32_to_cpu(npar->tx_max_bw);
754 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
755 }
756 } else {
757 dev_err(&adapter->pdev->dev,
758 "Failed to get PCI Info%d\n", err);
759 err = -EIO;
760 }
761
762 pci_free_consistent(adapter->pdev, pci_size, pci_info_addr,
763 pci_info_dma_t);
764 return err;
765 }
766
767 /* Reset a NIC partition */
768
769 int qlcnic_reset_partition(struct qlcnic_adapter *adapter, u8 func_no)
770 {
771 int err = -EIO;
772
773 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
774 return err;
775
776 err = qlcnic_issue_cmd(adapter,
777 adapter->ahw.pci_func,
778 adapter->fw_hal_version,
779 func_no,
780 0,
781 0,
782 QLCNIC_CDRP_CMD_RESET_NPAR);
783
784 if (err != QLCNIC_RCODE_SUCCESS) {
785 dev_err(&adapter->pdev->dev,
786 "Failed to issue reset partition%d\n", err);
787 err = -EIO;
788 }
789
790 return err;
791 }
792
793 /* Get eSwitch Capabilities */
794 int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *adapter, u8 port,
795 struct qlcnic_eswitch *eswitch)
796 {
797 int err = -EIO;
798 u32 arg1, arg2;
799
800 if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC)
801 return err;
802
803 err = qlcnic_issue_cmd(adapter,
804 adapter->ahw.pci_func,
805 adapter->fw_hal_version,
806 port,
807 0,
808 0,
809 QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY);
810
811 if (err == QLCNIC_RCODE_SUCCESS) {
812 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
813 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
814
815 eswitch->port = arg1 & 0xf;
816 eswitch->active_vports = LSB(arg2);
817 eswitch->max_ucast_filters = MSB(arg2);
818 eswitch->max_active_vlans = LSB(MSW(arg2));
819 if (arg1 & BIT_6)
820 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
821 if (arg1 & BIT_7)
822 eswitch->flags |= QLCNIC_SWITCH_PROMISC_MODE;
823 if (arg1 & BIT_8)
824 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
825 } else {
826 dev_err(&adapter->pdev->dev,
827 "Failed to get eswitch capabilities%d\n", err);
828 }
829
830 return err;
831 }
832
833 /* Get current status of eswitch */
834 int qlcnic_get_eswitch_status(struct qlcnic_adapter *adapter, u8 port,
835 struct qlcnic_eswitch *eswitch)
836 {
837 int err = -EIO;
838 u32 arg1, arg2;
839
840 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
841 return err;
842
843 err = qlcnic_issue_cmd(adapter,
844 adapter->ahw.pci_func,
845 adapter->fw_hal_version,
846 port,
847 0,
848 0,
849 QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS);
850
851 if (err == QLCNIC_RCODE_SUCCESS) {
852 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
853 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
854
855 eswitch->port = arg1 & 0xf;
856 eswitch->active_vports = LSB(arg2);
857 eswitch->active_ucast_filters = MSB(arg2);
858 eswitch->active_vlans = LSB(MSW(arg2));
859 if (arg1 & BIT_6)
860 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
861 if (arg1 & BIT_8)
862 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
863
864 } else {
865 dev_err(&adapter->pdev->dev,
866 "Failed to get eswitch status%d\n", err);
867 }
868
869 return err;
870 }
871
872 /* Enable/Disable eSwitch */
873 int qlcnic_toggle_eswitch(struct qlcnic_adapter *adapter, u8 id, u8 enable)
874 {
875 int err = -EIO;
876 u32 arg1, arg2;
877 struct qlcnic_eswitch *eswitch;
878
879 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
880 return err;
881
882 eswitch = &adapter->eswitch[id];
883 if (!eswitch)
884 return err;
885
886 arg1 = eswitch->port | (enable ? BIT_4 : 0);
887 arg2 = eswitch->active_vports | (eswitch->max_ucast_filters << 8) |
888 (eswitch->max_active_vlans << 16);
889 err = qlcnic_issue_cmd(adapter,
890 adapter->ahw.pci_func,
891 adapter->fw_hal_version,
892 arg1,
893 arg2,
894 0,
895 QLCNIC_CDRP_CMD_TOGGLE_ESWITCH);
896
897 if (err != QLCNIC_RCODE_SUCCESS) {
898 dev_err(&adapter->pdev->dev,
899 "Failed to enable eswitch%d\n", eswitch->port);
900 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
901 err = -EIO;
902 } else {
903 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
904 dev_info(&adapter->pdev->dev,
905 "Enabled eSwitch for port %d\n", eswitch->port);
906 }
907
908 return err;
909 }
910
911 /* Configure eSwitch for port mirroring */
912 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
913 u8 enable_mirroring, u8 pci_func)
914 {
915 int err = -EIO;
916 u32 arg1;
917
918 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
919 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
920 return err;
921
922 arg1 = id | (enable_mirroring ? BIT_4 : 0);
923 arg1 |= pci_func << 8;
924
925 err = qlcnic_issue_cmd(adapter,
926 adapter->ahw.pci_func,
927 adapter->fw_hal_version,
928 arg1,
929 0,
930 0,
931 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
932
933 if (err != QLCNIC_RCODE_SUCCESS) {
934 dev_err(&adapter->pdev->dev,
935 "Failed to configure port mirroring%d on eswitch:%d\n",
936 pci_func, id);
937 } else {
938 dev_info(&adapter->pdev->dev,
939 "Configured eSwitch %d for port mirroring:%d\n",
940 id, pci_func);
941 }
942
943 return err;
944 }
945
946 /* Configure eSwitch port */
947 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter, u8 id,
948 int vlan_tagging, u8 discard_tagged, u8 promsc_mode,
949 u8 mac_learn, u8 pci_func, u16 vlan_id)
950 {
951 int err = -EIO;
952 u32 arg1;
953 struct qlcnic_eswitch *eswitch;
954
955 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
956 return err;
957
958 eswitch = &adapter->eswitch[id];
959 if (!(eswitch->flags & QLCNIC_SWITCH_ENABLE))
960 return err;
961
962 arg1 = eswitch->port | (discard_tagged ? BIT_4 : 0);
963 arg1 |= (promsc_mode ? BIT_6 : 0) | (mac_learn ? BIT_7 : 0);
964 arg1 |= pci_func << 8;
965 if (vlan_tagging)
966 arg1 |= BIT_5 | (vlan_id << 16);
967
968 err = qlcnic_issue_cmd(adapter,
969 adapter->ahw.pci_func,
970 adapter->fw_hal_version,
971 arg1,
972 0,
973 0,
974 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
975
976 if (err != QLCNIC_RCODE_SUCCESS) {
977 dev_err(&adapter->pdev->dev,
978 "Failed to configure eswitch port%d\n", eswitch->port);
979 } else {
980 dev_info(&adapter->pdev->dev,
981 "Configured eSwitch for port %d\n", eswitch->port);
982 }
983
984 return err;
985 }
This page took 0.050811 seconds and 6 git commands to generate.