Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
[deliverable/linux.git] / drivers / net / wireless / intel / iwlwifi / mvm / nvm.c
1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * Copyright(c) 2016 Intel Deutschland GmbH
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 *
44 * * Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * * Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in
48 * the documentation and/or other materials provided with the
49 * distribution.
50 * * Neither the name Intel Corporation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 *****************************************************************************/
67 #include <linux/firmware.h>
68 #include <linux/rtnetlink.h>
69 #include <linux/pci.h>
70 #include <linux/acpi.h>
71 #include "iwl-trans.h"
72 #include "iwl-csr.h"
73 #include "mvm.h"
74 #include "iwl-eeprom-parse.h"
75 #include "iwl-eeprom-read.h"
76 #include "iwl-nvm-parse.h"
77 #include "iwl-prph.h"
78
79 /* Default NVM size to read */
80 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
81 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58
82 #define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc
83
84 #define NVM_WRITE_OPCODE 1
85 #define NVM_READ_OPCODE 0
86
87 /* load nvm chunk response */
88 enum {
89 READ_NVM_CHUNK_SUCCEED = 0,
90 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
91 };
92
93 /*
94 * prepare the NVM host command w/ the pointers to the nvm buffer
95 * and send it to fw
96 */
97 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
98 u16 offset, u16 length, const u8 *data)
99 {
100 struct iwl_nvm_access_cmd nvm_access_cmd = {
101 .offset = cpu_to_le16(offset),
102 .length = cpu_to_le16(length),
103 .type = cpu_to_le16(section),
104 .op_code = NVM_WRITE_OPCODE,
105 };
106 struct iwl_host_cmd cmd = {
107 .id = NVM_ACCESS_CMD,
108 .len = { sizeof(struct iwl_nvm_access_cmd), length },
109 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
110 .data = { &nvm_access_cmd, data },
111 /* data may come from vmalloc, so use _DUP */
112 .dataflags = { 0, IWL_HCMD_DFL_DUP },
113 };
114 struct iwl_rx_packet *pkt;
115 struct iwl_nvm_access_resp *nvm_resp;
116 int ret;
117
118 ret = iwl_mvm_send_cmd(mvm, &cmd);
119 if (ret)
120 return ret;
121
122 pkt = cmd.resp_pkt;
123 if (!pkt) {
124 IWL_ERR(mvm, "Error in NVM_ACCESS response\n");
125 return -EINVAL;
126 }
127 /* Extract & check NVM write response */
128 nvm_resp = (void *)pkt->data;
129 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
130 IWL_ERR(mvm,
131 "NVM access write command failed for section %u (status = 0x%x)\n",
132 section, le16_to_cpu(nvm_resp->status));
133 ret = -EIO;
134 }
135
136 iwl_free_resp(&cmd);
137 return ret;
138 }
139
140 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
141 u16 offset, u16 length, u8 *data)
142 {
143 struct iwl_nvm_access_cmd nvm_access_cmd = {
144 .offset = cpu_to_le16(offset),
145 .length = cpu_to_le16(length),
146 .type = cpu_to_le16(section),
147 .op_code = NVM_READ_OPCODE,
148 };
149 struct iwl_nvm_access_resp *nvm_resp;
150 struct iwl_rx_packet *pkt;
151 struct iwl_host_cmd cmd = {
152 .id = NVM_ACCESS_CMD,
153 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
154 .data = { &nvm_access_cmd, },
155 };
156 int ret, bytes_read, offset_read;
157 u8 *resp_data;
158
159 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
160
161 ret = iwl_mvm_send_cmd(mvm, &cmd);
162 if (ret)
163 return ret;
164
165 pkt = cmd.resp_pkt;
166
167 /* Extract NVM response */
168 nvm_resp = (void *)pkt->data;
169 ret = le16_to_cpu(nvm_resp->status);
170 bytes_read = le16_to_cpu(nvm_resp->length);
171 offset_read = le16_to_cpu(nvm_resp->offset);
172 resp_data = nvm_resp->data;
173 if (ret) {
174 if ((offset != 0) &&
175 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
176 /*
177 * meaning of NOT_VALID_ADDRESS:
178 * driver try to read chunk from address that is
179 * multiple of 2K and got an error since addr is empty.
180 * meaning of (offset != 0): driver already
181 * read valid data from another chunk so this case
182 * is not an error.
183 */
184 IWL_DEBUG_EEPROM(mvm->trans->dev,
185 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
186 offset);
187 ret = 0;
188 } else {
189 IWL_DEBUG_EEPROM(mvm->trans->dev,
190 "NVM access command failed with status %d (device: %s)\n",
191 ret, mvm->cfg->name);
192 ret = -EIO;
193 }
194 goto exit;
195 }
196
197 if (offset_read != offset) {
198 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
199 offset_read);
200 ret = -EINVAL;
201 goto exit;
202 }
203
204 /* Write data to NVM */
205 memcpy(data + offset, resp_data, bytes_read);
206 ret = bytes_read;
207
208 exit:
209 iwl_free_resp(&cmd);
210 return ret;
211 }
212
213 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
214 const u8 *data, u16 length)
215 {
216 int offset = 0;
217
218 /* copy data in chunks of 2k (and remainder if any) */
219
220 while (offset < length) {
221 int chunk_size, ret;
222
223 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
224 length - offset);
225
226 ret = iwl_nvm_write_chunk(mvm, section, offset,
227 chunk_size, data + offset);
228 if (ret < 0)
229 return ret;
230
231 offset += chunk_size;
232 }
233
234 return 0;
235 }
236
237 static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
238 u8 *data, unsigned int len)
239 {
240 #define IWL_4165_DEVICE_ID 0x5501
241 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
242
243 if (section == NVM_SECTION_TYPE_PHY_SKU &&
244 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
245 (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
246 /* OTP 0x52 bug work around: it's a 1x1 device */
247 data[3] = ANT_B | (ANT_B << 4);
248 }
249
250 /*
251 * Reads an NVM section completely.
252 * NICs prior to 7000 family doesn't have a real NVM, but just read
253 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
254 * by uCode, we need to manually check in this case that we don't
255 * overflow and try to read more than the EEPROM size.
256 * For 7000 family NICs, we supply the maximal size we can read, and
257 * the uCode fills the response with as much data as we can,
258 * without overflowing, so no check is needed.
259 */
260 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
261 u8 *data, u32 size_read)
262 {
263 u16 length, offset = 0;
264 int ret;
265
266 /* Set nvm section read length */
267 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
268
269 ret = length;
270
271 /* Read the NVM until exhausted (reading less than requested) */
272 while (ret == length) {
273 /* Check no memory assumptions fail and cause an overflow */
274 if ((size_read + offset + length) >
275 mvm->cfg->base_params->eeprom_size) {
276 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
277 return -ENOBUFS;
278 }
279
280 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
281 if (ret < 0) {
282 IWL_DEBUG_EEPROM(mvm->trans->dev,
283 "Cannot read NVM from section %d offset %d, length %d\n",
284 section, offset, length);
285 return ret;
286 }
287 offset += ret;
288 }
289
290 iwl_mvm_nvm_fixups(mvm, section, data, offset);
291
292 IWL_DEBUG_EEPROM(mvm->trans->dev,
293 "NVM section %d read completed\n", section);
294 return offset;
295 }
296
297 static struct iwl_nvm_data *
298 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
299 {
300 struct iwl_nvm_section *sections = mvm->nvm_sections;
301 const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
302 bool lar_enabled;
303 u32 mac_addr0, mac_addr1;
304
305 /* Checking for required sections */
306 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
307 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
308 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
309 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
310 return NULL;
311 }
312 } else {
313 /* SW and REGULATORY sections are mandatory */
314 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
315 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
316 IWL_ERR(mvm,
317 "Can't parse empty family 8000 OTP/NVM sections\n");
318 return NULL;
319 }
320 /* MAC_OVERRIDE or at least HW section must exist */
321 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
322 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
323 IWL_ERR(mvm,
324 "Can't parse mac_address, empty sections\n");
325 return NULL;
326 }
327
328 /* PHY_SKU section is mandatory in B0 */
329 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
330 IWL_ERR(mvm,
331 "Can't parse phy_sku in B0, empty sections\n");
332 return NULL;
333 }
334 }
335
336 if (WARN_ON(!mvm->cfg))
337 return NULL;
338
339 /* read the mac address from WFMP registers */
340 mac_addr0 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_0);
341 mac_addr1 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_1);
342
343 hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
344 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
345 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
346 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
347 mac_override =
348 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
349 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
350
351 lar_enabled = !iwlwifi_mod_params.lar_disable &&
352 fw_has_capa(&mvm->fw->ucode_capa,
353 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
354
355 return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
356 regulatory, mac_override, phy_sku,
357 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
358 lar_enabled, mac_addr0, mac_addr1);
359 }
360
361 #define MAX_NVM_FILE_LEN 16384
362
363 /*
364 * Reads external NVM from a file into mvm->nvm_sections
365 *
366 * HOW TO CREATE THE NVM FILE FORMAT:
367 * ------------------------------
368 * 1. create hex file, format:
369 * 3800 -> header
370 * 0000 -> header
371 * 5a40 -> data
372 *
373 * rev - 6 bit (word1)
374 * len - 10 bit (word1)
375 * id - 4 bit (word2)
376 * rsv - 12 bit (word2)
377 *
378 * 2. flip 8bits with 8 bits per line to get the right NVM file format
379 *
380 * 3. create binary file from the hex file
381 *
382 * 4. save as "iNVM_xxx.bin" under /lib/firmware
383 */
384 static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
385 {
386 int ret, section_size;
387 u16 section_id;
388 const struct firmware *fw_entry;
389 const struct {
390 __le16 word1;
391 __le16 word2;
392 u8 data[];
393 } *file_sec;
394 const u8 *eof;
395 u8 *temp;
396 int max_section_size;
397 const __le32 *dword_buff;
398
399 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
400 #define NVM_WORD2_ID(x) (x >> 12)
401 #define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
402 #define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
403 #define NVM_HEADER_0 (0x2A504C54)
404 #define NVM_HEADER_1 (0x4E564D2A)
405 #define NVM_HEADER_SIZE (4 * sizeof(u32))
406
407 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
408
409 /* Maximal size depends on HW family and step */
410 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
411 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
412 else
413 max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
414
415 /*
416 * Obtain NVM image via request_firmware. Since we already used
417 * request_firmware_nowait() for the firmware binary load and only
418 * get here after that we assume the NVM request can be satisfied
419 * synchronously.
420 */
421 ret = request_firmware(&fw_entry, mvm->nvm_file_name,
422 mvm->trans->dev);
423 if (ret) {
424 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
425 mvm->nvm_file_name, ret);
426 return ret;
427 }
428
429 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
430 mvm->nvm_file_name, fw_entry->size);
431
432 if (fw_entry->size > MAX_NVM_FILE_LEN) {
433 IWL_ERR(mvm, "NVM file too large\n");
434 ret = -EINVAL;
435 goto out;
436 }
437
438 eof = fw_entry->data + fw_entry->size;
439 dword_buff = (__le32 *)fw_entry->data;
440
441 /* some NVM file will contain a header.
442 * The header is identified by 2 dwords header as follow:
443 * dword[0] = 0x2A504C54
444 * dword[1] = 0x4E564D2A
445 *
446 * This header must be skipped when providing the NVM data to the FW.
447 */
448 if (fw_entry->size > NVM_HEADER_SIZE &&
449 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
450 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
451 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
452 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
453 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
454 le32_to_cpu(dword_buff[3]));
455
456 /* nvm file validation, dword_buff[2] holds the file version */
457 if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
458 le32_to_cpu(dword_buff[2]) < 0xE4A) ||
459 (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
460 le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
461 ret = -EFAULT;
462 goto out;
463 }
464 } else {
465 file_sec = (void *)fw_entry->data;
466 }
467
468 while (true) {
469 if (file_sec->data > eof) {
470 IWL_ERR(mvm,
471 "ERROR - NVM file too short for section header\n");
472 ret = -EINVAL;
473 break;
474 }
475
476 /* check for EOF marker */
477 if (!file_sec->word1 && !file_sec->word2) {
478 ret = 0;
479 break;
480 }
481
482 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
483 section_size =
484 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
485 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
486 } else {
487 section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
488 le16_to_cpu(file_sec->word2));
489 section_id = NVM_WORD1_ID_FAMILY_8000(
490 le16_to_cpu(file_sec->word1));
491 }
492
493 if (section_size > max_section_size) {
494 IWL_ERR(mvm, "ERROR - section too large (%d)\n",
495 section_size);
496 ret = -EINVAL;
497 break;
498 }
499
500 if (!section_size) {
501 IWL_ERR(mvm, "ERROR - section empty\n");
502 ret = -EINVAL;
503 break;
504 }
505
506 if (file_sec->data + section_size > eof) {
507 IWL_ERR(mvm,
508 "ERROR - NVM file too short for section (%d bytes)\n",
509 section_size);
510 ret = -EINVAL;
511 break;
512 }
513
514 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
515 "Invalid NVM section ID %d\n", section_id)) {
516 ret = -EINVAL;
517 break;
518 }
519
520 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
521 if (!temp) {
522 ret = -ENOMEM;
523 break;
524 }
525
526 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
527
528 kfree(mvm->nvm_sections[section_id].data);
529 mvm->nvm_sections[section_id].data = temp;
530 mvm->nvm_sections[section_id].length = section_size;
531
532 /* advance to the next section */
533 file_sec = (void *)(file_sec->data + section_size);
534 }
535 out:
536 release_firmware(fw_entry);
537 return ret;
538 }
539
540 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
541 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
542 {
543 int i, ret = 0;
544 struct iwl_nvm_section *sections = mvm->nvm_sections;
545
546 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
547
548 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
549 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
550 continue;
551 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
552 sections[i].length);
553 if (ret < 0) {
554 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
555 break;
556 }
557 }
558 return ret;
559 }
560
561 int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
562 {
563 int ret, section;
564 u32 size_read = 0;
565 u8 *nvm_buffer, *temp;
566 const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
567 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
568
569 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
570 return -EINVAL;
571
572 /* load NVM values from nic */
573 if (read_nvm_from_nic) {
574 /* Read From FW NVM */
575 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
576
577 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
578 GFP_KERNEL);
579 if (!nvm_buffer)
580 return -ENOMEM;
581 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
582 /* we override the constness for initial read */
583 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
584 size_read);
585 if (ret < 0)
586 continue;
587 size_read += ret;
588 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
589 if (!temp) {
590 ret = -ENOMEM;
591 break;
592 }
593
594 iwl_mvm_nvm_fixups(mvm, section, temp, ret);
595
596 mvm->nvm_sections[section].data = temp;
597 mvm->nvm_sections[section].length = ret;
598
599 #ifdef CONFIG_IWLWIFI_DEBUGFS
600 switch (section) {
601 case NVM_SECTION_TYPE_SW:
602 mvm->nvm_sw_blob.data = temp;
603 mvm->nvm_sw_blob.size = ret;
604 break;
605 case NVM_SECTION_TYPE_CALIBRATION:
606 mvm->nvm_calib_blob.data = temp;
607 mvm->nvm_calib_blob.size = ret;
608 break;
609 case NVM_SECTION_TYPE_PRODUCTION:
610 mvm->nvm_prod_blob.data = temp;
611 mvm->nvm_prod_blob.size = ret;
612 break;
613 case NVM_SECTION_TYPE_PHY_SKU:
614 mvm->nvm_phy_sku_blob.data = temp;
615 mvm->nvm_phy_sku_blob.size = ret;
616 break;
617 default:
618 if (section == mvm->cfg->nvm_hw_section_num) {
619 mvm->nvm_hw_blob.data = temp;
620 mvm->nvm_hw_blob.size = ret;
621 break;
622 }
623 }
624 #endif
625 }
626 if (!size_read)
627 IWL_ERR(mvm, "OTP is blank\n");
628 kfree(nvm_buffer);
629 }
630
631 /* Only if PNVM selected in the mod param - load external NVM */
632 if (mvm->nvm_file_name) {
633 /* read External NVM file from the mod param */
634 ret = iwl_mvm_read_external_nvm(mvm);
635 if (ret) {
636 /* choose the nvm_file name according to the
637 * HW step
638 */
639 if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
640 SILICON_B_STEP)
641 mvm->nvm_file_name = nvm_file_B;
642 else
643 mvm->nvm_file_name = nvm_file_C;
644
645 if ((ret == -EFAULT || ret == -ENOENT) &&
646 mvm->nvm_file_name) {
647 /* in case nvm file was failed try again */
648 ret = iwl_mvm_read_external_nvm(mvm);
649 if (ret)
650 return ret;
651 } else {
652 return ret;
653 }
654 }
655 }
656
657 /* parse the relevant nvm sections */
658 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
659 if (!mvm->nvm_data)
660 return -ENODATA;
661 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
662 mvm->nvm_data->nvm_version);
663
664 return 0;
665 }
666
667 struct iwl_mcc_update_resp *
668 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
669 enum iwl_mcc_source src_id)
670 {
671 struct iwl_mcc_update_cmd mcc_update_cmd = {
672 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
673 .source_id = (u8)src_id,
674 };
675 struct iwl_mcc_update_resp *mcc_resp, *resp_cp = NULL;
676 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = NULL;
677 struct iwl_rx_packet *pkt;
678 struct iwl_host_cmd cmd = {
679 .id = MCC_UPDATE_CMD,
680 .flags = CMD_WANT_SKB,
681 .data = { &mcc_update_cmd },
682 };
683
684 int ret;
685 u32 status;
686 int resp_len, n_channels;
687 u16 mcc;
688 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
689 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
690
691 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
692 return ERR_PTR(-EOPNOTSUPP);
693
694 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
695 if (!resp_v2)
696 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
697
698 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
699 alpha2[0], alpha2[1], src_id);
700
701 ret = iwl_mvm_send_cmd(mvm, &cmd);
702 if (ret)
703 return ERR_PTR(ret);
704
705 pkt = cmd.resp_pkt;
706
707 /* Extract MCC response */
708 if (resp_v2) {
709 mcc_resp = (void *)pkt->data;
710 n_channels = __le32_to_cpu(mcc_resp->n_channels);
711 } else {
712 mcc_resp_v1 = (void *)pkt->data;
713 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels);
714 }
715
716 resp_len = sizeof(struct iwl_mcc_update_resp) + n_channels *
717 sizeof(__le32);
718
719 resp_cp = kzalloc(resp_len, GFP_KERNEL);
720 if (!resp_cp) {
721 ret = -ENOMEM;
722 goto exit;
723 }
724
725 if (resp_v2) {
726 memcpy(resp_cp, mcc_resp, resp_len);
727 } else {
728 resp_cp->status = mcc_resp_v1->status;
729 resp_cp->mcc = mcc_resp_v1->mcc;
730 resp_cp->cap = mcc_resp_v1->cap;
731 resp_cp->source_id = mcc_resp_v1->source_id;
732 resp_cp->n_channels = mcc_resp_v1->n_channels;
733 memcpy(resp_cp->channels, mcc_resp_v1->channels,
734 n_channels * sizeof(__le32));
735 }
736
737 status = le32_to_cpu(resp_cp->status);
738
739 mcc = le16_to_cpu(resp_cp->mcc);
740
741 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
742 if (mcc == 0) {
743 mcc = 0x3030; /* "00" - world */
744 resp_cp->mcc = cpu_to_le16(mcc);
745 }
746
747 IWL_DEBUG_LAR(mvm,
748 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
749 status, mcc, mcc >> 8, mcc & 0xff,
750 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
751
752 exit:
753 iwl_free_resp(&cmd);
754 if (ret)
755 return ERR_PTR(ret);
756 return resp_cp;
757 }
758
759 #ifdef CONFIG_ACPI
760 #define WRD_METHOD "WRDD"
761 #define WRDD_WIFI (0x07)
762 #define WRDD_WIGIG (0x10)
763
764 static u32 iwl_mvm_wrdd_get_mcc(struct iwl_mvm *mvm, union acpi_object *wrdd)
765 {
766 union acpi_object *mcc_pkg, *domain_type, *mcc_value;
767 u32 i;
768
769 if (wrdd->type != ACPI_TYPE_PACKAGE ||
770 wrdd->package.count < 2 ||
771 wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
772 wrdd->package.elements[0].integer.value != 0) {
773 IWL_DEBUG_LAR(mvm, "Unsupported wrdd structure\n");
774 return 0;
775 }
776
777 for (i = 1 ; i < wrdd->package.count ; ++i) {
778 mcc_pkg = &wrdd->package.elements[i];
779
780 if (mcc_pkg->type != ACPI_TYPE_PACKAGE ||
781 mcc_pkg->package.count < 2 ||
782 mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
783 mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
784 mcc_pkg = NULL;
785 continue;
786 }
787
788 domain_type = &mcc_pkg->package.elements[0];
789 if (domain_type->integer.value == WRDD_WIFI)
790 break;
791
792 mcc_pkg = NULL;
793 }
794
795 if (mcc_pkg) {
796 mcc_value = &mcc_pkg->package.elements[1];
797 return mcc_value->integer.value;
798 }
799
800 return 0;
801 }
802
803 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
804 {
805 acpi_handle root_handle;
806 acpi_handle handle;
807 struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
808 acpi_status status;
809 u32 mcc_val;
810 struct pci_dev *pdev = to_pci_dev(mvm->dev);
811
812 root_handle = ACPI_HANDLE(&pdev->dev);
813 if (!root_handle) {
814 IWL_DEBUG_LAR(mvm,
815 "Could not retrieve root port ACPI handle\n");
816 return -ENOENT;
817 }
818
819 /* Get the method's handle */
820 status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle);
821 if (ACPI_FAILURE(status)) {
822 IWL_DEBUG_LAR(mvm, "WRD method not found\n");
823 return -ENOENT;
824 }
825
826 /* Call WRDD with no arguments */
827 status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
828 if (ACPI_FAILURE(status)) {
829 IWL_DEBUG_LAR(mvm, "WRDC invocation failed (0x%x)\n", status);
830 return -ENOENT;
831 }
832
833 mcc_val = iwl_mvm_wrdd_get_mcc(mvm, wrdd.pointer);
834 kfree(wrdd.pointer);
835 if (!mcc_val)
836 return -ENOENT;
837
838 mcc[0] = (mcc_val >> 8) & 0xff;
839 mcc[1] = mcc_val & 0xff;
840 mcc[2] = '\0';
841 return 0;
842 }
843 #else /* CONFIG_ACPI */
844 static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
845 {
846 return -ENOENT;
847 }
848 #endif
849
850 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
851 {
852 bool tlv_lar;
853 bool nvm_lar;
854 int retval;
855 struct ieee80211_regdomain *regd;
856 char mcc[3];
857
858 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
859 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
860 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
861 nvm_lar = mvm->nvm_data->lar_enabled;
862 if (tlv_lar != nvm_lar)
863 IWL_INFO(mvm,
864 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
865 tlv_lar ? "enabled" : "disabled",
866 nvm_lar ? "enabled" : "disabled");
867 }
868
869 if (!iwl_mvm_is_lar_supported(mvm))
870 return 0;
871
872 /*
873 * try to replay the last set MCC to FW. If it doesn't exist,
874 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
875 */
876 retval = iwl_mvm_init_fw_regd(mvm);
877 if (retval != -ENOENT)
878 return retval;
879
880 /*
881 * Driver regulatory hint for initial update, this also informs the
882 * firmware we support wifi location updates.
883 * Disallow scans that might crash the FW while the LAR regdomain
884 * is not set.
885 */
886 mvm->lar_regdom_set = false;
887
888 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
889 if (IS_ERR_OR_NULL(regd))
890 return -EIO;
891
892 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
893 !iwl_mvm_get_bios_mcc(mvm, mcc)) {
894 kfree(regd);
895 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
896 MCC_SOURCE_BIOS, NULL);
897 if (IS_ERR_OR_NULL(regd))
898 return -EIO;
899 }
900
901 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
902 kfree(regd);
903 return retval;
904 }
905
906 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
907 struct iwl_rx_cmd_buffer *rxb)
908 {
909 struct iwl_rx_packet *pkt = rxb_addr(rxb);
910 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
911 enum iwl_mcc_source src;
912 char mcc[3];
913 struct ieee80211_regdomain *regd;
914
915 lockdep_assert_held(&mvm->mutex);
916
917 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
918 return;
919
920 mcc[0] = notif->mcc >> 8;
921 mcc[1] = notif->mcc & 0xff;
922 mcc[2] = '\0';
923 src = notif->source_id;
924
925 IWL_DEBUG_LAR(mvm,
926 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
927 mcc, src);
928 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
929 if (IS_ERR_OR_NULL(regd))
930 return;
931
932 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
933 kfree(regd);
934 }
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