Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-fw.h
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3 * This file is provided under a dual BSD/GPLv2 license. When using or
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8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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29 * Intel Linux Wireless <ilw@linux.intel.com>
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63 *****************************************************************************/
64
65 #ifndef __iwl_fw_h__
66 #define __iwl_fw_h__
67 #include <linux/types.h>
68 #include <net/mac80211.h>
69
70 #include "iwl-fw-file.h"
71 #include "iwl-fw-error-dump.h"
72
73 /**
74 * enum iwl_ucode_type
75 *
76 * The type of ucode.
77 *
78 * @IWL_UCODE_REGULAR: Normal runtime ucode
79 * @IWL_UCODE_INIT: Initial ucode
80 * @IWL_UCODE_WOWLAN: Wake on Wireless enabled ucode
81 * @IWL_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
82 */
83 enum iwl_ucode_type {
84 IWL_UCODE_REGULAR,
85 IWL_UCODE_INIT,
86 IWL_UCODE_WOWLAN,
87 IWL_UCODE_REGULAR_USNIFFER,
88 IWL_UCODE_TYPE_MAX,
89 };
90
91 /*
92 * enumeration of ucode section.
93 * This enumeration is used directly for older firmware (before 16.0).
94 * For new firmware, there can be up to 4 sections (see below) but the
95 * first one packaged into the firmware file is the DATA section and
96 * some debugging code accesses that.
97 */
98 enum iwl_ucode_sec {
99 IWL_UCODE_SECTION_DATA,
100 IWL_UCODE_SECTION_INST,
101 };
102
103 struct iwl_ucode_capabilities {
104 u32 max_probe_length;
105 u32 n_scan_channels;
106 u32 standard_phy_calibration_size;
107 u32 flags;
108 u32 api[IWL_API_ARRAY_SIZE];
109 u32 capa[IWL_CAPABILITIES_ARRAY_SIZE];
110 };
111
112 /* one for each uCode image (inst/data, init/runtime/wowlan) */
113 struct fw_desc {
114 const void *data; /* vmalloc'ed data */
115 u32 len; /* size in bytes */
116 u32 offset; /* offset in the device */
117 };
118
119 struct fw_img {
120 struct fw_desc sec[IWL_UCODE_SECTION_MAX];
121 bool is_dual_cpus;
122 };
123
124 struct iwl_sf_region {
125 u32 addr;
126 u32 size;
127 };
128
129 /**
130 * struct iwl_fw_cscheme_list - a cipher scheme list
131 * @size: a number of entries
132 * @cs: cipher scheme entries
133 */
134 struct iwl_fw_cscheme_list {
135 u8 size;
136 struct iwl_fw_cipher_scheme cs[];
137 } __packed;
138
139 /**
140 * struct iwl_fw - variables associated with the firmware
141 *
142 * @ucode_ver: ucode version from the ucode file
143 * @fw_version: firmware version string
144 * @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
145 * @ucode_capa: capabilities parsed from the ucode file.
146 * @enhance_sensitivity_table: device can do enhanced sensitivity.
147 * @init_evtlog_ptr: event log offset for init ucode.
148 * @init_evtlog_size: event log size for init ucode.
149 * @init_errlog_ptr: error log offfset for init ucode.
150 * @inst_evtlog_ptr: event log offset for runtime ucode.
151 * @inst_evtlog_size: event log size for runtime ucode.
152 * @inst_errlog_ptr: error log offfset for runtime ucode.
153 * @mvm_fw: indicates this is MVM firmware
154 * @cipher_scheme: optional external cipher scheme.
155 * @human_readable: human readable version
156 * @sdio_adma_addr: the default address to set for the ADMA in SDIO mode until
157 * we get the ALIVE from the uCode
158 * @dbg_dest_tlv: points to the destination TLV for debug
159 * @dbg_conf_tlv: array of pointers to configuration TLVs for debug
160 * @dbg_conf_tlv_len: lengths of the @dbg_conf_tlv entries
161 * @dbg_trigger_tlv: array of pointers to triggers TLVs
162 * @dbg_trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
163 * @dbg_dest_reg_num: num of reg_ops in %dbg_dest_tlv
164 */
165 struct iwl_fw {
166 u32 ucode_ver;
167
168 char fw_version[ETHTOOL_FWVERS_LEN];
169
170 /* ucode images */
171 struct fw_img img[IWL_UCODE_TYPE_MAX];
172
173 struct iwl_ucode_capabilities ucode_capa;
174 bool enhance_sensitivity_table;
175
176 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
177 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
178
179 struct iwl_tlv_calib_ctrl default_calib[IWL_UCODE_TYPE_MAX];
180 u32 phy_config;
181 u8 valid_tx_ant;
182 u8 valid_rx_ant;
183
184 bool mvm_fw;
185
186 struct ieee80211_cipher_scheme cs[IWL_UCODE_MAX_CS];
187 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
188
189 u32 sdio_adma_addr;
190
191 struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv;
192 struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX];
193 size_t dbg_conf_tlv_len[FW_DBG_CONF_MAX];
194 struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX];
195 size_t dbg_trigger_tlv_len[FW_DBG_TRIGGER_MAX];
196 u8 dbg_dest_reg_num;
197 };
198
199 static inline const char *get_fw_dbg_mode_string(int mode)
200 {
201 switch (mode) {
202 case SMEM_MODE:
203 return "SMEM";
204 case EXTERNAL_MODE:
205 return "EXTERNAL_DRAM";
206 case MARBH_MODE:
207 return "MARBH";
208 default:
209 return "UNKNOWN";
210 }
211 }
212
213 static inline bool
214 iwl_fw_dbg_conf_usniffer(const struct iwl_fw *fw, u8 id)
215 {
216 const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg_conf_tlv[id];
217
218 if (!conf_tlv)
219 return false;
220
221 return conf_tlv->usniffer;
222 }
223
224 #define iwl_fw_dbg_trigger_enabled(fw, id) ({ \
225 void *__dbg_trigger = (fw)->dbg_trigger_tlv[(id)]; \
226 unlikely(__dbg_trigger); \
227 })
228
229 static inline struct iwl_fw_dbg_trigger_tlv*
230 iwl_fw_dbg_get_trigger(const struct iwl_fw *fw, u8 id)
231 {
232 if (WARN_ON(id >= ARRAY_SIZE(fw->dbg_trigger_tlv)))
233 return NULL;
234
235 return fw->dbg_trigger_tlv[id];
236 }
237
238 #endif /* __iwl_fw_h__ */
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